Method for forming high dielectric metal oxide
By forming a doped silicon dioxide interface layer on the surface of a silicon substrate, the leakage and diffusion problems of high dielectric constant gate oxide layers are solved, simplifying the manufacturing process and reducing costs. This method is suitable for dielectric layers in DRAM capacitors and transistors.
Patent Information
- Application Number
- CN202411398878.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-08-02
- Filing Date
- 2024-10-09
- Publication Date
- 2026-02-06
AI Technical Summary
Existing technologies suffer from leakage and high-temperature diffusion problems when forming gate oxide layers with high dielectric constants, leading to a decrease in dielectric constant. Furthermore, ISSG process equipment is expensive, increasing production costs.
A small amount of silylamine doping is used to form a doped silicon dioxide interface layer on the surface of a silicon substrate by atomic layer deposition or chemical vapor deposition. Combined with high-temperature annealing technology, a high-quality silicon dioxide interface layer is formed to prevent the diffusion of metal oxides to the silicon substrate.
It simplifies the manufacturing process, reduces production costs, increases the dielectric constant of the dielectric layer, and reduces leakage current. It is suitable for dielectric layers of dynamic random access memory and gate oxide layers of transistors.
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Figure CN121487323A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present invention is related to the technical field of semiconductor manufacturing, and in particular to a solution for forming high-k metal oxide films for transistor gate oxide layers. BACKGROUND
[0002] In the field of semiconductor manufacturing, it is a key technology to fabricate high-quality high-k gate oxide layers. Since the dielectric constant of conventional silicon dioxide (SiO2) and silicon nitride (Si3N4) is not sufficient for the gate dielectric constant required by today's nanometer-scale complementary metal-oxide-semiconductor (CMOS) transistors, it is inevitable to use metal oxides with higher dielectric constant as gate dielectric layers.
[0003] For example, hafnium dioxide (HfO2), which is the most commonly used high-k material today, is usually deposited by atomic layer deposition (ALD) using an organic metal precursor containing HfO2, such as tetrakis(ethylmethylamino)hafnium (TEMAH) or tetrakis(dimethylamido)hafnium (TDMAH). An atomic layer of saturated adsorption is deposited on a standard clean silicon wafer substrate, and the silicon wafer substrate is heated to a specific reaction temperature in an oxygen-containing environment (such as water (H2O) or ozone (O3) or oxygen plasma (O2 plasma)) to form a hafnium dioxide film on the surface of the silicon wafer. This process is repeated to achieve the desired thickness of hafnium dioxide. However, the oxygen atoms in hafnium dioxide will diffuse with the substrate atoms (if the substrate is silicon) on the substrate surface during subsequent high-temperature heat treatment, forming a non-uniform layer of silicon dioxide (SiO2) or silicate (SiOx, x < 2) on the substrate surface. x Si y O zAn interfacial layer between the Si / HfO2 interface. This interface layer is of poor quality, causing leakage and affecting the crystalline structure of the hafnium oxide, greatly reducing the equivalent dielectric constant of the hafnium oxide. Therefore, the current improvement method uses the ISSG (In-Situ Steam Generation) process to pass ozone or water vapor to form a high-density and extremely thin and uniform high-quality silicon dioxide layer on the surface of the silicon wafer, and then deposit hafnium oxide. The extremely high-density silicon dioxide layer can effectively prevent the diffusion of hafnium oxide and the substrate silicon, thereby improving the equivalent dielectric constant. However, the ISSG process technology equipment is expensive, and additional high-temperature combustion reactions are required, thereby increasing the cost of production. Therefore, how to simplify the manufacturing process of high-dielectric metal gate oxide layers and reduce production costs is a direction that deserves attention in this technical field. SUMMARY
[0004] The present application uses a small amount of silane amine (Trisilyl amine, TSA, chemical formula N(SiH3)3) to make silicon dioxide, which is incorporated into high-dielectric metal oxides. For example, when depositing hafnium oxide, the organic metal compound precursors that can be used include Tetrakis(ethylmethylamino)hafnium (TEMAH), Tetrakis(dimethylamido)hafnium (TDMAH), etc. The dopant species silicon dioxide uses TSA as the precursor, and is deposited in an oxygen source (water (H2O) or ozone (O3) or oxygen plasma (O2 plasma)) environment using ALD or CVD (Chemical Vapor Deposition) methods. In this way, the silicon dioxide and hafnium oxide are mixed or stacked, and finally the silicon-doped hafnium oxide is formed. Then, with the help of high-temperature annealing technology, a high-quality silicon dioxide interfacial layer is formed at the interface between the substrate and the hafnium oxide by the movement of the doped silicon-oxygen atoms, effectively preventing the diffusion of hafnium oxide and the substrate. This method eliminates the need for the traditional ISSG process to form a silicon dioxide barrier layer before depositing hafnium oxide. In this way, not only can the complexity of the process be simplified, but also a high-dielectric constant gate dielectric layer can be obtained. In addition, ALD technology can be used alone to deposit high-quality SiO2 on the surface of the silicon substrate after standard cleaning using TSA as the precursor, and then use the same ALD equipment to deposit high-dielectric constant metal oxides. This method simplifies the manufacturing process and is different from the conversion of different types of equipment (such as ISSG) to produce a high-quality and extremely thin SiO2 layer on the surface of the substrate.
[0005] This method can also be applied to the deposition of dielectric layers of dynamic random access memory (DRAM) capacitors. Not only can the leakage rate be controlled, but the dielectric constant of the dielectric layer can also be improved. Currently, the dielectric layer of a DRAM capacitor or the gate oxide layer of a transistor is developed towards a high dielectric constant metal oxide, such as hafnium dioxide, zirconium dioxide (ZrO2), lanthanum oxide (La2O3), aluminum oxide (Al2O3), binary oxides, or metal-doped (aluminum, zirconium, silicon, lanthanum) ternary oxides. The main purpose of aluminum doping is to assist the formation of a high dielectric constant crystalline phase (orthogonal) of hafnium dioxide, or to reduce the crystallization rate to suppress the phenomenon of grain boundary leakage current. However, aluminum doping is also accompanied by the formation of an interface spike (spiking) due to the interdiffusion reaction between aluminum and silicon in the silicon substrate during high-temperature annealing, resulting in leakage and reducing the overall equivalent capacitance. Therefore, the current solution is to first form a high-quality silicon dioxide barrier layer on the surface of the silicon wafer between the silicon substrate and the metal dielectric layer, and then form a high-performance metal oxide dielectric layer. Therefore, the present method is also suitable for the process of high-dielectric-constant metal oxide for DRAM capacitors, which naturally forms a high-quality silicon dioxide interface between the metal oxide and the silicon substrate, prevents the leakage of the metal oxide dielectric layer, maintains the capacitance, and improves the overall equivalent dielectric constant.
[0006] In order to make the above features and advantages of the present application more obvious and easy to understand, the following preferred embodiments are described in detail below, and the accompanying drawings are used for illustration. BRIEF DESCRIPTION OF DRAWINGS
[0007] The differences between the present application and the prior art, various embodiments, will be described below with reference to the accompanying drawings, which are used to illustrate but not to limit the scope in any way, wherein similar reference numerals represent similar components, and wherein:
[0008] Figure 1 Figure 1 A、 Figure 1 B) shows a schematic diagram of an atomic layer deposition system and process.
[0009] Figure 2 Figure 2 A、 Figure 2 B、 Figure 2 C、 Figure 2 D、 Figure 2 E) shows a schematic diagram of a known method for depositing a metal oxide dielectric layer.
[0010] Figure 3 Figure 3 A、 Figure 3 B、 Figure 3 C、 Figure 3 D) The schematic diagram of the manufacturing method for depositing metal oxide dielectric layer according to the present application.
[0011] Figure 4 The X-ray photoelectron spectroscopy composition analysis diagram of hafnium dioxide thin film deposited by using the silane-based amine precursor according to the present application.
[0012] Figure 5 The schematic diagram of the manufacturing process according to the present application. DETAILED DESCRIPTION
[0013] The present application is best understood with reference to the detailed description and the accompanying drawings. Various embodiments will be discussed with reference to the drawings. However, one skilled in the art will readily recognize that the detailed description given herein with respect to the drawings is only for explanatory purposes as the methods and systems can extend beyond the specific embodiments described. For example, those skilled in the art will recognize that the teachings and specific applications disclosed in this disclosure can produce a variety of methods and systems to achieve the functions described in this disclosure. Therefore, any method can extend beyond the particular embodiments described in connection with the drawings.
[0014] Reference is made to Figure 1 , Figure 1 The schematic diagram of the system and principle of atomic layer deposition (ALD) is described. ALD technology is widely used in nanometer thin film deposition process, such as high dielectric constant dielectric layer, mainly due to its excellent thin film deposition ability. Its characteristics include;
[0015] 1. Almost 100% excellent step coverage property;
[0016] 2. Precise thin film thickness control;
[0017] 3. Excellent uniformity of large area thin film;
[0018] 4. Excellent process stability; and
[0019] 5. Lower temperature process
[0020] These outstanding performances are due to the unique saturated chemical adsorption and self-limiting deposition mechanism of ALD, which is different from traditional coating technology. It is these characteristics that make atomic layer deposition an advanced thin film deposition technology that has attracted much attention.
[0021] Figure 1 is a schematic diagram of an atomic layer deposition system and process, wherein Figure 1 A is a schematic diagram of an atomic layer deposition system, such as Figure 1A shows that the atomic layer deposition system 100 has a reaction cavity 101, and the precursor 103 to be reacted is introduced into the closed cavity 101 in sequence according to the timing and flow diagram 104 by the precursor conduit 102, and is adsorbed on the surface of the substrate 105, and at a certain temperature, the expected thin film is formed on the surface of the substrate by reaction. Figure 1 B is a more detailed process diagram of atomic layer deposition. For example, if hafnium dioxide is deposited on the substrate, step A is to pass TEMAH for 1000 milliseconds, so that the substrate surface is saturated by chemical adsorption, and TEMAH is adsorbed on the substrate 105. Then in step B, nitrogen gas (N2) is passed for 1500 milliseconds to carry away excess precursors from the reaction cavity 101, leaving only a layer of TEMAH precursor adsorbed on the surface of the substrate 105. Then in step C, water vapor (H2O) is passed for 1000 milliseconds, and the substrate surface is heated to 150-300°C, so that water vapor reacts with TEMAH to form hafnium dioxide on the surface of the substrate 105. Then in step D, nitrogen gas is passed for 1500 milliseconds to carry away excess water vapor and byproducts from the reaction cavity 101. In this way, only one kind of precursor is introduced at a time, and the precursors are introduced into the reaction cavity in sequence. Excess precursors and byproducts are carried away by argon (Ar) or nitrogen (N2) purge to achieve self-limiting. The overall reaction time is called a cycle of atomic layer deposition. After repeating several cycles, the desired thickness of the metal oxide dielectric layer is achieved.
[0022] Figure 2 For a schematic diagram of depositing a metal oxide dielectric layer known in the art, please refer to Figure 2 A, first provide a substrate 201. In nanoscale semiconductor processes, the substrate 201 can be a silicon wafer with a flat surface, or a silicon wafer surface with etched fin patterns, or a silicon wafer surface with formed capacitor column patterns, but not limited to this. The surface of the substrate must first remove the loose natural oxide. Figure 2 B, on the substrate 201, an ultra-thin and dense silicon dioxide layer 202 is formed by the ISSG process. The deposition conditions of the reaction are as follows: the reaction gas is oxygen or hydrogen, the gas flow rate is 10-30 slm (L / min), the hydrogen flow rate is 5-15 slm, the flow rate ratio of oxygen to hydrogen is 2:1, the operating pressure is <20 torr (about mmHg), and the substrate temperature is >1000°C. Then, please refer to Figure 2C. Atomic layer deposition is used to form a high dielectric constant metal oxide film 203, such as hafnium dioxide, zirconium dioxide, lanthanum oxide, aluminum oxide, or metal-doped (aluminum, zirconium, silicon, lanthanum) ternary oxides, but not limited to, for example, hafnium dioxide, whose precursor can be TEMAH or TDMAH, one pulse time is between 0.5-2 seconds, temperature: 25-150°C, reaction gas type can be water vapor or ozone or oxygen plasma, gas flow is 50-100 sccm, substrate temperature: 150-300°C, operating pressure (102-10-2torr), one pulse time is between 0.5-2 seconds. Next Figure 2 D. A rapid annealing process is used to optimize the structure of the metal oxide dielectric layer, further reduce the leakage rate, improve the crystalline structure of the metal oxide dielectric layer, and achieve a higher dielectric constant. Rapid annealing is performed in an inert gas environment such as argon or nitrogen, with a gas flow of 0.5-10 slm, a pressure of 10-2-102torr, an annealing temperature of 400-900°C, and a time of less than 60 seconds. Next Figure 2 E. A gate material 204 is deposited on the metal oxide dielectric layer 203. In general, in nanoscale CMOS processes, the gate material is usually based on titanium nitride (TiN) or tantalum nitride (TaN).
[0023] Figure 3 A schematic diagram of the deposition of a metal oxide dielectric layer according to the present application is shown in FIG. 1, wherein Figure 3 A and Figure 2 A. A substrate 301 is provided with a native oxide layer removed, and then Figure 3 B. Before depositing a dense silicon dioxide layer, atomic layer deposition is performed to form a metal oxide 303 containing silane-based amine, according to the deposition method described in Figure 1 A metal oxide 303 is formed, and it is worth noting that the metal oxide at this time contains a certain proportion of silicon (or silicon dioxide) doped therein. Next, a rapid annealing process is performed to optimize the metal oxide 303, and the silicon doped in the metal oxide is also pushed to the interface between the substrate 301 and the metal oxide 303 at this time, forming a dense silicon dioxide interface layer 302. During the rapid annealing process, it is found that the doped silicon atoms are pushed to the interface between the substrate 301 and the metal oxide 303, which is a significant finding of the present application. Using this technology, there is no need to use ISSG technology to deposit silicon dioxide, which not only greatly reduces the complexity of the prior art, but also greatly reduces the manufacturing cost.
[0024] For example, if the silane-based amine is used to form hafnium dioxide, the concentration of the silane-based amine is between 0.1% and 10%. The silane-based amine can be mixed with the hafnium dioxide precursor TEMAH or TDMAH in the atomic molar ratio, and then deposited by chemical vapor deposition to form a hafnium dioxide film containing silicon doping, or deposited by atomic layer deposition to form a hafnium dioxide film containing silicon doping. After the desired number of cycles to reach the desired thickness, an annealing process is performed. Alternatively, the silane-based amine can be used to form a silicon dioxide film by atomic layer deposition, and then combined with several hafnium dioxide precursor deposition cycles to form a hafnium dioxide film. For example, if a 4% silicon-containing hafnium dioxide film is to be synthesized, one cycle of silicon dioxide film deposition using the silane-based amine precursor by atomic layer deposition can be performed, followed by 24 cycles of hafnium dioxide deposition using the TEMAH precursor by atomic layer deposition. This deposition process is repeated until the desired thickness is achieved. The resulting metal oxide 303 is actually a multilayer structure containing silicon dioxide. After rapid annealing, a layered structure of hafnium dioxide is obtained. Figure 3 The rapid annealing process can also optimize the lattice structure of the hafnium dioxide. Generally, hafnium dioxide with an orthorhombic or tetragonal lattice arrangement has a higher dielectric constant.
[0025] The deposition conditions for hafnium dioxide are as follows: Figure 3 The deposition conditions for hafnium dioxide are as follows:
[0026] Figure 4 To deposit hafnium dioxide containing 4% silicon (or silicon dioxide) on a silicon substrate using the present application, the XPS composition analysis chart 400 of the test piece from the surface to the interior after rapid annealing is analyzed by XPS (X-ray Photoelectron Spectroscopy). In the chart, 401 is the composition distribution curve of hafnium (Hf), 402 is the composition distribution curve of oxygen (O), and 403 is the composition distribution curve of silicon (Si). Figure 4In the surface of the sample, the main components are hafnium and oxygen. When analyzing the sample, the signal of silicon gradually becomes stronger. In the oval marked area 404, the signal of hafnium becomes weaker, and the signal of silicon gradually becomes stronger. At this time, the signal of oxygen still maintains a certain intensity, indicating that this area should be a silicon dioxide layer. This indicates that a silicon dioxide interface layer 302 is formed between hafnium oxide (metal oxide 303) and the Si substrate 301 by the present application.
[0027] According to the above description, when depositing a metal oxide dielectric layer using a metal oxide precursor, if a small amount of silane-based amine is added, a high-quality silicon dioxide interface layer can be formed between the substrate and the metal oxide dielectric layer to prevent metal diffusion to the silicon substrate and cause leakage. Figure 5 A schematic diagram of a method for forming a metal oxide dielectric layer according to the present application is shown. First, step 501, a substrate is provided, which can be a semiconductor chip, such as a silicon chip, but is not limited to this, and the native oxide layer on the surface of the substrate is removed. Then, step 502, the substrate is placed in a closed chamber, the main purpose of which is to control the conditions during thin film deposition, such as precursor, inert gas flow, pressure, temperature, etc. Then, step 503, a silicon-doped metal oxide dielectric layer is formed on the substrate, and then step 504, the substrate is rapidly annealed to optimize the equivalent dielectric constant of the metal oxide. It is worth mentioning that in step 503, the silicon-doped layer is formed by using silane-based amine as the reaction precursor, so that a high-quality silicon dioxide interface layer can be obtained after rapid annealing in step 504. The method of step 503 can use an organic metal precursor pre-doped with a silane-based amine precursor, and then introduce an active oxygen source into the closed chamber to react and form. This is a general chemical vapor deposition method, or an atomic layer deposition method, which is a cycle of silane-based amine precursor deposition and silicon dioxide deposition, and a cycle of organic metal precursor deposition and metal oxide deposition. When the desired thickness is formed, step 504 is performed to rapidly anneal and form a silicon dioxide barrier layer between the silicon substrate and the metal oxide. In addition, step 504 can also optimize the dielectric constant of the metal oxide. For example, in the case of hafnium dioxide, at a higher temperature, the hafnium dioxide can form a higher dielectric constant orthorhombic or tetragonal structure, further improving the equivalent dielectric constant of the oxide dielectric layer (SiO2+HfO2).
[0028] The above description of the present application is not intended to limit the scope of the patent rights claimed by the present application. Any changes or modifications made by those skilled in the art without departing from the spirit or scope of the present patent are equivalent changes or designs completed within the spirit disclosed by the present application, and should be included in the claims of the present application.
Claims
1. A method for forming a metal oxide dielectric layer, characterized in that, The method includes: Provide a base material; The substrate is placed into a sealed cavity; A silicon-doped metal oxide dielectric layer is formed in the substrate; Rapid annealing of the substrate forms a silicon dioxide interface layer between the substrate and the metal oxide dielectric layer. The silicon doping process uses silylamine as the reaction precursor.
2. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The silicon-doped metal oxide dielectric layer is formed by reacting an organometallic precursor doped with a silylamine precursor in an environment containing an active oxygen source.
3. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The silicon-doped metal oxide dielectric layer is formed by an atomic layer deposition process, which includes alternating cycles of depositing silicon dioxide with silylamine as a precursor and depositing metal oxide with organometallic precursors.
4. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The metal oxide dielectric layer is a metal oxide or nitride.
5. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The metal oxide dielectric layer is selected from the group consisting of hafnium dioxide, zirconium dioxide, lanthanum oxide, and aluminum oxide.
6. The method for forming a metal oxide dielectric layer as described in claim 2, characterized in that, The organometallic precursor is tetra(ethylmethylamino)hafnium or tetra(dimethylamino)hafnium to form a hafnium dioxide metallide dielectric layer.
7. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The silicon doping concentration is between 0.1% and 10%.
8. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The silicon-doped metal oxide dielectric layer formed in the substrate further comprises: An active oxygen source is introduced into this sealed cavity; The substrate is heated to a temperature between 100°C and 450°C.
9. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The temperature for rapid annealing is between 300°C and 1100°C.
10. The method for forming a metal oxide dielectric layer as described in claim 6, characterized in that, The hafnium dioxide crystal is arranged in an orthorhombic or tetragonal structure.
11. The method for forming a metal oxide dielectric layer as described in claim 8, characterized in that, The active oxygen source is selected from a group consisting of ozone, neutral oxygen atoms, and oxygen ions.
12. The method for forming a metal oxide dielectric layer as described in claim 1, characterized in that, The substrate is selected from the group consisting of silicon, silicon carbide and compound semiconductors.