High-performance boost inverter suitable for WPT system and soft switching method

Abstract

The invention provides a high-performance boost inverter suitable for a WPT system and a soft switching method, and belongs to the technical field of wireless power transmission. The problems that in an existing boost inverter, the number of switching tubes is large, the power level is limited, the inverter is sensitive to parameter changes, and the wide-range operation capacity is weak are solved. The inverter comprises an input voltage Vin, an output capacitor Cin, a first Boost circuit, a second Boost circuit, an output node A and an output node B. The soft switching method comprises the following steps: starting the high-performance boost inverter, and converting a receiving end to a transmitting end; switching tube circulation on-off control of switching tubes in the first Boost circuit and the second Boost circuit is started, the inverter is divided into a working state 1-a working state 8, ZVS opening is achieved through sequential circulation of all the working states, and boost inversion output of the wireless electric energy transmission system is completed.

Description

TECHNICAL FIELD

[0001] The present application relates to a high-performance boost inverter and soft switching method suitable for a WPT system, and belongs to the technical field of wireless power transmission. BACKGROUND

[0002] has become an important power supply scheme in the fields of electric vehicles and smart wear. However, the current WPT technology is still limited by problems such as "short distance, low efficiency, and poor anti-offset" in product applications, resulting in poor consumer experience and hindering the further popularization of the technology. In order to break this dilemma, studying a wireless power transmission system with a high distance-to-diameter ratio (the ratio of the transmission distance to the diameter of the outer envelope sphere of the transmission coil) can effectively improve the transmission distance, thereby expanding the application field of the WPT technology, enhancing its use flexibility, and promoting its industrialization process.

[0003] The distance-diameter ratio of the current WPT system researched by academia and industry is mostly less than 1, and compared with the traditional system, the problem to be solved for the high distance-diameter ratio system is low efficiency. In order to improve the efficiency of the high distance-diameter ratio system, the source of the system loss needs to be analyzed first. According to the principle of the existing wireless power transmission system, the loss distribution of the system can be seen. On the transmitting side, the loss of the high-frequency inverter circuit is first, which is mainly caused by the switching loss, conduction loss and driving loss of the switching device; the loss of the primary side compensation circuit is second, which is mainly caused by the ESR loss of the compensation capacitor; and the loss of the transmitting side coil is last, which is mainly caused by the ohmic loss of the high-frequency current flowing through the coil and the magnetic hysteresis loss and eddy current loss of the magnetic core. On the receiving side, the copper loss and iron loss of the receiving coil are first; the loss of the secondary side compensation circuit is second; and the loss of the high-frequency rectifier circuit is last. The loss of the high-frequency inverter circuit and the high-frequency rectifier circuit is mainly caused by the conduction loss of the switching device. Through analysis, it can be known that most of the system loss is proportional to the square of the current, and if the current in the loop can be reduced, the total loss of the system will decrease by the square, that is, the efficiency of the system can be greatly improved. On the other hand, in order to ensure that the power level of the system remains unchanged, the input voltage of the system needs to be increased, that is, a boost inverter needs to be used. However, the current boost inverter used in the high distance-diameter ratio system is mostly full-bridge or Class-E inverter structure. The full-bridge inverter can be applied to high-power occasions, and although the output voltage can be adjusted through phase-shift control, the voltage gain (the ratio of the output voltage of the inverter to the input DC voltage) is usually less than 0.9, and the full-bridge inverter does not have the function of boosting the voltage. Although the Class-E inverter can realize voltage boosting, in order to realize zero-voltage turn-on, the peak voltage across the switching tube is usually four times the input voltage, and the voltage stress of the switching tube is extremely high, so the power level is limited. Another problem is that the Class-E inverter is very sensitive to parameter changes and has weak wide-range operation capability. Because the soft switching condition is calculated based on a specific load impedance, when the receiving coil is offset in the WPT system, the reflected impedance will change, and then the load will deviate from the design point, the inverter will enter the hard switching mode, and the efficiency will decrease sharply. SUMMARY

[0004] The present application is to solve the problems of the current boost inverter, such as too many switching tubes, limited power level and sensitivity to parameter changes, and weak wide-range operation capability, and then a high-performance boost inverter suitable for WPT system and a soft switching method are proposed.

[0005] The technical solution adopted by the present application to solve the above problems is that the high-performance boost inverter suitable for WPT system proposed by the present application comprises: a first Boost circuit, the input end of the first Boost circuit is connected with an input voltage U inpositive pole of the first Boost circuit, and an output end is connected with one end of the output capacitor C in positive pole of the first Boost circuit, and an output end is connected with one end of the output capacitor C in negative pole of the first Boost circuit U in negative pole of the first Boost circuit second Boost circuit, an input end of the second Boost circuit is connected with the input voltage U in positive pole of the second Boost circuit, and an output end is connected with the other end of the output capacitor C in one end of the second Boost circuit output node A and output node B, the output node A is arranged in the first Boost circuit and is connected with one end of the output capacitor C in the output node B is arranged in the second Boost circuit and is connected with the other end of the output capacitor C in the output node B is arranged in the second Boost circuit and is connected with the other end of the output capacitor

[0006] Further, the first Boost circuit comprises: boost inductor L 1, switch tube Q 1 and switch tube Q 2 one end of the boost inductor L 1 is connected with the input voltage U in positive pole of the first Boost circuit, the other end is connected with the source of the switch tube Q 1 and the drain of the switch tube Q 2, and the output node A is arranged on the connection circuit of the source of the switch tube Q 1; the drain of the switch tube Q 1 is connected with one end of the output capacitor C in the source of the switch tube Q 2 is connected with the input voltage U in negative pole of the first Boost circuit and the other end of the output capacitor C in the source of the switch tube Q 1 and the source of the switch tube Q 2 are respectively connected with parasitic capacitor C 1 and C 2.

[0007] Further, the second Boost circuit comprises: boost inductor L 2, switch tube Q 3 and switch tube Q 4 one end of the boost inductor L 2 is connected with the input voltage Uin The positive terminal and the boost inductor L One end of 1 is connected to the switch transistor. Q 3's source and switching transistor Q The drain of 4, and in relation to the switching transistor Q The drain connection circuit of transistor 4 has an output node B; the switching transistor Q The drain of 3 is connected to the output capacitor. C in one end and the switching transistor Q 1's drain; switching transistor Q 4's source is connected to the input voltage. U in negative terminal, output capacitor C in The other end and the switching transistor Q The source of 2, and the switching transistor Q 3 and switching transistors Q 4 are connected in parallel with parasitic capacitances. C 3 and C 4.

[0008] Furthermore, the output node A of the high-performance boost inverter is connected to the transmitter compensation capacitor. C One end of 1, the transmitting end compensation capacitor C The other end of 1 is connected to a mutual inductance model, which includes a transmitting coil and a receiving coil, and a compensation capacitor at the transmitting end. C The other end of 1 is connected to the self-inductance of the transmitting coil. L p At one end, the transmitting coil has a self-inductance L p The other end is connected to output node B; the receiving coil self-inductance L s One end is connected to the receiving end compensation capacitor C 2. Receiver compensation capacitor C 2 and the self-inductance of the receiving coil L p Perfect resonance.

[0009] Soft-switching methods for high-performance boost inverters in WPT systems include: Step 1: Turn on the high-performance boost inverter, and convert the receiver signal to the transmitter signal, so that the receiver compensation capacitor... C 2 and the self-inductance of the receiving coil L p Perfect resonance; Step 2: Start the switching control of the switching transistors in the first Boost circuit and the second Boost circuit to divide the inverter into working states 1 to 8. The ZVS is turned on by cycling through each working state in sequence, and the boost inverter output of the wireless power transmission system is completed.

[0010] Furthermore, the working states 1-8 in step 2 specifically include: exist[ t 0, t During the time period 1, the high-performance boost inverter enters working state 1. t At time 0, the switching transistor Q 1 and Q 3. On, switching transistor Q 2 and Q 4. Turn off, boost inductor L 1 and boost inductor L Both are in a discharging state, boost inductor L 1 and boost inductor L The voltage across 2 is the output capacitor. C in The voltage across the terminals and the input voltage U in The difference is in the output capacitor. C in Charging, inverter output voltage U AB The value is 0, which accumulates energy for subsequent parasitic capacitance discharge; exist[ t 1, t During time period 2], the high-performance boost inverter enters working state 2, at time [time]. t 1. Switching transistor Q 3. Shutdown, enter dead time, switching transistor Q 1. Maintain the on state, switching transistor Q 2 and Q 4. Turn off, boost inductor L 1 is in a discharge state and passes through the switching transistor Q 1. Freewheeling, boost inductor L 2. First, discharge the circuit until the voltage at output node B is lower than the input voltage. U in Then, the boost inductor L 2. Charging; Switching transistor Q 4 Parallel Capacitors C 4. Discharge to zero, switch transistor Q Parasitic capacitances in 3 parallel connections C 3. Charging; Parasitic capacitance C The voltage across the three terminals is the inverter output voltage. U AB ; U AB First, it rises linearly, then due to parasitic capacitance. C 4. When the discharge ends, the voltage rises to the positive output voltage and remains constant. exist[ t 2,t 3] time period, high performance boost inverter enters working state 3, in t 2 moment, switch tube Q 4 realizes ZVS open; boost inductor L 1 through switch tube Q 1 freewheeling, maintains discharge state; boost inductor L 2 maintains charging state, output capacitor C in Charges first, discharges after resonant current crosses zero; U AB Maintains constant forward; In[ t 3, t 4] time period, high performance boost inverter enters working state 4, in t 3 moment, switch tube Q 4 is turned off, enters dead time, switch tube Q 1 maintains on state, switch tube Q 2 and Q 3 are turned off; boost inductor L 1 through switch tube Q 1 freewheeling, maintains discharge state, inductor current linearly decreases; boost inductor L 2 first continues to charge, as output node B point potential gradually rises, until higher than input voltage U in , inductor begins to discharge, inductor current first linearly rises, then linearly decreases, output node A rises to same potential as output node B, parasitic capacitor C 3 voltage across both ends drops to zero; switch tube Q 4 parasitic capacitor C 4 in parallel charges; U AB Drop to 0, output capacitor C in Starts charging; In[ t 4, t 5] time period, high performance boost inverter enters working state 5, in t 4 moment, switch tube Q 3 realizes ZVS open, circuit returns to working state 1, completes forward output cycle; In[ t 5, t 6] time period, high performance boost inverter enters working state 6, in t 5 moment, switch tube Q 1 is turned off, enters dead time, switch tube Q 3 maintains on state, switch tube Q 2 and Q4 off; boost inductor L 2 continue discharging; boost inductor L 1 continue charging, output node A is zero potential; boost inductor L 1 start charging, switch tube Q 2 parallel parasitic capacitor C 2 start discharging to voltage 0; switch tube Q 1 parallel parasitic capacitor C 1 start charging; inverter output voltage U AB drop to reverse output voltage; in [ t 6, t 7] time period, high-performance boost inverter enters working state 7, at t 6 moment, switch tube Q 2 ZVS open; boost inductor L 2 through switch tube Q 3 freewheeling, boost inductor L 2 keep discharging state; boost inductor L 1 keep charging state; output capacitor C in first charge, start discharging after resonant current zero crossing; inverter output voltage U AB keep constant reverse; in [ t 7, t 8] time period, high-performance boost inverter enters working state 8, at t 7 moment, switch tube Q 2 off, enter dead time; switch tube Q 3 keep on state; switch tube Q 1 and Q 4 are in off state; the potential of output node A gradually rises, boost inductor L 2 keep discharging state; boost inductor L 1 first continue charging, after A point potential is higher than input voltage U in start discharging; switch tube Q 1 parallel parasitic capacitor C 1 start discharging; before t 8 moment, the potential of output node A rises to the same as the potential of output node B, parasitic capacitor C 1 voltage drop to zero, switch tube Q 1 at t = t 8 moment, ZVS open; switch tube Q 2 parallel parasitic capacitor C2 Start charging, inverter output voltage U AB In parasitic capacitance C 1 Rise to 0 after discharging ends and remain unchanged.

[0011] Further, the ZVS turn-on in step 2 is implemented, specifically including: For any one of the switch tubes Q 3 and switch tube Q 1, in the corresponding working state, the KCL equation of the corresponding output node is obtained, the positive direction of the current is set, the capacitor charging current and the discharge current are calculated, the capacitor charging current, the discharge current and the KVL equation are solved, and the fundamental wave approximation method is used to solve the resonance current; the dead time is set, the resonance current and the KCL equation are integrated to obtain the potential of the corresponding output node; the dead time range is obtained according to the potential of the corresponding output node, and the resonance current satisfies , wherein, is the current of the boost inductor L 2, is the amplitude of the resonance current, is the duty cycle of the lower bridge arm switch tube. is the phase angle of the resonance current; For any one of the switch tubes Q 4 and switch tube Q 2, in the corresponding working state, the KCL equation of the corresponding output node is obtained; the positive direction of the current is set, the capacitor charging current and the discharge current are calculated, the capacitor charging current, the discharge current and the KVL equation are solved, and the fundamental wave approximation method is used to solve the resonance current; the dead time is set, the resonance current and the KCL equation are integrated to obtain the potential of the corresponding output node; the dead time range is obtained according to the potential of the corresponding output node, and the resonance current satisfies ; When the dead time ends, the corresponding switch tube is triggered to conduct immediately, and ZVS turn-on is realized.

[0012] The beneficial effects of the present application are: 1. The inverter designed in the present application combines the traditional interleaved Boost circuit and full-bridge inverter circuit, which has the characteristics of low input current ripple of interleaved Boost circuit, excellent input characteristics and boost capability; and retains the large power capacity of full-bridge inverter circuit.

[0013] 2. Compared with the method of cascading Boost circuit and full-bridge inverter circuit, the inverter designed in the application realizes multiplexing of the switching tubes, reduces the number of switching tubes by half, greatly reduces the volume and cost of the inverter, and improves the power density. Moreover, compared with the traditional full-bridge inverter circuit, the boost inductance current will extract the switching tube junction capacitor charge in the dead time, which is more conducive to the realization of ZVS turn-on of the inverter switching tube. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 A circuit topology of a high-performance boost inverter suitable for a WPT system; Figure 2 An application schematic diagram of the inverter designed in the application in a converter; Figure 3 An equivalent circuit diagram of the high-performance boost inverter in working state 1; Figure 4 An equivalent circuit diagram of the high-performance boost inverter in working state 2; Figure 5 An equivalent circuit diagram of the high-performance boost inverter in working state 3; Figure 6 An equivalent circuit diagram of the high-performance boost inverter in working state 4; Figure 7 An equivalent circuit diagram of the high-performance boost inverter in working state 5; Figure 8 An equivalent circuit diagram of the high-performance boost inverter in working state 6; Figure 9 An equivalent circuit diagram of the high-performance boost inverter in working state 7; Figure 10 An equivalent circuit diagram of the high-performance boost inverter in working state 8; Figure 11 A schematic diagram of the soft switching process of the upper bridge arm of the inverter; Figure 12 A schematic diagram of the soft switching process of the lower bridge arm of the inverter; Figure 13 An analysis waveform diagram of each switching tube in working states 1-8. DETAILED DESCRIPTION

[0015] Specific implementation one: in the embodiment, WPT is wireless power transmission. As shown in the figure, the high-performance boost inverter suitable for a WPT system described in the embodiment is composed of switching tubes Figure 1 1、 Q 1、 Q 2 and boost inductance L 1 to form a first Boost circuit; composed of switching tubes Q 3、Q 4 and boost inductor L 2 constitute a second Boost circuit, and the two Boost circuits share an output capacitor C in . The four switching tubes are controlled by PWM signals, wherein the upper bridge arm Q 1, Q 3 correspond to the switching tubes of the traditional Boost circuit, and the ratio of their working time to period is the same, which is defined as d 1; the lower bridge arm Q 2, Q 4 correspond to the diodes of the traditional Boost circuit, and the ratio of their working time to period is also the same, which is defined as d 2. Output node A and output node B, the output node A is arranged in the first Boost circuit and connected with one end of the output capacitor C in ; the output node B is arranged in the second Boost circuit and connected with the other end of the output capacitor C in .

[0016] Boost inductor L 1 is connected with the positive pole of the input voltage U in , and the other end is connected with the source of the switching tube Q 1 and the drain of the switching tube Q 2, and the output node A is arranged on the connection circuit of the source of the switching tube Q 1; the drain of the switching tube Q 1 is connected with one end of the output capacitor C in ; the source of the switching tube Q 2 is connected with the negative pole of the input voltage U in and the other end of the output capacitor C in , and the switching tube Q 1 and the switching tube Q 2 are respectively connected with the parasitic capacitors C 1 and C 2 in parallel.

[0017] Boost inductor L 2 is connected with the positive pole of the input voltage U in and one end of the boost inductor L 1, and the other end is connected with the source of the switching tube Q 3 and the drain of the switching tube Q 4, and the output node B is arranged on the connection circuit of the drain of the switching tube Q 4; the drain of the switching tube QThe drain of 3 is connected to the output capacitor. C in one end and the switching transistor Q 1's drain; switching transistor Q 4 source connection input voltage U in negative terminal, output capacitor C in The other end and the switching transistor Q The source of 2, and the switching transistor Q 3 and switching transistors Q 4 are connected in parallel with parasitic capacitances. C 3 and C 4.

[0018] This invention combines the traditional interleaved Boost circuit and full-bridge inverter circuit, possessing the low input current ripple, excellent input characteristics, and boost capability of the interleaved Boost circuit, while retaining the high power capacity of the full-bridge inverter circuit. Compared to cascading the Boost circuit and the full-bridge inverter circuit, the designed inverter achieves switch reuse, reducing the number of switches by half, significantly reducing the inverter's size and cost, and increasing power density. Furthermore, compared to the traditional full-bridge inverter circuit, the boost inductor current draws charge from the switch junction capacitor during the dead time, which is more conducive to achieving ZVS turn-on of the inverter switches.

[0019] The inverter designed in this invention is used in converters as follows: Figure 2 As shown, the inverter's output node A is connected to the transmitter compensation capacitor. C One end of 1, the transmitting end compensation capacitor C The other end of 1 is connected to a mutual inductance model, which includes a transmitting coil and a receiving coil, and a compensation capacitor at the transmitting end. C The other end of 1 is connected to the self-inductance of the transmitting coil. L p At one end, the transmitting coil has a self-inductance L p The other end is connected to output node B; in the self-inductance of the receiving coil L s One end has a receiving end, which uses an uncontrolled rectifier bridge and consists of diodes. D 1. D 2. D 3. D 4 and output filter capacitor C o This forms an uncontrolled rectifier bridge. The receiving coil's self-inductance... L s One end is connected to the receiving end compensation capacitor C One end of 2, compensation capacitor CThe other end of diode 2 is connected to an uncontrolled rectifier bridge. In the uncontrolled rectifier bridge, the source of diode D1 is connected to the drain of diode D2, the source of diode D2 is connected to the source of diode D4, the drain of diode D4 is connected to the source of diode D3, the drain of diode D3 is connected to the drain of diode D1, and the drain of diode D3 is connected to the output filter capacitor. C o At one end, the drain of diode D4 is connected to a filter capacitor. C o At the other end, the output filter capacitor C o One end is connected to the positive terminal of the load R, and the output filter capacitor... C o The other end is connected to the negative terminal of the load R.

[0020] Specific Implementation Method Two: This implementation method uses the fundamental frequency approximation method to calculate the equivalent resistance as follows: (1); In formula (1), The actual load resistance at the receiving end. The reduction factor is used for the fundamental frequency approximation. Specification of receiving end compensation capacitor C 2 and the self-inductance of the receiving coil L p Complete resonance, that is: (2); In formula (2), Angular frequency; Treating the coupling mechanism as a mutual inductance model, the reflection impedance of the receiver to the transmitter can be obtained as follows: (3); In formula (3), For the mutual inductance between the transmitting coil and the receiving coil, This is the equivalent impedance of the receiving end.

[0021] After converting the receiver to the transmitter using an uncontrolled rectifier bridge, an equivalent circuit diagram can be obtained. Based on the on / off state of the switching transistors, the inverter can be divided into the following eight operating states, such as... Figures 3-10 As shown.

[0022] exist[ t 0, t 1] During the time period, it enters working state 1, and the equivalent circuit is as follows: Figure 3 As shown, when t = t At 0, the switching transistor Q 1 and Q 3 is already in the conducting state. Q 2 andQ 4 is in the off state. At this time, the boost inductor... L 1 and L Both are in a discharge state, through the switching transistor Q 1 and Q 3. Freewheeling. The voltage across the inductor is equal to the inverter output capacitor. C in Voltage at both ends U Cin and input voltage U in The difference is approximately equal to the constant capacitor voltage, so the inductor current decreases linearly. At this point, the potentials at points A and B are equal, both being... U Cin Inverter output voltage U AB The value is zero. The inverter output capacitor... C in When the capacitor is in a charging state, the charging current is the freewheeling current of the inductor, which is approximately constant; therefore, the capacitor voltage increases linearly.

[0023] exist[ t 1, t During the time period 2, it enters working state 2, and the equivalent circuit is as follows: Figure 4 As shown, the switching transistor Q 3. Shutdown, entering dead time. Q 1. Maintain conduction state. Q 2 and Q 4 is in the off state. Boost inductor L 1. Continue through the switching transistor Q 1. Continuous flow, L 1. Maintaining the discharge state, the inductor current decreases linearly. However, the boost inductor... L Option 2 involves continuing to discharge, with the potential at point B gradually decreasing until it falls below the input voltage. U in Afterwards, the inductor begins to charge, with the inductor current decreasing linearly first and then increasing linearly. Simultaneously, the potential at point B decreases, the inverter begins to output voltage, the resonant cavity is connected to the circuit, and the switching transistor... Q 4 Parallel Capacitors C Discharge begins at 4. t Before time 2, the potential at point B drops to 0, i.e., the parasitic capacitance... C The voltage across 4 drops to zero, facilitating the subsequent switching of the transistor. Q The ZVS activation of 4 has created the conditions; at the same time, the switching transistor Q Parasitic capacitances in 3 parallel connections C 3. Start charging. C The voltage across the three terminals is the inverter output voltage. U AB ; UAB First linearly rise, then C 4 rises to the forward output voltage and then starts to keep constant. Since the resonant tank is connected to the circuit, the charging current of the inverter output capacitor C in becomes the resonant current, so from t 1, the voltage across the capacitor starts to rise in a sinusoidal trend. C in The voltage across the capacitor starts to rise in a sinusoidal trend.

[0024] In the time period of t 2, t 3, the working state 3 is entered, and the equivalent circuit is shown in Figure 5 At the moment of t = t 2, the switch tube Q 4 realizes ZVS turn-on, because the voltage across the parallel capacitor of the switch tube Q 4 in the previous state has discharged to zero. The boost inductor L 1 continues to freewheel through the switch tube Q 1, L 1 keeps discharging state, and the inductor current linearly decreases. The boost inductor L 2 keeps charging state, and the inductor current linearly rises. The inverter outputs forward voltage in this mode, and the voltage keeps constant; the inverter output capacitor C in First charge, and then discharge after the resonant current crosses zero, C in The voltage change keeps a sinusoidal trend.

[0025] In the time period of t 3, t 4, the working state 4 is entered, and the equivalent circuit is shown in Figure 6 At the moment of t = t 3, the switch tube Q 4 is turned off and enters dead time, Q 1 keeps on state, Q 2 and Q 3 are in off state. The boost inductor L 1 continues to freewheel through the switch tube Q 1, L 1 keeps discharging state, and the inductor current linearly decreases. While the boost inductor L 2 first continues to charge, and then discharges after the potential at B gradually rises until it is higher than the input voltage U in The inductor starts to discharge after the potential at B gradually rises until it is higher than the input voltage Q 3, the inductor current first linearly rises and then linearly decreases. At the same time, the potential at B rises, and the switch tube C3 starts discharging, and t 4 rises to the same potential as A, i.e. the parasitic capacitance C 3 across it is discharged to zero, creating conditions for ZVS turn-on of the following switch Q 3; and because C 3 the voltage across it is the inverter output voltage U AB So U AB first decreases linearly, and C 3 at the end of the discharge, it drops to zero and then starts to remain constant. At the same time, the switch Q 4 in parallel with the parasitic capacitance C 4 starts to charge, and C 3 at the same time as the end of the discharge, C 4 the voltage across it is charged to the forward output voltage. The inverter output capacitor C in first remains in the discharge state, and the voltage across it decreases in a sinusoidal trend, and U AB when it is equal to zero, C in charging starts, and because the resonant tank is short-circuited out of the circuit, the voltage across it increases in a linear trend.

[0026] In the time interval [ t 4, t 5] the working state 5 is entered, and the equivalent circuit is as shown in Figure 7 , at t = t 4, the switch Q 3 achieves ZVS turn-on because the voltage across the parallel capacitor of the switch Q 3 of the previous state has been discharged to zero. The subsequent process is the same as in working state 1.

[0027] In the time interval [ t 5, t 6] the working state 6 is entered, and the equivalent circuit is as shown in Figure 8 , at t = t 5, the switch Q 1 is turned off and enters the dead time, Q 3 remains in the on state, Q 2 and Q 4 are in the off state. Because it is also the dead time before the turn-on of the lower bridge switch, state 6 is similar to state 2, the difference being that in state 6 the potential of A is gradually decreasing. The boost inductor L 2 remains in the discharge state, and the inductor current decreases linearly; the boost inductor L1 continue to discharge, A point potential is zero after charging, inductance current first linearly, and then linearly. Switching tube Q 2 parallel parasitic capacitance C 2 start discharging, in t 6 point potential before the time A dropped to 0, for subsequent Q 2 ZVS open conditions created; switching tube Q 1 parallel parasitic capacitance C 1 start charging, C 1 both ends of the voltage U B - U A , after the inverse output voltage U AB ; so U AB first linearly, and then at C 4 discharge ended, dropped to the reverse output voltage, then began to remain unchanged. C in both ends of the voltage change and the same state 2.

[0028] In[ t 6, t 7] time period, into the working state 7, as shown in the equivalent circuit Figure 9 , t = t 6 moment, switching tube Q 2 ZVS open. State 7 for stable reverse output voltage phase, and state 3 is similar. Among them, the boost inductance L 2 continue through the switching tube Q 3 freewheeling, L 2 remains discharging state, inductance current linearly. Boost inductance L 1 remains charged state, inductance current linearly. Inverter in this mode output reverse voltage, voltage remains unchanged. C in both ends of the voltage change and the same state 3.

[0029] In[ t 7, t 8] time period, into the working state 8, as shown in the equivalent circuit Figure 10 , t = t 7 moment, switching tube Q 2 off, into the dead time, Q 3 remains on state, Q 1 and Q4 State 4: The inductor is discharging. The inductor current is linearly decreasing. L 2 State 2: The inductor is discharging. The inductor current is linearly decreasing. L 1 State 1: The inductor is charging. The inductor current is linearly increasing. U in 1 State 1: The inductor is charging. The inductor current is linearly increasing. Q 1 State 1: The inductor is charging. The inductor current is linearly increasing. C 1 State 1: The inductor is charging. The inductor current is linearly increasing. t 8 State 8: The inductor is discharging. The inductor current is linearly decreasing. C 1 State 1: The inductor is charging. The inductor current is linearly increasing. Q 1 State 1: The inductor is charging. The inductor current is linearly increasing. t = t 8 State 8: The inductor is discharging. The inductor current is linearly decreasing. U AB 1 State 1: The inductor is charging. The inductor current is linearly increasing. C 1 State 1: The inductor is charging. The inductor current is linearly increasing. Q 2 State 2: The inductor is discharging. The inductor current is linearly decreasing. C 2 State 2: The inductor is discharging. The inductor current is linearly decreasing. C 1 State 1: The inductor is charging. The inductor current is linearly increasing. C 2 State 2: The inductor is discharging. The inductor current is linearly decreasing. C in 2 State 2: The inductor is discharging. The inductor current is linearly decreasing.

[0030] The analysis waveforms of each working state are shown in Figure 13 The conditions for the designed inverter to achieve soft switching are further derived based on the above modal analysis. In this embodiment, the switch tube of the upper arm is taken as Q 3 for example, and the calculation principles of other switch tubes are the same as described below. The condition for achieving ZVS turn-on is that the B point potential is in the rising state at state 4, and the voltage across C 3 can be discharged to zero within the dead time. Figure 4 The KCL equation is written for node B column as shown in (4). In formula (4), is the current of the boost inductor L 2, is the resonant current, is the current of the parasitic capacitor C 4, is the current of the parasitic capacitor C 3. Where the calculated capacitance charging and discharging current in the prescribed positive direction is: (5); In formula (5), is the potential of the output node B, is the potential change rate of the output node B, is the input capacitance C in voltage across the two terminals.

[0031] Solving simultaneously: (6); When the above formula is satisfied, that is, during the dead time, the inductor current is greater than the same direction resonant current, it can be ensured that the potential of point B gradually rises.

[0032] The resonant current is solved below, using the fundamental wave approximation method, according to the definition of Fourier series, the fundamental wave voltage amplitude can be obtained: (7); In formula (7), T is the period of inverter PWM control, is the pulse voltage waveform function, d 1 is the duty ratio of the upper bridge arm switch tube, U AB is the output voltage amplitude of the output nodes A and B.

[0033] Then the resonant current amplitude and phase angle are: (8); In formula (8), is the resonant current amplitude, is the equivalent impedance modulus value of the resonant circuit, is the phase angle of the resonant current.

[0034] The resonant current expression is (9); In formula (9), t is the current time.

[0035] It is considered that the resonant current size is unchanged during the dead time, and the switch tube Q 4 is turned off, and the resonant current is: (10); Let the dead time be t dead On the basis of formula (6), the potential of the output node B can be further integrated: (11); In formula (11), is the duty ratio of the lower bridge arm switch tube.

[0036] According to formula (11), the dead time range can be obtained: (12); At the same time, the requirement for the resonant current is: (13); When the dead time ends, the switch tube Q 4 is turned on, as shown, realizing ZVS opening. Figure 11

[0037] Similarly, the condition for the lower bridge arm switch tube to realize soft switching can be obtained. Taking the lower bridge arm switch tube Q 4 as an example, the condition for realizing ZVS opening is that the B point potential is in a falling state at state 2, and at the same time, the voltage across C 4 can be discharged to zero within the dead time. As shown in the figure, write the KCL equation for node B column: Figure 12 (14); Among them, the charging and discharging current of the capacitor calculated according to the specified positive direction is: (15); Solving together gives: (16); When the above formula is satisfied, that is, the inductor current is less than the reverse resonant current within the dead time, it can be ensured that the B point potential gradually decreases. The subsequent solution process for the dead time range is the same as above, considering that the resonant current is unchanged within the dead time, and the resonant current after the switch tube Q4 is turned off is: (17); Similarly, the dead time is calculated as: (18); The requirement for the resonant current is: (19); It can be seen that the switch tube of the lower bridge arm has higher requirements for ZVS than the switch tube of the upper bridge arm. The participation of the resonant current is required for the charging and discharging of the parasitic capacitor, and the high-Q compensation network necessary for the WPT system to realize energy transmission naturally provides a large amplitude of resonant current, which exactly meets the stringent soft switching conditions required by the lower bridge arm to overcome the input inductor current. The inherent cooperation of this switching mechanism and the load characteristics makes the designed inverter exhibit excellent applicability and high efficiency in WPT applications. ​​

[0038] The above merely describes preferred embodiments of the present application, and is not intended to limit the present application in any form. Although the present application has been disclosed with preferred embodiments as above, it is not intended to limit the present application, and any person skilled in the art can make some changes or modifications to the above disclosed technical contents to obtain equivalent embodiments with equivalent changes, without departing from the technical solution of the present application. Any simple modification, equivalent replacement and improvement of the above embodiments, as long as it does not depart from the technical solution of the present application, and is within the spirit and principle of the present application, shall be within the protection scope of the present application.

Claims

1. A high-performance boost inverter suitable for WPT systems, characterized in that, include: The first Boost circuit, the input terminal of the first Boost circuit and the input voltage U in The positive terminal is connected, and the output terminal is connected to the output capacitor. C in One end is connected to the output capacitor. C in The other end is connected to the input voltage. U in The negative electrode; The second Boost circuit, the input terminal of the second Boost circuit and the input voltage U in The positive terminal is connected, and the output terminal is connected to the output capacitor. C in One end is connected; Output node A and output node B, wherein output node A is configured in the first Boost circuit and is connected to the output capacitor. C in One end is connected; the output node B is located in the second Boost circuit and is connected to the output capacitor. C in The other end is connected.

2. The high-performance boost inverter for WPT systems according to claim 1, characterized in that, The first Boost circuit includes: a boost inductor. L 1. Switching transistor Q 1 and switching transistor Q 2; The boost inductor L One end of 1 is connected to the input voltage. U in One end is the positive terminal, and the other end is connected to the switching transistor. Q The source and switch of 1 Q The drain of 2, and in conjunction with the switching transistor Q The source connection circuit of transistor 1 has an output node A; the switching transistor Q The drain of 1 is connected to the output capacitor. C in One end; switching transistor Q 2's source is connected to the input voltage. U in negative terminal and output capacitor C in On the other end, and the switching transistor Q 1 and switching transistor Q 2 are connected in parallel with parasitic capacitances. C 1 and C 2.

3. The high-performance boost inverter suitable for WPT systems according to claim 1, characterized in that, The second Boost circuit includes: a boost inductor. L 2. Switching transistor Q 3 and switching transistors Q 4; Boost Inductor L One end of 2 is connected to the input voltage. U in The positive terminal and the boost inductor L One end of 1 is connected to the switch transistor. Q 3's source and switching transistor Q The drain of 4, and in relation to the switching transistor Q The drain connection circuit of transistor 4 has an output node B; the switching transistor Q The drain of 3 is connected to the output capacitor. C in one end and the switching transistor Q 1's drain; switching transistor Q 4's source is connected to the input voltage. U in negative terminal, output capacitor C in The other end and the switching transistor Q The source of 2, and the switching transistor Q 3 and switching transistors Q 4 are connected in parallel with parasitic capacitances. C 3 and C 4.

4. The high-performance boost inverter for WPT systems according to claim 1, characterized in that, The output node A of the high-performance boost inverter is connected to the transmitter compensation capacitor. C One end of 1, the transmitting end compensation capacitor C The other end of 1 is connected to a mutual inductance model, which includes a transmitting coil and a receiving coil, and a compensation capacitor at the transmitting end. C The other end of 1 is connected to the self-inductance of the transmitting coil. L p At one end, the transmitting coil has a self-inductance L p The other end is connected to output node B; the receiving coil self-inductance L s One end is connected to the receiving end compensation capacitor C 2. Receiver compensation capacitor C 2 and the self-inductance of the receiving coil L p Perfect resonance.

5. A soft-switching method for a high-performance boost inverter suitable for WPT systems, applied to the high-performance boost inverter suitable for WPT systems as described in any one of claims 1-4, characterized in that, include: Step 1: Turn on the high-performance boost inverter, and convert the receiver signal to the transmitter signal, so that the receiver compensation capacitor... C 2 and the self-inductance of the receiving coil L p Perfect resonance; Step 2: Start the switching control of the switching transistors in the first Boost circuit and the second Boost circuit to divide the inverter into working states 1 to 8. The ZVS is turned on by cycling through each working state in sequence, and the boost inverter output of the wireless power transmission system is completed.

6. The soft-switching method for a high-performance boost inverter suitable for WPT systems according to claim 5, characterized in that, The working states 1-8 in step 2 specifically include: exist[ t 0, t During the time period 1, the high-performance boost inverter enters working state 1. t At time 0, the switching transistor Q 1 and Q 3. On, switching transistor Q 2 and Q 4. Turn off, boost inductor L 1 and boost inductor L Both are in a discharging state, boost inductor L 1 and boost inductor L The voltage across 2 is the output capacitor. C in The voltage across the terminals and the input voltage U in The difference is in the output capacitor. C in Charging, inverter output voltage U AB The value is 0, which accumulates energy for subsequent parasitic capacitance discharge; exist[ t 1, t During time period 2], the high-performance boost inverter enters working state 2, at time [time]. t 1. Switching transistor Q 3. Shutdown, enter dead time, switching transistor Q 1. Maintain the on state, switching transistor Q 2 and Q 4. Turn off, boost inductor L 1 is in a discharge state and passes through the switching transistor Q 1. Freewheeling, boost inductor L 2. First, discharge the circuit until the voltage at output node B is lower than the input voltage. U in Then, the boost inductor L 2. Charging; Switching transistor Q 4 Parallel Capacitors C 4. Discharge to zero, switch transistor Q Parasitic capacitances in 3 parallel connections C 3. Charging; Parasitic capacitance C The voltage across the three terminals is the inverter output voltage. U AB ; U AB First, it rises linearly, then due to parasitic capacitance. C 4. When the discharge ends, the voltage rises to the positive output voltage and remains constant. exist[ t 2, t During the time period 3, the high-performance boost inverter enters working state 3. t At time 2, the switching transistor Q 4. Achieve ZVS activation; boost inductor L 1. Through the switching transistor Q 1. Freewheeling to maintain the discharge state; boost inductor L 2. Maintain charging state, output capacitor C in First charge, then start discharging after the resonant current crosses zero; U AB Maintain a positive constant; exist[ t 3, t During time period 4, the high-performance boost inverter enters working state 4. t At time 3, the switching transistor Q 4. Shutdown, enter dead time, switching transistor Q 1. Maintain the on state, switching transistor Q 2 and Q 3. Turn off; boost inductor L 1. Through the switching transistor Q 1. Freewheeling, maintaining the discharge state, the inductor current decreases linearly; boost inductor L 2. Continue charging until the voltage at output node B gradually rises, until it exceeds the input voltage. U in Afterwards, the inductor begins to discharge. The inductor current first rises linearly, then falls linearly, until the output node A reaches the same potential as the output node B. The parasitic capacitance... C 3. The voltage drop across the terminals is zero; the switching transistor Q 4 Parallel Capacitors C 4. Charging; U AB Reduced to 0, output capacitor C in Start charging; exist[ t 4, t During time period 5, the high-performance boost inverter enters working state 5. t At time 4, the switching transistor Q 3. Once ZVS is enabled, the circuit returns to working state 1, completing the positive output cycle; exist[ t 5, t During time period 6, the high-performance boost inverter enters working state 6. t At time 5, the switching transistor Q 1. Shutdown, enter dead time, switching transistor Q 3. Maintain the on state, switch transistor Q 2 and Q 4 is in the off state; boost inductor L 2. Continuous discharge; boost inductor L 1. Continue discharging until the output node A potential reaches zero, then the boost inductor... L 1. Start charging and simultaneously switch on / off transistors. Q Parasitic capacitances in parallel C 2. Start discharging until the voltage reaches 0; switching transistor Q Parasitic capacitance in parallel C 1. Start charging; Inverter output voltage U AB The voltage drops to the reverse output voltage; exist[ t 6, t During time period 7, the high-performance boost inverter enters working state 7. t At time 6, the switching transistor Q 2. Achieve ZVS activation; boost inductor L 2. Through the switching transistor Q 3. Freewheeling, boost inductor L 2. Maintain discharge state; boost inductor L 1. Maintain charging state; output capacitor C in First charge, then discharge after the resonant current crosses zero; inverter output voltage U AB Maintain the opposite constant; exist[ t 7, t During time period 8, the high-performance boost inverter enters working state 8. t At time 7, the switching transistor Q 2. Shutdown, entering dead time; switching transistor Q 3. Maintain conduction state; switching transistor Q 1 and Q 4 is in the off state; the potential of output node A gradually rises, and the boost inductor... L 2. Maintain discharge state; boost inductor L 1. Continue charging until the potential at point A is higher than the input voltage. U in Discharge then begins; switching transistor Q Parasitic capacitance in parallel C 1. Discharge begins; in t Before time 8, the potential of output node A rises to the same level as that of output node B, and the parasitic capacitance... C 1. The voltage across the terminals drops to zero, and the switching transistor... Q 1 in t = t Achieve ZVS turn-on at 8 o'clock; switching transistor Q Parasitic capacitances in parallel C 2. Charging begins; inverter output voltage... U AB In parasitic capacitance C 1. After the discharge ends, it rises to 0 and remains unchanged.

7. The soft-switching method for a high-performance boost inverter suitable for WPT systems according to claim 5, characterized in that, Step 2 involves enabling ZVS, specifically including: For switching transistors Q 3 and switching transistors Q For any switching transistor in step 1, obtain the KCL equation for the corresponding output node in its corresponding operating state. Define the positive direction of the current, calculate the capacitor charging and discharging currents, and simultaneously solve the capacitor charging and discharging currents with the KVL equations. Use the fundamental frequency approximation method to solve for the resonant current. Define the dead time, integrate the resonant current and the KCL equations to obtain the potential of the corresponding output node. Based on the potential of the corresponding output node, obtain the dead time range, and set the resonant current to satisfy... ,in, For boost inductor L The current of 2, The amplitude of the resonant current. The duty cycle of the lower bridge arm switch transistor. The phase angle of the resonant current; For switching transistors Q 4 and switching transistors Q For any switching transistor in step 2, under its corresponding operating state, obtain the KCL equation for the corresponding output node; define the positive direction of the current, calculate the capacitor charging current and discharging current, and simultaneously solve the capacitor charging current, discharging current, and KVL equations. Using the fundamental frequency approximation method, solve for the resonant current; define the dead time, integrate the resonant current and KCL equations to obtain the potential of the corresponding output node; obtain the dead time range based on the potential of the corresponding output node, and set the resonant current to satisfy... ; Once the dead time ends, the corresponding switch is immediately turned on to achieve ZVS activation.

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