Small signal processing circuit based on power function principle

Abstract

The invention relates to the technical field of small signal amplification processing circuits, in particular to a power function principle-based small signal processing circuit, which comprises a first-stage logarithm operation module, a second-stage logarithm operation module, a third-stage logarithm operation module and a fourth-stage logarithm operation module which are connected in sequence, the output end of the first-stage logarithm operation module is connected with the input end of the second-stage logarithm operation module, the purpose of outputting input signals after power function operation processing is achieved by conducting certain combination on four stages of logarithm operation circuits, and the problem that when a linear amplification circuit measures signals with a large dynamic range, the linear amplification circuit is not stable in measurement is solved. The problem that small signal amplification and amplification circuit saturation caused by strong signals cannot be considered at the same time through gain setting is solved, the gain can be automatically adjusted along with the signal input intensity, the gain is large when the input signal is weak, the gain is small when the output signal is strong, and automatic adjustment along with the signal input intensity is achieved.

Description

Technical Field

[0001] This invention relates to the field of small-signal amplification and processing circuit technology, specifically to a small-signal processing circuit based on the power function principle. Background Technology

[0002] The flame ionization detector (FID) is a core detection element in gas chromatography analysis. It consists of an ionization chamber and an amplification circuit. The ionization chamber of the FID is covered by a metal cylinder, and there is a nozzle at the center of the base. A ring-shaped metal ring is placed near the nozzle as an emitter, and a metal cylinder is placed at the top as a collector. A DC voltage of 90-300V is applied between the emitter and the collector to form an ionization electric field to accelerate the ionized ions. The ions captured by the collector flow through the high impedance of the amplifier to generate a signal, which is then amplified and transmitted to the data acquisition system.

[0003] When measuring signals with a large dynamic range, the gain setting of a linear amplifier circuit cannot simultaneously amplify small signals and saturate strong signals. This can be solved by adding different gain levels controlled by relay contacts to the linear amplifier circuit. However, the circuit is complex, the signal is discontinuous when switching between levels, and noise may be introduced. Therefore, a small signal processing circuit based on the power function principle is proposed. Summary of the Invention

[0004] To address the technical problems existing in the prior art, the present invention provides a small signal processing circuit based on the power function principle.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a small signal processing circuit based on the power function principle, comprising a first-stage logarithmic operation module, a second-stage logarithmic operation module, a third-stage logarithmic operation module, and a fourth-stage logarithmic operation module connected in sequence. The output terminal of the first-stage logarithmic operation module is connected to the input terminal of the second-stage logarithmic operation module, the output terminal of the second-stage logarithmic operation module is connected to the input terminal of the third-stage logarithmic operation module, and the output terminal of the third-stage logarithmic operation module is connected to the input terminal of the fourth-stage logarithmic operation module. The first-stage logarithmic operation module is used to introduce a gain control signal; the second-stage logarithmic operation module is used to introduce an input signal; the third-stage logarithmic operation module is used for logarithmic operations; and the fourth-stage logarithmic operation module is used to output the operation result signal.

[0006] Preferably, the first-stage logarithmic operation module includes a gain control signal Vref, a resistor R1, a transistor Q1, an operational amplifier A1, and a resistor R2. The gain control signal Vref is connected in series with one end of the resistor R1, the other end of the resistor R1 is connected to the inverting input of the operational amplifier A1, the non-inverting input of the operational amplifier A1 is connected to the base of the transistor Q1, the collector of the transistor Q1 is connected to the inverting input of the operational amplifier A1, the output of the operational amplifier A1 is connected to one end of the resistor R2, and the emitter of the transistor Q1 and the other end of the resistor R2 are connected to the non-inverting input of the operational amplifier A2.

[0007] Preferably, the second-stage logarithmic operation module includes an input signal Vin, a resistor R3, a transistor Q2, and an operational amplifier A2. The input signal Vin is connected in series with one end of the resistor R3, the other end of the resistor R3 is connected to the inverting input of the operational amplifier A1, the non-inverting input of the operational amplifier A2 is connected to the base of the transistor Q1, the collector of the transistor Q2 is connected to the inverting input of the operational amplifier A2, the output terminal of the operational amplifier A2 is connected to one end of the resistor R4, and the emitter of the transistor Q2 is connected to the emitter of the transistor Q3.

[0008] Preferably, the third-level logarithmic operation module includes a transistor Q3, the collector and base of which are both connected to the emitter of a transistor Q4.

[0009] Preferably, the fourth-stage logarithmic operation module includes a transistor Q4, an operational amplifier A3, a resistor R5, and an output signal Vout. The output terminal of the operational amplifier A3 outputs the output signal Vout. The base of the transistor Q4 is connected to the non-inverting input of the operational amplifier A3. Both the base of the transistor Q4 and the non-inverting input of the operational amplifier A3 are grounded. The transistor Q4 is connected to the inverting input of the operational amplifier A3 via the resistor R5. The other end of the resistor R5 is connected to the output terminal of the operational amplifier A3.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0011] 1. This invention achieves the purpose of outputting the input signal after performing power function operations by combining a four-stage logarithmic operation circuit. It solves the problem that when linear amplifier circuits measure signals with a large dynamic range, the gain setting cannot balance the amplification of small signals and the saturation of strong signals. This allows the gain to be automatically adjusted according to the strength of the input signal. The gain is larger when the input signal is weak and smaller when the output signal is strong, thus realizing automatic adjustment according to the signal input strength.

[0012] 2. In this invention, the gain of the amplifier circuit is automatically adjusted according to the strength of the input signal. The amplification factor is high when the input signal is small and low when the input signal is large, thus avoiding output saturation and solving the problem of signal discontinuity during gear switching. At the same time, the logarithmic amplification characteristics of the transistor are used to design the amplifier circuit. Finally, the multi-stage circuit formula is simplified into a power function operation circuit, which does not introduce the noise generated when the relay is switching. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the small signal processing circuit of the present invention;

[0014] Figure 2 This is a schematic diagram of the emitter current of the BJT transistor of the present invention when it is operating in the amplification region;

[0015] Figure 3 This is a schematic diagram of the input-output characteristic curves of the present invention. Detailed Implementation

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments, which illustrate the above and other technical features and advantages of the present invention. However, the following embodiments are merely preferred embodiments of the present invention and are not exhaustive.

[0017] Example:

[0018] like Figure 1-3 As shown, this invention provides a small-signal processing circuit based on the power function principle, comprising a first-stage logarithmic operation module, a second-stage logarithmic operation module, a third-stage logarithmic operation module, and a fourth-stage logarithmic operation module connected in sequence. The output terminal of the first-stage logarithmic operation module is connected to the input terminal of the second-stage logarithmic operation module, the output terminal of the second-stage logarithmic operation module is connected to the input terminal of the third-stage logarithmic operation module, and the output terminal of the third-stage logarithmic operation module is connected to the input terminal of the fourth-stage logarithmic operation module. The first-stage logarithmic operation module is used to introduce a gain control signal; the second-stage logarithmic operation module is used to introduce an input signal; the third-stage logarithmic operation module is used for logarithmic operations; and the fourth-stage logarithmic operation module is used to output the operation result signal.

[0019] The input-output transfer relationship of the amplifier circuit is as follows:

[0020] ;

[0021] In the formula, Iref is the gain control current signal, Iin is the input current signal, and Iout is the output current signal.

[0022] In this embodiment, the first-stage logarithmic operation module includes a gain control signal Vref, a resistor R1, a transistor Q1, an operational amplifier A1, and a resistor R2. The gain control signal Vref is connected in series with one end of the resistor R1, the other end of the resistor R1 is connected to the inverting input of the operational amplifier A1, the non-inverting input of the operational amplifier A1 is connected to the base of the transistor Q1, the collector of the transistor Q1 is connected to the inverting input of the operational amplifier A1, the output terminal of the operational amplifier A1 is connected to one end of the resistor R2, and the emitter of the transistor Q1 and the other end of the resistor R2 are connected to the non-inverting input of the operational amplifier A2.

[0023] like Figure 2 As shown, the amplification factor of the logarithmic amplifier circuit formed by transistor Q1 and operational amplifier A1 is calculated as follows:

[0024] ,in: ;

[0025] ,in: Here, n is 1;

[0026] ;

[0027] In the formula, VBE is the voltage between the base (B) and emitter (E) of the transistor, and the voltages of transistors Q1, Q2, Q3, and Q4 are... With the same value, the output voltage Vout = VBE;

[0028] In a transistor circuit:

[0029] , ;

[0030] transistor The values ​​are generally greater than 100, therefore:

[0031] ;

[0032] In the formula, such as Figure 2 , This is the base current of the transistor. This is the collector pin current of the transistor. This is the emitter pin current of the transistor. This is the current amplification factor of the transistor;

[0033] Therefore, we can conclude that:

[0034] ,in: ;

[0035] Where Ie is the current through the PN junction, n is the emission coefficient, VT is the voltage equivalent at temperature, Ies is the reverse saturation current, and k is the Boltzmann constant. T is the absolute temperature in K; q is the electron charge (1.6E-19C); at room temperature (300K), VT = 0.026V; e is the base of the natural logarithm, with typical values ​​for discrete devices ranging from 10E-8 to 10E-14A.

[0036] In this embodiment, the second-stage logarithmic operation module includes an input signal Vin, a resistor R3, a transistor Q2, and an operational amplifier A2. The input signal Vin is connected in series with one end of the resistor R3, and the other end of the resistor R3 is connected to the inverting input of the operational amplifier A1. The non-inverting input of the operational amplifier A2 is connected to the base of the transistor Q1, the collector of the transistor Q2 is connected to the inverting input of the operational amplifier A2, the output of the operational amplifier A2 is connected to one end of the resistor R4, and the emitter of the transistor Q2 is connected to the emitter of the transistor Q3.

[0037] In this embodiment, the third-level logarithmic operation module includes a transistor Q3, the collector and base of which are both connected to the emitter of transistor Q4.

[0038] In this embodiment, the fourth-stage logarithmic operation module includes a transistor Q4, an operational amplifier A3, a resistor R5, and an output signal Vout. The output terminal of the operational amplifier A3 outputs the output signal Vout. The base of the transistor Q4 is connected to the non-inverting input of the operational amplifier A3. Both the base of the transistor Q4 and the non-inverting input of the operational amplifier A3 are grounded. The transistor Q4 is connected to the inverting input of the operational amplifier A3 via the resistor R5. The other end of the resistor R5 is connected to the output terminal of the operational amplifier A3.

[0039] In this embodiment,

[0040] ;

[0041] ;

[0042] ;

[0043] ;

[0044] ;

[0045] ;

[0046] ;

[0047] ;

[0048] ;

[0049] ;

[0050] ;

[0051] ;

[0052] ;

[0053] ;

[0054] ;

[0055] ;

[0056] In the formula, This is the output of the first-stage logarithmic amplifier circuit; This is the output of the second-stage logarithmic amplifier circuit; This is the output of the third-stage logarithmic amplifier circuit; This is the input signal for the first-stage logarithmic amplifier circuit, which is the proportional control signal for the amplification factor of the entire power function circuit. is the input current of the first-stage logarithmic amplifier circuit; Vin is the input signal of the second-stage logarithmic amplifier circuit, and also the input signal for the amplification factor of the entire power function circuit. This is the input current for the second-stage logarithmic amplifier circuit; This represents the output current of the entire power function circuit.

[0057] like Figure 3 As shown, the horizontal axis Iin represents the input signal, the vertical axis Iout represents the output signal, the curve segment represents the input-output characteristic curve of the logarithmic circuit (or power function circuit), and the straight line segment represents the input-output characteristic curve of the linear circuit.

[0058] The power function operation function was finally realized by using a four-stage logarithmic circuit. The total gain of the circuit can be controlled by an external signal. Furthermore, the VT term and Ies term can be eliminated by the four-stage logarithmic circuit. That is, the gain of the circuit is only related to the circuit input signal and the gain control signal, and is independent of the transistor temperature and the saturation current Ies.

[0059] The above description is merely a preferred embodiment of the present invention and is illustrative rather than restrictive. Those skilled in the art will understand that many changes, modifications, and even equivalents can be made within the spirit and scope defined by the claims of the present invention, all of which will fall within the protection scope of the present invention.

Claims

1. A small signal processing circuit based on the principle of power function, characterized by, The logarithmic operation module comprises a first-stage logarithmic operation module, a second-stage logarithmic operation module, a third-stage logarithmic operation module and a fourth-stage logarithmic operation module connected in sequence, the output end of the first-stage logarithmic operation module is connected with the input end of the second-stage logarithmic operation module, the output end of the second-stage logarithmic operation module is connected with the input end of the third-stage logarithmic operation module, the output end of the third-stage logarithmic operation module is connected with the input end of the fourth-stage logarithmic operation module, the first-stage logarithmic operation module is used for introducing a gain control signal, the second-stage logarithmic operation module is used for introducing an input signal, the third-stage logarithmic operation module is used for logarithmic operation, and the fourth-stage logarithmic operation module is used for outputting an operation result signal.

2. A small signal processing circuit based on the principle of power function as claimed in claim 1, wherein, The first-stage logarithmic operation module comprises a gain control signal Vref, a resistor R1, a transistor Q1, an operational amplifier A1 and a resistor R2, the gain control signal Vref is connected with one end of the resistor R1 in series, the other end of the resistor R1 is connected with the inverting terminal of the operational amplifier A1, the non-inverting terminal of the operational amplifier A1 is connected with the base of the transistor Q1, the collector of the transistor Q1 is connected with the inverting terminal of the operational amplifier A1, the output end of the operational amplifier A1 is connected with one end of the resistor R2, and the emitter of the transistor Q1 and the other end of the resistor R2 are connected with the non-inverting terminal of the operational amplifier A2.

3. A small signal processing circuit based on the principle of power function as claimed in claim 2, wherein, The second-stage logarithmic operation module comprises an input signal Vin, a resistor R3, a transistor Q2 and an operational amplifier A2, the input signal Vin is connected with one end of the resistor R3 in series, the other end of the resistor R3 is connected with the inverting terminal of the operational amplifier A1, the non-inverting terminal of the operational amplifier A2 is connected with the base of the transistor Q1, the collector of the transistor Q2 is connected with the inverting terminal of the operational amplifier A2, the output end of the operational amplifier A2 is connected with one end of the resistor R4, and the emitter of the transistor Q2 and the other end of the resistor R4 are connected with the emitter of the transistor Q3.

4. A small signal processing circuit based on the principle of power function as claimed in claim 3, wherein, The third-stage logarithmic operation module comprises a transistor Q3, and the collector and the base of the transistor Q3 are connected with the emitter of the transistor Q4.

5. A small signal processing circuit based on the principle of power function as claimed in claim 3, wherein, The fourth-stage logarithmic operation module comprises a transistor Q4, an operational amplifier A3, a resistor R5 and an output signal Vout, the output end of the operational amplifier A3 outputs the output signal Vout, the base of the transistor Q4 is connected with the non-inverting terminal of the operational amplifier A3, the base of the transistor Q4 and the non-inverting terminal of the operational amplifier A3 are grounded, the transistor Q4 is connected with the resistor R5 and the inverting terminal of the operational amplifier A3, and the other end of the resistor R5 is connected with the output end of the operational amplifier A3.

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