Fine line package substrate and method of manufacturing the same

Abstract

The present application relates to the field of packaging substrate, particularly relates to a fine line packaging substrate and a manufacturing method thereof. The packaging substrate comprises a core board, the core board comprises a first surface and a second surface, the first surface of the core board is provided with a first circuit layer, the second surface of the core board is provided with a second circuit layer, the core board comprises a first metal column, the first metal column connects the first circuit layer and the second circuit layer, and the first metal column comprises a filler inside. The first surface of the first metal column protrudes from the first surface of the core board by a distance greater than the thickness of the first circuit layer; the second surface of the first metal column protrudes from the second surface of the core board by a distance greater than the thickness of the second circuit layer. Fine lines can be formed on the surface of the core board, the circuit layer has high precision, the thickness of the circuit layer can be accurately controlled, the side etching amount of the circuit is extremely small, and the yield of the substrate is good. The bonding force between the circuit layer and the core board is strong, which can effectively improve the heat resistance and mechanical stress of the whole substrate.

Description

Technical Field

[0001] This invention relates to the field of packaging substrates, and in particular to a fine-line packaging substrate and its manufacturing method. Background Technology

[0002] Driven by the demands of artificial intelligence, automotive electronics, and other sectors, semiconductor technology is innovating at an unprecedented pace. As Moore's Law approaches its physical limits, advanced packaging technology is becoming a key path to improve chip performance. China, as one of the world's largest integrated circuit markets, has consistently sought self-sufficiency in key technologies. Ball Grid Array (BGA) packaging is a high-density surface mount packaging technology and is now widely used. Compared to traditional packaging technologies, it offers advantages such as reduced package size, increased I / O density, and lower thermal resistance. Current BGA packaging substrates require high mechanical strength in the core layer to provide effective support for the entire substrate, resulting in a thicker layer. Furthermore, it's impossible to fabricate fine lines on the sides of the core layer, thus failing to meet the top-to-bottom line design requirements of fan-out packaging substrates. Additionally, the limitations of subtractive processing methods result in trapezoidal cross-sections for the lines on the core layer surface, reducing the electrical performance of the circuitry. Summary of the Invention

[0003] The purpose of this invention is to solve the aforementioned problems by designing a fine-line packaging substrate and its fabrication method. To achieve the above objective, this invention provides the following solution:

[0004] A fine circuit packaging substrate includes a core board, the core board having a first core board surface and a second core board surface, the first core board surface having a first circuit layer, the second core board surface having a second circuit layer, the core board having a first metal pillar connecting the first circuit layer and the second circuit layer, and the first metal pillar containing a filler.

[0005] The first metal column has a first surface and a second surface, the first surface of the first metal column and the first surface of the core plate are located on one side, and the second surface of the first metal column and the second surface of the core plate are located on one side;

[0006] The distance by which the first surface of the first metal pillar protrudes from the first surface of the core board is greater than the thickness of the first circuit layer;

[0007] The distance by which the second surface of the first metal pillar protrudes from the second surface of the core board is greater than the thickness of the second circuit layer.

[0008] As a further improvement to this technical solution, the filler in the first metal column is ink or resin.

[0009] As a further improvement to this technical solution, the core board is made of resin or glass.

[0010] As a further improvement to this technical solution, the first circuit layer has a first surface and a second surface, the first surface of the first circuit layer is connected to the core board, and the width of the first surface of the first circuit layer multiplied by 0.95 is greater than the width of the second surface of the first circuit layer.

[0011] The second circuit layer has a first surface and a second surface, the first surface of the second circuit layer is connected to the core board, and the width of the first surface of the second circuit layer multiplied by 0.95 is greater than the width of the second surface of the second circuit layer.

[0012] A method for manufacturing a fine circuit packaging substrate includes the following steps:

[0013] S1. Copper layers are arranged on both sides of the core board;

[0014] S2. A through hole is made in the core board, and the diameter of the through hole is φ1;

[0015] S3. Copper plating is performed to form a metal through-hole with a diameter of φ2.

[0016] S4. Fill the metal through hole with filler to form a filler column;

[0017] S5. First treatment of both sides of the core board to expose the filler columns;

[0018] S6. Second treatment of both sides of the core board to expose the core board surface;

[0019] S7. Arrange the first circuit layer and the second circuit layer on both sides of the core board;

[0020] S8. Press dielectric layers onto both sides of the core board, and arrange the second copper pillars and the third circuit layer.

[0021] As a further improvement to this technical solution, the specific method for the first treatment of both sides of the core board is as follows:

[0022] S51, both sides of the grinding core plate;

[0023] S52, rapid etching of copper layers on both sides of the core board;

[0024] S53. Clean both sides of the core board.

[0025] As a further improvement to this technical solution, the specific method for the second processing of both sides of the core board is as follows:

[0026] S61, both sides of the grinding core plate;

[0027] S62. Etch the copper layers on both sides of the substrate to expose the core board surface.

[0028] As a further improvement to this technical solution, the specific method for arranging the first circuit layer and the second circuit layer on both sides of the core board is as follows:

[0029] S71. Press copper layers onto both sides of the core board;

[0030] S72. Coat both sides of the core board with photoresist, and expose and develop it.

[0031] S73. Copper plating is applied to both sides of the core board;

[0032] S74. Remove the photoresist and flash etch both sides of the core board to form the first circuit layer and the second circuit layer.

[0033] As a further improvement to this technical solution, the first circuit layer and the third circuit layer are connected by the second copper pillar; the second circuit layer and the third circuit layer are connected by the second copper pillar.

[0034] As a further improvement to this technical solution, the diameter of the through hole φ1 is larger than the diameter of the metal through hole φ2;

[0035] The line width of the first line layer is greater than the line width of the third line layer, and the line spacing of the first line layer is greater than the line spacing of the third line layer.

[0036] The line width of the second line layer is greater than that of the third line layer, and the line spacing of the second line layer is greater than that of the third line layer.

[0037] The beneficial effects of this invention are as follows: The fine circuit packaging substrate and its manufacturing method proposed in this application can form fine circuits on the surface of the core board, with high circuit layer precision, precise control of circuit layer thickness, minimal lateral etching of the circuits, and excellent substrate yield. The strong bonding between the circuit layer and the core board can effectively improve the overall heat resistance and mechanical stress of the substrate. Attached Figure Description

[0038] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention.

[0039] Figure 1 This is a schematic diagram of the overall structure of a fine circuit packaging substrate according to an embodiment of the present invention;

[0040] Figure 2 This is a partial structural schematic diagram of a fine circuit packaging substrate according to an embodiment of the present invention;

[0041] Figures 3 to 12This is a cross-sectional schematic diagram of the fabrication process of a fine circuit packaging substrate according to an embodiment of the present invention.

[0042] Reference numerals: 100, core board; 101, first surface of core board; 102, second surface of core board; 103, first metal pillar; 104, filler; 104a, ink; 200, first circuit layer; 201, first surface of first circuit layer; 202, second surface of first circuit layer; 300, second circuit layer; 400, dielectric; 500, second metal pillar; 600, third circuit layer; 100a, copper layer; 100b, copper foil; 800a, dry film of first circuit layer; 800b, dry film of second circuit layer. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0044] Those skilled in the art will understand that, unless specifically stated otherwise, the singular forms “a,” “an,” and “described” used herein may also include the plural forms. It should be further understood that the term “comprising” as used in this specification means the presence of the described features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0045] The present invention will now be described in detail with reference to the accompanying drawings.

[0046] Example 1:

[0047] like Figure 1 The diagram shown is a schematic representation of the overall structure of a fine circuit packaging substrate provided in an embodiment of this application; as shown... Figure 2 The diagram shown is a partial structural schematic of a fine circuit packaging substrate provided in an embodiment of this application.

[0048] The fine-line packaging substrate contains a core board 100, which is made of resin or glass; optionally, the core board 100 is made of glass. Compared to a resin core board, the surface of a glass core board can be processed to be smoother and flatter, with lower roughness. Glass also contains a large amount of silicon, so its coefficient of thermal expansion is similar to that of semiconductor silicon, ensuring that the relative positions of the substrate and the chip remain consistent during temperature changes, reducing warpage and stress. Glass itself has excellent insulation properties, with low dielectric constant and low loss, effectively reducing parasitic effects and improving the substrate's anti-interference capability. The mechanical strength of glass is also significantly better than that of resin, providing the substrate with stronger mechanical properties. The core board 100 has a first core board surface 101 and a second core board surface 102. The first core board surface 101 and the second core board surface 102 are connected by a first metal post 103 penetrating the core board 100, and the first metal post 103 contains a filler 104. The filler 104 can be made of resin or ink. The first metal pillar 103 protrudes from the first surface 101 of the core board by a distance h3, and the first metal pillar 103 also protrudes from the second surface 102 of the core board by a distance h3. A first circuit layer 200 is disposed on the first surface 101 of the core board, and a second circuit layer 300 is disposed on the second surface 102 of the core board. The thickness of the first circuit layer 200 is h1, and the thickness of the second circuit layer 300 is h2. The thickness h1 of the first circuit layer 200 is less than the distance h3 from which the first metal pillar 103 protrudes from the first surface 101 of the core board, and the thickness h2 of the second circuit layer 300 is less than the distance h3 from which the first metal pillar 103 protrudes from the first surface 101 of the core board. The first metal pillar 103 forms a solder pad that slightly protrudes from the surface of the first circuit layer 200 and the second circuit layer 300, which is beneficial to improving the reliability of electrical connections in subsequent processes. The first circuit layer 200 has a first surface 201 and a second surface 202, and the first surface 201 of the first circuit layer is connected to the first surface 101 of the core board. The width of the first surface 201 of the first circuit layer is w1, and the width of the second surface 202 of the first circuit layer is w2. The width w1 * 0.95 of the first surface 201 of the first circuit layer is greater than the width w2 of the second surface 202 of the first circuit layer, meaning that the cross-section of the first circuit layer is rectangular or approximately rectangular. Dielectric material 400 is pressed onto both sides of the core board 100. The function of dielectric material 400 is to provide insulation between the circuit layers. The material is modified epoxy resin, modified polyphenylene ether resin, polyimide resin, etc. A third circuit layer 600 is arranged within the dielectric material 400. Adjacent third circuit layers 600 are connected by second metal pillars 500. The first circuit layer 200 and the corresponding third circuit layer 600 are connected by the second metal pillars 500, and the second circuit layer 300 and the corresponding third circuit layer 600 are connected by the second metal pillars 500.

[0049] Example 2:

[0050] like Figures 3 to 12The diagram shown is a cross-sectional view illustrating the fabrication process of a fine circuit packaging substrate according to an embodiment of this application.

[0051] like Figure 3 As shown, copper layers 100a are pressed onto both sides of the core board 100 (i.e., the outer sides of the first surface 101 and the second surface 102 of the core board). The core board 100 is made of glass, which provides more effective mechanical support for the substrate, effectively reducing warpage and stress. Through-holes with a diameter of φ1 are laser-drilled on the substrate surface. Impurities on the substrate surface and inside the through-holes are cleaned, and seed metal layers are placed inside the through-holes to facilitate subsequent metal adhesion. Figure 4 As shown, an electroplating process is used to plate a copper layer inside the through-hole, forming a metal hole with a diameter of φ2. Due to the electroplating process, the through-hole diameter φ1 is larger than the metal hole diameter φ2. The hole walls are cleaned to ensure they are clean, free of oxidation, and free of contaminants. Figure 5 As shown, ink 104a, characterized by low viscosity, high fluidity, and low shrinkage, was selected for injection into the metal holes. Before injection, the substrate was subjected to vacuum treatment. After injection, ink 104a was gradually cured using a stepped heating method.

[0052] like Figure 6 The process shown involves grinding to remove excess ink adhering to the substrate surface, preventing interference with subsequent processes. Ink removal can be achieved using brushes of varying mesh sizes. After brushing, a rapid etching process is employed to thin the copper layer 100a, exposing the ink-filled pillars formed by the ink 104a. Figure 7 As shown, the substrate is ground again on both sides to remove the portion of the ink-filled pillars protruding from the copper layer 100a, and to make the surface of the copper layer 100a smooth. Figure 8 As shown, the copper layer 100a is etched again to remove the copper layer 100a on the surface of the core board 100, exposing the core board 100. Since the ink filling pillars formed by the ink 104a are flush with the copper layer 100a, after the copper layer 100a is etched again, the remaining ink filling pillars protrude from the surface of the core board 100.

[0053] Copper foil 100b is pressed onto both sides of the core board 100. The thickness of the copper foil 100b is less than 12μm. Alternatively, a chemical copper plating process can be used to form copper foil 100b on both sides of the core board 100. Figure 9 As shown. Electroless copper plating produces thinner copper foils, with thicknesses reaching 0.3~1.0 μm. For example... Figure 10As shown, dry film or photoresist is laminated or coated on both sides of the core board. After exposure and development, the areas where circuitry needs to be fabricated are exposed. Here, 800a is the first circuit layer dry film, and 800b is the second circuit layer dry film. Selective electroplating is performed on the exposed copper foil 100b area to remove the dry film or photoresist on both sides of the core board 100. Then, a rapid etching process is used to etch the copper foil 100b areas not covered by the circuit layers, resulting in the first circuit layer 200 and the second circuit layer 300. Figure 11 As shown. Because the dry film in the area where the circuit needs to be formed is first developed and removed, exposing the copper layer, then electroplating is performed, and finally the dry film in other areas is removed through a film stripping process, the copper layer in the areas not covered by the circuit is exposed and rapidly etched, while the circuit layers are almost entirely uncorroded. That is, the sides of the first circuit layer 200 and the second circuit layer 300 that are directly connected to the core board 100 are not etched, and the sides of the first circuit layer 200 and the second circuit layer 300 that are not directly connected to the core board 100 are also largely unetched, or only slightly etched. The cross-sections of the first circuit layer 200 and the second circuit layer 300 are essentially rectangular, and do not form trapezoids.

[0054] Dielectric material 400 is press-fitted onto both sides of the core board 100. The dielectric material 400 is made of modified epoxy resin, modified polyphenylene ether resin, polyimide resin, etc. Two third circuit layers 600 are arranged on the dielectric material 400 on the same side. Simultaneously, several second metal pillars 500 are arranged within the dielectric material 400, connecting the first circuit layer 200 and the third circuit layer 600, and connecting the second circuit layer 300 and the third circuit layer 600 through the second metal pillars 500. According to design requirements, the above steps are repeated to arrange the third circuit layer 600 and the second metal pillars 500. The linewidth of the first circuit layer 200 is greater than the linewidth of the third circuit layer 600, and the line spacing of the first circuit layer 200 is greater than the line spacing of the third circuit layer 600; the linewidth of the second circuit layer 300 is greater than the linewidth of the third circuit layer 600, and the line spacing of the second circuit layer 300 is greater than the line spacing of the third circuit layer 600, for example... Figure 12 As shown.

[0055] In summary, the fine circuit packaging substrate and its manufacturing method proposed in this invention can form fine circuits on the surface of the core board, with high circuit layer precision, precise control of circuit layer thickness, minimal lateral etching of the circuits, and excellent substrate yield. The strong adhesion between the circuit layer and the core board effectively improves the overall heat resistance and mechanical stress of the substrate.

Claims

1. A fine circuit packaging substrate, characterized in that, The fine circuit packaging substrate includes a core board, the core board has a first core board surface and a second core board surface, the first core board surface is provided with a first circuit layer, the second core board surface is provided with a second circuit layer, the core board includes a first metal pillar, the first metal pillar connects the first circuit layer and the second circuit layer, and the first metal pillar contains a filler. The first metal column has a first surface and a second surface, the first surface of the first metal column and the first surface of the core plate are located on one side, and the second surface of the first metal column and the second surface of the core plate are located on one side; The distance by which the first surface of the first metal pillar protrudes from the first surface of the core board is greater than the thickness of the first circuit layer; The distance by which the second surface of the first metal pillar protrudes from the second surface of the core board is greater than the thickness of the second circuit layer; The first metal pillar forms a solder pad that protrudes slightly from the surface of the first and second circuit layers to improve the reliability of electrical connections in subsequent processes. The first circuit layer has a first surface and a second surface, the first surface of the first circuit layer is connected to the core board, and the width of the first surface of the first circuit layer multiplied by 0.95 is greater than the width of the second surface of the first circuit layer; The second circuit layer has a first surface and a second surface, the first surface of the second circuit layer is connected to the core board, and the width of the first surface of the second circuit layer multiplied by 0.95 is greater than the width of the second surface of the second circuit layer. The cross-sections of the first and second line layers are rectangular.

2. The fine circuit packaging substrate according to claim 1, characterized in that, The filler inside the first metal column is ink or resin.

3. The fine circuit packaging substrate according to claim 1, characterized in that, The core board is made of resin or glass.

4. A method for manufacturing a fine-line packaging substrate, used to manufacture the fine-line packaging substrate as described in any one of claims 1 to 3, characterized in that, Includes the following steps: S1. Copper layers are arranged on both sides of the core board; S2. A through hole is made in the core board, and the diameter of the through hole is φ1; S3. Copper plating is performed to form a metal through-hole with a diameter of φ2. S4. Fill the metal through hole with filler to form a filler column; S5. First treatment of both sides of the core board to expose the filler columns; S6. Second treatment of both sides of the core board to expose the core board surface; S7. Arrange the first circuit layer and the second circuit layer on both sides of the core board; S8. Press dielectric layers onto both sides of the core board, and arrange the second copper pillars and the third circuit layer.

5. The method for manufacturing a fine circuit packaging substrate according to claim 4, characterized in that, The specific method for the first treatment of both sides of the core board is as follows: S51, both sides of the grinding core plate; S52, rapid etching of copper layers on both sides of the core board; S53. Clean both sides of the core board.

6. The method for manufacturing a fine circuit packaging substrate according to claim 5, characterized in that, The specific method for the second treatment of both sides of the core board is as follows: S61, both sides of the grinding core plate; S62. Etch the copper layers on both sides of the substrate to expose the core board surface.

7. The method for manufacturing a fine circuit packaging substrate according to claim 5, characterized in that, The specific method for arranging the first and second circuit layers on both sides of the core board is as follows: S71. Press copper layers onto both sides of the core board; S72. Coat both sides of the core board with photoresist, and expose and develop it. S73. Copper plating is applied to both sides of the core board; S74. Remove the photoresist and flash etch both sides of the core board to form the first circuit layer and the second circuit layer.

8. The method for manufacturing a fine circuit packaging substrate according to claim 7, characterized in that, The first circuit layer and the third circuit layer are connected by the second copper pillar; the second circuit layer and the third circuit layer are connected by the second copper pillar.

9. A method for manufacturing a fine circuit packaging substrate according to claim 5, characterized in that, The diameter of the through hole φ1 is greater than the diameter of the metal through hole φ2; The line width of the first line layer is greater than the line width of the third line layer, and the line spacing of the first line layer is greater than the line spacing of the third line layer. The line width of the second line layer is greater than that of the third line layer, and the line spacing of the second line layer is greater than that of the third line layer.

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