Monocrystalline silicon epitaxial wafer with low haze pattern and method of manufacturing the same

By introducing high-density COP defects on a (100) crystal plane single-crystal silicon substrate, the regular distribution of atomic steps is broken, the problem of haze pattern on the surface of epitaxial wafers is solved, and the preparation of low-haze epitaxial wafers is realized, which is suitable for high-precision photolithography processes.

CN121976294BActive Publication Date: 2026-07-03QL ELECTRONICS SCI QUZHOU CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
QL ELECTRONICS SCI QUZHOU CO LTD
Filing Date
2026-04-08
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing technologies are unable to effectively eliminate the haze pattern on the surface of epitaxial wafers caused by the regular distribution of atomic steps on the surface of (100) crystal plane single crystal silicon substrates, which affects the lithography accuracy and device yield.

Method used

By introducing high-density COP defects on a (100) crystal plane single-crystal silicon substrate, the regular distribution of atomic steps is disrupted, and the disorder of COP defects is used to destroy the continuity of atomic steps, thereby eliminating haze patterns.

Benefits of technology

This technology reduces the surface haze value of epitaxial wafers to below 1, making them suitable for high-precision photolithography processes and improving the yield and reliability of devices.

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Abstract

This invention discloses a low-haze patterned monocrystalline silicon epitaxial wafer and its preparation method, belonging to the field of semiconductor silicon wafer manufacturing technology. The method includes: selecting a (100) crystal plane polished silicon wafer with a crystal orientation deviation angle of less than 0.3° as a substrate, wherein the substrate has a high COP defect density, and the number of COP sizes at a specific detection scale is significantly higher than that of conventional monocrystalline polished silicon wafers; for example, for a 300mm substrate, the COP defect density is 2000~12000 at a 26nm detection scale; and epitaxially growing a monocrystalline silicon layer on the substrate using a chemical vapor deposition process to obtain a monocrystalline silicon epitaxial wafer with a low-haze pattern on the surface. This invention breaks the regular distribution of atomic steps on the substrate through high COP defects, changing the spatial frequency distribution from discrete peaks to a continuous spectrum, altering the surface light scattering characteristics, fundamentally eliminating the haze pattern, resulting in a surface haze value of less than 1 for the epitaxial wafer, and exhibiting strong process compatibility, making it easy for industrial application.
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Citation Information

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