A system for constructing dynamic checksum extraction circuits for neutral atom quantum computing

Abstract

This invention discloses a dynamic checksum extraction circuit construction method for neutral atom quantum computing, belonging to the field of quantum computing technology. It includes: a checksum extraction construction module library generation unit, used to traverse the parameterized checksum extraction circuit space, generate candidate circuits based on the evolution logic of the qubit detection region, and select effective circuits; an offline circuit characteristic characterization unit, used to perform structural screening and preliminary performance screening of effective circuits to obtain feasible circuits, and to characterize the atomic loss tolerance of feasible circuits, generating a loss tolerance distribution for each feasible circuit on the surface code plane; and an online dynamic circuit construction unit, used to calculate the fitness score of each feasible circuit based on the measured atomic loss position and the loss tolerance distribution, dynamically selecting the optimal circuit as the next round of checksum extraction circuit. This invention can dynamically match atomic loss patterns without increasing circuit overhead, effectively suppressing atomic loss errors and improving fault tolerance performance.

Description

Technical Field

[0001] This invention belongs to the field of quantum computing technology, specifically relating to a dynamic checksum extraction circuit construction system for neutral atom quantum computing. Background Technology

[0002] Neutral atom arrays have become an important platform for realizing scalable fault-tolerant quantum computing due to their flexible qubit layout, large-scale qubit count, and high-fidelity reconfigurable interactions. To support this scaling, quantum error correction techniques are typically employed, with surface codes becoming the mainstream choice due to their high error threshold and computational ease. Implementing surface codes requires detecting physical noise through a synthesizer extraction (SE) circuit, in conjunction with a decoder for error correction.

[0003] However, neutral atom systems exhibit a unique non-Pauli error mechanism—atom loss. Atom loss removes a qubit from the array, causing all subsequent logic gates involving that qubit to fail. This error violates the assumptions of standard surface code decoders, posing a significant challenge to reliable error correction. Existing technologies primarily address the atom loss problem by improving the decoder and the checksum extraction circuitry.

[0004] (1) Decoder aspect: Existing technologies enhance the detector error model (DEM), enumerate all possible loss locations within the lifetime of the qubit and generate a weighted model, enabling the minimum-weight perfect matching (MWPM) decoder to indirectly utilize the lost information.

[0005] (2) Circuit aspect: In order to detect the loss of data qubits as early as possible, existing technologies have proposed methods to modify the parity extraction circuit. For example, research literature 1 (titled Leveraging atom loss errors in fault-tolerant quantum algorithms) proposes the SWAP SE technique, which introduces a SWAP gate and physical exchange after the last CNOT gate to transfer the loss information of data qubits to the parity qubits; research literature 2 (titled Relaxing hardware requirements for surface code circuits using time-dynamics) proposes the Wiggling SE technique, which alternates the roles of data and parity qubits by periodically moving the surface code plane.

[0006] Although the above techniques have mitigated the effects of atom loss to some extent, they still have the following significant shortcomings:

[0007] (1) High circuit overhead: Existing circuit modification schemes often introduce huge resource overhead. For example, the SWAP SE technology extends the standard four-layer structure to eight layers, increasing circuit depth and operation time.

[0008] (2) Lack of adaptability: The existing circuit structure is static and cannot be adjusted according to the specific missing position actually observed during the calculation process.

[0009] (3) Limited error correction effect: Since it is impossible to optimize for specific loss patterns, even if the above improvement methods are used, the logic error rate in the case of atomic loss is still orders of magnitude higher than that in the case of no loss (for example, it is still about 20 times higher when the code distance is 5).

[0010] Therefore, designing a parity extraction circuit that can adapt to the missing atom position, has low overhead, and can effectively improve the fault tolerance performance of surface codes is a key problem that urgently needs to be solved in the field of neutral atom quantum computing. Summary of the Invention

[0011] In view of the above, the purpose of this invention is to provide a dynamic checksum extraction circuit construction system for neutral atom quantum computing. This system constructs a module library containing different error propagation characteristics through a checksum extraction module library generation unit. An offline circuit characteristic characterization unit generates the tolerance distribution of each circuit for atom loss. An online dynamic circuit construction unit adaptively selects the optimal checksum extraction circuit structure based on the real-time detected atom loss patterns. This achieves dynamic matching between the loss location and the circuit's fault tolerance characteristics without increasing the number of circuit layers or significantly increasing gate length overhead, thus maximally suppressing the impact of atom loss on the logic error rate and significantly improving the fault tolerance performance of neutral atom quantum computers.

[0012] To achieve the above-mentioned objectives, the present invention provides the following technical solution:

[0013] This invention provides a system for constructing a dynamic checksum extraction circuit for neutral atom quantum computing, comprising:

[0014] The checksum extraction module library generation unit is used to traverse the parameterized checksum extraction circuit space, generate candidate circuits according to the evolution logic of the quantum bit detection region, and obtain valid circuits after being screened by the rationality check rules. The checksum extraction module library is composed of all valid circuits.

[0015] The circuit characteristic offline characterization unit is used to perform structural screening and performance screening of effective circuits in the parser extraction module library to obtain feasible circuits, and to characterize the atomic loss tolerance of the feasible circuits to generate the loss tolerance distribution of each feasible circuit on the surface code plane.

[0016] The circuit online dynamic construction unit is used to calculate the fitness score of each feasible circuit based on the loss tolerance distribution according to the real-time measurement feedback of the atom loss position during quantum computing, and select the optimal circuit as the checker extraction circuit for the next round based on the fitness score.

[0017] Preferably, the parameterized checksum extraction circuit space is defined by including the following configuration parameters: CNOT gate direction, CNOT gate alignment, checksum bit movement direction, and qubit detection area, which are used to jointly determine the arrangement of logic gates and the interaction topology between qubits in the checksum extraction construction module.

[0018] Preferably, the step of generating candidate circuits based on the evolution logic of the qubit detection region includes: dividing the evolution logic of the qubit detection region into a region expansion stage and a region contraction stage, and defining a first mode for marking the region in the creation or expansion state and a second mode for marking the region in the update or contraction state, and constructing candidate circuits by simulating the evolution process of the qubit detection region in the reset layer, CNOT layer and measurement layer based on the first mode and the second mode layer.

[0019] Preferably, the rationality check rules include: the qubit detection region in the first mode contains only one check qubit, and any two regions in the qubit detection region in the second mode do not shrink to the same check qubit.

[0020] Preferably, for valid circuits extracted from the checksum building block library, they are divided into three categories based on the evolution trend of the qubit detection region for subsequent structure screening. The categories include: fixed type, whose qubit detection region remains unchanged in the CNOT layer; extended type, whose qubit detection region expands and the check bits move during the construction process; and contracted type, whose qubit detection region contracts during the construction process.

[0021] Preferably, the step of performing structural screening and preliminary performance screening on valid circuits in the parser extraction module library to obtain feasible circuits includes: performing structural screening on valid circuits based on structural constraints, wherein the structural constraints include: extended and contracted circuits cannot be combined in the same sequence, and the total number of extended and contracted circuits does not exceed three; and then performing preliminary performance screening on the structurally screened circuits under pure Pauli noise environment, and obtaining feasible circuits based on the logic error rate under Pauli error.

[0022] Preferably, the step of characterizing the atomic loss tolerance of feasible circuits and generating the loss tolerance distribution of each feasible circuit on the surface code plane includes: sampling all feasible circuits under a noise model that includes atomic loss, calculating the decoding success rate when atomic loss occurs at each physical position as the atomic loss tolerance of the feasible circuit, and constructing the loss tolerance distribution of each feasible circuit for all physical qubits on the surface code plane from the atomic loss tolerance of all physical positions.

[0023] Preferably, the step of calculating the fitness score of each feasible circuit based on the loss tolerance distribution includes: obtaining the set of physical locations of atomic loss determined by the measurement feedback of the current round; for each feasible circuit, retrieving the atomic loss tolerance value corresponding to each location in the set of physical locations of atomic loss from its loss tolerance distribution; and calculating the mean of the atomic loss tolerance values ​​corresponding to each location as the fitness score of each feasible circuit in the current loss mode.

[0024] Preferably, the circuit for selecting the optimal circuit based on fitness scores as the validator extraction circuit for the next round includes:

[0025] From the feasible circuits that match the prefix sequence of the building blocks of the already executed checkers, select the feasible circuit with the highest fitness score as the optimal circuit, and extract the optimal circuit as the checker extraction circuit for the next round of execution.

[0026] To achieve the same inventive objective, this invention also provides a method for constructing a dynamic checksum extraction circuit for neutral atom quantum computing, implemented using the aforementioned system for constructing a dynamic checksum extraction circuit for neutral atom quantum computing, comprising the following steps:

[0027] The check extract module library is used to generate units that traverse the parameterized check extract circuit space. Candidate circuits are generated according to the evolution logic of the quantum bit detection region. After being screened by the rationality check rules, valid circuits are obtained. All valid circuits constitute the check extract module library.

[0028] The circuit characteristic offline characterization unit is used to extract valid circuits from the check module library to perform structural screening and performance screening to obtain feasible circuits. The atomic loss tolerance of the feasible circuits is then characterized to generate the loss tolerance distribution of each feasible circuit on the surface code plane.

[0029] By utilizing the online dynamic construction unit of the circuit during quantum computing, the fitness score of each feasible circuit is calculated based on the loss tolerance distribution according to the real-time measurement feedback of the atom loss position. Based on the fitness score, the optimal circuit is selected as the checker extraction circuit for the next round.

[0030] Compared with the prior art, the beneficial effects of the present invention include at least the following:

[0031] (1) Order-of-magnitude reduction in logic error rate: This invention uses an online dynamic circuit construction unit to adaptively select the parser extraction circuit that best matches the current loss mode from feasible circuits obtained from offline characterization based on the real-time detected atom loss position, thereby effectively suppressing logic errors caused by atom loss. Experiments show that when the surface code distance is 3, 5, and 7, the logic error rate of this invention is reduced by 3.45 times, 7.66 times, and 11.79 times, respectively, compared with the SWAP SE technology; and by 16.63 times, 271.1 times, and 677.8 times, respectively, compared with the Wiggling SE technology.

[0032] (2) Robustness in high-noise environments: By utilizing the offline characterization of the loss tolerance distribution generated by the circuit characteristics and combining it with online dynamic selection, this invention can maintain high adaptability to environments with different loss ratios. Experiments show that when the proportion of atomic loss in the total error increases from 0.5 to 0.75, the logic error rate of this invention fluctuates by only about 5%, demonstrating extremely high stability; while under the same conditions, the error rate of the existing SWAP SE technology increases by as much as 74%.

[0033] (3) Performance gain without additional overhead: Without increasing circuit depth and gate count, this invention achieves further performance improvement based on the static optimal circuit simply by reusing existing building block libraries for optimization selection in the online dynamic building unit of the circuit. Experiments show that when the surface code distance is 3 and 5, the logic error rate of this invention is reduced by 1.21 times and 1.14 times, respectively, compared with the static optimal circuit. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of a dynamic checksum extraction circuit construction system for neutral atom quantum computing provided in an embodiment of the present invention;

[0036] Figure 2 This is a schematic diagram of the generation principle of the checksum extraction construction module provided in the embodiment of the present invention; wherein (a) shows the parameter space, (b) shows the circuit construction process and the detection area tracking method, (c) shows the rationality check rules for verifying the effectiveness of the detection area, and (d) shows an example of a constructed checksum extraction construction module;

[0037] Figure 3 This is a schematic diagram of the classification of effective circuits provided in the embodiments of the present invention, which shows three circuit types: fixed type (F type), extended type (E type), and contracted type (C type);

[0038] Figure 4 This is a schematic diagram of the three-stage workflow of the offline circuit characteristic characterization unit provided in the embodiment of the present invention, which shows the process of screening and characterizing feasible circuits from the full parameter space;

[0039] Figure 5 This is a flowchart illustrating a method for constructing a dynamic checker extraction circuit for neutral atom quantum computing, as provided in an embodiment of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the scope of protection of this invention.

[0041] The inventive concept of this invention is as follows: Addressing the problem that existing neutral atom quantum computing surface code error correction technologies suffer from high overhead and an inability to dynamically adjust the checksum extraction circuit for atom loss errors, resulting in a high logic error rate, this invention provides a dynamic checksum extraction circuit construction system for neutral atom quantum computing. This system constructs a checksum extraction module library containing different error propagation characteristics, offline characterizes the tolerance distribution of each module for atom loss, and dynamically selects the circuit module best matching the current loss mode for online assembly based on the real-time detected atom loss location during quantum computing. This achieves adaptive error correction without increasing circuit depth or gate operation overhead, significantly reducing the logic error rate and improving the system's fault tolerance performance.

[0042] like Figure 1 As shown, the embodiment provides a dynamic checksum extraction circuit construction system 100 for neutral atom quantum computing, including: a checksum extraction construction module library generation unit 110, an offline circuit characteristic characterization unit 120, and an online dynamic circuit construction unit 130.

[0043] The checksum extraction module library generation unit 110 is used to traverse the parameterized checksum extraction circuit space, generate candidate circuits according to the evolution logic of the quantum bit detection region, and obtain valid circuits after being screened by the rationality check rules. All valid circuits constitute the checksum extraction module library.

[0044] In this embodiment, as the foundation for dynamically constructed circuits, a candidate circuit module library containing various fault-tolerant characteristics is first required. To this end, this embodiment defines configuration parameters including CNOT direction, CNOT alignment, parity bit movement direction, and qubit detection region. By traversing the parameterized Syndrome Extraction (SE) circuit space, candidate circuits are generated based on the evolution logic (expansion and contraction) of the qubit detection region. Invalid circuits are filtered using rationality checking rules (such as single parity bit correspondence rules) to identify and generate all valid single-round extraction circuits that meet physical constraints. These circuits are then uniformly defined as SE construction modules, thereby obtaining a set of verified SE construction module libraries containing different error propagation characteristics. The construction modules follow a fixed procedure, including a reset layer, four CNOT gates, and a measurement layer.

[0045] Specifically, to systematically traverse all possible circuit structures, this embodiment defines four key configuration parameters. These four parameters collectively determine the arrangement of logic gates and the interaction topology of qubits in the SE building block, as follows: Figure 2 As shown in (a):

[0046] (1) CNOT orientation: With Z-check as a reference, each CNOT layer can be positioned in one of four orientations: bottom right (DR), top right (UR), top left (UL), or bottom left (DL). These orientations represent the relative positions of the control qubits with respect to their target qubits.

[0047] (2) CNOT alignment: This is a binary parameter that determines whether the X check uses the same control bit-target bit relative position direction as the Z check. When set to true, the two are in the same direction; when set to false, the X check uses the opposite direction.

[0048] (3) Parity bit shift: Specifies the direction in which the parity information is propagated to its corresponding data qubit. For example, setting it to bottom right means that the parity information flows to the data qubit located in the bottom right direction.

[0049] (4) Quantum bit detection region: Defines the physical region where CNOT gates can be executed, indicating the available neighborhood for constructing each extraction circuit.

[0050] Specifically, based on the parameter configuration defined above, this embodiment constructs the SE building module by simulating the evolution of the qubit detection region in the circuit. In a complete error correction cycle, the evolution of the qubit detection region is divided into two stages: the first stage generates and expands outward from the check qubit to cover its corresponding data qubit, and the second stage gradually shrinks back to a single check qubit. Accordingly, two modes are defined: mode 1 represents the first stage, i.e., creating and expanding a new region; while mode 2 corresponds to the second stage, in which the existing region is updated and eventually merged back. The construction process of the SE building module proceeds layer by layer, as shown in Figure 2(b).

[0051] (1) Reset layer: For each qubit that needs to be reset, a new qubit detection region is created and recorded as the first mode. Existing qubit detection regions in the first mode are updated to the second mode.

[0052] (2) CNOT layer: The detection region of each qubit is expanded or shrunk according to the direction of the CNOT gate. Taking the Z-check region as an example, if the region only contains the target qubit, it is expanded after the operation to include the control qubit; if it already contains both, it is shrunk to the target qubit.

[0053] (3) Measurement layer: The measurement qubit is determined based on the state of the qubit detection region. When the region is in the second mode, the measurement results of the first mode and the second mode are XORed to form a probe, and then the region is removed.

[0054] Figure 2 (d) illustrates a concrete example of an SE building block: the reset layer first resets the four check qubits (Reset, marked "R" in the figure). After four rounds of expansion, assuming the check bits shift after the second round, the qubit detection region shifts to the upper left relative to its original check position. This dynamic evolution enables the circuit to detect the loss of atoms on the data qubits during each round of check bit extraction.

[0055] Specifically, the above construction process may generate circuits that are physically infeasible or cannot be correctly decoded. Therefore, in order to filter out invalid circuits from the generated candidate circuits and ensure that each retained SE construction module can correctly extract the check sub-information, this embodiment applies the following rationality check rules, such as... Figure 2 As shown in (c):

[0056] For the qubit detection region (first mode) at the end of the first round, it is required to contain exactly one parity qubit to ensure that the detection region corresponds to a single parity bit and is unambiguous.

[0057] For the qubit detection region at the end of the second round (second mode), ensure that no two detection regions shrink to the same check qubit, so as to avoid being unable to determine the physical qubit group corresponding to the probe.

[0058] Specifically, after searching and filtering, a set of effective SE building block libraries (denoted as...) were obtained. To facilitate subsequent analysis of its fault-tolerant characteristics, the evolution trend of the qubit detection region during the construction process (i.e., Figure 3 Based on the evolution of the qubit detection region (indicated by the direction of the center of gravity shift or the trend of boundary changes in the region shown by the middle arrow), these circuits are divided into three categories.

[0059] (1) F type (Fixed): The detection region of the qubit remains unchanged in the four CNOT layers (marked as F1, F2, F3, F4 according to the different directions of the CNOT layers).

[0060] (2) E type (Expand): The detection region of the qubit expands during the construction process, and the parity bit moves (marked as E1 or E2 depending on whether the parity bit moves in the DL or DR direction).

[0061] (3) Type C (Contract, contraction type): The qubit detection region contracts during the construction process (labeled as C1, C2, C3, C4). Among them, two circuits contract to the lower left (C1 and C2, distinguished by the CNOT direction in the 3rd and 4th rounds), and two contract to the lower right (C3 and C4).

[0062] Figure 3 The light purple area represents the qubit detection region and its evolution range; the cyan and blue dots represent the data qubits and check qubits, respectively; the angled black arrows indicate the operation sequence and direction of the CNOT gates (to avoid confusion, in the "fixed type," the operation direction of the first CNOT gate is marked with a solid black dot); and the red arrows represent the movement of the check qubits. To assemble a code distance of... The SE circuit, in each round from Choose from. For example, One possible construction is .

[0063] The offline circuit characteristic characterization unit 120 is used to perform structural screening and performance screening of the valid circuits in the parser extraction module library to obtain feasible circuits, and to characterize the atomic loss tolerance of the feasible circuits to generate the loss tolerance distribution of each feasible circuit on the surface code plane.

[0064] In the embodiment, after obtaining the above-mentioned SE building block library Subsequently, directly using combinations of modules would result in a huge search space. To select high-performance combinations from the library and quantify the resistance of each combination to atomic loss, thereby providing data support for subsequent online selection, this embodiment first narrows the search range based on structural constraints (such as limiting the mixing of extended and contracted modules); secondly, it initially screens out candidate circuits with low logic error rates under pure Pauli noise conditions; finally, it samples under a noise model with atomic loss, statistically analyzes the decoding success rate of each candidate circuit when a loss occurs at a specific physical location, thereby generating a loss tolerance profile for each circuit for all physical bits in the plane.

[0065] Specifically, this embodiment adopts the following... Figure 4 The three-stage workflow shown is used to characterize the circuit characteristics offline.

[0066] Phase 1: Structure Selection. The search space is narrowed down using structural observations. Class F modules are effective at handling Pauli errors but weak against atom loss; Class E and Class C modules shorten the data bit lifetime and enhance robustness against loss by exchanging data and verifying qubits. To combine the advantages of both, an effective circuit combination must satisfy two constraints:

[0067] (1) Class E and Class C building blocks cannot be combined in the same sequence;

[0068] (2) The total number of E-class or C-class modules cannot exceed three.

[0069] Phase Two: Initial Performance Screening. Fixed Physical Error Rate. Measure the logic error rate of each circuit that conforms to the above rules under Pauli fault conditions. Select the circuit with the lowest logic error rate. Each circuit is used as a candidate set, in the embodiment... The value is 2, and the candidate set includes two circuits: [FFFCC] and [FFCFC].

[0070] Phase 3: Characterization of atom loss tolerance. For the selected... A detailed atom loss analysis was performed on each circuit. Execution under the noise model Sub-sampling (shots), of which The probability of atom loss. Let be the Pauli error probability. Based on the actual physical characteristics of neutral atom hardware, the probability of atom loss and the Pauli error probability are comparable in magnitude; here, the noise model is simplified to assume they are equal. If the physical location... If an atom is lost at a certain location, record whether the decoding was successful or not. Define the physical location. Loss tolerance at the location for:

[0071] ,

[0072] in, This represents the number of samples lost at this location. For sampling index, For indicator functions, For the decoder in the The result of decoding in the next sample. If decoding is successful, then A value of 1 indicates a loss tolerance, while a value of 0 indicates a loss tolerance. This yields the loss tolerance distribution set for each circuit. .in This represents the set of all physical qubit locations on the surface code plane. This information is stored for dynamic circuit construction. For example... Figure 4 As shown in the atomic loss tolerance characterization, the two orange-labeled qubits are respectively... and Coordinate representation. Assuming a missed sample occurs in this qubit, if the sample decoding is successful, the success count at the corresponding position is incremented by one; if the sample decoding fails, the success count remains unchanged. Regardless of success or failure... and Each one needs to be incremented by one to indicate that a missed sample has occurred.

[0073] The circuit online dynamic construction unit 130 is used to calculate the fitness score of each feasible circuit based on the loss tolerance distribution according to the real-time measurement feedback of the atom loss position during the quantum computing process, and select the optimal circuit as the checker extraction circuit for the next round based on the fitness score.

[0074] In this embodiment, based on the preferred circuit set and its loss tolerance distribution data obtained from offline characterization, this embodiment determines the set of physical locations where atoms are currently lost during quantum computing execution by utilizing feedback information after each round of real-time measurement. Based on the aforementioned loss tolerance distribution, the fitness scores of the remaining feasible circuits in the current loss mode are calculated, and the circuit configuration with the highest score is selected as the checksum extraction circuit for the next round. This process is repeated round by round until the computation ends. The feasible circuit set obtained in the characterization phase is defined as... .

[0075] Specifically, for a code distance of Surface code, each circuit Represented as a sequence of SE building blocks:

[0076] ,

[0077] in, Candidate circuit In the Error correction round (i.e., the first / second cycle of the circuit) The specific SE building block selected by the layer. .

[0078] For each circuit The loss tolerance distribution table can be obtained using the following formula:

[0079] ,

[0080] Complete the first After the round, assuming the sequence of executed SE building blocks is as follows:

[0081] ,

[0082] Define a feasible set with consistent prefixes:

[0083] ,

[0084] This set contains the previous The layers match all circuits in the building history to date.

[0085] The dynamic selection process is as follows:

[0086] (1) Initialization: At the start of execution (round 0), The first round of building blocks is initialized using the circuit with the lowest baseline logic error rate.

[0087] (2) Obtaining lost information: The first After the round is completed, the set of physical locations where atoms were lost is determined based on the measurement results. .

[0088] (3) Calculate the fitness score: If Non-empty, from the above distribution table Search for the tolerance value at the corresponding position in the middle. And calculate each candidate circuit. The degree of sensitivity to perceived score :

[0089] ,

[0090] This score measures the circuit. The average success rate of decoding at the current lost position.

[0091] (4) Decision-making and execution: Selecting the circuit that maximizes the score As the optimal circuit:

[0092] ,

[0093] Select the first of the circuits Layer building blocks As the execution circuit for the next round.

[0094] In summary, through the above steps, the system can adaptively assemble a checker extraction circuit with the strongest anti-loss capability based on the real-time detected atom loss patterns.

[0095] Based on the same inventive concept, such as Figure 5 As shown, this embodiment of the invention also provides a method for constructing a dynamic checksum extraction circuit for neutral atom quantum computing, including the following steps:

[0096] S1. Using the checksum extraction module library to generate units, the parameterized checksum extraction circuit space is traversed. Candidate circuits are generated according to the evolution logic of the quantum bit detection region. After being screened by the rationality check rules, the effective circuits are obtained. All effective circuits constitute the checksum extraction module library.

[0097] S2 utilizes the offline characterization unit of circuit characteristics to perform structural screening and preliminary performance screening of effective circuits in the parser extraction module library to obtain feasible circuits, and performs atomic loss tolerance characterization on the feasible circuits to generate the loss tolerance distribution of each feasible circuit on the surface code plane.

[0098] S3 utilizes the online dynamic construction unit of the circuit to calculate the fitness score of each feasible circuit based on the real-time measurement feedback of the atom loss position during the quantum computing process, according to the loss tolerance distribution. Based on the fitness score, the optimal circuit is selected as the checker extraction circuit for the next round.

[0099] It should be noted that the method for constructing a dynamic checker extraction circuit for neutral atom quantum computing provided in the above embodiments belongs to the same inventive concept as the system for constructing a dynamic checker extraction circuit for neutral atom quantum computing. For details of its implementation process, please refer to the embodiment of the system for constructing a dynamic checker extraction circuit for neutral atom quantum computing, which will not be repeated here.

[0100] The specific embodiments described above illustrate the technical solution and beneficial effects of the present invention in detail. It should be understood that the above description is only the most preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, additions, and equivalent substitutions made within the scope of the principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A system for constructing a dynamic checksum extraction circuit for neutral atom quantum computing, characterized in that, include: The checksum extraction module library generation unit is used to traverse the parameterized checksum extraction circuit space, generate candidate circuits according to the evolution logic of the quantum bit detection region, and obtain valid circuits after being screened by the rationality check rules. The checksum extraction module library is composed of all valid circuits. The circuit characteristic offline characterization unit is used to perform structural screening and performance screening of effective circuits in the parser extraction module library to obtain feasible circuits, and to characterize the atomic loss tolerance of the feasible circuits to generate the loss tolerance distribution of each feasible circuit on the surface code plane. The circuit online dynamic construction unit is used to calculate the fitness score of each feasible circuit based on the loss tolerance distribution according to the real-time measurement feedback of the atom loss position during quantum computing, and select the optimal circuit as the checker extraction circuit for the next round based on the fitness score.

2. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 1, characterized in that, The parameterized checksum extraction circuit space is defined by including the following configuration parameters: CNOT gate direction, CNOT gate alignment, check bit movement direction, and qubit detection area, which are used to jointly determine the arrangement of logic gates and the interaction topology between qubits in the checksum extraction construction module.

3. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 1, characterized in that, The method of generating candidate circuits based on the evolution logic of the qubit detection region includes: dividing the evolution logic of the qubit detection region into a region expansion stage and a region contraction stage, and defining a first mode for marking the region in the creation or expansion state and a second mode for marking the region in the update or contraction state, and constructing candidate circuits by simulating the evolution process of the qubit detection region in the reset layer, CNOT layer and measurement layer based on the first mode and the second mode.

4. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 3, characterized in that, The rationality check rules include: the qubit detection region in the first mode contains only one check qubit, and any two regions in the qubit detection region in the second mode do not shrink to the same check qubit.

5. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 1, characterized in that, For valid circuits extracted from the checksum building block library, they are classified into three categories based on the evolution trend of the qubit detection region for subsequent structure screening. The categories include: fixed type, whose qubit detection region remains unchanged in the CNOT layer; extended type, whose qubit detection region expands and the check bits move during the construction process; and contracted type, whose qubit detection region contracts during the construction process.

6. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 5, characterized in that, The process of extracting valid circuits from the parser construction module library and performing structural and performance screening to obtain feasible circuits includes: performing structural screening on valid circuits based on structural constraints, including that extended and contracted circuits cannot be combined in the same sequence, and the total number of extended and contracted circuits does not exceed three; and then performing performance screening on the structurally screened circuits under pure Pauli noise environment, and obtaining feasible circuits based on the logic error rate under Pauli error.

7. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 1 or 6, characterized in that, The process of characterizing the atomic loss tolerance of feasible circuits and generating the loss tolerance distribution of each feasible circuit on the surface code plane includes: sampling all feasible circuits under a noise model that includes atomic loss, calculating the decoding success rate when atomic loss occurs at each physical position as the atomic loss tolerance of the feasible circuit, and constructing the loss tolerance distribution of each feasible circuit for all physical qubits on the surface code plane from the atomic loss tolerance of all physical positions.

8. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 1, characterized in that, The calculation of the fitness score of each feasible circuit based on the loss tolerance distribution includes: obtaining the set of physical locations of atomic loss determined by the measurement feedback of the current round; for each feasible circuit, retrieving the atomic loss tolerance value corresponding to each location in the set of physical locations of atomic loss from its loss tolerance distribution; and calculating the mean of the atomic loss tolerance values ​​corresponding to each location as the fitness score of each feasible circuit in the current loss mode.

9. The dynamic checksum extraction circuit construction system for neutral atom quantum computing according to claim 1 or 8, characterized in that, The circuit that selects the optimal circuit based on fitness score as the checker extraction circuit for the next round includes: From the feasible circuits that match the prefix sequence of the building blocks of the already executed checkers, select the feasible circuit with the highest fitness score as the optimal circuit, and extract the optimal circuit as the checker extraction circuit for the next round of execution.

10. A method for constructing a dynamic checksum extraction circuit for neutral atom quantum computing, implemented using the dynamic checksum extraction circuit construction system for neutral atom quantum computing as described in any one of claims 1 to 9, characterized in that, Includes the following steps: The check extract module library is used to generate units that traverse the parameterized check extract circuit space. Candidate circuits are generated according to the evolution logic of the quantum bit detection region. After being screened by the rationality check rules, valid circuits are obtained. All valid circuits constitute the check extract module library. The circuit characteristic offline characterization unit is used to extract valid circuits from the check module library to perform structural screening and performance screening to obtain feasible circuits. The atomic loss tolerance of the feasible circuits is then characterized to generate the loss tolerance distribution of each feasible circuit on the surface code plane. By utilizing the online dynamic construction unit of the circuit during quantum computing, the fitness score of each feasible circuit is calculated based on the loss tolerance distribution according to the real-time measurement feedback of the atom loss position. Based on the fitness score, the optimal circuit is selected as the checker extraction circuit for the next round.

Images