Solar cell
Patent Information
- Application Number
- CN202610214888.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-02-13
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2046-02-13
AI Technical Summary
本公开实施例提供的太阳能电池中,在硅基体第一主表面的第一区域上设置了第一掺杂多晶硅层和第二掺杂多晶硅层的叠层结构,第一掺杂多晶硅层和第二掺杂多晶硅层的导电类型与硅基体的导电类型相反。第一掺杂多晶硅层、第二掺杂多晶硅层与第一氧化硅层和硅基体共同形成pn结。靠近硅基体的第一掺杂多晶硅层具有更高的掺杂浓度,有利于提升场钝化效应,抑制载流子的界面复合,使得太阳能电池具有更高的开路电压。
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Figure CN122069838B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to a solar cell. Background Technology
[0002] A solar cell is a semiconductor device that converts light energy into electrical energy. Among them, the interdigitated back contact (IBC) solar cell is a type of solar cell where both the positive and negative grid lines are located on the back side; it is often simply referred to as a back contact cell. Because there are no grid lines obstructing the front side of the back contact cell, it has a high utilization rate of incident light.
[0003] European patent application EP3193376A1 discloses a back-contact solar cell, specifically disclosing that: a protective film layer formed of silicon oxide is formed on one surface of an n-type single-crystal semiconductor substrate. An intrinsic semiconductor layer is formed above the protective film layer, comprising a first semiconductor portion having a first grain size and a second semiconductor portion having a second grain size. The first semiconductor portion is located between the second semiconductor portion and the semiconductor substrate. One region of the first and second semiconductor portions is doped with a p-type dopant, while the other region is doped with an n-type dopant, forming a semiconductor layer comprising both the first and second conductive regions. In the first and second conductive regions, the dopant concentration in the second portion, which is farther from the semiconductor substrate, is greater than the dopant concentration in the first portion, which is closer to the semiconductor substrate.
[0004] The structure of the aforementioned back-contact solar cell needs further improvement. Summary of the Invention
[0005] To address the problems existing in the aforementioned related technologies, this disclosure provides a solar cell comprising: a silicon substrate containing a first conductive dopant, the silicon substrate including a first main surface and a second main surface opposite to each other, the first main surface of the silicon substrate including a first region, a first silicon oxide layer disposed on the first region of the silicon substrate, a first doped polycrystalline silicon layer containing a second conductive dopant disposed on the first silicon oxide layer, and a second doped polycrystalline silicon layer containing a second conductive dopant disposed on the first doped polycrystalline silicon layer; the first conductive dopant and the second conductive dopant have opposite conductivity types; the first doped polycrystalline silicon layer has a first doping concentration, the second doped polycrystalline silicon layer has a second doping concentration, and the first doping concentration is greater than the second doping concentration.
[0006] Optionally, the first doping concentration is no more than three times the second doping concentration.
[0007] Optionally, the first doping concentration is 1.1 to 2 times the second doping concentration.
[0008] Optionally, the first doping concentration is 1.2 to 1.5 times that of the second doping concentration.
[0009] Optionally, the first doping concentration is no greater than 1×10⁻⁶. 20 atoms / cm³; the second doping concentration is not greater than 1×10 20 atoms / cm³.
[0010] Optionally, the first doping concentration is 6 × 10⁻⁶. 19 atoms / cm³ ~1×10 20 atoms / cm³; the second doping concentration is 4×10¹ 9 atoms / cm³ ~8×10 19 atoms / cm³.
[0011] Optionally, the first doping concentration is 7 × 10⁻⁶. 19 atoms / cm³ ~8×10 19 atoms / cm³; the second doping concentration is 5×10¹ 9 atoms / cm³ ~7×10 19 atoms / cm³.
[0012] Optionally, the first silicon oxide layer also contains a second conductive dopant.
[0013] Optionally, the doping concentration of the second conductive dopant in a portion of the first silicon oxide layer is greater than the doping concentration of the second conductive dopant in a portion of the first doped polysilicon layer.
[0014] Optionally, the solar cell further includes a second silicon oxide layer located between the first doped polycrystalline silicon layer and the second doped polycrystalline silicon layer.
[0015] Optionally, the second silicon oxide layer also contains a second conductive dopant.
[0016] Optionally, the solid solubility of the second conductive dopant in silicon oxide is greater than its solid solubility in polycrystalline silicon.
[0017] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is greater than the first doping concentration and the second doping concentration.
[0018] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is no more than three times the first doping concentration.
[0019] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is 1.1 to 2 times that of the first doping concentration.
[0020] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is 1.2 to 1.5 times that of the first doping concentration.
[0021] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is not less than 8 × 10⁻⁶. 19 atoms / cm³.
[0022] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is 8.5 × 10⁻⁶. 19 atoms / cm³ ~1.2×10 20 atoms / cm³.
[0023] Optionally, the doping concentration of the second conductive dopant in the second silicon oxide layer is 9.5 × 10⁻⁶. 19 atoms / cm³ ~1.1×10 20 atoms / cm³.
[0024] Optionally, in the first region, a portion of the silicon substrate from the first surface inwards is also doped with a second conductive dopant; the doping concentration of the second conductive dopant in the silicon substrate is less than the second doping concentration.
[0025] Optionally, the concentration gradient of the second conductive dopant from the second doped polysilicon layer to the first silicon oxide layer is smaller than the concentration gradient of the second conductive dopant inside the silicon substrate.
[0026] Optionally, the thickness of the second silicon oxide layer is greater than the thickness of the first silicon oxide layer.
[0027] Optionally, the ratio of the thickness of the second silicon oxide layer to the thickness of the first silicon oxide layer is not greater than 4:1.
[0028] Optionally, the thickness ratio of the second silicon oxide layer to the thickness of the first silicon oxide layer is (1.1~1.3):1.
[0029] Optionally, the thickness of the first silicon oxide layer is 0.8 nm to 2.5 nm, and the thickness of the second silicon oxide layer is 1 nm to 5 nm.
[0030] Optionally, the thickness of the first silicon oxide layer is 1.2 nm to 1.8 nm, and the thickness of the second silicon oxide layer is 1.3 nm to 3 nm.
[0031] Optionally, the density of the first silicon oxide layer is greater than the density of the second silicon oxide layer.
[0032] Optionally, the average grain size of the polysilicon in the second doped polysilicon layer is greater than the average grain size of the polysilicon in the first doped polysilicon layer.
[0033] Optionally, the ratio of the average grain size of polysilicon in the second doped polysilicon layer to the average grain size of polysilicon in the first doped polysilicon layer is not greater than 100:1.
[0034] Optionally, the ratio of the average grain size of polysilicon in the second doped polysilicon layer to the average grain size of polysilicon in the first doped polysilicon layer is not greater than 10:1.
[0035] Optionally, the ratio of the average grain size of polysilicon in the second doped polysilicon layer to the average grain size of polysilicon in the first doped polysilicon layer is (2~5):1.
[0036] Optionally, the average grain size of the polysilicon in the first doped polysilicon layer is no greater than 100 nm, and the average grain size of the polysilicon in the second doped polysilicon layer is 5~300 nm.
[0037] Optionally, the average grain size of the polysilicon in the first doped polysilicon layer is no greater than 80 nm, and the average grain size of the polysilicon in the second doped polysilicon layer is 20~200 nm.
[0038] Optionally, the average grain size of the polysilicon in the first doped polysilicon layer is 15~30nm, and the average grain size of the polysilicon in the second doped polysilicon layer is 50~80nm.
[0039] Optionally, the thickness of the second doped polysilicon layer is greater than the thickness of the first doped polysilicon layer.
[0040] Optionally, the ratio of the thickness of the second doped polysilicon layer to the thickness of the first doped polysilicon layer is (2~20):1.
[0041] Optionally, the ratio of the thickness of the second doped polysilicon layer to the thickness of the first doped polysilicon layer is (3~5):1.
[0042] Optionally, the thickness of the first doped polysilicon layer is 10nm~100nm, and the thickness of the second doped polysilicon layer is 50nm~200nm.
[0043] Optionally, the thickness of the first doped polycrystalline silicon layer is no greater than 70 nm.
[0044] Optionally, the thickness of the first doped polysilicon layer is 30nm~50nm, and the thickness of the second doped polysilicon layer is 150nm~180nm.
[0045] Optionally, the first main surface of the silicon substrate further includes a second region; the solar cell further includes: a third silicon oxide layer disposed on the second region of the silicon substrate, and a third doped polycrystalline silicon layer containing a first conductive dopant disposed on the third silicon oxide layer.
[0046] Optionally, the thickness of the third silicon oxide layer is 1 nm to 2 nm; Optionally, the thickness of the third doped polycrystalline silicon layer is 100nm~300nm.
[0047] Optionally, the first main surface of the silicon substrate further includes an isolation region located between the first region and the second region, wherein the first silicon oxide layer and the third silicon oxide layer are separated by the isolation region.
[0048] Optionally, the first conductive dopant is an n-type dopant and the second conductive dopant is a p-type dopant.
[0049] Optionally, the resistivity of the silicon substrate is 0.5 Ω·cm to 5 Ω·cm.
[0050] Optionally, the first main surface is the back side of the silicon substrate, and the second main surface is the front side of the silicon substrate.
[0051] Optionally, the solar cell further includes: a first electrode electrically connected to the second doped polycrystalline silicon layer, and a second electrode electrically connected to the third doped polycrystalline silicon layer.
[0052] Optionally, the first electrode is further electrically connected to the first doped polysilicon layer.
[0053] Optionally, the solar cell further includes: a first passivation layer disposed on the second doped polycrystalline silicon layer and the third doped polycrystalline silicon layer, a first antireflection layer disposed on the first passivation layer, a second passivation layer disposed on the second main surface of the silicon substrate, and a second antireflection layer disposed on the second passivation layer.
[0054] The technical solutions provided in this disclosure have at least the following technical effects: In the solar cell provided in this embodiment, a stacked structure of a first doped polycrystalline silicon layer and a second doped polycrystalline silicon layer is disposed on a first region of a first main surface of a silicon substrate. The conductivity types of the first and second doped polycrystalline silicon layers are opposite to those of the silicon substrate. The first and second doped polycrystalline silicon layers, together with the first silicon oxide layer and the silicon substrate, form a pn junction. The first doped polycrystalline silicon layer, which is closer to the silicon substrate, has a higher doping concentration, which is beneficial for improving the field passivation effect and suppressing interfacial recombination of charge carriers, resulting in a higher open-circuit voltage for the solar cell. Attached Figure Description
[0055] Figure 1 A schematic diagram of the cross-sectional structure of a solar cell provided in one embodiment of this disclosure; Figure 2 for Figure 1 A schematic diagram showing the region division of the first main surface of the silicon substrate of the solar cell; Figure 3A schematic diagram of the cross-sectional structure of a solar cell provided in another embodiment of this disclosure; Figure 4 A schematic diagram of the cross-sectional structure of a solar cell provided in yet another embodiment of this disclosure; Figure 5a This is a schematic cross-sectional view of the structure obtained after step S1 in the manufacturing example; Figure 5b This is a schematic cross-sectional view of the structure obtained after step S2 in the manufacturing example; Figure 5c This is a schematic cross-sectional view of the structure obtained after step S3 in the manufacturing example. Figure 5d This is a schematic cross-sectional view of the structure obtained after step S4 in the manufacturing example. Figure 5e This is a schematic cross-sectional view of the structure obtained after step S5 in the manufacturing example. Figure 5f This is a schematic cross-sectional view of the structure obtained after step S6 in the manufacturing example. Figure 5g This is a cross-sectional schematic diagram of the structure obtained after step S7 in the manufacturing example. Figure 5h This is a schematic cross-sectional view of the structure obtained after step S8 in the manufacturing example. Figure 5i This is a schematic cross-sectional view of the structure obtained after step S9 in the manufacturing example; Figure 5j This is a cross-sectional schematic diagram of the structure obtained after step S10 in the manufacturing example. Figure 5k This is a cross-sectional schematic diagram of the structure obtained after step S11 in the manufacturing example. Figure 6 This is a graph showing the test results of the concentrations of silicon, oxygen, and boron in the solar cell obtained in the manufacturing example using secondary ion mass spectrometry (SIMS). The horizontal axis represents the distance from the outermost surface of the first region of the solar cell, the vertical axis on the left represents the concentrations of oxygen and boron, and the vertical axis on the right represents the intensity of silicon.
[0056] Figure 7 The images are transmission electron microscope (TEM) images of the first doped polycrystalline silicon layer and the second doped polycrystalline silicon layer in the solar cell obtained in the manufacturing example. Figure 8The results are statistical results of the grain size of the second doped polycrystalline silicon layer in the solar cell obtained in the manufacturing example by PED (Phase, Orientation and Strain), where the horizontal axis is the grain size and the vertical axis is the frequency of occurrence of a specific grain size; Figure 9 The results are statistical results of the grain size of the first doped polycrystalline silicon layer in the solar cell obtained in the manufacturing example by PED, where the horizontal axis is the grain size and the vertical axis is the frequency of occurrence of a specific grain size.
[0057] Explanation of reference numerals in the attached figures: 100 solar cells 10 Silicon substrate 11 First District 12 Second Region 13. Quarantine Area 21 First silicon oxide layer 22 First Doped Polycrystalline Silicon Layer 22' First intrinsic amorphous silicon layer 23 Second silicon oxide layer 24 Second Doped Polycrystalline Silicon Layer 24' Second intrinsic amorphous silicon layer 25 Borosilicate glass layer 31 Third silicon oxide layer 32 Third doped polycrystalline silicon layer 32' First intrinsic polycrystalline silicon layer 33. Fourth silicon oxide layer 34 Fourth doped polycrystalline silicon layer 35 Phosphosilicate Glass Layer 41 First passivation layer 42 First Antireflective Layer 51 Second passivation layer 52 Second Antireflective Layer 61 First Electrode 62 Second electrode L1 First Laser L2 Second Laser Detailed Implementation
[0058] The embodiments of this disclosure will be further described in detail below with reference to the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of this disclosure by way of example, but should not be used to limit the scope of this disclosure, that is, this disclosure is not limited to the described embodiments.
[0059] In the accompanying drawings, for the sake of brevity, illustrations of elements not related to the description are omitted, and the same reference numerals are used throughout the specification to designate the same elements. Furthermore, in the accompanying drawings, dimensions such as thickness and width of elements are exaggerated or reduced for clarity; therefore, the thickness, width, and other dimensions of the elements in this disclosure are not limited to those illustrated in the drawings.
[0060] Throughout this specification, when an element is referred to as "comprising" another element, that element should not be construed as excluding other elements, provided there are no conflicting descriptions, and that element may include at least one other element. Furthermore, it should be understood that when an element such as a layer, film, region, or matrix is referred to as "on" another element, it may be directly on the other element, or there may be intermediate elements present. On the other hand, when an element such as a layer, film, region, or matrix is referred to as "directly on" another element, it means that there are no intermediate elements between them.
[0061] In the back-contact solar cells provided by related technologies, both the first conductive region and the second conductive region include two doped polycrystalline silicon layers with different doping concentrations. The doping concentration of conductive dopants in the doped polycrystalline silicon layer farther from the silicon substrate is greater than that in the doped polycrystalline silicon layer closer to the silicon substrate. Related technologies suggest that a relatively large amount of conductive dopants located in the doped polycrystalline silicon layer farther from the silicon substrate but closer to the electrode can reduce the contact resistance between the doped polycrystalline layer and the electrode; a relatively small amount of conductive dopants located in the doped polycrystalline silicon layer closer to the silicon substrate can reduce the amount of dopants diffusing into the protective film layer or the silicon substrate, thus reducing damage to the passivation performance of the protective film layer.
[0062] However, in back-contact solar cells, one of the first and second conductive regions has a conductivity type opposite to that of the silicon substrate. This conductive region with an opposite conductivity type to the silicon substrate, along with the protective film layer located between it and the silicon substrate, forms a pn junction. This conductive region with an opposite conductivity type to the silicon substrate acts as the emitter, and the strength of the field passivation effect it can generate affects the open-circuit voltage of the back-contact solar cell. However, in related technologies, the doping concentration of the polycrystalline silicon layer closer to the silicon substrate is relatively low, while the doping concentration of the polycrystalline silicon layer farther from the silicon substrate is higher, but the distance from the silicon substrate is also greater. Both are unfavorable for forming a strong field passivation effect, which is detrimental to improving the open-circuit voltage of the back-contact solar cell in related technologies.
[0063] To improve the open-circuit voltage of a back-contact solar cell, this disclosure provides a solar cell, which will be described in detail below with reference to the accompanying drawings.
[0064] Figure 1 A cross-sectional view of a solar cell provided according to an embodiment of this disclosure is shown. For example... Figure 1 As shown, the solar cell 100 provided in this embodiment includes: A silicon substrate 10 containing a first conductive dopant, the silicon substrate 10 including a first main surface and a second main surface opposite to each other, the first main surface of the silicon substrate 10 including a first region 11. A first silicon oxide layer 21 is disposed on a first region 11 of the silicon substrate 10. A first doped polysilicon layer 22 containing a second conductive dopant is disposed on the first silicon oxide layer 21, and A second doped polysilicon layer 24 containing a second conductive dopant is disposed on the first doped polysilicon layer 22.
[0065] The first and second conductive dopants have opposite conductivity types.
[0066] The first doped polysilicon layer 22 has a first doping concentration, and the second doped polysilicon layer 24 has a second doping concentration, wherein the first doping concentration is greater than the second doping concentration.
[0067] In this embodiment, the silicon substrate 10 can be a sheet-like monocrystalline silicon or polycrystalline silicon. Two opposing surfaces of the silicon substrate 10 along its thickness direction are a first main surface and a second main surface. The first and second main surfaces can be square or rectangular. The first main surface can be the main surface (i.e., the back side) of the silicon substrate 10 when the solar cell 100 is operating, facing away from sunlight. Correspondingly, the second main surface can be the main surface (i.e., the front side) of the silicon substrate 10 when the solar cell 100 is operating, facing sunlight.
[0068] Figure 2 It shows Figure 1 This is a schematic diagram showing the region division of the first main surface of the silicon substrate 10 of the solar cell 100. (See diagram below.) Figure 2 As shown, the first main surface of the silicon substrate 10 can be divided into a first region 11, a second region 12, and an isolation region 13. The first region 11, the second region 12, and the isolation region 13 can all be elongated strips, and their length directions can be aligned in the same direction. Multiple first regions 11, second regions 12, and isolation regions 13 can be provided. Multiple first regions 11 and multiple second regions 12 can be arranged alternately along a direction perpendicular to their length direction. The isolation region 13 is located between adjacent first regions 11 and second regions 12. For example, the length directions of the first regions 11, second regions 12, and isolation regions 13 can be parallel to a set of opposite sides of the first main surface of the silicon substrate 10, and multiple first regions 11 and multiple second regions 12 can be arranged alternately along a direction parallel to another set of opposite sides of the first main surface of the silicon substrate 10.
[0069] The first conductive dopant can be an n-type dopant, such as phosphorus (P), arsenic (As), antimony (Sb), or bismuth (Bi), and the corresponding second conductive dopant is a p-type dopant, such as boron (B), aluminum (Al), gallium (Ga), or indium (In). Alternatively, the first conductive dopant can be a p-type dopant, and the second conductive dopant can be an n-type dopant.
[0070] The resistivity of the silicon substrate 10 can be 0.5 Ω·cm to 5 Ω·cm, for example 0.6 Ω·cm, 0.8 Ω·cm, 1 Ω·cm, 1.5 Ω·cm, 2 Ω·cm, 2.5 Ω·cm, 3 Ω·cm, 3.5 Ω·cm, 4 Ω·cm, 4.5 Ω·cm, etc.
[0071] The first doped polycrystalline silicon layer 22 and the second doped polycrystalline silicon layer 24, together with the first silicon oxide layer 21 and the silicon substrate 10, form a pn junction. The first doped polycrystalline silicon layer 22, which is closer to the silicon substrate 10, has a higher doping concentration, which is beneficial for forming a stronger electric field, enhancing the field passivation effect, suppressing interfacial recombination of charge carriers, and thus enabling the solar cell to have a higher open-circuit voltage. Furthermore, the high-intensity electric field also facilitates the more efficient passage of charge carriers through the first silicon oxide layer 21 and their collection by the first doped polycrystalline silicon layer 22 and the second doped polycrystalline silicon layer 24.
[0072] In this embodiment of the disclosure, the first doping concentration may not exceed three times the second doping concentration, for example, 1.01 times, 1.05 times, 1.1 times, 1.15 times, 1.2 times, 1.22 times, 1.24 times, 1.25 times, 1.26 times, 1.3 times, 1.32 times, 1.34 times, 1.35 times, 1.36 times, 1.38 times, 1.4 times, 1.42 times, 1 The doping concentrations are 0.44 times, 1.45 times, 1.46 times, 1.48 times, 1.5 times, 1.55 times, 1.6 times, 1.65 times, 1.7 times, 1.75 times, 1.8 times, 1.85 times, 1.9 times, 1.95 times, 2 times, 2.1 times, 2.2 times, 2.3 times, 2.4 times, 2.5 times, 2.6 times, 2.7 times, 2.8 times, 2.9 times, 3 times, etc. In a preferred embodiment, the first doping concentration is 1.1 times to 2 times the second doping concentration. In a more preferred embodiment, the first doping concentration is 1.2 times to 1.5 times the second doping concentration. If the first doping concentration exceeds three times the second doping concentration, it may be due to two reasons. First, the doping concentration of the second conductive dopant in the second doped polysilicon layer 24 may be too low, which will increase the contact resistance between the metal electrode and the second doped polysilicon layer 24 and affect the current transmission. Second, it may be due to the doping concentration of the second conductive dopant in the first doped polysilicon layer 22 may be too high, which will not only lead to a deterioration in the quality of the first doped polysilicon layer 22 itself and an increase in defects, but also allow a large number of second conductive dopants to enter the silicon substrate 10, destroying the passivation effect.
[0073] The first doping concentration mentioned above refers to either the total doping concentration or the average value of the second conductive dopant in the first doped polysilicon layer 22, and the second doping concentration refers to either the total doping concentration or the average value of the second conductive dopant in the second doped polysilicon layer 24. In other words, whether the total doping concentration of the second conductive dopant in the first doped polysilicon layer 22 is greater than the total doping concentration of the second conductive dopant in the second doped polysilicon layer 24, or whether the average doping concentration of the second conductive dopant in the first doped polysilicon layer 22 is greater than the average doping concentration of the second conductive dopant in the second doped polysilicon layer 24, it falls under the case where the first doping concentration is greater than the second doping concentration.
[0074] Unless otherwise specified, the doping concentrations of different regions described below refer to either the total doping concentration or the average doping concentration of conductive dopants in that region.
[0075] Taking the average doping concentration of the second conductive dopant in the first doped polysilicon layer 22 as an example, the first doping concentration can be no greater than 1×10². 0 atoms / cm³, for example 1×10² 0 atoms / cm³, 9.5×10 19 atoms / cm³, 9×10 19 atoms / cm³, 8.5×10 19 atoms / cm³, 8.4×10 19 atoms / cm³, 8.3×10 19 atoms / cm³, 8.2×10 19 atoms / cm³, 8.1×10 19 atoms / cm³, 8×10 19 atoms / cm³, 7.9×10 19 atoms / cm³, 7.8×10 19 atoms / cm³, 7.7×10 19 atoms / cm³, 7.6×10 19 atoms / cm³, 7.5×10 19 atoms / cm³, 7.4×10 19 atoms / cm³, 7.3×10 19 atoms / cm³, 7.2×10 19 atoms / cm³, 7.1×10 19 atoms / cm³, 7×10 19 atoms / cm³, 6.5×10 19atoms / cm³, 6×10 19 atoms / cm³, 5.5×10 19 atoms / cm³, 5×10 19 atoms / cm³, 4.5×10 19 atoms / cm³, 4×10 19 atoms / cm³, 3.5×10 19 atoms / cm³, 3×10 19 atoms / cm³, 2.5×10 19 atoms / cm³, 2×10 19 atoms / cm³, 1.5×10 19 atoms / cm³, 1×10 19 atoms / cm³, etc. In a preferred embodiment, the first doping concentration is 6 × 10⁻⁶. 19 atoms / cm³ ~1×10 20 atoms / cm³. In a more preferred embodiment, the first doping concentration is 7 × 10⁻⁶ atoms / cm³. 19 atoms / cm³ ~8×10 19 atoms / cm³.
[0076] Taking the average doping concentration of the second conductive dopant in the second doped polysilicon layer 24 as an example, the second doping concentration can be no greater than 1×10². 0 atoms / cm³, for example 1×10² 0 atoms / cm³, 9.5×10 19 atoms / cm³, 9×10 19 atoms / cm³, 8.5×10 19 atoms / cm³, 8×10 19 atoms / cm³, 7.5×10 19 atoms / cm³, 7.4×10 19 atoms / cm³, 7.3×10 19 atoms / cm³, 7.2×10 19 atoms / cm³, 7.1×10 19 atoms / cm³, 7×10 19 atoms / cm³, 6.9×10 19 atoms / cm³, 6.8×10 19 atoms / cm³, 6.7×10 19 atoms / cm³, 6.6×10 19atoms / cm³, 6.5×10 19 atoms / cm³, 6.4×10 19 atoms / cm³, 6.3×10 19 atoms / cm³, 6.2×10 19 atoms / cm³, 6.1×10 19 atoms / cm³, 6×10 19 atoms / cm³, 5.9×10 19 atoms / cm³, 5.8×10 19 atoms / cm³, 5.7×10 19 atoms / cm³, 5.6×10 19 atoms / cm³, 5.5×10 19 atoms / cm³, 5×10 19 atoms / cm³, 4.5×10 19 atoms / cm³, 4×10 19 atoms / cm³, 3.5×10 19 atoms / cm³, 3×10 19 atoms / cm³, 2.5×10 19 atoms / cm³, 2×10 19 atoms / cm³, 1.5×10 19 atoms / cm³, 1×10 19 atoms / cm³, etc. In a preferred embodiment, the second doping concentration is 4 × 10¹ 9 atoms / cm³ ~8×10 19 atoms / cm³. In a more preferred embodiment, the second doping concentration is 5 × 10¹. 9 atoms / cm³ ~7×10 19 atoms / cm³.
[0077] The concentration range defined in this embodiment is based on the results of secondary ion mass spectrometry (SIMS) testing.
[0078] In this embodiment, based on the tunneling effect, the first silicon oxide layer 21 allows majority carriers with higher energy to pass through while preventing minority carriers from passing through. The first silicon oxide layer 21 may also contain a second conductive dopant. Furthermore, the doping concentration of the second conductive dopant in certain regions of the first silicon oxide layer 21 is greater than the doping concentration of the second conductive dopant in certain regions of the first doped polysilicon layer 22. That is, the overall doping concentration of the first silicon oxide layer 21 may not be as high as the overall doping concentration of the first doped polysilicon layer 22, but the doping concentration of the second conductive dopant in a certain region of the first silicon oxide layer 21 (e.g., a portion of the thickness of the first silicon oxide layer 21 adjacent to the first doped polysilicon layer 22) is greater than the doping concentration of the second conductive dopant in a certain region of the first doped polysilicon layer 22. The first silicon oxide layer 21 can be formed by thermal oxidation or low-pressure chemical vapor deposition.
[0079] In this embodiment, the average grain size of the polysilicon in the second doped polysilicon layer 24 can be larger than the average grain size of the polysilicon in the first doped polysilicon layer 22. The average grain size can be the larger of the average grain size observed in the thickness direction and the average grain size observed in a plane. Conductive dopants have higher solid solubility in polysilicon with smaller grain sizes; therefore, the smaller grain size of the polysilicon in the first doped polysilicon layer 22 near the silicon substrate 10 contributes to increasing the doping concentration of the second conductive dopant in the first doped polysilicon layer 22.
[0080] The second doped polysilicon layer 24 can be directly disposed on the first doped polysilicon layer 22. The first doped polysilicon layer 22 and the second doped polysilicon layer 24 with different doping concentrations can be formed by in-situ deposition. For example, during the generation of polysilicon using silane as the reactant gas, a reactant gas containing a second conductive dopant can be simultaneously introduced to form the first doped polysilicon layer 22 and the second doped polysilicon layer 24.
[0081] Or, as can be Figure 1 As shown, a second silicon oxide layer 23 is disposed between the first doped polysilicon layer 22 and the second doped polysilicon layer 24. The second silicon oxide layer 23 can be formed by thermal oxidation or low-pressure chemical vapor deposition.
[0082] The second silicon oxide layer 23 may also contain the second conductive dopant.
[0083] The solid solubility of the second conductive dopant in the silicon oxide layer is higher than that in the polysilicon layer. Therefore, the second silicon oxide layer 23 can serve as an enrichment region for the second conductive dopant. After the second conductive dopant is enriched in the second silicon oxide layer 23, it enters the first doped polysilicon layer 22, which is beneficial to increasing the doping concentration of the first doped polysilicon layer 22.
[0084] The doping concentration of the second conductive dopant in the second silicon oxide layer 23 can be greater than the doping concentration of the second conductive dopant in the first doped polysilicon layer 22, and also greater than the doping concentration of the second conductive dopant in the second doped polysilicon layer 24. However, the doping concentration of the second conductive dopant in the second silicon oxide layer 23 can be no greater than three times the first doping concentration, for example, 1.01 times, 1.05 times, 1.1 times, 1.15 times, 1.2 times, 1.22 times, 1.24 times, 1.25 times, 1.26 times, 1.3 times, 1.32 times, 1.34 times, 1.35 times, 1.36 times, 1.38 times, 1.4 times, and 1. The doping concentrations are 42 times, 1.44 times, 1.45 times, 1.46 times, 1.48 times, 1.5 times, 1.55 times, 1.6 times, 1.65 times, 1.7 times, 1.75 times, 1.8 times, 1.85 times, 1.9 times, 1.95 times, 2 times, 2.1 times, 2.2 times, 2.3 times, 2.4 times, 2.5 times, 2.6 times, 2.7 times, 2.8 times, 2.9 times, and 3 times, etc. In a preferred embodiment, the doping concentration of the second conductive dopant in the second silicon oxide layer 23 is 1.1 times to 2 times the first doping concentration; in a more preferred embodiment, the doping concentration of the second conductive dopant in the second silicon oxide layer 23 is 1.2 times to 1.5 times the first doping concentration.
[0085] Taking the average doping concentration of the second conductive dopant in the second silicon oxide layer 23 as an example, the doping concentration of the second conductive dopant in the second silicon oxide layer 23 can be no less than 8 × 10⁻⁶. 19 atoms / cm³, for example, 8×10 19 atoms / cm³, 8.5×10 19 atoms / cm³, 9×10 19 atoms / cm³, 9.5×10 19 atoms / cm³, 9.6×10 19 atoms / cm³, 9.7×10 19 atoms / cm³, 9.8×10 19 atoms / cm³, 9.9×10 19 atoms / cm³, 1×10 20 atoms / cm³, 1.1×10 20 atoms / cm³, 1.2×10 20 atoms / cm³, 1.3×10 20 atoms / cm³, 1.4×10 20 atoms / cm³, 1.5×10 20 atoms / cm³, 2×10 20atoms / cm³, etc. In a preferred embodiment, the doping concentration of the second conductive dopant in the second silicon oxide layer 23 is 8.5 × 10⁻⁶. 19 atoms / cm³ ~1.2×10 20 atoms / cm³. In a more preferred embodiment, the doping concentration of the second conductive dopant in the second silicon oxide layer 23 is 9.5 × 10⁻⁶ atoms / cm³. 19 atoms / cm³ ~1.1×10 20 atoms / cm³.
[0086] In this embodiment, a first silicon oxide layer 21, a first intrinsic amorphous silicon layer, a second silicon oxide layer 23, and a second intrinsic amorphous silicon layer can be deposited in the same device using low-pressure chemical vapor deposition. Then, a second conductive dopant is diffused and doped at a high temperature. At the high temperature, the amorphous silicon layer transforms into a polycrystalline silicon layer, forming a first doped polycrystalline silicon layer 22 and a second doped polycrystalline silicon layer 24.
[0087] For example, a silicon substrate 10 can be loaded into the furnace tube of a low-pressure chemical vapor deposition (LPCVD) apparatus. Oxygen is then introduced into the LCVD apparatus, and a first silicon oxide layer 21 with a thickness of 1.2 to 1.8 nm is deposited on the first main surface of the silicon substrate 10 at 520°C to 620°C. After that, the oxygen supply is stopped, and silane (SiH4) is introduced. A first intrinsic amorphous silicon layer with a thickness of 30 to 80 nm is deposited on the first silicon oxide layer 21 at 520°C to 600°C. After that, the silane supply is stopped, and oxygen is introduced. A second silicon oxide layer 23 with a thickness of 1.3 to 3 nm is deposited on the first intrinsic amorphous silicon layer. After that, the oxygen supply is stopped again, and silane is introduced. A second intrinsic amorphous silicon layer with a thickness of 80 to 200 nm is deposited on the second silicon oxide layer 23. Subsequently, the silicon substrate 10, to which the first silicon oxide layer 21, the first intrinsic amorphous silicon layer, the second silicon oxide layer 23, and the second intrinsic amorphous silicon layer are deposited, is transferred to a tube-type high-temperature diffusion furnace. A reactive gas containing a second conductive dopant is introduced into the tube-type high-temperature diffusion furnace to dope the first and second intrinsic amorphous silicon layers, causing the amorphous silicon to crystallize into polycrystalline silicon, forming a first doped polycrystalline silicon layer 22 and a second doped polycrystalline silicon layer 24. For example, boron atom doping can be performed by introducing BCl3 gas at 860°C to 950°C, or phosphorus atom doping can be performed by introducing POCl3 gas at 830°C to 880°C. Then, the silicon oxide layers and doped polycrystalline silicon layers corresponding to the second region 12 and the isolation region 13 are removed, forming a stacked structure including the first silicon oxide layer 21, the first doped polycrystalline silicon layer 22, the second silicon oxide layer 23, and the second doped polycrystalline silicon layer 24 on the first region 11.
[0088] Because the grains in the intrinsic amorphous silicon layer are very small, the second intrinsic amorphous silicon layer, which is far from the silicon substrate 10, has a weaker barrier to the second conductive dopant. This allows the second conductive dopant to diffuse further toward the silicon substrate 10 in the early stages of diffusion. Furthermore, the second conductive dopant (e.g., boron) has a higher solid solubility in the silicon oxide layer than in the polycrystalline silicon layer. Therefore, the first silicon oxide layer 21 and the second silicon oxide layer 23 attract the second conductive dopant to diffuse toward the silicon substrate 10. In addition, in the later stages of the diffusion doping process of the second conductive dopant, a doped silicon glass layer containing the second conductive dopant is usually formed on the outside of the second doped polycrystalline silicon layer 24. The main component of the doped silicon glass layer is silicon oxide, which attracts some of the second conductive dopant in the second doped polycrystalline silicon layer 24. Taking all the above factors into account, the doping concentration of the second conductive dopant in the first doped polysilicon layer 22 near the silicon substrate 10 is greater than the doping concentration of the second conductive dopant in the second doped polysilicon layer 24, and the doping concentration of the second conductive dopant in the second silicon oxide layer 23 is greater than the doping concentration of the second conductive dopant in the first doped polysilicon layer 22 and the second doped polysilicon layer 24.
[0089] Furthermore, since the first silicon oxide layer 21 is formed on a single-crystal or polycrystalline silicon substrate, while the second silicon oxide layer 23 is formed on amorphous silicon, the first silicon oxide layer 21 has a higher density than the second silicon oxide layer 23. Due to its higher density, the second conductive dopant has greater difficulty diffusing within the first silicon oxide layer 21. Therefore, most of the second conductive dopant entering the first silicon oxide layer 21 accumulates in a region close to the first doped polycrystalline silicon layer 22, while the doping concentration of the second conductive dopant decreases rapidly in regions far from the first doped polycrystalline silicon layer 22.
[0090] In this embodiment, the second conductive dopant can further diffuse into the silicon substrate 10, so that the silicon substrate 10 in the first region 11, extending from the first main surface inwards, is also doped with the second conductive dopant. Since most of the second conductive dopant is already retained in the first silicon oxide layer 21, the first doped polysilicon layer 22, the second silicon oxide layer 23, and the second doped polysilicon layer 24, the amount of second conductive dopant entering the silicon substrate 10 is relatively small, resulting in a lower doping concentration of the second conductive dopant in the silicon substrate 10 than the second doping concentration. Furthermore, since the silicon substrate 10 is dense crystalline silicon, the diffusion of the second conductive dopant within the silicon substrate 10 is difficult. Therefore, most of the second conductive dopant entering the crystalline silicon substrate 10 is located in a region of a certain thickness near the first main surface, after which the doping concentration of the second conductive dopant in the crystalline silicon substrate 10 rapidly decreases.
[0091] Overall, the concentration gradient of the second conductive dopant from the second doped polysilicon layer 24 to the first silicon oxide layer 21 is smaller than the concentration gradient of the second conductive dopant inside the silicon substrate 10.
[0092] In this embodiment of the disclosure, the ratio of the average grain size of the polysilicon in the second doped polysilicon layer 24 to the average grain size of the polysilicon in the first doped polysilicon layer 22 may not exceed 100:1, for example, 1.01:1, 1.05:1, 1.2:1, 1.4:1, 1.5:1, 1.6:1, 1.8:1, 2:1, 2.2:1, 2.4:1, 2.5:1, 2.6:1, 2.8:1, 3:1, 3.2:1, 3. The ratios are 4:1, 3.5:1, 3.6:1, 3.8:1, 4:1, 4.2:1, 4.4:1, 4.5:1, 4.6:1, 4.8:1, 5:1, 5.5:1, 6:1, 6.5:1, 7:1, 7.5:1, 8:1, 8.5:1, 9:1, 9.5:1, 10:1, 20:1, 30:1, 40:1, 50:1, 60:1, 70:1, 80:1, 90:1, 100:1, etc. In a preferred embodiment, the ratio of the average grain size of the polysilicon in the second doped polysilicon layer 24 to the average grain size of the polysilicon in the first doped polysilicon layer 22 is not greater than 10:1. In a more preferred embodiment, the ratio of the average grain size of the polysilicon in the second doped polysilicon layer 24 to the average grain size of the polysilicon in the first doped polysilicon layer 22 is (2~5):1. When the ratio of the average grain size of the polysilicon in the second doped polysilicon layer 24 to the average grain size of the polysilicon in the first doped polysilicon layer 22 exceeds 100:1, it may be because the average grain size of the polysilicon in the first doped polysilicon layer 22 is too small, which means that there are more grains and more grain boundaries in the first doped polysilicon layer 22, which will hinder the transport of charge carriers and lead to a decrease in the conductivity of the first doped polysilicon layer 22. On the other hand, it may be because the average grain size of the polysilicon in the second doped polysilicon layer 24 is too large, which will increase the difficulty of diffusion of the second conductive dopant in the second doped polysilicon layer 24. Not only is it difficult to distribute evenly in the second doped polysilicon layer 24, but a large amount of the second conductive dopant will also remain in the second doped polysilicon layer, resulting in a decrease in the concentration of the second conductive dopant entering the first doped polysilicon layer 22.
[0093] Specifically, the average grain size of the polysilicon in the first doped polysilicon layer 22 may not exceed 100 nm, and may be, for example, 1 nm, 5 nm, 10 nm, 15 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 25 nm, 26 nm, 28 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, etc. In a preferred embodiment, the average grain size of the polysilicon in the first doped polysilicon layer 22 is not greater than 80 nm; in a more preferred embodiment, the average grain size of the polysilicon in the first doped polysilicon layer 22 is 15~30 nm.
[0094] The average grain size of the polysilicon in the second doped polysilicon layer 24 can be 5~300nm, for example, 10nm, 20nm, 30nm, 40nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 90nm, 100nm, 120nm, 140nm, 150nm, 160nm, 180nm, 200nm, 220nm, 240nm, 250nm, 260nm, 280nm, 300nm, etc. In a preferred embodiment, the average grain size of the polysilicon in the second doped polysilicon layer 24 is 20~200nm. In a more optional embodiment, the average grain size of the polysilicon in the second doped polysilicon layer 24 is 50~80nm.
[0095] In this embodiment, the thickness of the second doped polysilicon layer 24 can be greater than the thickness of the first doped polysilicon layer 22. A larger thickness of the second doped polysilicon layer 24 provides more growth space for the polysilicon, resulting in a larger average grain size compared to the first doped polysilicon layer 22.
[0096] The ratio of the thickness of the second doped polysilicon layer 24 to the thickness of the first doped polysilicon layer 22 can be (2~20):1, for example, 2:1, 3:1, 3.2:1, 3.4:1, 3.5:1, 3.6:1, 3.8:1, 4:1, 4.2:1, 4.4:1, 4.5:1, 4.6:1, 4.8:1, 5:1, 6:1, 7:1, 8:1, 9:1, 10:1, 11:1, 12:1, 13:1, 14:1, 15:1, 16:1, 17:1, 18:1, 19:1, etc. In a preferred embodiment, the ratio of the thickness of the second doped polysilicon layer 24 to the thickness of the first doped polysilicon layer 22 is (3~5):1.
[0097] Specifically, the thickness of the first doped polysilicon layer 22 can be no greater than 70 nm, for example, 1 nm, 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 32 nm, 34 nm, 35 nm, 36 nm, 38 nm, 40 nm, 42 nm, 44 nm, 45 nm, 46 nm, 48 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, etc. In a preferred embodiment, the thickness of the first doped polysilicon layer 22 is 30 nm to 50 nm.
[0098] The thickness of the second doped polysilicon layer 24 can be from 50 nm to 200 nm. For example, it can be 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 155 nm, 160 nm, 165 nm, 170 nm, 175 nm, 180 nm, 190 nm, etc. In a preferred embodiment, the thickness of the second doped polysilicon layer 24 is 150 nm to 180 nm.
[0099] The thickness of the second silicon oxide layer 23 can be greater than the thickness of the first silicon oxide layer 21. The ratio of the thickness of the second silicon oxide layer 23 to the thickness of the first silicon oxide layer 21 can be no greater than 4:1, for example, 1.05:1, 1.06:1, 1.08:1, 1.1:1, 1.12:1, 1.14:1, 1.15:1, 1.16:1, 1.18:1, 1.2:1, 1.22:1, 1.24:1, 1.25:1, 1.26:1, 1.26:1, 1.3:1, 1.4:1, 1.5:1, 1.6:1, 1.8:1, 2:1, 2.2:1, 2.4:1, 2.5:1, 2.6:1, 2.8:1, 3:1, 3.2:1, 3.4:1, 3.5:1, 3.6:1, 3.8:1, 4:1, etc. In a preferred embodiment, the thickness ratio of the second silicon oxide layer 23 to the thickness of the first silicon oxide layer 21 is (1.1~1.3):1. Within the above ratio range, both the first silicon oxide layer 21 and the second silicon oxide layer 23 can have suitable thicknesses.
[0100] Specifically, the thickness of the first silicon oxide layer 21 can be from 0.8 nm to 2.5 nm, such as 0.9 nm, 1 nm, 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm, etc. In a preferred embodiment, the thickness of the first silicon oxide layer 21 is 1.2 nm to 1.8 nm.
[0101] The thickness of the second silicon oxide layer 23 can be 1 nm to 5 nm, for example, 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm, 2.5 nm, 2.6 nm, 2.7 nm, 2.8 nm, 2.9 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, etc. In a preferred embodiment, the thickness of the second silicon oxide layer 23 is 1.3 nm to 3 nm. If the thickness of the second silicon oxide layer 23 is too large, too much second conductive dopant will accumulate, which will lead to a decrease in the concentration of the second conductive dopant entering the first doped polysilicon layer 22, and will also increase the difficulty for charge carriers to pass through the second silicon oxide layer 23 to reach the second doped polysilicon layer 24. On the other hand, if the thickness of the second silicon oxide layer 23 is too small, the metal electrode will easily burn through to the first doped polysilicon layer, or even burn through to the silicon substrate 10.
[0102] Furthermore, as mentioned above, the density of the first silicon oxide layer 21 can be greater than the density of the second silicon oxide layer 23, meaning the first silicon oxide layer 21 is more dense. A higher density in the first silicon oxide layer 21 allows for better tunneling, more effectively preventing minority carriers from passing through and improving passivation performance. Conversely, a lower density in the second silicon oxide layer 23 facilitates the diffusion of the second conductive dopant into the first doped polysilicon layer 22.
[0103] It is understood that in the solar cell 100 provided in this embodiment, more doped polycrystalline silicon layers containing second conductive dopants can be disposed on the first region of the first main surface of the silicon substrate 10. For example, another doped polycrystalline silicon layer can be disposed between the first silicon oxide layer 21 and the first doped polycrystalline silicon layer 22, or between the first doped polycrystalline silicon layer 22 and the second doped polycrystalline silicon layer 24, or on the second doped polycrystalline silicon layer 24. Adjacent doped polycrystalline silicon layers can be in direct contact or separated by silicon oxide layers.
[0104] like Figure 1 As shown, the solar cell 100 provided in this embodiment may further include: a third silicon oxide layer 31 disposed on a second region 12 of a silicon substrate 10, and a third doped polycrystalline silicon layer 32 containing a first conductive dopant disposed on the third silicon oxide layer 31. The third doped polycrystalline silicon layer 32 has the same conductivity type as the silicon substrate 10 and serves as a surface field for the solar cell 100 to prevent carrier recombination from occurring on the first main surface of the silicon substrate 10. The first conductive dopant in the third doped polycrystalline silicon layer 32 has a third doping concentration, which is greater than the doping concentration of the first conductive dopant in the silicon substrate 10.
[0105] In this embodiment, based on the tunneling effect, the third silicon oxide layer 31 allows majority carriers with higher energy to pass through while preventing minority carriers from passing through. The third silicon oxide layer 31 may also contain the first conductive dopant. The third silicon oxide layer 31 can be formed by thermal oxidation or low-pressure chemical vapor deposition.
[0106] The third silicon oxide layer 31 and the first intrinsic polysilicon layer can be deposited in the same equipment by low-pressure chemical vapor deposition. Then, the first conductive dopant is diffused and doped in a high-temperature environment to transform the first intrinsic polysilicon layer into the third doped polysilicon layer 32.
[0107] The thickness of the third silicon oxide layer 31 can be 1nm to 2nm, such as 1.1nm, 1.2nm, 1.3nm, 1.4nm, 1.5nm, 1.6nm, 1.7nm, 1.8nm, 1.9nm, etc.
[0108] The thickness of the third doped polycrystalline silicon layer 32 can be 100nm~300nm, such as 120nm, 140nm, 150nm, 160nm, 180nm, 200nm, 220nm, 240nm, 250nm, 260nm, 280nm, etc.
[0109] Furthermore, in the solar cell 100 provided in this embodiment, multiple layers of doped polycrystalline silicon can also be disposed on the second region 12. Adjacent doped polycrystalline silicon layers can be in direct contact or separated by silicon oxide layers. For example, Figure 3 A cross-sectional view of a solar cell 100 according to another embodiment of this disclosure is shown, as follows. Figure 3 As shown, the solar cell 100 provided in this embodiment further includes: a fourth doped polycrystalline silicon layer 34 containing a first conductive dopant disposed on the third doped polycrystalline silicon layer 32, and a fourth silicon oxide layer 33 disposed between the third doped polycrystalline silicon layer 32 and the fourth doped polycrystalline silicon layer 34. The third doped polycrystalline silicon layer 32 and the fourth doped polycrystalline silicon layer 34 together serve as the surface field of the solar cell 100.
[0110] Furthermore, such as Figure 1 As shown, in this embodiment of the solar cell 100, an insulating structure may be provided on the isolation region 13 to isolate the film structure provided on the first region 11 from the film structure provided on the second region 12, preventing leakage of the solar cell caused by the recombination of charge carriers of different conductivity types in the first region 11 and the second region 12. For example, when the first silicon oxide layer 21 and the third silicon oxide layer 31 are directly disposed on the first main surface of the silicon substrate 10, the first silicon oxide layer 21 and the third silicon oxide layer 31 do not contact each other, but are isolated by the isolation region 13.
[0111] like Figure 1 As shown, a pyramidal textured surface can be formed on the second main surface of the silicon substrate 10, and a pyramidal textured surface can also be formed on the surface of the silicon substrate 10 corresponding to the isolation region 13. By forming a pyramidal textured surface, the reflection of incident light can be reduced.
[0112] The distance between the surface of the silicon substrate 10 corresponding to the first region 11 and the second main surface of the silicon substrate 10 can be greater than the distance between the surface of the silicon substrate 10 corresponding to the second region 12 and the second main surface of the silicon substrate 10. That is, the first main surface of the silicon substrate 10 may not be entirely flat; it may have recessed portions, with the second region 12 and the isolation region 13 located in the recessed portions of the first main surface. This allows the first region 11 and the second region 12 to be staggered relative to each other in the thickness direction of the silicon substrate 10, which helps prevent recombination of charge carriers in the first region 11 and the second region 12. The surfaces of the first region 11 and the second region 12 can each be flat surfaces.
[0113] Furthermore, such as Figure 1 As shown, in the solar cell 100 provided in this embodiment, a first passivation layer 41 may be disposed on the first main surface of the silicon substrate 10 corresponding to the second doped polysilicon layer 24, the third doped polysilicon layer 32, and the isolation region 13. A first antireflection layer 42 may also be disposed on the first passivation layer 41. It is understood that when the film structure corresponding to the first region 11 includes more than three layers of doped polysilicon layers containing the second conductive dopant, the first passivation layer 41 is disposed on the doped polysilicon layer containing the second conductive dopant that is furthest from the silicon substrate 10; when the film structure corresponding to the second region 12 includes multiple layers of doped polysilicon layers containing the first conductive dopant, the first passivation layer 41 is disposed on the doped polysilicon layer containing the first conductive dopant that is furthest from the silicon substrate 10, for example... Figure 3 The fourth doped polysilicon layer 34 is shown; in the isolation region 13, the first passivation layer 41 can be directly disposed on the first main surface of the silicon substrate 10 corresponding to the isolation region 13.
[0114] In this embodiment of the present disclosure, a second passivation layer 51 may also be disposed on the second main surface of the silicon substrate 10, and a second antireflection layer 52 may be disposed on the second passivation layer 51.
[0115] The first passivation layer 41 and the second passivation layer 51 can be made of different materials depending on the conductivity type of the covered region. The passivation layer covering the n-type region can be a material containing a fixed positive charge, such as silicon oxide. The passivation layer covering the p-type region can be a material containing a fixed negative charge, such as aluminum oxide or gallium oxide. For example, when the silicon substrate 10 is n-type, the doped polysilicon layer disposed on the first region 11 is p-type, and the doped polysilicon layer disposed on the second region 12 is n-type. The portion of the first passivation layer 41 corresponding to the first region 11 can be an aluminum oxide layer, and the portion corresponding to the second region 12 can be a silicon oxide layer; the second passivation layer 51 can be a silicon oxide layer.
[0116] The thickness of the first passivation layer 41 and the second passivation layer 51 can be 3nm to 10nm, such as 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, etc. The thickness of the first passivation layer 41 and the second passivation layer 51 can be the same or different.
[0117] Of course, in this embodiment, the first passivation layer 41 and the second passivation layer 51 can be selected and use the same material and have the same thickness according to the conductivity type of the doped polysilicon layer disposed on the first region 11, so as to simplify the manufacturing process.
[0118] The first antireflective layer 42 and the second antireflective layer 52 can be a stacked structure comprising multiple layers of silicon nitride, silicon oxide, and silicon oxynitride with different refractive indices. The thickness of the first antireflective layer 42 and the second antireflective layer 52 can be 70nm~110nm, for example 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, 105nm, etc. The thickness of the first antireflective layer 42 and the second antireflective layer 52 can be the same or different.
[0119] The first antireflective layer 42 and the second antireflective layer 52 can also adopt the same structure and thickness to simplify the manufacturing process.
[0120] Furthermore, such as Figure 1 As shown, the solar cell 100 provided in this embodiment may further include a first electrode 61 electrically connected to the second doped polycrystalline silicon layer 24, and a second electrode 62 electrically connected to the third doped polycrystalline silicon layer 32. The first electrode 61 and the second electrode 62 may be silver electrodes, which can be formed by high-temperature sintering of a silver-containing electrode paste.
[0121] like Figure 4 As shown, the first electrode 61 can be further electrically connected to the first doped polysilicon layer 22. Since the first doped polysilicon layer 22 has a higher doping concentration, the electrical connection between the first electrode 61 and the first doped polysilicon layer 22 can reduce the contact resistance and facilitate the transmission of current.
[0122] It is understood that when the film structure corresponding to the first region 11 includes more than three layers of doped polysilicon layers containing the second conductive dopant, the first electrode 61 can be electrically connected to the doped polysilicon layer containing the second conductive dopant that is farthest from the silicon substrate 10, or it can be electrically connected to the doped polysilicon layer with the highest doping concentration of the second conductive dopant. When the film structure corresponding to the second region 12 includes multiple layers of doped polysilicon layers containing the first conductive dopant, the second electrode 62 can be electrically connected to the doped polysilicon layer containing the first conductive dopant that is farthest from the silicon substrate 10, for example, to... Figure 3 The fourth doped polysilicon layer 34 shown is electrically connected.
[0123] Openings can be formed in the first passivation layer 41 and the first antireflection layer 42, through which the first electrode 61 and the second electrode 62 form an electrical connection with the corresponding doped polysilicon layer. Alternatively, the pastes for forming the first electrode 61 and the second electrode 62 can be coated onto the first antireflection layer 42 by means of, for example, screen printing, followed by high-temperature sintering. During the high-temperature sintering process, the pastes pass through the first antireflection layer 42 and the first passivation layer 41 to reach the corresponding doped polysilicon layer to form the first electrode 61 and the second electrode 62. In this case, it is not necessary to form the openings in advance.
[0124] The following provides a manufacturing process. Figure 1 A specific embodiment of the solar cell structure shown.
[0125] Step S1: Select an n-type single-crystal silicon wafer with a resistivity of 1.5 Ω·cm and a thickness of 150 μm as the silicon substrate 10, and polish the front and back sides of the silicon substrate 10 to obtain the following... Figure 5a The structure shown.
[0126] In step S2, the polished silicon substrate 10 from step S1 is loaded into the furnace tube of a low-pressure chemical vapor deposition (LPCVD) apparatus. At 570°C, oxygen is first introduced into the furnace tube to form a first silicon oxide layer 21 with a thickness of 1.3 nm on both the front and back sides of the silicon substrate 10. Then, silane is introduced and oxygen introduction is stopped to form a first intrinsic amorphous silicon layer 22' with a thickness of 40 nm. Next, oxygen is introduced and silane introduction is stopped to form a second silicon oxide layer 23 with a thickness of 1.6 nm. Finally, silane is introduced and oxygen introduction is stopped to form a stacked structure of a second intrinsic amorphous silicon layer 24' with a thickness of 160 nm, resulting in the following... Figure 5b The structure shown.
[0127] Step S3: The silicon substrate 10 with the stacked structure obtained in step S2 is transferred to a tube-type high-temperature diffusion furnace. Under a nitrogen atmosphere at 880°C, BCl3 is introduced to promote boron diffusion. During this process, the first intrinsic amorphous silicon layer 22' crystallizes to form a first doped polycrystalline silicon layer 22, and the second intrinsic amorphous silicon layer 24' crystallizes to form a second doped polycrystalline silicon layer 24. A borosilicate glass layer 25 (BSG) is then formed on the second doped polycrystalline silicon layer 24, resulting in the desired structure. Figure 5c The structure shown.
[0128] Step S4: The borosilicate glass layer 25 corresponding to the second region 12 and the isolation region 13 on the back side of the silicon substrate 10 is removed by the first laser L1, wherein the width of the second region 12 is 400 μm and the width of the isolation region 13 is 50 μm, resulting in the following... Figure 5d The structure is shown. The parameters of the first laser L1 are: a 532 nm laser, a power of 50 W, an energy density of 1.5 J / cm², and a scanning rate of 5 m / s.
[0129] Step S5: In the chain cleaning equipment, the borosilicate glass layer 25 on the front side of the silicon substrate 10 is removed using a hydrofluoric acid (HF) aqueous solution. Then, the second doped polysilicon layer 24, the second silicon oxide layer 23, and the first doped polysilicon layer 22 on the back side of the silicon substrate 10, as well as on the front side, are removed using a potassium hydroxide (KOH) aqueous solution. This process also removes a portion of the silicon substrate 10 corresponding to the second region 12 and the isolation region 13, thus removing damage to the silicon substrate 10 corresponding to the second region 12 and the isolation region 13 caused by the first laser L1. The resulting structure after this step is as follows: Figure 5e As shown.
[0130] Step S6: The silicon substrate 10 with the stacked structure obtained in step S5 is placed in the furnace tube of a low-pressure chemical vapor deposition (LPCVD) apparatus and heated to 620°C. Oxygen is first introduced into the furnace tube, forming a third silicon oxide layer 31 with a thickness of 1.5 nm on both the front and back sides of the silicon substrate 10. Then, silane is introduced and the oxygen supply is stopped, forming a first intrinsic polycrystalline silicon layer 32' with a thickness of 200 nm. The structure after this step is as follows: Figure 5f As shown. It should be noted that in this step, the third silicon oxide layer 31 formed on the borosilicate glass layer 25 is bonded together with the borosilicate glass layer 25 to form a borosilicate glass layer 25 with a greater thickness.
[0131] Step S7: The silicon substrate 10 with the stacked structure obtained in step S6 is transferred to a high-temperature tube diffusion furnace. Under a nitrogen atmosphere at 850°C, POCl3 phosphorus is introduced to promote diffusion, transforming the first intrinsic polycrystalline silicon layer 32' into a third doped polycrystalline silicon layer 32, and forming a phosphorosilicate glass (PSG) layer 35 on the third doped polycrystalline silicon layer 32. The corresponding structure after this step is as follows: Figure 5g As shown.
[0132] Step S8: The phosphosilicate glass layer 35 corresponding to the first region 11 and the isolation region 13 on the back side of the silicon substrate 10 is removed by the second laser L2, resulting in the following... Figure 5h The structure shown is as follows. The parameters of the second laser L2 are: a 532 nm laser, a laser power of 30~40 W, a spot size of 150 μm, a frequency of 250 kHz, and a width of 440 μm for the first region 11.
[0133] Step S9: In a chain cleaning device, the phosphosilicate glass layer 35 on the front side of the silicon substrate 10 is removed using a hydrofluoric acid (HF) aqueous solution. Then, the third doped polysilicon layer 32 and the third silicon oxide layer 31 on the back side of the silicon substrate 10 and on the isolation region 13, as well as on the front side of the silicon substrate 10, are removed using a potassium hydroxide (KOH) aqueous solution containing texturing additives. A pyramid-structured textured surface is formed on the front side of the silicon substrate 10 and the corresponding back side of the isolation region 13. The structure after this step is as follows: Figure 5i As shown.
[0134] Step S10: The borosilicate glass layer 25 and the phosphosilicate glass layer 35 on the back side of the silicon substrate 10 are removed by cleaning with an aqueous hydrofluoric acid (HF) solution, resulting in the following: Figure 5j The structure shown.
[0135] Step S11: In an atomic layer deposition (ALD) apparatus, an aluminum oxide layer with a thickness of 3 nm is deposited on the front and back sides of the silicon substrate 10. In a plasma-enhanced chemical vapor deposition (PECVD) apparatus, a silicon nitride layer with a thickness of 70 nm is deposited on the aluminum oxide layer, resulting in the following: Figure 5k The structure shown.
[0136] Step S12: Silver paste is printed onto the silicon nitride layers corresponding to the first region 11 and the second region 12 on the back side of the silicon substrate 10 by screen printing and then sintered to obtain the desired result. Figure 1 The solar cell shown.
[0137] The performance of the solar cells obtained in the above manufacturing example will be tested below.
[0138] SIMS testing
[0139] The concentrations of silicon, oxygen, and boron in the solar cell obtained after step S11 of the above manufacturing example were measured using SIMS. The instrument used was a PHI Nano TOF II time-of-flight secondary ion mass spectrometer; the test conditions were: incident current 1 nA / cm². 2 Beam current density 1×10 12 ~1×10 13 .
[0140] Test results are as follows Figure 6 As shown. In Figure 6 In the diagram, the regions where silicon intensity decreases largely coincide with the regions where oxygen concentration increases. Therefore, the regions where silicon intensity decreases correspond to the silicon oxide layer. Specifically, regions with smaller horizontal axis values correspond to the second oxide layer 23, and regions with larger horizontal axis values correspond to the first silicon oxide layer 21. The region to the left of the second silicon oxide layer 23 corresponds to the second doped polycrystalline silicon layer 24, and the region between the first silicon oxide layer 21 and the second silicon oxide layer 23 corresponds to the first doped polycrystalline silicon layer 22. From... Figure 6 As can be seen, the boron doping concentration in the first doped polysilicon layer 22 is greater than that in the second doped polysilicon layer 24. The boron doping concentration increases significantly in the second silicon oxide layer 23, exceeding the boron doping concentrations in the first doped polysilicon layer 22 and the second doped polysilicon layer 24. In a region of the first silicon oxide layer 21 near the first doped polysilicon layer 22, the boron doping concentration is greater than that in the first doped polysilicon layer 22, but then decreases rapidly. Overall, the boron concentration gradient from the second doped polysilicon layer 24 to the first silicon oxide layer 21 is smaller than the boron concentration gradient within the silicon substrate 10.
[0141] PED test
[0142] The grain size of polysilicon in the first doped polysilicon layer 22 and the second doped polysilicon layer 24 was tested by PED.
[0143] The equipment used was a Quantum 965.
[0144] from Figure 7 The transmission electron microscope (TEM) images show that the second doped polycrystalline silicon layer 24, which is far from the silicon substrate 10, has a larger grain size.
[0145] from Figure 8 According to the statistical results of the grain size shown, the maximum grain size in the second doped polycrystalline silicon layer 24 reached 216nm, and the average grain size was 72nm.
[0146] from Figure 9According to the statistical results of the grain size shown, in the first doped polycrystalline silicon layer 22, the maximum grain size is only 74nm and the average grain size is 27nm.
[0147] While this disclosure has been described with reference to preferred embodiments, various modifications can be made thereto and components can be replaced with equivalents without departing from the scope of this disclosure. In particular, the technical features mentioned in the various embodiments can be combined in any manner, provided there is no conflict. This disclosure is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.
Claims
1. A solar cell, characterized in that, include: A silicon substrate (10) containing a first conductive dopant, the silicon substrate (10) including a first main surface and a second main surface opposite to each other, the first main surface of the silicon substrate (10) including a first region (11). A first silicon oxide layer (21) is disposed on a first region (11) of the silicon substrate (10). A first doped polysilicon layer (22) containing a second conductive dopant is disposed on the first silicon oxide layer (21), and A second doped polysilicon layer (24) containing the second conductive dopant is disposed on the first doped polysilicon layer (22); The first conductive dopant and the second conductive dopant have opposite conductivity types; The first doped polysilicon layer (22) has a first doping concentration, and the second doped polysilicon layer (24) has a second doping concentration, wherein the first doping concentration is greater than the second doping concentration; The solar cell further includes a second silicon oxide layer (23) located between the first doped polycrystalline silicon layer (22) and the second doped polycrystalline silicon layer (24). The second silicon oxide layer (23) also contains the second conductive dopant; The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is greater than the first doping concentration and the second doping concentration.
2. The solar cell according to claim 1, characterized in that, The first doping concentration is no more than three times the second doping concentration.
3. The solar cell according to claim 2, characterized in that, The first doping concentration is 1.1 to 2 times that of the second doping concentration.
4. The solar cell according to claim 3, characterized in that, The first doping concentration is 1.2 to 1.5 times that of the second doping concentration.
5. The solar cell according to any one of claims 1 to 4, characterized in that, The first doping concentration is not greater than 1 x 1016 atoms / cm3 20 ; the second doping concentration is not greater than 1 x 1016 atoms / cm3 3 . 20 ; the second doping concentration is not greater than 1 x 1016 atoms / cm3 3 .
6. The solar cell according to claim 5, characterized in that, The first doping concentration is 6×10 19 atoms / cm 3 ~1×10 20 atoms / cm 3 The second doping concentration is 4×10⁻⁶. 19 atoms / cm 3 ~8×10 19 atoms / cm 3 .
7. The solar cell according to claim 6, characterized in that, The first doping concentration is 7×10 19 atoms / cm 3 ~8×10 19 atoms / cm 3 The second doping concentration is 5×10⁻⁶. 19 atoms / cm 3 ~7×10 19 atoms / cm 3 .
8. The solar cell according to claim 1, characterized in that, The first silicon oxide layer (21) also contains the second conductive dopant.
9. The solar cell according to claim 8, characterized in that, The doping concentration of the second conductive dopant in a portion of the first silicon oxide layer (21) is greater than the doping concentration of the second conductive dopant in a portion of the first doped polysilicon layer (22).
10. The solar cell according to claim 1, characterized in that, The second conductive dopant has a higher solid solubility in silicon oxide than in polycrystalline silicon.
11. The solar cell according to claim 1, characterized in that, The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is no more than three times the first doping concentration.
12. The solar cell according to claim 11, characterized in that, The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is 1.1 to 2 times that of the first doping concentration.
13. The solar cell according to claim 12, characterized in that, The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is 1.2 to 1.5 times that of the first doping concentration.
14. The solar cell according to any one of claims 11 to 13, characterized in that, The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is not less than 8 × 10⁻⁶. 19 atoms / cm 3 .
15. The solar cell according to claim 14, characterized in that, The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is 8.5 × 10⁻⁶. 19 atoms / cm 3 ~1.2×10 20 atoms / cm 3 .
16. The solar cell according to claim 15, characterized in that, The doping concentration of the second conductive dopant in the second silicon oxide layer (23) is 9.5 × 10⁻⁶. 19 atoms / cm 3 ~1.1×10 20 atoms / cm 3 .
17. The solar cell according to claim 1, characterized in that, In the first region (11), the second conductive dopant is also doped into a portion of the silicon substrate (10) from the first main surface inward; the doping concentration of the second conductive dopant in the silicon substrate (10) is less than the second doping concentration.
18. The solar cell according to claim 17, characterized in that, The concentration gradient of the second conductive dopant from the second doped polysilicon layer (24) to the first silicon oxide layer (21) is less than the concentration gradient of the second conductive dopant inside the silicon substrate (10).
19. The solar cell according to claim 1, characterized in that, The thickness of the second silicon oxide layer (23) is greater than the thickness of the first silicon oxide layer (21).
20. The solar cell according to claim 19, characterized in that, The ratio of the thickness of the second silicon oxide layer (23) to the thickness of the first silicon oxide layer (21) is no greater than 4:
1.
21. The solar cell according to claim 20, characterized in that, The ratio of the thickness of the second silicon oxide layer (23) to the thickness of the first silicon oxide layer (21) is (1.1~1.3):
1.
22. The solar cell according to any one of claims 19 to 21, characterized in that, The thickness of the first silicon oxide layer (21) is 0.8 nm to 2.5 nm, and the thickness of the second silicon oxide layer (23) is 1 nm to 5 nm.
23. The solar cell according to claim 22, characterized in that, The thickness of the first silicon oxide layer (21) is 1.2 nm to 1.8 nm, and the thickness of the second silicon oxide layer (23) is 1.3 nm to 3 nm.
24. The solar cell according to claim 1, characterized in that, The density of the first silicon oxide layer (21) is greater than the density of the second silicon oxide layer (23).
25. The solar cell according to claim 1, characterized in that, The average grain size of polysilicon in the second doped polysilicon layer (24) is greater than the average grain size of polysilicon in the first doped polysilicon layer (22).
26. The solar cell according to claim 25, characterized in that, The ratio of the average grain size of polysilicon in the second doped polysilicon layer (24) to the average grain size of polysilicon in the first doped polysilicon layer (22) is no greater than 100:
1.
27. The solar cell according to claim 26, characterized in that, The ratio of the average grain size of polysilicon in the second doped polysilicon layer (24) to the average grain size of polysilicon in the first doped polysilicon layer (22) is no greater than 10:
1.
28. The solar cell according to claim 27, characterized in that, The ratio of the average grain size of polysilicon in the second doped polysilicon layer (24) to the average grain size of polysilicon in the first doped polysilicon layer (22) is (2~5):
1.
29. The solar cell according to any one of claims 25 to 28, characterized in that, The average grain size of polysilicon in the first doped polysilicon layer (22) is no greater than 100 nm, and the average grain size of polysilicon in the second doped polysilicon layer (24) is 5~300 nm.
30. The solar cell according to claim 29, characterized in that, The average grain size of polysilicon in the first doped polysilicon layer (22) is no greater than 80 nm, and the average grain size of polysilicon in the second doped polysilicon layer (24) is 20~200 nm.
31. The solar cell according to claim 30, characterized in that, The average grain size of polysilicon in the first doped polysilicon layer (22) is 15~30nm, and the average grain size of polysilicon in the second doped polysilicon layer (24) is 50~80nm.
32. The solar cell according to claim 1, characterized in that, The thickness of the second doped polysilicon layer (24) is greater than the thickness of the first doped polysilicon layer (22).
33. The solar cell according to claim 32, characterized in that, The ratio of the thickness of the second doped polysilicon layer (24) to the thickness of the first doped polysilicon layer (22) is (2~20):
1.
34. The solar cell according to claim 33, characterized in that, The ratio of the thickness of the second doped polysilicon layer (24) to the thickness of the first doped polysilicon layer (22) is (3~5):
1.
35. The solar cell according to any one of claims 32 to 34, characterized in that, The thickness of the first doped polysilicon layer (22) is 10nm~100nm, and the thickness of the second doped polysilicon layer (24) is 50nm~200nm.
36. The solar cell according to claim 35, characterized in that, The thickness of the first doped polycrystalline silicon layer (22) is no greater than 70 nm.
37. The solar cell according to claim 36, characterized in that, The thickness of the first doped polysilicon layer (22) is 30nm~50nm, and the thickness of the second doped polysilicon layer (24) is 150nm~180nm.
38. The solar cell according to claim 1, characterized in that, The first main surface of the silicon substrate (10) further includes a second region (12); the solar cell further includes: A third silicon oxide layer (31) disposed on the second region (12) of the silicon substrate (10), and A third doped polysilicon layer (32) containing the first conductive dopant is disposed on the third silicon oxide layer (31).
39. The solar cell according to claim 38, characterized in that, The thickness of the third silicon oxide layer (31) is 1 nm to 2 nm.
40. The solar cell according to claim 39, characterized in that, The thickness of the third doped polycrystalline silicon layer (32) is 100 nm to 300 nm.
41. The solar cell according to claim 38, characterized in that, The first main surface of the silicon substrate (10) also includes an isolation region (13) located between the first region (11) and the second region (12), wherein the first silicon oxide layer and the third silicon oxide layer are separated by the isolation region (13).
42. The solar cell according to claim 1, characterized in that, The first conductive dopant is an n-type dopant, and the second conductive dopant is a p-type dopant.
43. The solar cell according to claim 1, characterized in that, The resistivity of the silicon substrate (10) is 0.5 Ω·cm to 5 Ω·cm.
44. The solar cell according to claim 1, characterized in that, The first main surface is the back side of the silicon substrate (10), and the second main surface is the front side of the silicon substrate (10).
45. The solar cell according to claim 38, characterized in that, The solar cell further includes: a first electrode (61) electrically connected to the second doped polycrystalline silicon layer (24), and a second electrode (62) electrically connected to the third doped polycrystalline silicon layer (32).
46. The solar cell according to claim 45, characterized in that, The first electrode (61) is further electrically connected to the first doped polysilicon layer (22).
47. The solar cell according to claim 38, characterized in that, The solar cell further includes: a first passivation layer (41) disposed on the second doped polycrystalline silicon layer (24) and the third doped polycrystalline silicon layer (32), a first antireflection layer (42) disposed on the first passivation layer (41), a second passivation layer (51) disposed on the second main surface of the silicon substrate (10), and a second antireflection layer (52) disposed on the second passivation layer (51).
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