SiC substrate and method for improving its interface state

Abstract

The application provides a SiC substrate and an interface state improvement method thereof, and the interface state improvement method comprises the following steps: performing vapor phase cleaning on the surface of the SiC substrate by using dichloroethylene in an oxygen-containing atmosphere; performing first annealing on the cleaned SiC substrate in a mixed atmosphere of N2 and N2O; performing oxidation treatment on the surface of the SiC substrate after the annealing treatment, so as to form a silicon oxide layer; performing second annealing on the SiC substrate after the oxidation treatment in a mixed atmosphere of N2 and N2O; and the volume ratio of N2O to N2 in the second annealing atmosphere is greater than the volume ratio of N2O to N2 in the first annealing atmosphere. By gradient design and synergistic optimization of the gas partial pressure and temperature of the annealing process before and after the oxidation, gradient and controllable doping of nitrogen atoms are realized, and then accurate control from "surface pre-passivation" to "interface depth modification" is realized, so that the interface quality of the gate oxide layer is more effectively improved, and the SiC / SiO2 interface state density is obviously reduced.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor SiC device fabrication technology, specifically relating to SiC substrates and methods for improving their interface states. Background Technology

[0002] Silicon carbide (SiC) has become one of the most important semiconductor materials in the field of power electronics due to its high input resistance, good thermal stability, strong radiation resistance, low noise, and ease of integration. It has broad application prospects in new energy vehicles, rail transportation, smart grids, and aerospace. The maturity of SiC-metal-oxide-semiconductor field-effect transistor (MOSFET) technology is key to promoting the large-scale application of SiC power devices. Currently, the core bottleneck of this technology lies in the poor quality of the gate oxide interface, resulting in low channel mobility and thus limiting the improvement of overall device performance.

[0003] The interface quality of the gate oxide layer in SiC MOSFETs is a core challenge currently facing process technology. A high interface state density (D...) it The low charge carrier mobility and low channel mobility of SiC result in excessively high on-state resistance. This not only severely limits energy conversion efficiency but also prevents the full realization of the inherent performance advantages of SiC materials.

[0004] Currently, the standard process for improving the interface quality of the gate oxide layer is thermal oxidation followed by a single high-temperature annealing in a nitrogen-containing atmosphere (such as N2O or NO). However, this method has the following inherent drawbacks: Uneven nitrogen distribution at the interface: Although annealing in a high-temperature, high-concentration nitrogen atmosphere can introduce nitrogen atoms, it can also easily lead to non-uniform accumulation of nitrogen at the SiO2 / SiC interface, which may introduce new stress or defects.

[0005] Secondary oxidation and defects are caused by the high temperature environment of the annealing process, which may generate new carbon-related defects and partially offset the passivation effect of nitrogen on the interface state.

[0006] Narrow process window: The single high-temperature annealing process is sensitive to fluctuations in process parameters, making it difficult to accurately control the interface morphology and oxide layer quality while ensuring efficient nitrogen incorporation, resulting in a small process tolerance. Summary of the Invention

[0007] The present invention aims to solve the above-mentioned problems of the prior art and provide a SiC substrate and a method for improving the interface state thereon.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: Firstly, methods for improving the interface states of SiC substrates are provided, including: S1. In an oxygen-containing atmosphere, dichloroethylene is used to perform vapor-phase cleaning on the surface of the SiC substrate; S2. The SiC substrate treated in step S1 is subjected to a first annealing in a mixed atmosphere of N2 and N2O. S3. Oxidize one surface of the SiC substrate after step S2 to form a silicon oxide layer; S4. The SiC substrate treated in step S3 is subjected to a second annealing in a mixed atmosphere of N2 and N2O; the volume ratio of N2O to N2 in the second annealing atmosphere is greater than the volume ratio of N2O to N2 in the first annealing atmosphere.

[0009] Secondly, a SiC substrate is provided, which is prepared using the processing method described in the first aspect.

[0010] Compared with the prior art, one or more of the above technical solutions can achieve at least one of the following beneficial effects: This method achieves mobile ion immobilization and surface activation through gas-phase cleaning with dichloroethylene, combined with a gradient nitriding strategy, to construct a complete process chain on the SiC surface from "pre-passivation - controlled oxidation - deep passivation". Its core advantages are: chlorine pretreatment reduces the initial interface state density from the source and drives the nitriding mechanism transformation; the first annealing not only creates a stable CN-Si network and suppresses carbon precipitation during oxidation, but also allows subsequent oxidation to grow an oxide layer with fewer defects; deep nitriding achieves targeted saturated passivation of interface defects. This method not only avoids the problems of uneven nitrogen aggregation and the introduction of new defects, but also achieves precise and controllable regulation of the interface nitrogen distribution, ultimately obtaining a SiC interface with low interface state density, excellent threshold voltage stability, and high thermal reliability, breaking through the bottleneck of incomplete passivation in traditional single nitriding processes.

[0011] In this method, the various process steps produce the following synergistic effects: The gas-phase cleaning treatment with dichloroethylene creates a highly reactive surface for pre-nitriding; the thermodynamic instability of the Si-Cl bond drives N to actively replace Cl, transforming the pre-nitriding in the first annealing process from passive adsorption to active chemical substitution; the Si-NO transition layer formed in the first annealing not only alleviates thermal mismatch stress but also acts as a diffusion barrier layer, making subsequent oxidation more uniform and preventing the explosive formation of carbon clusters; the oxidation process consumes the pre-passivated carbon defect precursors, while the newly formed defects provide passivation targets for deep nitriding in the second annealing; the deep, high-concentration nitriding gradient transition generated in the second annealing achieves deep interface saturation passivation based on the shallow nitriding of the first annealing, constructing an optimized band structure. These four steps are interconnected, forming a synergistic closed loop of "cleaning and activation - pre-constructed interface - controllable growth - defect saturation".

[0012] The method provided by this invention is highly controllable and can significantly reduce the SiC / SiO2 interface state density. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a comparison chart of the DIT values ​​of the modified SiC substrates in Example 1 and Comparative Examples 1-2; Figure 2 This is a comparison chart of the DIT values ​​of the modified SiC substrates in Example 2 and Comparative Examples 3-4. Detailed Implementation

[0015] This invention addresses the shortcomings and deficiencies of existing technologies by providing a method for improving the interface states of SiC / SiO2. Interface state density (DIT) refers to the distribution of electrons in the energy band at a semiconductor surface or interface, i.e., the electron energy distribution at that location. This invention achieves gradient and controllable nitrogen atom doping through gradient design and synergistic optimization of gas partial pressure and temperature during pre-oxidation and post-oxidation annealing processes. This enables precise control from "surface pre-passivation" to "interface depth modification," thereby more effectively improving the gate oxide layer interface quality.

[0016] Some embodiments provide a method for improving the interface states of SiC substrates, including: S1. In an oxygen-containing atmosphere, dichloroethylene is used to perform vapor-phase cleaning of the SiC substrate surface. The purpose of this step is not only to remove contaminants through conventional surface cleaning, but more importantly, the chlorine groups generated by the decomposition of dichloroethylene at high temperatures can react with mobile ions (such as sodium ions) on and near the substrate surface to form stable compounds. This fixes these mobile ions, preventing them from migrating during subsequent high-temperature processes or device operation and affecting threshold voltage stability. Simultaneously, chlorine forms Si-Cl dangling bonds with Si, increasing surface reactivity, lowering the SiC oxidation activation energy, reducing oxidation difficulty, and catalyzing and optimizing subsequent oxidation processes. Furthermore, Cl can fill C vacancies to form C-Cl bonds, pre-stabilizing carbon-related defects and reducing the initial interface state density from the source. The introduction of chlorine alters the chemical potential of the SiC surface. Since the Si-Cl bond energy is greater than the Si-N bond energy, it thermodynamically drives N to replace Cl, transforming subsequent nitriding from "passive adsorption" to "active replacement."

[0017] S2. The SiC substrate treated in step S1 is subjected to a first annealing in a mixed atmosphere of N2 and N2O. The SiO2 / SiC interface state is mainly affected by C element clusters, and the presence of C elements is observed at the interface. During the high-temperature oxidation of SiC, the oxide layer and the SiC substrate react, and excess C forms CO or CO2 that diffuses out from the oxide layer. However, some C elements inevitably remain at the interface and inside the oxide layer, accumulating to form a large number of C clusters throughout the oxidation process. Nitriding helps to remove the carbon clusters at the interface, thereby reducing Dit (diluted carbon). This step is a pre-nitriding treatment before oxidation. Annealing at a relatively low N2O concentration can introduce a moderate concentration of nitrogen atoms onto the SiC surface. Under low partial pressure, the diffusion length of N atoms is short, and nitriding is concentrated in the near-surface region, without causing deep damage. These nitrogen atoms preferentially bind to surface dangling bonds and potential carbon cluster precursors, achieving initial passivation of interfacial carbon defects. Furthermore, before oxidation, they transform various potential metastable carbon cluster precursors into a stable CN-Si network, creating a more stable and less defect-prone starting interface for subsequent oxidation steps. This preconditioning avoids the problem of massive carbon precipitation and defect formation during high-temperature oxidation on bare SiC surfaces, and is one of the key steps in this invention, laying the foundation for obtaining a high-quality interface. Simultaneously, this stage forms a Si-NO transition layer. This layer not only acts as a diffusion barrier, slowing oxygen penetration into SiC and making the oxidation reaction more uniform, but its thermal expansion coefficient is between that of SiC and SiO2, alleviating thermal mismatch stress.

[0018] S3. Oxidize one surface of the SiC substrate after step S2 to form a silicon oxide layer; S4. The SiC substrate treated in step S3 is subjected to a second annealing in a mixed atmosphere of N2 and N2O; the volume ratio of N2O to N2 in the second annealing atmosphere is greater than that in the first annealing atmosphere. This step is a deep nitriding treatment after oxidation. At a higher N2O concentration, nitrogen atoms can diffuse more effectively to the SiO2 / SiC interface, eliminating carbon clusters at the interface, saturating silicon and carbon dangling bonds, and achieving targeted deep passivation of interface defects (including previously residual defects and newly generated carbon-related defects that may occur during oxidation). Simultaneously, the gradient increase in nitrogen concentration helps to form a more optimized nitrogen distribution profile at the interface, constructing a bandgap from the SiO2 bulk phase to the interface, further reducing the acceptor-like interface state density near the conduction band. Compared with single-concentration annealing, this gradient annealing strategy (low concentration first, then high concentration) can achieve more thorough and uniform interface passivation without excessive nitrogen introduction or the generation of new defects.

[0019] In some preferred embodiments, step S1 includes: The SiC substrate is placed in the reactor, the reactor is sealed, and an oxygen-containing gas is introduced into the reactor to replace the atmosphere. Then, dichloroethylene is introduced to perform the gas phase cleaning.

[0020] In some preferred embodiments, step S1 includes: placing the SiC substrate into a reaction furnace, sealing the reaction chamber, introducing an inert gas to purge air and moisture from the furnace, then raising the furnace temperature to the target temperature, introducing high-purity oxygen into the furnace, followed by introducing dichloroethylene carried by nitrogen gas for gas phase cleaning. Preferably, the heating rate is 5~20℃ / min, for example, 5℃ / min, 8℃ / min, 10℃ / min, 12℃ / min, 15℃ / min, 18℃ / min, 20℃ / min, etc.

[0021] In some preferred embodiments, in step S1, the temperature of the gas phase cleaning is 900~1200℃, for example 900℃, 950℃, 1000℃, 1050℃, 1100℃, 1150℃, 1200℃, etc.

[0022] In a preferred embodiment of the steps, the time for gas phase cleaning in step S1 is 5 to 15 minutes, such as 5 minutes, 8 minutes, 10 minutes, 12 minutes, 15 minutes, etc.

[0023] In a preferred embodiment of the steps, during step S1, the oxygen flow rate in the atmosphere during gas phase cleaning is 1~5 slm, for example, 1 slm, 2 slm, 3 slm, 4 slm, 5 slm, etc., and the dichloroethylene flow rate is 10~50 sccm, for example, 10 sccm, 20 sccm, 30 sccm, 40 sccm, 50 sccm, etc.

[0024] In some preferred embodiments, step S2 includes: switching the gas introduced into the reactor to a mixed atmosphere of N2 and N2O, and performing the first annealing.

[0025] In some preferred embodiments, in step S2, the temperature of the first annealing is 1200~1400℃, for example 1200℃, 1250℃, 1300℃, 1350℃, 1400℃, etc.; the duration of the first annealing is 20~40min, for example 20min, 25min, 30min, 35min, 40min, etc.; during the first annealing, the flow rate ratio of N2 to N2O is 5~9:1, for example 5:1, 6:1, 7:1, 8:1, 9:1, etc.

[0026] In some preferred embodiments, step S3 includes: switching the gas introduced into the reactor to oxygen to perform the oxidation treatment and form the silicon oxide layer.

[0027] In some preferred embodiments, in step S3, the thickness of the silicon oxide layer grown during the oxidation treatment is 100~500 angstroms, for example 100 angstroms, 150 angstroms, 200 angstroms, 250 angstroms, 300 angstroms, 350 angstroms, 400 angstroms, 450 angstroms, 500 angstroms, etc.

[0028] In some preferred embodiments, in step S3, the oxidation treatment temperature is 1300~1400℃, for example 1300℃, 1320℃, 1350℃, 1380℃, 1400℃, etc.

[0029] In a preferred embodiment, step S4 includes: switching the gas introduced into the reactor to a mixed atmosphere of N2 and N2O, and performing the second annealing.

[0030] In some preferred embodiments, in step S4, the temperature of the second annealing is 1200~1500℃, for example 1200℃, 1250℃, 1300℃, 1350℃, 1400℃, 1450℃, 1500℃, etc.; the duration of the second annealing is 40~80min, for example 40min, 50min, 60min, 70min, 80min, etc.; during the second annealing, the flow rate ratio of N2 to N2O is 1:(4~6), for example 1:4, 1:4.5, 1:5, 1:5.5, 1:6, etc.

[0031] Preferably, steps S1 through S4 are performed within the same furnace. Performing the entire process within the same furnace not only improves process controllability and simplifies the process, but also allows for temperature control of different steps through heating or cooling within the same furnace, thus reducing energy consumption. Specifically, in steps S1 through S3, the heating rate is independently controlled at 5–20 °C / min.

[0032] In some embodiments, in step S4, after the second annealing, the furnace is cooled in an inert atmosphere such as nitrogen or argon.

[0033] Some embodiments of the present invention provide a SiC substrate, which is prepared using the aforementioned method.

[0034] To facilitate understanding of the present invention, the present invention will be described more fully and in detail below with reference to the accompanying drawings and preferred embodiments, but the scope of protection of the present invention is not limited to the following specific embodiments.

[0035] Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by those skilled in the art. The technical terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the scope of the invention.

[0036] Example 1 (1) DCE gas phase cleaning: SiC wafers are placed in the reactor, the reaction chamber is sealed, and inert gas is introduced to remove air and water vapor from the furnace. Then, the furnace temperature is raised to 950℃ at 20℃ / min. High-purity oxygen is introduced into the furnace at a flow rate of 3 slm. Then, dichloroethylene is introduced into the furnace using nitrogen as a carrier for DCE cleaning at a flow rate of 30 sccm. The cleaning time is 10 min. (2) First annealing: 2.7 slm of nitrogen and 0.3 slm of N2O are introduced into the furnace, and the temperature is increased to 1300℃ at 20℃ / min for the first annealing, which takes 30 min. (3) Oxidation: O2 is introduced into the furnace body at a flow rate of 3 slm, and the temperature is increased to 1350℃ at 10℃ / min. At this temperature, one surface of the SiC wafer is oxidized for 10 min, and SiO2 with a thickness of about 400 angstroms is grown. (4) Second annealing: 0.5 slm of nitrogen and 2.5 slm of N2O are introduced into the furnace and the temperature is lowered to 1300℃ for the second annealing for 60 min. The furnace is then cooled to room temperature under a nitrogen atmosphere.

[0037] Comparative Example 1 A brand new SiC wafer is placed in a reactor, the reactor is sealed, oxygen is introduced at a flow rate of 3 slm, the temperature is raised to 1350℃, and the surface of the SiC wafer is oxidized at this temperature for 10 minutes to grow SiO2 with a thickness of about 400 angstroms.

[0038] Comparative Example 2 (1) Take a brand new SiC wafer and put it into the reactor. Seal the reactor and introduce oxygen. The oxygen flow rate is 3 slm. Heat the temperature to 1350℃ and oxidize the surface of the SiC wafer at this temperature for 10 min to grow SiO2 with a thickness of about 400 angstroms. (2) Introduce 0.5 slm of nitrogen and 2.5 slm of N2O, and anneal at 1300℃ for 60 min.

[0039] Example 2 (1) DCE vapor phase cleaning: A SiC substrate was placed in the furnace tube, and the reaction chamber was sealed. High-purity nitrogen was introduced at a flow rate of 10 slm for 10 minutes. Then, under the condition of continuous nitrogen introduction of 1 slm, the furnace temperature was raised to 1000℃ at a rate of 10℃ / min. After the temperature stabilized, high-purity oxygen was introduced into the furnace at a flow rate of 2 slm, and dichloroethylene carried by nitrogen (introduced at a flow rate of 20 sccm) was introduced simultaneously for DCE vapor phase cleaning, which was maintained for 8 minutes. After cleaning, the introduction of dichloroethylene was stopped.

[0040] (2) First annealing: The atmosphere was switched to a mixture of nitrogen (approximately 2.55 slm) and N2O (0.45 slm) at a flow rate ratio of 8.5:1.5. The temperature was increased to 1250℃ at 8℃ / min, and the first annealing was carried out at this temperature for 25 minutes.

[0041] (3) Thermal oxidation: The atmosphere was switched to high-purity oxygen with a flow rate of 2 slm, and the temperature was increased to 1320℃ at a rate of 5℃ / min. The substrate surface was thermally oxidized at this temperature for 12 minutes to grow a SiO2 oxide layer with a thickness of about 450 angstroms.

[0042] (4) Second annealing: The atmosphere was switched to a mixture of nitrogen (approximately 0.36 slm) and N2O (1.62 slm) at a flow rate ratio of 1:4.5. The second annealing was carried out at 1400°C for 50 minutes. After all steps were completed, the furnace was cooled to room temperature under an inert atmosphere.

[0043] Comparative Example 3 (1) DCE vapor phase cleaning: The steps are exactly the same as in Example 2.

[0044] (2) Thermal oxidation: After cleaning, without first annealing, directly switch to 2 slm high-purity oxygen, heat up to 1320℃ at a rate of 5℃ / min, oxidize at 1320℃ for 12 minutes, and grow SiO2 with a thickness of about 450 angstroms.

[0045] (3) First annealing: The atmosphere was switched to a mixture of nitrogen (approximately 2.55 slm) and N2O (0.45 slm) at a flow rate ratio of 8.5:1.5. The temperature was increased to 1250℃ at 8℃ / min, and the first annealing was carried out at this temperature for 25 minutes.

[0046] (4) Second annealing: switch to a mixture of nitrogen (0.36 slm) and N2O (1.62 slm) at a flow rate ratio of 1:4.5, and anneal at 1400°C for 50 minutes. After all steps are completed, cool the furnace to room temperature under an inert atmosphere.

[0047] Comparative Example 4 (1) First annealing: The SiC substrate was placed directly into the furnace without DCE cleaning. After nitrogen purging, a mixture of nitrogen (2.55 slm) and N2O (0.45 slm) with a flow rate ratio of 8.5:1.5 was directly introduced, and the temperature was increased to 1250℃ at 8℃ / min for the first annealing for 25 minutes.

[0048] (2) Thermal oxidation: Same as step (3) in Example 2.

[0049] (3) Second annealing: Same as step (4) in Example 2.

[0050] To evaluate interface quality, electrical characteristics such as capacitance (CV) and conductivity were measured on the SiC wafers of Examples 1-2 and Comparative Examples 1-4. Then, the DIT value was measured at five points on each wafer. A comparison of the DIT values ​​of the modified SiC substrates prepared in Examples 1 and Comparative Examples 1-2 is shown in the figure below. Figure 1 As shown in the figure, the DIT values ​​of the modified SiC substrates prepared in Example 2 and Comparative Examples 3-4 are compared. Figure 2 As shown.

[0051] Experimental results show that the substrate prepared in Example 1, compared with the substrate in Comparative Example 1 (which did not undergo any annealing treatment) and Comparative Example 2 (which was processed by conventional process), has a significantly reduced DIT and achieves high device mobility. This indicates that the first annealing, the second annealing, and the DCE vapor phase cleaning have a significant impact on the substrate performance. Compared with Example 2, Comparative Example 3 showed a significant increase in DIT after changing the order of the first annealing steps. Comparative Example 4 also showed a significant increase in DIT after omitting the DCE vapor phase cleaning. This indicates that the order of the first annealing process and the DCE vapor phase cleaning before the first annealing also have a significant impact on the substrate performance.

[0052] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for improving the interface states of a SiC substrate, characterized in that, include: S1. In an oxygen-containing atmosphere, dichloroethylene is used to perform vapor-phase cleaning on the surface of the SiC substrate; S2. The SiC substrate treated in step S1 is subjected to a first annealing in a mixed atmosphere of N2 and N2O. S3. Oxidize one surface of the SiC substrate after step S2 to form a silicon oxide layer; S4. The SiC substrate treated in step S3 is subjected to a second annealing in a mixed atmosphere of N2 and N2O; the volume ratio of N2O to N2 in the second annealing atmosphere is greater than the volume ratio of N2O to N2 in the first annealing atmosphere.

2. The method for improving the interface states of a SiC substrate as described in claim 1, characterized in that, Step S1 includes: The SiC substrate is placed in the reactor, the reactor is sealed, and an oxygen-containing gas is introduced into the reactor to replace the atmosphere. Then, dichloroethylene is introduced to perform the gas phase cleaning.

3. The method for improving the interface states of a SiC substrate as described in claim 2, characterized in that, Step S1 includes: placing the SiC substrate into the reactor, sealing the reactor, introducing inert gas to remove air and moisture from the reactor, then raising the furnace temperature to the target temperature, introducing high-purity oxygen into the reactor, and then introducing dichloroethylene carried by nitrogen to perform gas phase cleaning.

4. The method for improving the interface states of a SiC substrate as described in claim 1, characterized in that, Step S2 includes: switching the gas introduced into the reactor to a mixed atmosphere of N2 and N2O, and performing the first annealing; Step S3 includes: switching the gas introduced into the reactor to oxygen to perform the oxidation treatment and form the silicon oxide layer; Step S4 includes: switching the gas introduced into the reactor to a mixed atmosphere of N2 and N2O, and performing the second annealing.

5. The method for improving the interface states of a SiC substrate as described in any one of claims 1 to 4, characterized in that, In step S1, the temperature of the gas phase cleaning is 900~1200℃; the time of the gas phase cleaning is 5~15min; during the gas phase cleaning, the oxygen flow rate in the atmosphere is 1~5slm, and the dichloroethylene flow rate is 10~50sccm.

6. The method for improving the interface states of a SiC substrate as described in any one of claims 1 to 4, characterized in that, In step S2, the temperature of the first annealing is 1200~1400℃; the duration of the first annealing is 20~40min; and the flow rate ratio of N2 to N2O during the first annealing is (5~9):

1.

7. The method for improving the interface states of a SiC substrate as described in any one of claims 1 to 4, characterized in that, In step S3, the thickness of the silicon oxide layer grown during the oxidation treatment is 100~500 angstroms.

8. The method for improving the interface states of a SiC substrate as described in any one of claims 1 to 4, characterized in that, In step S3, the oxidation treatment temperature is 1300~1400℃.

9. The method for improving the interface states of a SiC substrate as described in any one of claims 1 to 4, characterized in that, In step S4, the temperature of the second annealing is 1200~1500℃; the duration of the second annealing is 40~80min; and during the second annealing, the flow rate ratio of N2 to N2O is 1:(4~6).

10. A SiC substrate, characterized in that, It is prepared by processing using the method described in any one of claims 1 to 9.

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