Test structure and test method
By designing a test structure between the first and second electrodes on the substrate during semiconductor manufacturing, and using electrical parameters to monitor the quality of the dielectric layer, the problem of difficult detection of dielectric layer quality in existing technologies is solved, thereby improving chip yield and process improvement efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2024-12-05
- Publication Date
- 2026-06-09
Smart Images
Figure CN122180361A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a test structure and test method. Background Technology
[0002] With the rapid development of the integrated circuit (IC) industry, semiconductor technology, driven by Moore's Law, continues to advance towards smaller process nodes, enabling integrated circuits to develop in the direction of smaller size, higher circuit precision, and higher circuit complexity.
[0003] Due to factors such as manufacturing processes, defective chips are produced during chip manufacturing. To improve chip manufacturing yield and reduce manufacturing costs, chips are tested at different stages. The test results are used to understand the impact of the manufacturing process on chip yield, so that the process can be adjusted in subsequent batch processing to improve the yield of chips processed later.
[0004] Currently, the test structure still needs improvement. Summary of the Invention
[0005] The problem solved by the embodiments of the present invention is to provide a test structure and test method that facilitates quality monitoring of the first dielectric layer between the first electrode and the second electrode.
[0006] To address the aforementioned problems, embodiments of the present invention provide a test structure, comprising: a substrate; a first electrode located on the substrate, the first electrode serving as a first test terminal or electrically connected to a first test terminal; a second electrode located on the substrate to the side of the first electrode, the second electrode serving as a second test terminal or electrically connected to a second test terminal; and a first dielectric layer located between the first electrode and the second electrode.
[0007] Optionally, the test structure further includes: a first isolation structure located in the substrate; and the first electrode and the second electrode both located on the first isolation structure.
[0008] Optionally, the substrate contains a first type of doped ion; the test structure further includes: a well region located in the substrate, the well region containing a second type of doped ion, the second type of doped ion being of the opposite type to the first type of doped ion; and the first isolation structure located in the well region.
[0009] Optionally, the test structure further includes: a first doped region located in the well region and surrounding the first isolation structure, the first doped region having second type doped ions, and the doped ion concentration in the first doped region being greater than the doped ion concentration in the well region, the first doped region serving as a third test terminal or electrically connected to the third test terminal.
[0010] Optionally, the test structure further includes a third plug located on the first doped region, one end of the third plug being electrically connected to the first doped region and the other end being electrically connected to the third test terminal.
[0011] Optionally, there may be multiple third plugs, and multiple third plugs may be electrically connected to the same third test terminal.
[0012] Optionally, the first type of doped ion is a P-type ion, and the second type of doped ion is an N-type ion.
[0013] Optionally, the test structure further includes: a first plug located on the first electrode, one end of the first plug being electrically connected to the first electrode and the other end being electrically connected to the first test terminal; and a second plug located on the second electrode, one end of the second plug being electrically connected to the second electrode and the other end being electrically connected to the second test terminal.
[0014] Optionally, there are multiple first plugs, and multiple first plugs are electrically connected to the same first test terminal; there are multiple second plugs, and multiple second plugs are electrically connected to the same second test terminal.
[0015] Optionally, the first electrode includes a floating gate, and the second electrode includes a select gate.
[0016] Optionally, the material of the first electrode includes one or two of metal and polycrystalline silicon; the material of the second electrode includes one or two of metal and polycrystalline silicon.
[0017] Optionally, the material of the first dielectric layer includes one or more of silicon oxide, silicon nitride, low-k dielectric materials, and ultra-low-k dielectric materials.
[0018] Optionally, the test structure further includes: a second dielectric layer located between the substrate and the first electrode, between the substrate and the second electrode, and between the substrate and the first dielectric layer.
[0019] Accordingly, this embodiment of the invention also provides a testing method, including: a test structure suitable for use in this embodiment of the invention, the testing method including: applying different test voltages to a first test terminal and a second test terminal respectively, obtaining the values of electrical parameters between the first test terminal and the second test terminal; determining whether the values of the electrical parameters meet preset requirements, if so, determining that the first dielectric layer meets the quality requirements, otherwise, determining that the first dielectric layer does not meet the quality requirements.
[0020] Optionally, the electrical parameters include one or more of the following: capacitance per unit area of the first dielectric layer, electrical thickness of the first dielectric layer, and breakdown voltage of the first dielectric layer.
[0021] Optionally, when the electrical parameters include the capacitance value per unit area of the first dielectric layer, the step of applying different test voltages to the first test terminal and the second test terminal respectively to obtain the value of the electrical parameters between the first test terminal and the second test terminal includes: applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer; and obtaining the capacitance value per unit area of the first dielectric layer based on the capacitance value of the first dielectric layer and the area value of the first dielectric layer directly opposite the first electrode and the second electrode.
[0022] Optionally, the substrate contains first-type doped ions; the test structure further includes: a well region located in the substrate, the well region containing second-type doped ions, the second-type doped ions being of opposite types to the first-type doped ions; a first isolation structure located in the well region; a first doped region located in the well region and surrounding the first isolation structure, the first doped region containing second-type doped ions, and the doped ion concentration in the first doped region being greater than the doped ion concentration in the well region, the first doped region serving as a third test terminal or electrically connected to the third test terminal; wherein, both the first electrode and the second electrode are located on the first isolation structure; in the step of applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer, a first scan voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is floated or grounded, or, a first scan voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is floated or grounded, wherein the first scan voltage is the maximum operating voltage of the semiconductor device.
[0023] Optionally, when the electrical parameters further include the electrical thickness of the first dielectric layer, after obtaining the capacitance value of the first dielectric layer, the method further includes: obtaining the electrical thickness of the first dielectric layer based on the capacitance value of the first dielectric layer and the area value of the first dielectric layer directly opposite the first electrode and the second electrode; the step of determining whether the value of the electrical parameters meets the preset requirements includes: determining whether the electrical thickness of the first dielectric layer meets the preset requirements.
[0024] Optionally, when the electrical parameters include the breakdown voltage value of the first dielectric layer, the step of applying different test voltages to the first test terminal and the second test terminal respectively to obtain the value of the electrical parameters between the first test terminal and the second test terminal includes: applying different DC test voltages to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer.
[0025] Optionally, the step of obtaining the breakdown voltage value includes: obtaining the current value between the first test terminal and the second test terminal; obtaining the current value per unit area of the first dielectric layer based on the current value between the first test terminal and the second test terminal, and the area value of the first dielectric layer directly opposite the first electrode and the second electrode; determining whether the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value; if so, taking the absolute value of the difference between the test voltage values applied to the first test terminal and the second test terminal corresponding to the current value per unit area of the first dielectric layer as the breakdown voltage value of the first dielectric layer; otherwise, returning to the step of applying different DC test voltages to the first test terminal and the second test terminal respectively, increasing the voltage difference between the first test terminal and the second test terminal, and applying different DC test voltages to the first test terminal and the second test terminal again respectively.
[0026] Optionally, in the step of determining whether the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value, if the current value per unit area of the first dielectric layer is greater than or equal to 100 pA / μm 2 If the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value, then it is determined that the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value.
[0027] Optionally, the substrate contains type-1 doped ions; the test structure further includes: a well region located in the substrate, the well region containing type-2 doped ions, the type of which is opposite to that of the type-1 doped ions; a first isolation structure located in the well region; a first doped region located in the well region and surrounding the first isolation structure, the first doped region containing type-2 doped ions, and the doped ion concentration in the first doped region being greater than the doped ion concentration in the well region, the first doped region serving as a third test terminal or electrically connected to the third test terminal; wherein, both the first electrode and the second electrode are located on the first isolation structure; in the step of applying different DC test voltages to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer, a second scan voltage is applied to the first test terminal to ground the second test terminal and the third test terminal is floated or grounded, or, a second scan voltage is applied to the second test terminal to ground the first test terminal and the third test terminal is floated or grounded.
[0028] Optionally, the testing method further includes: obtaining the physical thickness of the first dielectric layer; in the step of determining whether the value of the electrical parameter meets the preset requirements, if both the physical thickness of the first dielectric layer and the electrical parameter meet the preset requirements, then the first dielectric layer is determined to meet the quality requirements; otherwise, the first dielectric layer is determined to not meet the quality requirements.
[0029] Optionally, the physical thickness of the first dielectric layer can be obtained through online optical measurement.
[0030] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:
[0031] The test structure provided in this embodiment of the invention includes a first electrode located on the substrate, which serves as a first test terminal or is electrically connected to the first test terminal; a second electrode located on the substrate to the side of the first electrode, which serves as a second test terminal or is electrically connected to the second test terminal; and a first dielectric layer located between the first electrode and the second electrode. The test structure of this embodiment of the invention can be used to obtain the values of electrical parameters between the first test terminal and the second test terminal, thereby obtaining the quality status of the first dielectric layer based on the values of these electrical parameters. This facilitates quality monitoring of the first dielectric layer between the first electrode and the second electrode, and correspondingly, it also helps to obtain the quality status of the semiconductor structure, thereby facilitating improvements to the semiconductor manufacturing process.
[0032] The testing method provided in this embodiment of the invention is suitable for testing using the testing structure provided in this embodiment of the invention. By applying different test voltages to the first test terminal and the second test terminal respectively, the values of electrical parameters between the first test terminal and the second test terminal are obtained. Based on the values of electrical parameters between the first test terminal and the second test terminal, the quality of the first dielectric layer is obtained, which facilitates the quality monitoring of the first dielectric layer between the first electrode and the second electrode. Correspondingly, it is also beneficial to obtain the quality of the semiconductor structure, thereby facilitating the improvement of the semiconductor manufacturing process. Attached Figure Description
[0033] Figure 1 A top view schematic diagram of an embodiment of the test structure of the present invention;
[0034] Figure 2 yes Figure 1 Sectional view at AA1;
[0035] Figure 3 This is a top view schematic diagram of the test structure of the present invention when the floating gate and the selected gate contain N-type ions;
[0036] Figure 4 This is a flowchart of an embodiment of the testing method of the present invention;
[0037] Figure 5 This is a capacitance measurement diagram of the first dielectric layer according to an embodiment of the testing method of the present invention;
[0038] Figure 6 This is a breakdown voltage measurement diagram of the first dielectric layer according to an embodiment of the test method of the present invention. Detailed Implementation
[0039] In the semiconductor manufacturing process, the first dielectric layer between the first electrode and the second electrode is formed through multiple steps. Therefore, the quality of the first dielectric layer is easily affected by various factors. However, in the existing technology, wafer acceptance testing (WAT) lacks a test structure specifically for the integrity of the first dielectric layer. This means that if a semiconductor structure fails to meet preset requirements due to quality issues with the first dielectric layer (e.g., the first dielectric layer is too thin, making it difficult to retain data in the memory cell), the area of the quality problem cannot be located in a timely manner. Physical failure analysis (PFA) is then required to determine the area of the quality problem, which is time-consuming and costly.
[0040] To address the aforementioned technical problems, embodiments of the present invention provide a test structure, comprising: a substrate; a first electrode located on the substrate, the first electrode serving as a first test terminal or electrically connected to a first test terminal; a second electrode located on the substrate to the side of the first electrode, the second electrode serving as a second test terminal or electrically connected to a second test terminal; and a first dielectric layer located between the first electrode and the second electrode.
[0041] The solution disclosed in this embodiment of the invention includes a first electrode located on the substrate, which serves as a first test terminal or is electrically connected to the first test terminal; a second electrode located on the substrate to the side of the first electrode, which serves as a second test terminal or is electrically connected to the second test terminal; and a first dielectric layer located between the first electrode and the second electrode. The test structure of this embodiment of the invention can be used to obtain the values of electrical parameters between the first test terminal and the second test terminal, thereby obtaining the quality status of the first dielectric layer based on the values of these electrical parameters. This facilitates quality monitoring of the first dielectric layer between the first electrode and the second electrode, and correspondingly, it also helps to obtain the quality status of the semiconductor structure, thereby facilitating improvements to the semiconductor manufacturing process.
[0042] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0043] Figure 1 A top view schematic diagram of one embodiment of the test structure of the present invention. Figure 2 yes Figure 1 Sectional view at AA1; Figure 3 This is a top view schematic diagram of the test structure of the present invention, showing the presence of N-type ions in the floating gate and the selected gate.
[0044] refer to Figures 1 to 3 In this embodiment, the test structure includes: a substrate 100; a first electrode 110 located on the substrate 100, the first electrode 110 serving as a first test terminal or electrically connected to a first test terminal; a second electrode 120 located on the substrate 100 to the side of the first electrode 110, the second electrode 120 serving as a second test terminal or electrically connected to a second test terminal; and a first dielectric layer 130 located between the first electrode 110 and the second electrode 120.
[0045] in, Figure 1 This refers to the case where the floating gate and the selected gate of the test structure of this invention contain P-type ions.
[0046] The substrate 100 is used to provide a process platform for the formation of the test structure.
[0047] In this embodiment, the substrate 100 includes a substrate (not shown), which is a silicon substrate. In other embodiments, the substrate may be made of other materials such as germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium ionide, and may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or other types of substrates.
[0048] In this embodiment, the test structure further includes: a first isolation structure 102 located in the substrate 100; the first electrode 110 and the second electrode 120 are both located on the first isolation structure 102.
[0049] The first electrode 110 and the second electrode 120 are both located on the first isolation structure 102, and the first dielectric layer 130 is located between the first electrode 110 and the second electrode 120. That is, the first dielectric layer 130 is also located on the first isolation structure 102.
[0050] The first electrode 110 and the second electrode 120 are both located on the first isolation structure 102, which helps to improve the isolation effect between the first electrode 110 and the substrate 100, and between the second electrode 120 and the substrate 100, thereby helping to reduce the impact of substrate 100 noise on the test structure.
[0051] It should be noted that the horizontal projection patterns of the first electrode 110, the second electrode 120, and the first dielectric layer 130 are all located within the horizontal projection pattern of the first isolation structure 102.
[0052] It should also be noted that the first isolation structure 102 is a shallow trench isolation structure (STI).
[0053] Shallow trench isolation structures are commonly used in semiconductor manufacturing. The first isolation structure 102 is a shallow trench isolation structure, which is beneficial for integration with existing process technology and saves process steps.
[0054] As an example, the material of the shallow trench isolation structure is silicon oxide. In other embodiments, the material of the shallow trench isolation structure may also be other dielectric materials such as silicon nitride or silicon oxynitride.
[0055] Specifically, the substrate 100 has type I doped ions; the test structure further includes: a well region 103 (e.g., Figure 2 As shown), located in the substrate 100, the well region 103 has a second type of doped ion, which is of the opposite type to the first type of doped ion; the first isolation structure 102 is located in the well region 103.
[0056] The substrate 100 is doped with a first type of dopant ion, and the test structure further includes a well region 103 located in the substrate 100 and doped with a second type of dopant ion. The second type of dopant ion is of the opposite type to the first type of dopant ion. The first isolation structure 102 is located in the well region 103, which helps to further improve the isolation effect between the first electrode 110 and the substrate 100, and between the second electrode 120 and the substrate 100, thereby helping to further reduce the impact of substrate 100 noise on the test structure.
[0057] More specifically, the first type of doped ion is a P-type ion, and the second type of doped ion is an N-type ion. The P-type ion may include B ions, Ga ions, or In ions, and the N-type ion may include P ions, As ions, or Sb ions.
[0058] As an example, the substrate is a P-type substrate (P-sub).
[0059] In this embodiment, the test structure further includes: a first doped region 104, located in the well region 103 and surrounding the first isolation structure 102, the first doped region 104 having second type doped ions, and the doped ion concentration in the first doped region 104 being greater than the doped ion concentration in the well region 103, the first doped region 104 serving as a third test terminal or electrically connected to a third test terminal.
[0060] The first doped region 104 serves as the third test terminal or is electrically connected to the third test terminal, which helps to remove excess charge from the bottom of the first electrode 110 and the second electrode 120 through the third test terminal, thereby further reducing the impact of substrate 100 noise on the test structure.
[0061] Since the first doped region 104 contains type II doped ions and the concentration of doped ions in the first doped region 104 is greater than the concentration of doped ions in the well region 103, the resistance of the first doped region 104 is less than the resistance of the well region 103. As a result, when the first doped region 104 is used as a third test terminal or electrically connected to a third test terminal, the resistance corresponding to the first doped region 104 is smaller, which helps to reduce the influence of the resistance corresponding to the first doped region 104 on the test results during the test process.
[0062] Moreover, the first doped region 104 surrounds the first isolation structure 102, that is, the first isolation structure 102 is located at the center of the well region 103, which helps to reduce the difficulty of the photolithography process in forming the first isolation structure 102, so that the photoresist is exposed on the top of the substrate 100 corresponding to the first isolation structure 102.
[0063] In other embodiments, the first doped region may also be located in the well region and on both sides of the first isolation structure.
[0064] Specifically, the test structure further includes a third plug 105 located on the first doped region 104, one end of the third plug 105 being electrically connected to the first doped region 104 and the other end being electrically connected to the third test terminal.
[0065] One end of the third plug 105 is electrically connected to the first doped region 104, and the other end is electrically connected to the third test terminal, which helps to reduce the difficulty of electrically connecting the first doped region 104 to the third test terminal.
[0066] The dopant ion concentration in the first doped region 104 is greater than that in the well region 103, which makes it easier for an ohmic contact to be formed between the first doped region 104 and the third plug 105 located on the first doped region 104, thereby reducing the contact resistance between the third plug 105 and the first doped region 104, and thus helping to reduce the influence of contact resistance on the test results.
[0067] Since the first doped region 104 surrounds the first isolation structure 102, it is beneficial to increase the number of the third plugs 105, thereby further reducing the contact resistance between the first doped region 104 and the third plugs 105.
[0068] More specifically, the test structure further includes a third solder pad (not shown), which is electrically connected to the other end of the third plug 105, and the third solder pad serves as a third test terminal.
[0069] The third pad is electrically connected to the other end of the third plug 105, thereby making the third pad electrically connected to the first doped region 104, which facilitates the electrical connection between the first doped region 104 and the third test terminal.
[0070] In this embodiment, there are multiple third plugs 105, and multiple third plugs 105 are electrically connected to the same third test terminal.
[0071] The fact that multiple third plugs 105 are electrically connected to the same third test terminal helps to further reduce the contact resistance between the third plug 105 and the first doped region 104.
[0072] As an example, multiple third plugs 105 are electrically connected to the same third pad.
[0073] As an example, the first doped region 104 surrounds the first isolation structure 102; correspondingly, a plurality of the third plugs 105 may also be arranged around the first isolation structure 102.
[0074] The first electrode 110 serves as a first test terminal or is electrically connected to a first test terminal.
[0075] In this embodiment, the test structure further includes: a first plug 111, located on the first electrode 110, one end of the first plug 111 being electrically connected to the first electrode 110, and the other end being electrically connected to the first test end.
[0076] One end of the first plug 111 is electrically connected to the first electrode 110, and the other end is electrically connected to the first test terminal, which helps to reduce the difficulty of electrically connecting the first electrode 110 to the first test terminal.
[0077] Specifically, the test structure further includes: a first solder pad (not shown), which is electrically connected to the other end of the first plug 111, and the first solder pad serves as the first test end.
[0078] The first solder pad is electrically connected to the other end of the first plug 111, thereby making the first solder pad electrically connected to the first electrode 110, which facilitates the electrical connection of the first electrode 110 to the first test terminal.
[0079] More specifically, there are multiple first plugs 111, and multiple first plugs 111 are electrically connected to the same first test terminal.
[0080] As an example, multiple first plugs 111 are electrically connected to the same first pad.
[0081] The fact that multiple first plugs 111 are electrically connected to the same first test terminal helps to reduce the contact resistance between the first electrode 110 and the first plug 111, thereby reducing the impact of the contact resistance between the first electrode 110 and the first plug 111 on the test results during the test process.
[0082] As an example, a plurality of first plugs 111 are arranged along the extending direction of the first electrode 110.
[0083] In this embodiment, the material of the first electrode 110 includes one or both of metal and polycrystalline silicon.
[0084] Metals and polycrystalline silicon are commonly used materials for electrodes in semiconductor manufacturing, as they are readily available and have low processing costs.
[0085] The second electrode 120 serves as a second test terminal or is electrically connected to a second test terminal.
[0086] In this embodiment, the test structure further includes a second plug 121 located on the second electrode 120, with one end of the second plug 121 electrically connected to the second electrode 120 and the other end electrically connected to the second test terminal.
[0087] One end of the second plug 121 is electrically connected to the second electrode 120, and the other end is electrically connected to the second test terminal, which helps to reduce the difficulty of electrically connecting the second electrode 120 to the second test terminal.
[0088] Specifically, the test structure further includes a second solder pad (not shown), which is electrically connected to the other end of the second plug 121, and the second solder pad serves as a second test terminal.
[0089] The second solder pad is electrically connected to the other end of the second plug 121, thereby making the second solder pad electrically connected to the second electrode 120, which facilitates the electrical connection of the second electrode 120 to the second test terminal.
[0090] More specifically, there are multiple second plugs 121, and multiple second plugs 121 are electrically connected to the same second test terminal.
[0091] The fact that multiple second plugs 121 are electrically connected to the same second test terminal helps to reduce the contact resistance between the second electrode 120 and the second plug 121, thereby reducing the impact of the contact resistance between the second electrode 120 and the second plug 121 on the test results during the test process.
[0092] As an example, multiple second plugs 121 are electrically connected to the same second pad.
[0093] As an example, a plurality of second plugs 121 are arranged along the extension direction of the second electrode 120.
[0094] In this embodiment, the material of the second electrode 120 includes one or both of metal and polycrystalline silicon.
[0095] The reason why the material of the second electrode 120 includes one or two of metal and polycrystalline silicon is similar to that of the first electrode 110, which includes one or two of metal and polycrystalline silicon, and will not be repeated here.
[0096] The first dielectric layer 130 is used to achieve electrical isolation between the first electrode 110 and the second electrode 120.
[0097] The test structure can be used to obtain the values of electrical parameters between the first test terminal and the second test terminal, thereby obtaining the quality status of the first dielectric layer 130 based on the values of electrical parameters between the first test terminal and the second test terminal. This facilitates quality monitoring of the first dielectric layer 130 between the first electrode 110 and the second electrode 120, and also helps to obtain the quality status of the semiconductor structure, thereby facilitating improvements to the semiconductor manufacturing process.
[0098] It is understood that the lengths of the first electrode 110 and the second electrode 120 should be increased as much as possible, thereby increasing the area of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120. This would make the electrical parameter values between the first test terminal and the second test terminal obtained by the test structure closer to the electrical parameter values of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120 in the semiconductor structure.
[0099] In this embodiment, the material of the first dielectric layer 130 includes one or more of silicon oxide, silicon nitride, low-k dielectric material (low-k dielectric material refers to dielectric material with a relative permittivity of less than 3.9) and ultra-low-k dielectric material (ultra-low-k dielectric material refers to dielectric material with a relative permittivity of less than 2.6).
[0100] Silicon oxide, silicon nitride, low-k dielectric materials, and ultra-low-k dielectric materials all have good insulation properties.
[0101] In this embodiment, the first electrode 110 includes a floating gate, and the second electrode 120 includes a select gate.
[0102] The first electrode 110 includes a floating gate, and the second electrode 120 includes a select gate, so that the test structure can monitor the quality of the first dielectric layer 130 between the floating gate and the select gate, thereby enabling quality problems of the first dielectric layer 130 to be detected in a timely manner, which facilitates the improvement of the semiconductor junction manufacturing process.
[0103] It is understood that, since the first electrode 110 includes a floating gate and the second electrode 120 includes a selection gate, the first dielectric layer 130 serves as a tunneling oxide layer for the memory device, providing electrical isolation between the floating gate and the selection gate. This allows electrons to enter the floating gate via the first dielectric layer 130 using the tunneling effect. Specifically, the first dielectric layer 130 includes silicon oxide.
[0104] As another example, the first electrode includes a select gate, and the second electrode includes a floating gate.
[0105] In other embodiments, the first electrode may include a metal electrode plate, and the second electrode may include a metal electrode plate or a polycrystalline silicon electrode plate; alternatively, the second electrode may include a metal electrode plate, and the first electrode may include a metal electrode plate or a polycrystalline silicon electrode plate.
[0106] In this embodiment, both the floating gate and the selected gate contain doped ions.
[0107] As an example, such as Figure 1 As shown, both the floating gate and the selected gate contain the first type of doped ions, that is, both the floating gate and the selected gate contain P-type ions.
[0108] As another example, such as Figure 3 As shown, both the floating gate and the selected gate contain the second type of doped ions, that is, both the floating gate and the selected gate contain N-type ions.
[0109] In this embodiment, the test structure further includes: a second dielectric layer 140 (e.g., Figure 2 As shown), it is located between the substrate 100 and the first electrode 110, between the substrate 100 and the second electrode 120, and between the substrate 100 and the first dielectric layer 130.
[0110] The second dielectric layer 140 is located between the substrate 100 and the first electrode 110, between the substrate 100 and the second electrode 120, and between the substrate 100 and the first dielectric layer 130. This helps to improve the isolation effect between the first electrode 110 and the substrate 100, between the second electrode 120 and the substrate 100, and between the first dielectric layer 130 and the substrate 100. Moreover, it is also beneficial to integrate with existing process technologies, reducing modifications to existing process technologies.
[0111] As an example, the material of the second dielectric layer 140 includes silicon oxide. In other embodiments, the material of the second dielectric layer may also include other suitable dielectric materials.
[0112] Accordingly, the present invention also provides a testing method suitable for testing using the testing structure provided in the embodiments of the present invention. Figure 4 This is a flowchart corresponding to the test method of the present invention. Figure 5 This is a capacitance measurement diagram of the first dielectric layer according to an embodiment of the testing method of the present invention. Figure 6 This is a breakdown voltage measurement diagram of the first dielectric layer according to an embodiment of the test method of the present invention.
[0113] refer to Figures 4 to 6 and in conjunction with references Figures 1 to 2 Step S1: Apply different test voltages to the first test terminal and the second test terminal respectively, and obtain the values of the electrical parameters between the first test terminal and the second test terminal.
[0114] The value of the electrical parameter is related to the quality of the first dielectric layer 130. Therefore, the quality of the first dielectric layer 130 can be obtained based on the value of the electrical parameter.
[0115] In this embodiment, the electrical parameters include one or more of the following: the capacitance per unit area of the first dielectric layer 130, the electrical thickness of the first dielectric layer 130, and the breakdown voltage of the first dielectric layer 130.
[0116] When the quality of the first dielectric layer 130 is poor, the capacitance per unit area and the electrical thickness of the first dielectric layer 130 are likely to be small, and the first dielectric layer 130 is also more prone to breakdown, resulting in a smaller breakdown voltage. Therefore, the capacitance per unit area, the electrical thickness, and the breakdown voltage of the first dielectric layer 130 can be used to evaluate the quality of the first dielectric layer 130.
[0117] In this embodiment, when the electrical parameters include the capacitance value per unit area of the first dielectric layer 130, the step of applying different test voltages to the first test terminal and the second test terminal respectively to obtain the value of the electrical parameters between the first test terminal and the second test terminal includes: applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer 130; and obtaining the capacitance value per unit area of the first dielectric layer 130 based on the capacitance value of the first dielectric layer 130 and the area value of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120.
[0118] Applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer 130 helps to reduce the difficulty of obtaining the capacitance value of the first dielectric layer 130.
[0119] The capacitance value per unit area of the first dielectric layer 130 is obtained so that the value of the electrical parameter is independent of the area of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120. This makes it easier to determine whether the first dielectric layer 130 meets the quality requirements based on the same preset requirements when the areas of the directly opposite first dielectric layers 130 are different.
[0120] It should be noted that, based on formula C gap oxide =C / S, to obtain the capacitance value per unit area of the first dielectric layer 130; where C is the capacitance value of the first dielectric layer 130, and S is the area of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120. gap oxide This is the capacitance value per unit area of the first dielectric layer (130 units).
[0121] Specifically, the substrate 100 contains type I doped ions; the test structure further includes: a well region 103 located in the substrate 100, the well region 103 containing type II doped ions, the type of which is opposite to that of the type I doped ions; a first isolation structure 102 located in the well region 103; a first doped region 104 located in the well region 103 and surrounding the first isolation structure 102, the first doped region 104 containing type II doped ions, and the doped ion concentration in the first doped region 104 being greater than the doped ion concentration in the well region 103, the first doped region 104 serving as a third test terminal or electrically connected to a third test terminal; wherein, the first electrode 110 and the second electrode 120 are both located on the first isolation structure 102; as Figure 5As shown, in the step of applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer 130, a first scan voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is grounded; or, a first scan voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is grounded, wherein the first scan voltage is the maximum operating voltage of the semiconductor device.
[0122] Semiconductor devices refer to the devices used for characterization by the test structures described in the embodiments of the present invention.
[0123] The first electrode 110 and the second electrode 120 are both located on the first isolation structure 102, which helps to improve the isolation effect between the first electrode 110 and the substrate 100, and between the second electrode 120 and the substrate 100, thereby helping to reduce the impact of substrate 100 noise on the test structure.
[0124] When the semiconductor device is a low-voltage device, the first scanning voltage is the maximum operating voltage (VDD) of the low-voltage device; when the semiconductor device is a medium-voltage device, the first scanning voltage is the maximum operating voltage (VDDA) of the medium-voltage device.
[0125] The substrate 100 is doped with a first type of dopant ion, and the test structure further includes a well region 103 located in the substrate 100 and doped with a second type of dopant ion. The second type of dopant ion is of the opposite type to the first type of dopant ion. The first isolation structure 102 is located in the well region 103, which helps to further improve the isolation effect between the first electrode 110 and the substrate 100, and between the second electrode 120 and the substrate 100, thereby helping to further reduce the impact of substrate 100 noise on the test structure.
[0126] In the step of obtaining the capacitance value of the first dielectric layer 130, grounding the third test terminal is beneficial to exporting excess charge at the bottom of the first electrode 110 and the second electrode 120 through the third test terminal, thereby further reducing the impact of substrate 100 noise on the test structure.
[0127] In other embodiments, in the step of applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer, a first scanning voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is floated; or, a first scanning voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is floated, wherein the first scanning voltage is a digital power supply voltage or an analog power supply voltage.
[0128] More specifically, the frequency of the first scanning voltage is 100 kHz.
[0129] In this embodiment, when the electrical parameters also include the electrical thickness of the first dielectric layer 130, after obtaining the capacitance value of the first dielectric layer 130, the method further includes: obtaining the electrical thickness of the first dielectric layer 130 based on the capacitance value of the first dielectric layer 130 and the area value of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120; the step of determining whether the value of the electrical parameters meets the preset requirements includes: determining whether the electrical thickness of the first dielectric layer 130 meets the preset requirements.
[0130] The electrical thickness of the first dielectric layer 130 is obtained based on the capacitance value of the first dielectric layer 130 and the area value of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120, which makes it easier to obtain the electrical thickness of the first dielectric layer 130.
[0131] It should be noted that, based on the formula T gap oxide = (εS) / C, to obtain the electrical thickness of the first dielectric layer 130; where ε is the relative permittivity, S is the area of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120, C is the capacitance of the first dielectric layer 130, and T is the capacitance of the first dielectric layer 130. gap oxide The electrical thickness of the first dielectric layer is 130.
[0132] In this embodiment, when the electrical parameters include the breakdown voltage value of the first dielectric layer 130, the step of applying different test voltages to the first test terminal and the second test terminal respectively to obtain the value of the electrical parameters between the first test terminal and the second test terminal includes: applying different DC test voltages to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer 130.
[0133] It is understood that the step of determining whether the value of the electrical parameter meets the preset requirements includes: determining whether the breakdown voltage value of the first dielectric layer 130 meets the preset requirements.
[0134] Applying different DC test voltages to the first and second test terminals respectively facilitates obtaining the breakdown voltage value of the first dielectric layer 130. Furthermore, in the step of determining whether the electrical parameters meet preset requirements, determining whether the breakdown voltage value of the first dielectric layer 130 meets the preset requirements is beneficial for a more comprehensive evaluation of the quality of the first dielectric layer 130.
[0135] Specifically, such as Figure 6As shown, the step of obtaining the breakdown voltage value includes: obtaining the current value A between the first test terminal and the second test terminal; obtaining the current value per unit area of the first dielectric layer 130 based on the current value A between the first test terminal and the second test terminal, and the area value of the first dielectric layer 130 directly opposite the first electrode 110 and the second electrode 120; determining whether the current value per unit area of the first dielectric layer 130 is greater than or equal to the breakdown current value; if so, taking the absolute value of the difference between the test voltage values applied to the first test terminal and the second test terminal corresponding to the current value per unit area of the first dielectric layer 130 as the breakdown voltage value of the first dielectric layer 130; otherwise, returning to the step of applying different DC test voltages to the first test terminal and the second test terminal respectively, increasing the voltage difference between the first test terminal and the second test terminal, and applying different DC test voltages to the first test terminal and the second test terminal again respectively.
[0136] It is understandable that the current value per unit area of the first dielectric layer 130 is determined to be greater than or equal to the breakdown current value. If it is, it means that the first dielectric layer 130 has been broken down; otherwise, it means that the first dielectric layer 130 has not been broken down. That is, the first dielectric layer 130 is determined to be broken down based on the current value per unit area of the first dielectric layer 130.
[0137] Based on the current value per unit area of the first dielectric layer 130, it is determined whether the first dielectric layer 130 has been broken down. If so, the absolute value of the difference between the test voltage values applied to the first test terminal and the second test terminal corresponding to the current value per unit area of the first dielectric layer 130 is taken as the breakdown voltage value of the first dielectric layer 130. Otherwise, the process returns to the step of applying different DC test voltages to the first test terminal and the second test terminal respectively, increasing the voltage difference between the first test terminal and the second test terminal, and applying different DC test voltages to the first test terminal and the second test terminal again, which helps to reduce the difficulty of obtaining the breakdown voltage value.
[0138] More specifically, in the step of determining whether the current value per unit area of the first dielectric layer 130 is greater than or equal to the breakdown current value, if the current value per unit area of the first dielectric layer 130 is greater than or equal to 100 pA / μm 2 If so, it is determined that the current value per unit area of the first dielectric layer 130 is greater than or equal to the breakdown current value.
[0139] If the current per unit area of the first dielectric layer 130 is greater than or equal to 100 pA / μm 2If the current value per unit area of the first dielectric layer 130 is greater than or equal to the breakdown current value, it is helpful to reduce the difficulty of determining whether the first dielectric layer 130 has been broken down based on the current value per unit area of the first dielectric layer 130.
[0140] In this embodiment, the substrate 100 contains type I doped ions; the test structure further includes: a well region 103 located in the substrate 100, the well region 103 containing type II doped ions, the type of which is opposite to that of the type I doped ions; a first isolation structure 102 located in the well region 103; and a first doped region 104 located in the well region 103 and surrounding the first isolation structure 102, the first doped region 104 containing type II doped ions, and the doped ion concentration in the first doped region 104 being greater than that in the well region 103. Ion concentration, the first doped region 104 serves as the third test terminal or is electrically connected to the third test terminal; wherein, the first electrode 110 and the second electrode 120 are both located on the first isolation structure 102; in the step of applying different DC test voltages to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer 130, a second scan voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is grounded, or, a second scan voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is grounded.
[0141] The second scanning voltage refers to scanning the voltage applied to the first test terminal or the second test terminal from the first voltage value to the second voltage value according to a predetermined step voltage.
[0142] In the step of obtaining the breakdown voltage value of the first dielectric layer 130, grounding the third test terminal is beneficial to exporting excess charge at the bottom of the first electrode 110 and the second electrode 120 through the third test terminal, thereby further reducing the impact of substrate 100 noise on the test structure.
[0143] In other embodiments, in the step of applying different DC test voltages to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer, a second scanning voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is floated; or, a second scanning voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is floated.
[0144] refer to Figures 4 to 6 and in conjunction with references Figures 1 to 2Step S2: Determine whether the value of the electrical parameter meets the preset requirements. If yes, determine that the first dielectric layer 130 meets the quality requirements; otherwise, determine that the first dielectric layer 130 does not meet the quality requirements.
[0145] The electrical parameters between the first test terminal and the second test terminal are obtained, and the quality of the first dielectric layer 130 is obtained based on the electrical parameters between the first test terminal and the second test terminal. This facilitates quality monitoring of the first dielectric layer 130 between the first electrode 110 and the second electrode 120, and also helps to obtain the quality of the semiconductor structure, thereby facilitating the improvement of the semiconductor manufacturing process.
[0146] It is understood that when the electrical parameter includes the capacitance value per unit area of the first dielectric layer 130, the step of determining whether the value of the electrical parameter meets the preset requirements includes determining whether the capacitance value per unit area of the first dielectric layer 130 meets the preset requirements. When the electrical parameter includes the electrical thickness value of the first dielectric layer 130, the step of determining whether the value of the electrical parameter meets the preset requirements includes determining whether the electrical thickness of the first dielectric layer 130 meets the preset requirements. When the electrical parameter includes the breakdown voltage value of the first dielectric layer 130, the step of determining whether the value of the electrical parameter meets the preset requirements includes determining whether the breakdown voltage value of the first dielectric layer 130 meets the preset requirements.
[0147] In this embodiment, the testing method further includes: obtaining the physical thickness of the first dielectric layer 130; in the step of determining whether the value of the electrical parameter meets the preset requirements, if both the physical thickness of the first dielectric layer 130 and the electrical parameter meet the preset requirements, then the first dielectric layer 130 is determined to meet the quality requirements; otherwise, the first dielectric layer 130 is determined to not meet the quality requirements.
[0148] The testing method further includes obtaining the physical thickness of the first dielectric layer 130. In the step of determining whether the value of the electrical parameter meets the preset requirements, it also determines whether the physical thickness of the first dielectric layer 130 meets the preset requirements, which increases the evaluation dimension of the quality of the first dielectric layer 130, thereby facilitating a more comprehensive evaluation of the quality of the first dielectric layer 130.
[0149] It is understood that when the electrical parameters include the electrical thickness value of the first dielectric layer 130, the electrical thickness of the first dielectric layer 130 can also be compared with the physical thickness of the first dielectric layer 130, thereby making it more effective to comprehensively evaluate the quality of the first dielectric layer 130.
[0150] Specifically, the physical thickness of the first dielectric layer 130 is obtained through online optical measurement.
[0151] Because the test structure of this embodiment is relatively simple, it is not easily affected by other semiconductor structures (e.g., memory arrays) during online optical measurement, thereby facilitating the acquisition of the physical thickness of the first dielectric layer 130 through online optical measurement.
[0152] More specifically, the step of obtaining the physical thickness of the first dielectric layer 130 by online optical measurement includes: obtaining the sum of the physical thicknesses of the first electrode 110 and the first dielectric layer 130, or obtaining the sum of the physical thicknesses of the second electrode 120 and the first dielectric layer 130; obtaining the physical thickness of the first electrode 110, or obtaining the physical thickness of the second electrode 120; obtaining the physical thickness of the first dielectric layer 130 based on the sum of the physical thicknesses of the first electrode 110 and the first dielectric layer 130, and the physical thickness of the first electrode 110, or obtaining the physical thickness of the first dielectric layer 130 based on the sum of the physical thicknesses of the second electrode 120 and the first dielectric layer 130, and the physical thickness of the second electrode 120.
[0153] The physical thickness refers to the thickness in the direction perpendicular to the extension direction of the first electrode 110.
[0154] As an example, based on the formula THK gap oxide =THK D+E -THK D The physical thickness of the first dielectric layer 130 is obtained; wherein, THK D+E The sum of the physical thicknesses of the first electrode 110 and the first dielectric layer 130, THK D The physical thickness of the first electrode 110, THK gap oxide The physical thickness of the first dielectric layer 130.
[0155] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A test structure, characterized in that, include: Base; A first electrode is located on the substrate, and the first electrode serves as a first test terminal or is electrically connected to a first test terminal. The second electrode is located on the substrate on the side of the first electrode, and the second electrode serves as a second test terminal or is electrically connected to the second test terminal. A first dielectric layer is located between the first electrode and the second electrode.
2. The test structure as described in claim 1, characterized in that, The test structure further includes: a first isolation structure located in the substrate; Both the first electrode and the second electrode are located on the first isolation structure.
3. The test structure as described in claim 2, characterized in that, The substrate contains type I doped ions; the test structure further includes a well region located in the substrate, the well region containing type II doped ions, the type of which is opposite to that of the type I doped ions; The first isolation structure is located in the well region.
4. The test structure as described in claim 3, characterized in that, The test structure further includes: a first doped region located in the well region and surrounding the first isolation structure, the first doped region having second type doped ions, and the doped ion concentration in the first doped region being greater than the doped ion concentration in the well region, the first doped region serving as a third test terminal or electrically connected to the third test terminal.
5. The test structure as described in claim 4, characterized in that, The test structure further includes a third plug located on the first doped region, one end of which is electrically connected to the first doped region and the other end of which is electrically connected to the third test terminal.
6. The test structure as described in claim 5, characterized in that, There are multiple third plugs, and multiple third plugs are electrically connected to the same third test terminal.
7. The test structure as described in claim 3, characterized in that, The first type of doped ion is a P-type ion, and the second type of doped ion is an N-type ion.
8. The test structure as described in claim 1, characterized in that, The test structure also includes: A first plug is located on the first electrode, with one end of the first plug electrically connected to the first electrode and the other end electrically connected to the first test terminal; The second plug is located on the second electrode, with one end of the second plug electrically connected to the second electrode and the other end electrically connected to the second test terminal.
9. The test structure as described in claim 8, characterized in that, There are multiple first plugs, and multiple first plugs are electrically connected to the same first test terminal; there are multiple second plugs, and multiple second plugs are electrically connected to the same second test terminal.
10. The test structure as described in claim 1, characterized in that, The first electrode includes a floating gate, and the second electrode includes a select gate.
11. The test structure as described in claim 1, characterized in that, The material of the first electrode includes one or two of metal and polycrystalline silicon; the material of the second electrode includes one or two of metal and polycrystalline silicon.
12. The test structure as described in claim 1, characterized in that, The material of the first dielectric layer includes one or more of silicon oxide, silicon nitride, low-k dielectric materials, and ultra-low-k dielectric materials.
13. The test structure as described in claim 1, characterized in that, The test structure further includes a second dielectric layer located between the substrate and the first electrode, between the substrate and the second electrode, and between the substrate and the first dielectric layer.
14. A testing method, characterized in that, Suitable for testing using the test structure as described in any one of claims 1 to 13, the test method comprising: Different test voltages are applied to the first test terminal and the second test terminal respectively to obtain the values of the electrical parameters between the first test terminal and the second test terminal; Determine whether the value of the electrical parameter meets the preset requirements. If yes, determine that the first dielectric layer meets the quality requirements; otherwise, determine that the first dielectric layer does not meet the quality requirements.
15. The test method as described in claim 14, characterized in that, The electrical parameters include one or more of the following: capacitance per unit area of the first dielectric layer, electrical thickness of the first dielectric layer, and breakdown voltage of the first dielectric layer.
16. The test method as described in claim 15, characterized in that, When the electrical parameter includes the capacitance value per unit area of the first dielectric layer, the step of applying different test voltages to the first test terminal and the second test terminal respectively to obtain the value of the electrical parameter between the first test terminal and the second test terminal includes: Different AC test voltages are applied to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer; The capacitance value per unit area of the first dielectric layer is obtained based on the capacitance value of the first dielectric layer and the area value of the first dielectric layer directly opposite the first electrode and the second electrode.
17. The test method as described in claim 16, characterized in that, The substrate contains type I doped ions; the test structure further includes: a well region located in the substrate, the well region containing type II doped ions, the type of which is opposite to that of the type I doped ions; a first isolation structure located in the well region; a first doped region located in the well region and surrounding the first isolation structure, the first doped region containing type II doped ions, and the doped ion concentration in the first doped region being greater than that in the well region, the first doped region serving as a third test terminal or electrically connected to a third test terminal; wherein, both the first electrode and the second electrode are located on the first isolation structure; In the step of applying different AC test voltages to the first test terminal and the second test terminal respectively to obtain the capacitance value of the first dielectric layer, a first scanning voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is floated or grounded; or, a first scanning voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is floated or grounded, wherein the first scanning voltage is the maximum operating voltage of the semiconductor device.
18. The test method as described in claim 16, characterized in that, When the electrical parameters also include the electrical thickness of the first dielectric layer, after obtaining the capacitance value of the first dielectric layer, the method further includes: obtaining the electrical thickness of the first dielectric layer based on the capacitance value of the first dielectric layer and the area value of the first dielectric layer facing each other between the first electrode and the second electrode. The step of determining whether the value of the electrical parameter meets the preset requirements includes: determining whether the electrical thickness of the first dielectric layer meets the preset requirements.
19. The test method as described in claim 15, characterized in that, When the electrical parameter includes the breakdown voltage value of the first dielectric layer, the step of applying different test voltages to the first test terminal and the second test terminal respectively, and obtaining the value of the electrical parameter between the first test terminal and the second test terminal includes: Different DC test voltages are applied to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer.
20. The test method as described in claim 19, characterized in that, The steps for obtaining the breakdown voltage value include: Obtain the current value between the first test terminal and the second test terminal; Based on the current value between the first test terminal and the second test terminal, and the area value of the first dielectric layer directly opposite the first electrode and the second electrode, the current value per unit area of the first dielectric layer is obtained. Determine whether the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value; If so, the absolute value of the difference between the test voltage values applied to the first test terminal and the second test terminal corresponding to the current value per unit area of the first dielectric layer shall be taken as the breakdown voltage value of the first dielectric layer. Otherwise, return to the step of applying different DC test voltages to the first test terminal and the second test terminal respectively, increase the voltage difference between the first test terminal and the second test terminal, and apply different DC test voltages to the first test terminal and the second test terminal again respectively.
21. The test method as described in claim 20, characterized in that, In the step of determining whether the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value, if the current value per unit area of the first dielectric layer is greater than or equal to 100 pA / μm 2 If the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value, then it is determined that the current value per unit area of the first dielectric layer is greater than or equal to the breakdown current value.
22. The test method as described in claim 19, characterized in that, The substrate contains type I doped ions; the test structure further includes: a well region located in the substrate, the well region containing type II doped ions, the type of which is opposite to that of the type I doped ions; a first isolation structure located in the well region; a first doped region located in the well region and surrounding the first isolation structure, the first doped region containing type II doped ions, and the doped ion concentration in the first doped region being greater than that in the well region, the first doped region serving as a third test terminal or electrically connected to a third test terminal; wherein, both the first electrode and the second electrode are located on the first isolation structure; In the step of applying different DC test voltages to the first test terminal and the second test terminal respectively to obtain the breakdown voltage value of the first dielectric layer, a second scanning voltage is applied to the first test terminal, the second test terminal is grounded, and the third test terminal is floated or grounded; or, a second scanning voltage is applied to the second test terminal, the first test terminal is grounded, and the third test terminal is floated or grounded.
23. The test method as described in claim 14, characterized in that, The testing method further includes: obtaining the physical thickness of the first dielectric layer; In the step of determining whether the value of the electrical parameter meets the preset requirements, if both the physical thickness of the first dielectric layer and the electrical parameter meet the preset requirements, then the first dielectric layer is determined to meet the quality requirements; otherwise, the first dielectric layer is determined to not meet the quality requirements.
24. The test method as described in claim 23, characterized in that, The physical thickness of the first dielectric layer is obtained through online optical measurement.