System and method for adaptive switching control in power conversion systems

Abstract

This disclosure relates to systems and methods for adaptive switching control in power conversion systems. In one embodiment, the technology provides an apparatus comprising a first comparator coupled to an input terminal and configured to compare an input signal with a first threshold and generate a first signal in response to the input signal exceeding the first threshold. The apparatus further comprises a first circuit coupled to the first comparator. The first circuit is configured to initiate a first interval in response to the first signal. A second comparator is configured to generate a second signal based on a comparison between the input signal and the second threshold. The first circuit is configured to adjust the first interval based on the second signal. By adaptively adjusting the control timing based on signal conditions, the apparatus enables improved switching performance and reduced conduction losses in power control applications. Other embodiments also exist.

Description

[0001] Cross-referencing related applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 738,889, filed December 26, 2024, which is jointly owned and is incorporated herein by reference for all purposes. Technical Field

[0003] This disclosure generally relates to electronic circuits. Background Technology

[0004] Switching circuits are widely used in power conversion systems such as rectifiers, inverters, wireless power receivers, and / or the like. These systems typically rely on one or more transistors that are selectively activated to control current conduction or regulate voltage levels. Accurate control of the switching behavior of such transistors is beneficial for improving power efficiency and avoiding undesirable conduction modes, such as body diode conduction or reverse current flow.

[0005] In many applications, the timing of switching events (whether turning transistors on or off) can be based on a comparison between a monitored input signal (e.g., an AC voltage waveform) and a reference threshold. However, precise control of switching timing remains challenging due to variations in operating conditions, component tolerances, and inherent propagation delays associated with circuit components. Timing inaccuracies can lead to increased conduction losses, unwanted diode conduction, or undesirable current paths. These effects become more pronounced in high-speed or high-frequency systems, where even small timing errors can significantly degrade system performance.

[0006] Various methods have been explored to improve timing control in switching systems, but these methods have proven insufficient. It is important to recognize the need for new and improved systems and methods. Summary of the Invention

[0007] In one aspect, this disclosure relates to an apparatus comprising: an input terminal configured to receive an input signal; a first comparator coupled to the input terminal and configured to compare the input signal with a first threshold and generate a first signal in response to the input signal exceeding the first threshold; a first circuit coupled to the first comparator and configured to initiate a first interval in response to the first signal and provide a control signal after the first interval has elapsed; and a second comparator coupled to the input terminal and configured to compare the input signal with a second threshold and generate a second signal based on the comparison between the input signal and the second threshold; wherein the first circuit is further configured to adjust the first interval at least based on the second signal.

[0008] In another aspect, this disclosure relates to an apparatus comprising: an input terminal configured to receive an input signal; a first comparator coupled to the input terminal and configured to compare the input signal with a first threshold and generate a first signal in response to the input signal exceeding the first threshold; a first circuit coupled to the first comparator and configured to initiate a first interval in response to the first signal; and a second comparator coupled to the input terminal and configured to compare the input signal with a second threshold and generate a second signal based on the comparison between the input signal and the second threshold, the second threshold being greater than the first threshold; wherein the first circuit is further configured to adjust the first interval at least based on the second signal.

[0009] In another aspect, this disclosure relates to an apparatus comprising: an input terminal configured to receive an input signal; a first circuit coupled to the input terminal and configured to provide a control signal at least based on the input signal; a driver coupled to the first circuit and configured to receive the control signal; a first transistor coupled to the driver, the driver being configured to activate the first transistor in response to the control signal; and a second transistor coupled in parallel with the first transistor, the second transistor being configured to be activated after the first transistor. Attached Figure Description

[0010] A further understanding of the nature and advantages of particular embodiments can be achieved by referring to the remainder of the specification and the drawings, in which similar reference numerals are used to refer to similar components. In some instances, sublabels are associated with reference numerals to indicate one of a plurality of similar components. When a reference numeral is mentioned without specifically referring to an existing sublabel, it is intended to refer to all such plurality of similar components.

[0011] Figure 1 This is a circuit diagram illustrating various embodiments of a rectifier according to the present technology.

[0012] Figure 2 This is a schematic diagram illustrating various embodiments of a timing control circuit for adaptive switching according to the present technology.

[0013] Figure 3 This is a timing diagram illustrating the switching behavior in default mode and under adaptive turn-on control according to various embodiments of the present technology.

[0014] Figure 4 This is a circuit diagram illustrating various embodiments of a rectifier according to the present technology. Detailed Implementation

[0015] This technology relates to electronic circuits. In an embodiment, this technology provides a device including an input terminal configured to receive an input signal. The device further includes a first comparator coupled to the input terminal and configured to compare the input signal with the first threshold and generate a first signal in response to the input signal exceeding the first threshold. The device further includes a first circuit coupled to the first comparator. The first circuit is configured to initiate a first interval in response to the first signal and generate a control signal after the first interval expires. The device also includes a second comparator coupled to the input terminal. The second comparator is configured to compare the input signal with the second threshold and generate a second signal based on the comparison between the input signal and the second threshold. The first circuit is further configured to adjust the first interval at least based on the second signal. By adaptively adjusting the control timing based on signal conditions, the device enables improved switching performance and reduced conduction losses in power control applications. Other embodiments also exist.

[0016] The following description is presented to enable those skilled in the art to make and use the invention and to incorporate it into the context of a particular application. Various modifications and uses in different applications will be apparent to those skilled in the art, and the general principles defined herein can be applied to a wide range of embodiments. Therefore, it is not intended to limit the technology to the presented embodiments, but rather to embody the widest scope consistent with the principles and novel features disclosed herein.

[0017] In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the art. However, those skilled in the art will appreciate that the art can be practiced without being limited to these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring the art.

[0018] Readers should note all papers and documents presented concurrently with and made available for public review with this specification, the contents of which are incorporated herein by reference. Unless otherwise expressly stated, all features disclosed in this specification (including any appended claims, abstracts, and drawings) may be replaced by alternative features for the same, equivalent, or similar purposes. Therefore, unless otherwise expressly stated, each disclosed feature is merely one instance of a series of classifiable equivalents or similar features.

[0019] Furthermore, any element in the technical solution that does not expressly state "for" performing the prescribed function or "for" performing a particular function should not be construed as a "component" or "step" as defined in Section 6 of Chapter 112 of 35 USC. Specifically, the use of "...step" or "...action" in the claims herein is not intended to invoke Section 6 of 35 U.S.C. 112.

[0020] When an element is referred to herein as “connected” or “coupled” to another element, it should be understood that the element may be directly connected to the other element, or that there may be an intervening element between the elements. Conversely, when an element is referred to as “directly connected” or “directly coupled” to another element, it should be understood that there is no intervening element in the “direct” connection between the elements. However, the presence of a direct connection does not preclude the possibility of other connections in which intervening elements may be present.

[0021] Furthermore, the terms left, right, front, back, top, bottom, forward, reverse, clockwise, and counterclockwise are used for interpretive purposes only and are not limited to any fixed direction or orientation. Rather, they are used only to indicate the relative position and / or orientation between various parts of an object and / or component.

[0022] Furthermore, the methods and processes described herein may be presented in a particular order for ease of description. However, it should be understood that, unless the context otherwise requires, intervention procedures may occur before and / or after any part of the described process, and various other procedures may be reordered, added, and / or omitted according to various embodiments.

[0023] Unless otherwise indicated, all figures used herein to express quantity, size, etc., should be understood to be modified by the term "approximately" in all instances. In this application, unless specifically stated otherwise, the use of the singular includes the plural; and unless otherwise indicated, the use of the terms "and" and "or" means "and / or". Furthermore, the use of the terms "including" and "having," as well as other forms (e.g., "includes," "included," "has," "have," and "had"), should be considered non-exclusive. And, unless specifically stated otherwise, terms such as "element" or "component" cover both elements and components comprising one unit and elements and components comprising more than one unit.

[0024] As used herein, the phrase “at least one of…” following a list of items (where each item is separated by the terms “and” or “or”) modifies the entire list, not each member of the list (i.e., each item). The phrase “at least one of…” does not require selection of at least one of each of the listed items; rather, the phrase allows for the inclusion of at least one of any of the items and / or at least one of any combination of the items. By way of example, the phrases “at least one of A, B, and C” or “at least one of A, B, or C” each refer to only A, only B, or only C; and / or any combination of A, B, and C. In instances where a selection is intended from “at least one of each of A, B, and C” or alternatively “at least one of A, at least one of B, and at least one of C”, this will be explicitly stated.

[0025] One general aspect includes an apparatus comprising an input terminal configured to receive an input signal. The apparatus further includes a first comparator coupled to the input terminal and configured to compare the input signal with the first threshold and generate a first signal in response to the input signal exceeding the first threshold. The apparatus further includes first circuitry coupled to the first comparator and configured to initiate a first interval in response to the first signal and generate a control signal after the first interval has elapsed. The apparatus further includes a second comparator coupled to the input terminal and configured to compare the input signal with the second threshold and generate a second signal based on the comparison between the input signal and the second threshold. The first circuitry is further configured to adjust the first interval at least based on the second signal.

[0026] The implementation may include one or more of the following features: The input signal includes an alternating current (AC) component. The device further includes a driver coupled to the first circuit and configured to receive a control signal. The device further includes a first transistor coupled to the driver, the driver being configured to activate the first transistor in response to the control signal. The device further includes a second transistor coupled in parallel with the first transistor, the second transistor being configured to be activated after the first transistor. A second threshold is greater than a reference voltage associated with the rectified output. The first circuit is configured to increase a first interval in response to a second signal indicating that the input signal is below the second threshold. The first circuit is configured to decrease the first interval in response to a second signal indicating that the input signal exceeds the second threshold. The second threshold is greater than the first threshold.

[0027] According to another embodiment, the present technology provides an apparatus including an input terminal configured to receive an input signal. The apparatus further includes a first comparator coupled to the input terminal and configured to compare the input signal with the first threshold and generate a first signal in response to the input signal exceeding the first threshold. The apparatus further includes a first circuit coupled to the first comparator and configured to initiate a first interval in response to the first signal. The apparatus further includes a second comparator coupled to the input terminal and configured to compare the input signal with the second threshold and generate a second signal based on the comparison between the input signal and the second threshold, the second threshold being greater than the first threshold. The first circuit is further configured to adjust the first interval at least based on the second signal.

[0028] The implementation may include one or more of the following features. The device further includes a driver coupled to a first circuit configured to provide a control signal to the driver after a first interval has elapsed. The device further includes a first transistor coupled to the driver, the driver configured to activate the first transistor in response to the control signal. A second threshold is greater than a reference voltage associated with the rectified output. The first circuit is configured to decrease the first interval in response to a second signal indicating that an input signal exceeds the second threshold. The first circuit is configured to increase the first interval in response to a second signal indicating that an input signal is below the second threshold.

[0029] According to another embodiment, the present technology provides an apparatus including an input terminal configured to receive an input signal. The apparatus further includes a first circuit coupled to the input terminal and configured to provide a control signal at least based on the input signal. The apparatus further includes a driver coupled to the first circuit and configured to receive the control signal. The apparatus further includes a first transistor coupled to the driver, the driver being configured to activate the first transistor in response to the control signal. The apparatus further includes a second transistor coupled in parallel with the first transistor, the second transistor being configured to be activated after the first transistor. In some embodiments, the input signal includes an alternating current (AC) component. The apparatus further includes a first comparator coupled to the input terminal and the first circuit, the first comparator being configured to compare the input signal with the first threshold and generate a first signal in response to the input signal exceeding the first threshold. The first circuit is configured to initiate a first interval in response to the first signal and generate a control signal after the first interval expires. The apparatus further includes a second comparator coupled to the input terminal and configured to compare the input signal with the second threshold and generate a second signal based on the comparison between the input signal and the second threshold.

[0030] Figure 1 This is a circuit diagram illustrating various embodiments of a rectifier 100 according to the present technology. This diagram is provided by way of example only and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications.

[0031] In various implementations, rectifier 100 can be configured to convert an input alternating current (AC) signal into a regulated direct current (DC) output voltage. Rectifier 100 can be used in a wide range of applications, such as wireless power transmission systems, power adapters, battery charging systems, power management integrated circuits (PMICs), electric vehicles, and / or the like. For example, the term "rectifier" can refer to a circuit or system configured to convert AC power into DC power. Rectifiers can be implemented using diodes, transistors, and / or other switching devices, and can be passive or actively controlled. Examples of rectifiers include, but are not limited to, synchronous rectifiers, diode-based rectifiers, transistor-based rectifiers, hybrid rectifiers, and / or the like.

[0032] As an example, rectifier 100 may be configured to receive an input signal via coil 104. For example, the term "input signal" may refer to an electrical signal that can be received and processed by the device, including but not limited to analog signals, digital signals, AC signals, DC signals, and / or the like. In some cases, the input signal may contain an alternating current component. For example, the term "alternating current" or "alternating current component" may refer to a signal whose magnitude and / or polarity change periodically over time. For example, the input signal may originate from an external AC source and may contain one or more waveform components, such as a sine wave, a triangle wave, a square wave, or a modulated waveform. Rectifier 100 may be configured to convert the AC input signal into a DC output voltage (e.g., VRECT) suitable for powering a downstream DC load, such as a load capacitor (e.g., CLOAD), a load resistor (e.g., RLOAD), and / or other electronic devices or circuits.

[0033] In some embodiments, rectifier 100 may be implemented in a full-bridge configuration, which may include one or more switching elements (e.g., transistors) arranged in a bridge layout to convert the positive and negative halves of an AC input signal into a uniform DC output voltage. For example, rectifier 100 may include a first transistor 101a (e.g., HS1), a second transistor 101b (e.g., HS2), a third transistor 101c (e.g., LS1), and a fourth transistor 101d (e.g., LS2). For example, the term "transistor" may refer to a semiconductor device that controls the flow of current in an electronic circuit. Examples of transistors may include, but are not limited to, bipolar junction transistors (BJTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), laterally diffused metal-oxide-semiconductor transistors (LDMOS), junction field-effect transistors (JFETs), and / or the like. In some embodiments, the first transistor 101a and the second transistor 101b may be referred to as high-side switches, and the third transistor 101c and the fourth transistor 101d may be referred to as low-side switches.

[0034] In various implementations, rectifier 100 can operate by selectively activating transistor pairs in a complementary manner to route the AC input signal through the positive and negative half-cycles of a common load to generate a DC output. For example, during the positive half-cycle of the AC input signal (e.g., when the voltage at one terminal of coil 104 is higher than the other), high-side transistor 101a (e.g., HS1) and the corresponding low-side transistor 101d (e.g., LS2) can be activated to conduct current from coil 104 through the load. During the negative half-cycle (e.g., when voltage polarity is reversed), high-side transistor 101b (e.g., HS2) and low-side transistor 101c (e.g., LS1) can be activated to conduct current in the opposite direction, thereby generating a DC output voltage.

[0035] In some instances, rectifier 100 may further include one or more comparators. For example, a first comparator 103a may be coupled to a first transistor 102a. A second comparator 103b may be coupled to a second transistor 102b. For example, the term "comparator" may refer to an electronic device that compares two input voltages or signals and generates an output signal based on the comparison. Examples of comparators may include, but are not limited to, operational amplifiers, differential comparators, CMOS comparators, and / or the like. In some instances, the comparators (e.g., first comparator 103a and comparator 103b) may be coupled to the gate of a high-side transistor (e.g., first transistor 102a and second transistor 102b) and configured to determine the timing of transistor activation based on the voltage and / or current conditions at a monitoring coil node, thereby controlling the switching behavior of rectifier 100.

[0036] However, precise switching control remains challenging due to inherent delays and propagation times within the circuit, leading to unintended conduction of intrinsic body diodes (e.g., diodes 102a to 102d) during short intervals. This undesirable conduction interval—often referred to as "diode time"—occurs when the coil node voltage exceeds the rectified DC output voltage level before the corresponding transistor is fully turned on. During diode time, the body diode becomes forward biased and conducts current, introducing additional power losses characterized by the diode forward voltage (e.g., Vf) multiplied by the diode conduction current (e.g., Id). The body diode current also results in current flowing through parasitic vertical PNP devices, which is an additional loss term characterized by the rectified DC output voltage multiplied by the parasitic collector current (e.g., Ic, pnp). These diode-related losses negatively impact overall system efficiency, especially at higher switching frequencies and higher rectified DC output voltages. Therefore, reducing diode time through improved switching control is beneficial for minimizing conduction losses and improving the efficiency of the power conversion system.

[0037] In various implementations, diode time can be affected by multiple delay sources within the control path. For example, delay sources may include propagation delays associated with the comparator, latency introduced by logic circuitry, level shifting circuitry, non-overlapping logic (NOL), pre-driver response delays, and / or transistor gate switching characteristics. Each of these sources can cumulatively cause a delay between the detection of a threshold voltage condition and the activation / deactivation of the transistor, thereby increasing diode time. Furthermore, delays can vary based on factors such as temperature, load conditions, supply voltage fluctuations, or device aging. Effectively reducing or compensating for these delays is desirable for shortening diode time and improving overall rectifier efficiency.

[0038] Figure 2 This is a schematic diagram illustrating a timing control circuit 200 for adaptive switching according to various embodiments of the present technology. This drawing is merely illustrative and should not unduly limit the scope of the claims. Many variations, alternatives, and modifications will be recognized by those skilled in the art.

[0039] In some implementations, circuit 200 may be a rectifier system (e.g., Figure 1 As part of a rectifier 100, and configurable to facilitate adaptive switching control of one or more switching elements (e.g., high-side transistors) based on real-time signal conditions. For example, the term "adaptive switching control" can refer to a control mechanism that dynamically adjusts the timing or behavior of switch activation or deactivation based on sensed or calculated parameters from the system. In some instances, circuit 200 can be used to fine-tune the timing of the turn-on or turn-off events of power transistors in response to changes in the AC input signal, which helps reduce conduction losses and minimize diode time.

[0040] In various embodiments, circuit 200 may include input terminal 201, which may be configured to receive an input signal. For example, the input signal received at input terminal 201 may include a portion of an alternating current (AC) waveform or a node voltage, such as from a rectifier circuit (e.g., Figure 1 The coil node voltage of the rectifier 100. In some cases, the input signal may exhibit periodic AC behavior and can be used as a reference for timing comparison.

[0041] According to a particular embodiment, circuit 200 may further include a first comparator 203 coupled to input terminal 201. For example, the first comparator 203 may be configured to compare an input signal with a first threshold and generate a first signal in response to the input signal exceeding the first threshold. For example, the term "threshold" or "voltage threshold" may refer to a voltage level used as a comparison reference for determining control conditions. Depending on the embodiment, the threshold may be fixed, programmable, or dynamically adjustable. In some instances, the first threshold may correspond to a small fraction of the rectified output voltage (e.g., 0.5 * VRECT). For example, the term "rectified output voltage" or "rectified output" may refer to a DC voltage or current generated by a rectifier circuit as a result of converting an AC input signal. Depending on the rectifier configuration, the rectified output may be a full-wave or partial waveform. When the input signal exceeds the first threshold, comparator 203 may generate a first signal to indicate a baseline switching condition.

[0042] In various instances, circuit 200 may further include a first circuit 204 that can be coupled to the first comparator 203. The first circuit 204 may be configured to initiate a first interval in response to a first signal and generate a control signal after the first interval has elapsed. For example, the term "interval" or "time interval" may refer to a predefined or programmable time period that elapses between two events (e.g., between detecting a signal threshold exceeding and generating a subsequent control signal). Depending on the implementation, the first interval may be fixed, programmable, or dynamically adjusted based on real-time operating conditions. In some instances, the first interval may be used to align control actions (e.g., turning transistors on or off) with optimal circuit conditions to reduce conduction losses, compensate for inherent latency (e.g., diode time), or avoid premature switching. For example, the first interval may take into account propagation delay, pre-driver response time, and / or transient behavior in the power unit. In some cases, the first interval may be implemented using a digital counter, analog delay circuitry, programmable delay line, state machine, and / or the like.

[0043] According to some embodiments, circuit 200 may further include a second comparator 202 that can be coupled to input terminal 201. The second comparator 202 may be configured to compare the input signal with a second threshold and generate a second signal based on the comparison between the input signal and the second threshold. In some cases, the second threshold may be greater than a reference voltage (e.g., VRECT) associated with the rectified output. The term "reference voltage" may refer to a voltage level used as a baseline or comparison point in signal processing. For example, the second threshold may correspond to a voltage slightly higher than the rectified output voltage (e.g., VRECT + 35 mV), which can be used to detect the onset of unwanted body diode conduction.

[0044] When the input signal exceeds a second threshold, the second comparator 202 can generate a signal indicating the timing of diode conduction. In some cases, the second signal can be provided as feedback to the first circuit 204 to modify the first interval. For example, the first circuit 204 can be configured to increase the first interval in response to the second signal indicating that the input signal is below the second threshold (e.g., indicating delayed diode conduction). In other aspects, the first circuit 204 can be configured to decrease the first interval in response to the second signal indicating that the input signal exceeds the second threshold (e.g., indicating earlier diode conduction).

[0045] In various embodiments, different techniques can be used to implement the adjustment of the first interval, such as linear scaling based on the amplitude of the second signal, nonlinear mapping functions, predefined adjustment values ​​stored in a lookup table, and / or the like. The adjustment process may take into account a variety of real-time or historical parameters, including but not limited to the magnitude and rate of change of the second signal, historical patterns of comparator activity, system temperature, load current, supply voltage, overall power demand, and / or the like.

[0046] In some implementations, a control signal generated by the first circuit 204 after the first interval has elapsed can be used to selectively activate or deactivate switching elements, such as turning on or off transistors, MOSFETs, or other semiconductor devices in a rectifier circuit, a DC-DC converter, or other power conversion system. For example, the control signal can be provided to a gate driver, transistor gate terminal, or pre-driver circuit to coordinate device switching with real-time signal conditions.

[0047] In certain embodiments, one or more comparators (e.g., first comparator 203 and / or second comparator 202) may be configured with adjustable propagation delay characteristics. For example, the comparators (e.g., first comparator 203 and / or second comparator 202) can support configurable propagation delay by modifying their internal bias current levels. In some aspects, a predictive timer or a slower comparator may be used to adjust the bias current in anticipation of an upcoming switching event. For example, when the input signal voltage approaches a switching threshold (e.g., a fraction of the rectified output voltage (e.g., VRECT / 2)), the comparator bias current may be increased to reduce propagation delay and improve responsiveness immediately preceding the switching event. Subsequently, after the switching event is complete, the bias current may be reduced to increase propagation delay and minimize power consumption. This enables rapid response when needed while conserving energy during idle periods or steady-state operation. Depending on the implementation, this dynamic configuration may be controlled based on predetermined conditions, real-time voltage thresholds, or historical switching patterns, and may be applied to both turn-on and turn-off transitions.

[0048] In some implementations, circuit 200 can perform real-time calibration of one or more thresholds (e.g., a first threshold and / or a second threshold). For example, the voltage threshold used for earlier switching can be periodically calibrated in real time by initially setting the comparator threshold slightly higher than the output voltage (e.g., approximately 100 mV higher than the rectified output voltage) and then gradually decreasing this threshold until the comparator no longer triggers prematurely. Additionally, duty cycle control of the comparators (e.g., first comparator 203 and / or second comparator 202) can be implemented to save power, since continuous monitoring during each switching cycle may not be necessary. This threshold calibration and power-saving comparator operation scheme can further improve switching performance and efficiency.

[0049] It should be understood that the adaptive switching control mechanism implemented by circuit 200 enables dynamic adjustment of the switching timing of power transistors or other switching elements based on real-time circuit conditions. By modifying the timing interval in response to threshold comparisons, circuit 200 adaptively adjusts the timing of transistor activation to preemptively compensate for anticipated delays associated with diode conduction intervals (e.g., diode timing), thereby optimizing the overall efficiency of the power conversion system. In some implementations, this adaptive adjustment can be performed across multiple switching cycles, allowing circuit 200 to converge toward an ideal timing point and continuously fine-tune delays in response to changing operating conditions such as load variations, temperature changes, or component aging.

[0050] Figure 3This is a timing diagram 300 illustrating the switching behavior in default mode and under adaptive turn-on control according to various embodiments of the present technology. This diagram is merely illustrative and should not unduly limit the scope of the claims. Many variations, alternatives, and modifications will be recognized by those skilled in the art.

[0051] In various implementation schemes, timing diagram 300 depicts the power conversion system operating under different control schemes (e.g., Figure 1 The voltage waveform associated with the switching behavior of the rectifier 100. For example, timing diagram 300 illustrates the waveforms in the following cases: (1) a default switching mode with a fixed delay or control threshold; and (2) an adaptive switching mode based on an adaptive timing control mechanism (e.g., by...). Figure 2 (Circuit 200 implementation). The vertical axis represents voltage (V) and the horizontal axis represents time.

[0052] In some embodiments, the default mode waveform may indicate switching events that occur at fixed time intervals relative to a threshold exceedance. Due to these fixed intervals, the switching may not be optimally aligned with actual circuit conditions, resulting in unintended diode conduction cycles (e.g., diode time). As shown, a default mode switching event may cause a small peak in the output waveform before the main transition. This peak may indicate a brief conduction through the body diode before activating the corresponding power transistor, which introduces additional power losses and reduces efficiency.

[0053] In contrast, adaptive switching mode improves switching performance by dynamically adjusting the switching interval based on real-time threshold comparisons. By shortening or lengthening the switching interval in response to detected conditions, adaptive control essentially reduces or eliminates diode conduction spacing, thereby improving the overall efficiency and performance of the circuit. In some cases, adaptive switching control can be repeated over multiple cycles to incrementally fine-tune the timing interval to compensate for changing conditions such as component variations, temperature fluctuations, load changes, device aging, and / or the like.

[0054] Figure 4 This is a circuit diagram illustrating various embodiments of a rectifier 400 according to the present technology. This diagram is provided by way of example only and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications.

[0055] In various implementations, rectifier 400 may be configured to receive an AC input signal via coil 403 and convert the AC signal into a rectified DC output voltage (e.g., VRECT). In some instances, coil 403 may be coupled to input terminals (e.g., AC1 and AC2), which may serve as input nodes of rectifier 400. The rectified output voltage may be provided to a downstream load via an output terminal (e.g., VRECT).

[0056] In various embodiments, rectifier 400 may further include one or more drivers (e.g., driver 404) configured to control the activation of switching transistors. For example, the term "driver" or "gate driver" may refer to circuitry that provides the necessary voltage and / or current to switch a power transistor (e.g., MOSFET) between its conducting (e.g., on) and non-conducting (e.g., off) states. Examples of drivers may include, but are not limited to, level shifters, pre-drivers, charge pumps, and / or the like. In some instances, the driver (e.g., driver 404) may be from a comparator or timing control circuitry (e.g., Figure 2 The circuit 200 receives control signals and generates appropriate drive signals for the gates of the corresponding transistors. For example, the term "control signal" can refer to an electrical signal that delivers timing, activation, or configuration instructions to the circuit. Control signals can be implemented in various forms, such as voltage pulses, current pulses, digital logic signals, analog voltage levels, pulse width modulation (PWM) signals, and / or the like.

[0057] As an example, when the comparator detects that the AC coil node voltage (e.g., AC1) exceeds a threshold, it can generate a control signal, thereby triggering a delay circuit (e.g., Figure 2 The first circuit 204) performs timing control on the optimal switching point. In some aspects, the control signal can be adjusted based on predictions of future switching events or based on feedback indicating earlier or delayed propagation.

[0058] In some embodiments, rectifier 400 may implement a parallel transistor configuration to improve switching performance. For example, rectifier 400 may include a first transistor 401 and a second transistor 402 arranged in parallel between a common input node and an output node. In some instances, the first transistor 401 and the second transistor 402 may have different electrical characteristics, such as transistor size, gate capacitance, channel width, on-resistance (Ron), and / or the like. For example, the first transistor 401 may have a relatively small transistor size or fewer transistor fingers, resulting in lower gate capacitance and faster switching speed but higher on-resistance. In some cases, the first transistor 401 may be referred to as a small transistor or a fast-switching transistor. Conversely, the second transistor 402 may have a relatively large transistor size or a higher number of transistor fingers, resulting in lower on-resistance and improved conduction performance, but slower switching due to a larger gate capacitance. In some cases, the second transistor 402 may be referred to as a large transistor or a high-conductivity transistor. In some implementations, the first transistor 401 may be initially activated to quickly initiate conduction and reduce diode conduction losses, followed by activation of the second transistor 402 to provide lower resistance conduction and optimize overall efficiency.

[0059] In some instances, the rectifier 400 may employ an adaptive control mechanism to selectively activate the first transistor 401 and the second transistor 402 at different times based on the real-time voltage or current conditions at the input terminals (e.g., AC1 and AC2). For example, a timing control circuit (e.g., Figure 2 The circuit 200 can detect when an input signal exceeds a predefined threshold and generate a control signal to activate the first transistor 401. Based on additional feedback or real-time monitoring of the input signal, the timing control circuit can determine when to activate the second transistor 402. By adaptively sequencing the activation of transistors in response to circuit conditions, the rectifier 400 can reduce switching delay and minimize diode time. In some embodiments, the adaptive control mechanism can also be used to control turn-off events, allowing a small transistor (e.g., the first transistor 401) to turn off first before completely shutting off the power path to suppress ringing or overshoot.

[0060] Although specific embodiments have been fully described above, various modifications, alternative constructions, and equivalents may be used. Therefore, the above description and illustrations should not be construed as limiting the scope of the technology as defined by the appended claims.

Claims

1. An apparatus comprising: Input terminals configured to receive input signals; A first comparator is coupled to the input terminal and configured to compare the input signal with a first threshold and generate a first signal in response to the input signal exceeding the first threshold; A first circuit coupled to the first comparator and configured to initiate a first interval in response to the first signal and to provide a control signal after the first interval has expired; and A second comparator is coupled to the input terminal and configured to compare the input signal with a second threshold and generate a second signal based on the comparison between the input signal and the second threshold. The first circuit is further configured to adjust the first interval based at least on the second signal.

2. The device according to claim 1, wherein the input signal includes an alternating current (AC) component.

3. The device of claim 1, further comprising a driver coupled to the first circuit and configured to receive the control signal.

4. The device of claim 3, further comprising a first transistor coupled to the driver, the driver being configured to activate the first transistor in response to the control signal.

5. The device of claim 4, further comprising a second transistor coupled in parallel with the first transistor, the second transistor being configured to be activated after the first transistor.

6. The device of claim 1, wherein the second threshold is greater than a reference voltage associated with the rectified output.

7. The device of claim 1, wherein the first circuit is configured to increase the first interval in response to the second signal indicating that the input signal is below the second threshold.

8. The device of claim 1, wherein the first circuit is configured to reduce the first interval in response to the second signal indicating that the input signal exceeds the second threshold.

9. The device according to claim 1, wherein the second threshold is greater than the first threshold.

10. An apparatus comprising: Input terminals configured to receive input signals; A first comparator is coupled to the input terminal and configured to compare the input signal with a first threshold and generate a first signal in response to the input signal exceeding the first threshold; A first circuit coupled to the first comparator and configured to initiate a first interval in response to the first signal; and A second comparator is coupled to the input terminal and configured to compare the input signal with a second threshold and generate a second signal based on the comparison between the input signal and the second threshold, wherein the second threshold is greater than the first threshold; The first circuit is further configured to adjust the first interval based at least on the second signal.

11. The device of claim 10, further comprising a driver coupled to the first circuit, the first circuit being configured to provide a control signal to the driver after the first interval has elapsed.

12. The device of claim 11, further comprising a first transistor coupled to the driver, the driver being configured to activate the first transistor in response to the control signal.

13. The device of claim 10, wherein the second threshold is greater than a reference voltage associated with the rectified output.

14. The device of claim 10, wherein the first circuitry is configured to decrease the first interval in response to the second signal indicating that the input signal exceeds the second threshold.

15. The device of claim 10, wherein the first circuit is configured to increase the first interval in response to the second signal indicating that the input signal is below the second threshold.

16. An apparatus comprising: Input terminals configured to receive input signals; A first circuit is coupled to the input terminal and configured to provide a control signal based at least on the input signal; A driver coupled to the first circuit and configured to receive the control signal; A first transistor coupled to the driver, the driver being configured to activate the first transistor in response to the control signal; and A second transistor is coupled in parallel with the first transistor and is configured to be activated after the first transistor.

17. The device of claim 16, wherein the input signal includes an alternating current (AC) component.

18. The device of claim 16, further comprising a first comparator coupled to the input terminal and the first circuit, the first comparator being configured to compare the input signal with a first threshold and to generate a first signal in response to the input signal exceeding the first threshold.

19. The apparatus of claim 18, wherein the first circuit is configured to initiate a first interval in response to the first signal and to generate the control signal after the first interval has elapsed.

20. The device of claim 16, further comprising a second comparator coupled to the input terminal and configured to compare the input signal with a second threshold and generate a second signal based on the comparison between the input signal and the second threshold.

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