A method and system for monitoring and controlling the status of a computer peripheral

Abstract

This invention relates to the field of computer peripheral control, and more particularly to a method and system for monitoring and controlling the status of computer peripherals. The method includes the following steps: acquiring an internal load sequence and an external current sequence; calculating a first-order difference term using a sliding window; accumulating and weighting the products of the first-order difference term, the external current sequence, and a preset reference voltage to obtain a transient power supply deficit gradient; acquiring a retransmission count sequence; and weighting and accumulating the cross product of the transient power supply deficit gradient and the retransmission count sequence, along with their first-order moment statistical characteristics, to obtain a latent current outage risk index; acquiring service priority weights; and mapping the latent current outage risk index to the service priority weights to obtain a stability degradation diagnostic signal; and calculating a frequency reduction control factor and adjusting the operating state when the stability degradation diagnostic signal exceeds a preset threshold. This invention effectively identifies latent current outage faults, achieving accurate diagnosis and adaptive control.

Description

Technical Field

[0001] This invention relates to the field of computer peripheral control, and in particular to a method and system for monitoring and controlling the status of computer peripherals. Background Technology

[0002] In the field of computer peripheral operating status monitoring and control technology, identifying underlying data communication faults caused by internal high-frequency loads has always been a key focus in industry. Currently, the industry primarily relies on physical probing techniques combining high-frequency oscilloscopes with bus protocol analyzers to detect the integrity of underlying data streams in computer peripherals. This method can capture nanosecond-level bus voltage drops and packet retransmission anomalies, offering extremely high detection accuracy. However, such physical probing methods depend on bulky external specialized testing instruments and must be performed offline with the service connection disconnected or the device exposed. This not only results in high equipment deployment costs but also prevents integration into the computer peripheral itself for in-situ real-time self-diagnosis.

[0003] To reduce costs and achieve online monitoring, the industry currently widely adopts functional monitoring methods based on global power consumption thresholds. This technology is typically based on the physical assumption of static power supply capacity distribution, assuming a linear steady-state relationship between the total input current of computer peripherals and the power allocated to each expansion port, and assuming that the internal line impedance of the bus is constant. This method can trigger protection when faced with macroscopic faults such as overall overload or hard short circuits, but it cannot distinguish between ordinary external environmental electrical interference and hidden faults in the core structure caused by a sudden increase in internal high-concurrency computing power, resulting in a fundamental monitoring blind spot.

[0004] In highly dynamic operating conditions where computer peripherals face high-concurrency data read / write operations across multiple ports, accompanied by the instantaneous activation of internal computing modules, the aforementioned linear steady-state assumption fails due to transient high-frequency power surges. Because of the concurrent triggering of transient high-load computing instructions, the distributed voltage of the computer peripheral's internal bus is no longer a preset constant, but rather a nonlinear time-varying physical quantity that fluctuates drastically with the underlying computing power scheduling instructions. Such sub-millisecond-level drastic fluctuations directly penetrate the hardware physical layer, causing severe degradation of signal integrity at high-priority communication ports. The fundamental flaw of existing technology lies in using static macroscopic thresholds describing ideal states to evaluate the microscopic physical processes of high-frequency fluctuations. This fixed judgment parameter is severely disconnected from the drastically changing dynamic electrical characteristics, causing the system to be unable to trace the physical impact path of computing power surges on data integrity, resulting in underlying data packet retransmissions and missed packet loss detections. Summary of the Invention

[0005] To address the problem that existing computer peripheral monitoring solutions cannot accurately track the physical impact of surges in internal computing power on data transmission stability, and are difficult to achieve accurate transient fault diagnosis and low-level dynamic control without dedicated physical detection equipment, this invention provides a method and system for monitoring and controlling the status of computer peripherals.

[0006] In a first aspect, the present invention provides a method for monitoring and controlling the status of computer peripherals, employing the following technical solution: A method for monitoring and controlling the status of computer peripherals, comprising the following steps: Based on the internal load sequence and the external current sequence, a first-order difference term is calculated by using a sliding window to obtain data at a preset number of time points. The first-order difference term is then weighted and accumulated with the product of the external current sequence and the preset reference voltage to obtain the transient power supply deficit gradient. Obtain the retransmission count sequence, calculate the cross product based on the transient power supply deficit gradient and the retransmission count sequence, extract the first moment statistical feature of the cross product, and weight and accumulate the cross product and the first moment statistical feature to obtain the implicit power outage risk index. Obtain the business priority weight, and perform mapping processing based on the implicit disconnection risk index and the business priority weight to obtain the stability degradation diagnosis signal; When the stability degradation diagnostic signal is greater than a preset threshold, a frequency reduction control factor is calculated based on the stability degradation diagnostic signal, and the operating state is adjusted based on the frequency reduction control factor to achieve state monitoring and control.

[0007] This invention introduces intermediate calculation indicators such as transient power supply deficit gradient and latent interruption risk index, and combines the characteristics of underlying electrical load with the characteristics of data communication retransmission to establish a physical constraint relationship between hardware power supply fluctuations and communication failures. Thus, without relying on external detection equipment, it can selectively extract latent interruption fault characteristics and trigger corresponding control operations.

[0008] Preferably, the transient power deficit gradient is obtained by satisfying the following relationship:

[0009] In the formula, Indicates the first The transient power deficit gradient at time 1. and This represents the preset weighting coefficient. Indicates that the internal load sequence is in the first... The value at each moment. Indicates that the internal load sequence is in the first... The value at each moment. Indicating the first in the external current sequence The port in the first The instantaneous current value at each moment. This represents the preset reference voltage. This indicates the total number of external ports. Indicates the port order index. This represents the function that takes the maximum value.

[0010] This invention extracts the dynamic characteristics of a sharp increase in internal load by combining a first-order difference term with a basic power summation term, effectively separating the conventional power consumption background parameters during steady-state operation, so that the calculated deficit gradient can accurately reflect the transient internal power supply pressure.

[0011] Preferably, the implicit flow interruption risk index obtained satisfies the following relationship:

[0012] In the formula, Indicates the first The port in the first The hidden risk index of power outage at any given moment. and This represents the preset deviation weighting coefficient. Indicates the first The transient power deficit gradient at time 1. Indicates the first The transient power deficit gradient at time 1. In the sequence of retransmission counts, the th The port in the first The value at each moment. This represents the order index within the sliding window. This indicates the preset length of the sliding window.

[0013] This invention improves the stability of the correlation calculation between transient power supply fluctuations and subsequent data packet retransmissions by accumulating historical features within a sliding window and incorporating the time lag characteristics caused by the physical transmission of power supply fluctuations to the communication port.

[0014] Preferably, the obtained stability degradation diagnostic signal satisfies the following relationship:

[0015] In the formula, Indicates the first The port in the first Stability degradation diagnostic signal at each moment, Indicates the first The port in the first The hidden risk index of power outage at any given moment. This represents the preset smoothness fitting coefficient. Indicates the first The service priority weights corresponding to each port. This represents the preset baseline business weight value. This represents the natural exponential function.

[0016] This invention utilizes a natural exponential function to construct a nonlinear mapping and introduces constraints on port service priorities, enabling ports with different priorities to generate differentiated diagnostic signals when facing the same risk index, thus preventing the system from generating redundant power outage protection actions.

[0017] Preferably, the calculation of the frequency reduction control factor satisfies the following relationship:

[0018] In the formula, Indicates the first The frequency reduction control factor at each moment This indicates the default maximum rated refresh rate. This represents the preset gain slope coefficient. Indicates the first The port in the first Stability degradation diagnostic signal at each moment, This represents the preset threshold. Represents the hyperbolic tangent function. This represents the function that takes the maximum value.

[0019] This invention uses the hyperbolic tangent function for calculation, maintaining a normal refresh rate output when the diagnostic signal does not exceed the limit, and providing a stable and continuous frequency reduction factor output after exceeding the limit, thus avoiding drastic changes in control commands that could affect the continuity of hardware operation.

[0020] Preferably, the method for obtaining the preset weighting coefficients includes: Different levels of dynamic step load and steady-state load were injected into the computer peripherals. Simultaneously, real-time power values ​​of the internal computing module and output current values ​​of each external port were acquired using testing instruments. The voltage sag depth of the internal bus of the computer peripherals was collected using a high-frequency oscilloscope to obtain an experimental calibration dataset. A multiple linear regression fitting method was used, with the power jump increment calculated from the acquired internal power values ​​and the total external output power calculated from the acquired output current values ​​as independent variables, and the voltage sag depth as the dependent variable, to fit the experimental calibration dataset. The coefficients in the resulting regression equation were determined as weighting coefficients. and .

[0021] Preferably, the method for obtaining the preset deviation weighting coefficient includes: The voltage drop sequence and the data retransmission count sequence are acquired synchronously. The absolute value of the Pearson correlation coefficient between the voltage drop sequence and the data retransmission count sequence at the zero-time offset is used as the real-time correlation strength value. The absolute value of the Pearson correlation coefficient between the voltage drop sequence and the data retransmission count sequence at each time offset within a preset length of the sliding window is recorded as the second correlation strength at each time offset. The mean of the second correlation strength at all offset times is recorded as the historical correlation strength. The proportion of the historical correlation strength value to the sum of the historical correlation strength value and the real-time correlation strength value is used as the deviation weighting coefficient. The proportion of the real-time correlation strength value to the sum of the historical correlation strength value and the real-time correlation strength value is used as the deviation weighting coefficient. .

[0022] Preferably, the method for obtaining the preset smoothness fitting coefficient includes: Under full load operation of computer peripherals, multiple sets of forced frequency reduction tests are performed on the pixel screen using the underlying interface. Simultaneously, a high-frequency oscilloscope is used to measure the real-time recovery value of the internal bus voltage of the computer peripherals as the physical refresh rate decreases, resulting in a voltage recovery characteristic dataset that reflects the mapping relationship between frequency reduction and voltage recovery. The voltage recovery characteristic dataset is then subjected to proportional limit search processing to obtain the proportional critical value that causes the bus voltage fluctuation to enter a critical oscillation state. The power value released under different refresh rate reductions is calculated, and the power value is compared with the transient power supply deficit gradient for profit and loss offset analysis. The proportional parameter that allows the released power to completely offset the transient power supply deficit gradient without generating electrical overshoot is determined as the gain slope coefficient.

[0023] Preferably, adjusting the operating state based on the frequency reduction control factor includes: The frequency reduction control factor is encapsulated into hardware control instructions using the hardware abstraction layer interface, and the hardware control instructions are sent to the display driver chip. In response to the hardware control command, the display driver chip adjusts the real-time physical refresh rate to the value corresponding to the frequency reduction control factor and performs frequency reduction processing.

[0024] Secondly, the present invention provides a status monitoring and control system for computer peripherals, which adopts the following technical solution: A status monitoring and control system for a computer peripheral device includes a processor and a memory, wherein the memory stores computer program instructions, and when the computer program instructions are executed by the processor, the aforementioned status monitoring and control method for a computer peripheral device is implemented.

[0025] By adopting the above technical solution, the above-mentioned method for monitoring and controlling the status of computer peripherals is generated into a computer program and stored in a memory, so that it can be loaded and executed by the processor, thereby creating a terminal device based on the memory and the processor for convenient use.

[0026] The present invention has the following technical effects: This solution abandons the traditional global static threshold monitoring method and instead extracts dynamic first-order differential features and latency statistics for high-frequency concurrent load scenarios within computer peripherals. By constructing transient power deficit gradients and implicit power outage risk indices, it directly establishes objective numerical relationships at the micro-electrical and data communication levels. This calculation process accurately reflects the hidden damage to external port communication caused by bus voltage drops due to transient computing power spikes within peripherals, enabling the system to detect underlying degradation signs before a complete hardware disconnection occurs.

[0027] Furthermore, this invention nonlinearly fuses the underlying diagnostic signals with the priority weights of external port services, and directly generates a smooth underlying frequency reduction control factor to adaptively regulate internal computing power. This process does not employ the traditional method of directly cutting off external port power; instead, it reallocates underlying bus power resources by suppressing the operating state of the internal pixel screen module without interrupting the core data transmission link. This effectively eliminates the latent power outage faults caused by internal modules competing for power with external ports under high-dynamic conditions. Consequently, without increasing the cost of external testing equipment, it significantly improves the data transmission reliability and system adaptive control accuracy of computer peripherals under extreme concurrent conditions. Attached Figure Description

[0028] Figure 1 This is a flowchart of a method in a status monitoring and control method for computer peripherals provided in an embodiment of the present invention; Figure 2 A voltage state monitoring comparison chart provided for embodiments of the present invention; Figure 3 A comparison chart of fault diagnosis effects provided in an embodiment of the present invention. Detailed Implementation

[0029] This invention discloses a method for monitoring and controlling the status of computer peripherals, referring to... Figure 1 This includes steps S1-S5: S1: Obtain the internal load sequence and the external current sequence.

[0030] It should be noted that in physical scenarios where multiple ports of a computer peripheral are operating at full concurrent load, the internal computing module will generate sub-millisecond current drawdown when executing high-load instructions. Due to the hundreds of milliseconds delay in the response of the external power supply protocol, this surge in internal transient power will cause a microsecond-level drop in bus voltage. If conventional second-level average current detection methods are used, the transient voltage dip is easily smoothed by the filtering circuit, thus failing to capture the root physical cause of packet loss. Therefore, the core objective of this step is to establish a high-frequency sampling process that meets the upper limit of the microcontroller's sampling computing power, and to obtain the raw data foundation reflecting the real-time fluctuations of the system's underlying energy.

[0031] Preferably, as an example, obtaining the internal load sequence and the external current sequence includes: The original current signal of the internal power-consuming module is obtained by using a current sampling circuit, and the original current signal is processed by analog-to-digital conversion to obtain the internal load sequence. The feedback signals of each external expansion port are synchronously acquired using the current sampling circuit, and the feedback signals are processed using a current calibration method to obtain an external current sequence arranged according to the sampling time. The internal load sequence and the external current sequence are synchronized using a timing alignment method to achieve timing alignment between the internal load sequence and the external current sequence.

[0032] Understandably, in real-world scenarios, the moment a user wakes up the AI ​​voice assistant, the system can accurately record the microscopic correspondence between the surge in internal chip power and the decrease in bus power supply capability through synchronous sampling.

[0033] S2: Based on the internal load sequence and the external current sequence, a first-order difference term is calculated by using a sliding window to obtain data at a preset number of time points. The first-order difference term is then weighted and accumulated with the product of the external current sequence and the preset reference voltage to obtain the transient power supply deficit gradient.

[0034] It should be noted that the raw current data collected contains a large amount of steady-state power consumption background, which cannot directly reflect the transient surge characteristics triggered by internal calculations. This data redundancy will cause serious lag in the system's decision-making logic, making it difficult to capture the changing characteristics that induce packet loss. Therefore, the core purpose of this step is to use differential operations to remove the steady-state components and extract the transient surge characteristics triggered by internal calculations.

[0035] Preferably, as an example, based on the internal load sequence and the external current sequence, a first-order difference term is calculated by using a sliding window to acquire data at a preset number of time points. The first-order difference term is then weighted and summed with the product of the external current sequence and the preset reference voltage to obtain the transient power supply deficit gradient. The specific relationship is as follows:

[0036] In the formula, Indicates the first The transient power deficit gradient at time 1. and This represents the preset weighting coefficient. Indicates that the internal load sequence is in the first... The value at each moment. Indicates that the internal load sequence is in the first... The value at each moment. Indicating the first in the external current sequence The port in the first The instantaneous current value at each moment. This refers to the preset reference voltage, for example. It equals 5.0V. This indicates the total number of external ports. Indicates the port order index. This represents the function that takes the maximum value.

[0037] Understandably, in relational expressions This is a first-order difference term, which reflects the net increase in the power of the internal computing module and characterizes the impact intensity of the power rising edge. It reflects the real-time total power consumption baseline of all external ports. The transient power deficit gradient directly characterizes the instantaneous power shortage of the bus. For example, in a scenario where high-resolution rendering is initiated on a pixel screen, the internal computing module jumps from a low power baseline to a high power peak instantaneously. At this time, the first-order differential logic term can quickly capture this increase in power difference and combine it with the steady-state total power consumption of the external ports to accurately locate the instantaneous power shortage of the bus caused by the surge in internal computing power.

[0038] It should be noted that the weighting coefficient and The method for obtaining the voltage drop depth includes: injecting dynamic step loads and steady-state loads of different levels into the computer peripheral using a programmable load device; simultaneously acquiring the real-time power value of the internal computing module and the output current value of each external port using a test instrument; and acquiring the voltage drop depth value of the internal bus of the computer peripheral using a high-frequency oscilloscope to obtain an experimental calibration dataset; using a multiple linear regression fitting method, with the power jump increment calculated from the acquired internal power value and the total external output power calculated from the acquired output current value as independent variables, and the voltage drop depth value as the dependent variable, fitting the experimental calibration dataset, and determining the coefficient values ​​in the obtained regression equation as weight coefficients. and .

[0039] S3: Obtain the retransmission count sequence, calculate the cross product based on the transient power supply deficit gradient and the retransmission count sequence, extract the first moment statistical feature of the cross product, and weight and accumulate the cross product and the first moment statistical feature to obtain the implicit power outage risk index.

[0040] It's important to note that the conversion of power fluctuations into data packet loss is not instantaneous. In real-world physical scenarios, when the bus voltage inside a computer peripheral experiences a sub-millisecond drop, the signal waveform at the communication physical layer is first distorted. Then, the underlying logic controller, after multiple failed attempts to read data packets, finally initiates a retransmission request and records the error count. This physical sequence causes the retransmission event to have a certain offset on the timeline relative to the power fluctuation. For example, when a high-speed external hard drive is performing large file read / write operations, a power shortage at time k might only trigger a retransmission at time k+1 or k+2. Analyzing only the current power data cannot explain why data retransmissions still occur after power is restored. Therefore, the core objective of this step is to establish a causal relationship across multiple sampling periods. By cross-analyzing the deficit gradient and retransmission data over time, we can accurately identify latent power outage faults induced by historical power deficits.

[0041] Preferably, as an example, a retransmission count sequence is obtained, a cross product is calculated based on the transient power supply deficit gradient and the retransmission count sequence, the first-order moment statistical feature of the cross product is extracted, and the cross product and the first-order moment statistical feature are weighted and accumulated to obtain the implicit power outage risk index, including: The error statistics of the underlying bus controller are processed using the register retrieval method to obtain the retransmission count sequence for each port; The implicit power outage risk index is calculated based on the retransmission count sequence and the transient power supply deficit gradient, specifically satisfying the following relationship:

[0042] In the formula, Indicates the first The port in the first The hidden risk index of power outage at any given moment. and This represents the preset deviation weighting coefficient. Indicates the first The transient power deficit gradient at time 1. Indicates the first The transient power deficit gradient at time 1. In the sequence of retransmission counts, the th The port in the first The value at each moment. This represents the order index within the sliding window. This indicates the preset length of the sliding window. It represents the statistical characteristics of the first moment.

[0043] Understandable, This is a real-time cross-correlation logic item, reflecting the synchronous resonance between the current power supply pressure and data error reporting. This is a historical hysteresis accumulation term, reflecting the temporal correlation between historical power deficits and current error reports. By fusing these two terms using a deviation weighting coefficient, the destructive effect of electrical dips on communication links is fully described. In scenarios where high-speed external hard drives experience high-frequency retransmissions, the degradation of physical signals takes time to be reflected back to the communication protocol layer, and the current number of retransmissions often corresponds to a power shortage several sampling cycles ago. Therefore, the above analysis can effectively and accurately uncover the correlation between voltage dip events and data retransmissions, and accurately identify latent power outage faults induced by historical power deficits.

[0044] It should be noted that the deviation weighting coefficient and Methods for obtaining [the information] include: A high-frequency oscilloscope and a bus protocol analyzer are used to synchronously acquire voltage drop sequences and data retransmission count sequences. The absolute value of the Pearson correlation coefficient between the voltage drop sequences and data retransmission count sequences at a zero-time offset is used as the real-time correlation strength value. The absolute value of the Pearson correlation coefficient between the voltage drop sequences and data retransmission count sequences at each time offset within a preset length of a sliding window is calculated and recorded as the second correlation strength at each time offset. The mean of the second correlation strength at all offset times is recorded as the historical correlation strength. The proportion of the historical correlation strength value to the sum of the historical correlation strength and the real-time correlation strength value is used as the deviation weighting coefficient. The proportion of the real-time correlation strength value to the sum of the historical correlation strength value and the real-time correlation strength value is used as the deviation weighting coefficient. .

[0045] S4: Obtain the business priority weight, and perform mapping processing based on the implicit disconnection risk index and the business priority weight to obtain the stability degradation diagnosis signal.

[0046] It should be noted that the various terminal devices connected to computer peripherals have significantly different business continuity requirements, and different types of devices have different tolerance boundaries for underlying power supply fluctuations. For example, storage devices in high-speed read / write mode have extremely high requirements for signal integrity; even a small voltage drop can cause data verification errors. In contrast, conventional input devices such as keyboards and mice have stronger latency tolerance. If the system directly adopts an indiscriminate intervention strategy based on the implicit power outage risk index, it will inevitably lead to non-core devices that are not sensitive to performance fluctuations frequently triggering frequency reduction protection under minor disturbances. This one-to-one correspondence between physical risk indicators and actual business needs does not hold. To resolve this logical mismatch, the core objective of this step is to use a nonlinear activation processing method, by introducing business priority weights as adjustment factors, to sensitively correct the physical risk intensity, thereby obtaining a stability degradation diagnostic signal that can target and characterize the damaged state of core business.

[0047] Preferably, as an example, the business priority weight is obtained, and a mapping process is performed between the implicit disconnection risk index and the business priority weight to obtain a stability degradation diagnostic signal, including: The system reads the service priority weights of each port pre-stored in the system memory. These service priority weights are manually determined. Based on the priority weights and the implicit disconnection risk index, a stability degradation diagnostic signal is calculated, specifically satisfying the following relationship:

[0048] In the formula, Indicates the first The port in the first Stability degradation diagnostic signal at each moment, Indicates the first The port in the first The hidden risk index of power outage at any given moment. This represents the preset smoothness fitting coefficient. Indicates the first The service priority weights corresponding to each port. This represents a preset baseline business weight value, for example. Take 0.5, This represents the natural exponential function.

[0049] Understandable, This reflects the intensity of the risk of flow interruption; and This reflects the degree to which risk is amplified. In real-world scenarios, when the connected device is a solid-state drive carrying core data, its corresponding business priority weight is higher. The value of [the value] will decrease sharply, causing the denominator to approach one, resulting in an extremely sensitive response of the final output diagnostic signal to underlying physical risks. This allows the diagnostic signal to quickly penetrate the safety threshold when the core storage port faces fluctuations in the risk index; conversely, if the corresponding port is connected to a conventional input device with low real-time requirements, its priority weight is lower. The resulting large denominator effectively suppresses risk fluctuations, thereby reducing the sensitivity of such risk warnings.

[0050] It should be noted that the smoothness fitting coefficient Methods for obtaining [the information] include: Using network testing tools, terminal devices corresponding to different priority ports were tested at a preset packet loss rate to obtain the maximum interaction latency time of each device while maintaining normal service operation, thus obtaining an interaction latency tolerance dataset. Using an S-curve smoothness fitting method, regression fitting was performed with the service priority weights as independent variables and the interaction latency tolerance dataset as the dependent variable to obtain the corresponding logistic regression curve. The absolute value of the slope of the logistic regression curve at the baseline weight value was determined as the smoothness fitting coefficient. .

[0051] S5: When the stability degradation diagnosis signal is greater than a preset threshold, calculate the frequency reduction control factor based on the stability degradation diagnosis signal, and adjust the operating state based on the frequency reduction control factor to achieve state monitoring and control.

[0052] It should be noted that during the transient window caused by a surge in power supply pressure, the renegotiation process of external power supply protocols, such as power transmission protocols, typically has an inherent delay of hundreds of milliseconds. Since the bus power supply capacity within computer peripherals is constant on a microsecond scale, when internal computing modules suddenly execute high-load rendering tasks, a direct power squeeze occurs with the external data transmission ports. To stabilize the bus voltage within the critical time window before the external protocol takes effect, the system must actively adjust internal power consumption quotas to mitigate voltage drops. The pixel screen rendering module, as a typical high-frequency switching load within the peripheral, has its power consumption directly dependent on the physical refresh rate, and short-term dynamic fluctuations in this frequency do not disrupt the continuity of core data transmission services. Therefore, converting the diagnosed risk signal into a screen refresh rate suppression command can generate an instantaneous current release effect, thereby instantly compensating the data bus under pressure with the saved power. The core objective of this step is to utilize the hyperbolic tangent dynamic suppression processing method to accurately isolate the power consumption of non-core modules based on the severity of service impairment, thereby ensuring that the physical layer electrical parameters of the core data link remain within a safe range.

[0053] Preferably, as an example, when the stability degradation diagnostic signal is greater than a preset threshold, a frequency reduction control factor is calculated based on the stability degradation diagnostic signal, and the operating state is adjusted based on the frequency reduction control factor to achieve state monitoring and control, including: The stability degradation diagnostic signal is compared with a preset safety threshold. In response to the stability degradation diagnostic signal exceeding the preset safety threshold, a frequency reduction control factor is calculated. The frequency reduction control factor is encapsulated into a low-level instruction using a hardware abstraction layer interface and sent to the display driver chip of the internal pixel screen module. The display driver chip is used to physically execute the target refresh rate corresponding to the obtained frequency reduction control factor.

[0054] After physical frequency reduction, the status pointer is reset and the loop monitoring process is continuously returned until the stability degradation diagnostic signal falls back, thus realizing adaptive status monitoring and control of computer peripherals.

[0055] The formula for calculating the frequency reduction control factor is as follows:

[0056] In the formula, Indicates the first The frequency reduction control factor at each moment This indicates the default maximum rated refresh rate, for example. Equal to 60Hz, This represents the preset gain slope coefficient. Indicates the first The port in the first Stability degradation diagnostic signal at each moment, This refers to the preset threshold, for example, Take 0.85, Represents the hyperbolic tangent function. This represents the function that takes the maximum value.

[0057] Understandable, This ensures that the suppression action is only activated when the diagnostic signal deteriorates beyond the limit; The corresponding smooth suppression transition provides a first-order continuous and stable adjustment characteristic. Through the above processing, when a hidden power outage risk is diagnosed at the core storage port, the operating frequency of the internal pixel screen can be forced to smoothly decrease from the standard refresh rate, thereby instantly freeing up the power resources originally used for image rendering and allocating them to the data bus that is currently transmitting at high speed, thus preserving the integrity of the core data packets.

[0058] It should be noted that the gain slope coefficient Methods for obtaining [the information] include: Under full load operation of computer peripherals, multiple sets of gradient forced frequency reduction tests are performed on the pixel screen using the underlying interface. At the same time, a high-frequency oscilloscope is used to measure the real-time recovery value of the internal bus voltage of the computer peripherals as the physical refresh rate decreases, so as to obtain a voltage recovery characteristic dataset that reflects the mapping relationship between frequency decrease and voltage recovery. Using the closed-loop oscillation boundary test method, the voltage recovery characteristic dataset is subjected to proportional limit search processing to obtain the proportional critical value that causes the bus voltage fluctuation to enter the critical oscillation state. Using the power feedback equivalent calibration method, the power released under different refresh rate reductions is calculated. The power released is then compared with the transient power supply deficit gradient to perform a profit-loss offset analysis. The proportional parameter that ensures the released power completely offsets the transient power supply deficit gradient without generating electrical overshoot is determined as the gain slope coefficient. .

[0059] To demonstrate the effectiveness of the solution, relevant experiments were conducted. Below are the images obtained from the experiments: Figure 2 The graph shows a comparison of voltage status monitoring. The solid lines marked with circles represent the bus voltage evolution trend under traditional monitoring methods without this solution; the dashed lines marked with squares represent the bus voltage evolution trend after adopting this solution; and the horizontal dotted lines represent the preset risk judgment threshold lines.

[0060] As can be seen from the image, within the sampling time range of 150 to 250, due to the surge in load on the internal computing modules of the computer peripherals, the solid line marked with a circle shows a sharp downward dip, and the depth of the trough clearly exceeds the risk assessment threshold indicated by the dotted line. Conversely, although the dashed line marked with a square is also subjected to load impact during the same period, its drop amplitude is quickly corrected through the real-time intervention of this solution, and it remains above the threshold line overall. This comparative result proves that this solution can effectively predict voltage drop risks and ensure the stability of the physical layer power supply through a state control mechanism.

[0061] Figure 3 The diagram shows a comparison of fault diagnosis results. The solid lines marked with crosses represent the retransmission sequence under the traditional scheme, while the dotted lines marked with triangles represent the retransmission sequence under the scheme of this application.

[0062] The image shows that the solid line marked with a cross exhibits a significant pulse-like peak near the sampling time of 200, which is consistent with... Figure 2The voltage drop timing of the traditional solution closely matches the expected timing, demonstrating the causal relationship between voltage fluctuations and data packet loss. Furthermore, the dotted line marked with a triangle maintains an extremely low baseline level across the entire time axis, without any significant fluctuation peaks. This proves that the proposed solution can diagnose and intercept signal degradation in its early stages at the physical layer, fundamentally eliminating the impact of latent power outages on core data services.

[0063] This invention also discloses a status monitoring and control system for computer peripherals, including a processor and a memory. The memory stores computer program instructions, and when the computer program instructions are executed by the processor, a status monitoring and control method for computer peripherals according to the present invention is implemented.

[0064] The system also includes other components well known to those skilled in the art, such as communication buses and communication interfaces, the settings and functions of which are known in the art and will not be described in detail here.

[0065] In this invention, the aforementioned memory can be any tangible medium containing or storing a program that can be used or combined with an instruction execution system, apparatus, or device. For example, a computer-readable storage medium can be any suitable magnetic or magneto-optical storage medium, such as resistive random access memory (DRAM), dynamic random access memory (DRAM), static random access memory (SRAM), enhanced dynamic random access memory (DRAM), high-bandwidth memory, hybrid memory cube, etc., or any other medium that can be used to store desired information and can be accessed by an application, module, or both. Any such computer storage medium can be part of a device or accessible to or connected to a device.

Claims

1. A method of monitoring and controlling the state of a computer peripheral, characterized by, Including the following steps: Obtain the internal load sequence and the external current sequence; Based on the internal load sequence and the external current sequence, a first-order difference term is calculated by using a sliding window to obtain data at a preset number of time points. The first-order difference term is then weighted and accumulated with the product of the external current sequence and the preset reference voltage to obtain the transient power supply deficit gradient. Obtain the retransmission count sequence, calculate the cross product based on the transient power supply deficit gradient and the retransmission count sequence, extract the first moment statistical feature of the cross product, and weight and accumulate the cross product and the first moment statistical feature to obtain the implicit power outage risk index. Obtain the business priority weight, and perform mapping processing based on the implicit disconnection risk index and the business priority weight to obtain the stability degradation diagnosis signal; When the stability degradation diagnostic signal is greater than a preset threshold, a frequency reduction control factor is calculated based on the stability degradation diagnostic signal, and the operating state is adjusted based on the frequency reduction control factor to achieve state monitoring and control.

2. The method of claim 1, wherein The transient power deficit gradient obtained satisfies the following relationship: In the formula, Indicates the first The transient power deficit gradient at time 1. and This represents the preset weighting coefficient. Indicates that the internal load sequence is in the 1st... The value at each moment. Indicates that the internal load sequence is in the 1st... The value at each moment. Indicating the first in the external current sequence The port in the first The instantaneous current value at each moment. This represents the preset reference voltage. This indicates the total number of external ports. Indicates the port order index. This represents the function that takes the maximum value.

3. The method for monitoring and controlling the status of computer peripherals according to claim 1, characterized in that, The resulting implicit flow interruption risk index satisfies the following relationship: In the formula, Indicates the first The port in the first The hidden risk index of power outage at any given moment. and This represents the preset deviation weighting coefficient. Indicates the first The transient power deficit gradient at time 1. Indicates the first The transient power deficit gradient at time 1. In the sequence of retransmission counts, the th The port in the first The value at each moment. This represents the order index within the sliding window. This indicates the preset length of the sliding window.

4. The method for monitoring and controlling the status of computer peripherals according to claim 1, characterized in that, The obtained stability degradation diagnostic signal satisfies the following relationship: In the formula, Indicates the first The port in the first Stability degradation diagnostic signal at each moment, Indicates the first The port in the first The hidden risk index of power outage at any given moment. This represents the preset smoothness fitting coefficient. Indicates the first The service priority weights corresponding to each port. This represents the preset baseline business weight value. This represents the natural exponential function.

5. The method for monitoring and controlling the status of computer peripherals according to claim 1, characterized in that, The calculated frequency reduction control factor satisfies the following relationship: In the formula, Indicates the first The frequency reduction control factor at each moment This indicates the default maximum rated refresh rate. This represents the preset gain slope coefficient. Indicates the first The port in the first Stability degradation diagnostic signal at each moment, This represents the preset threshold. Represents the hyperbolic tangent function. This represents the function that takes the maximum value.

6. The method for monitoring and controlling the status of computer peripherals according to claim 2, characterized in that, The preset weight coefficients are obtained through the following methods: Different levels of dynamic step loads and steady-state loads were injected into the computer peripherals. Simultaneously, real-time power values ​​of the internal computing module and output current values ​​of each external port were acquired using testing instruments. The voltage sag depth of the internal bus of the computer peripherals was collected using a high-frequency oscilloscope to obtain an experimental calibration dataset. A multiple linear regression fitting method was used, with the power jump increment calculated from the acquired internal power values ​​and the total external output power calculated from the acquired output current values ​​as independent variables, and the voltage sag depth as the dependent variable, to fit the experimental calibration dataset. The coefficients in the resulting regression equation were determined as weighting coefficients. and .

7. The method for monitoring and controlling the status of computer peripherals according to claim 3, characterized in that, The method for obtaining the preset deviation weighting coefficient includes: The voltage drop sequence and the data retransmission count sequence are acquired synchronously. The absolute value of the Pearson correlation coefficient between the voltage drop sequence and the data retransmission count sequence at the zero-time offset is used as the real-time correlation strength value. The absolute value of the Pearson correlation coefficient between the voltage drop sequence and the data retransmission count sequence at each time offset within a preset length of the sliding window is recorded as the second correlation strength at each time offset. The mean of the second correlation strength at all offset times is recorded as the historical correlation strength. The proportion of the historical correlation strength value to the sum of the historical correlation strength value and the real-time correlation strength value is used as the deviation weighting coefficient. The proportion of the real-time correlation strength value to the sum of the historical correlation strength value and the real-time correlation strength value is used as the deviation weighting coefficient. .

8. The method for monitoring and controlling the status of computer peripherals according to claim 4, characterized in that, The method for obtaining the preset smoothness fitting coefficients includes: Under full load operation of computer peripherals, multiple sets of forced frequency reduction tests are performed on the pixel screen using the underlying interface. Simultaneously, a high-frequency oscilloscope is used to measure the real-time recovery value of the internal bus voltage of the computer peripherals as the physical refresh rate decreases, resulting in a voltage recovery characteristic dataset that reflects the mapping relationship between frequency reduction and voltage recovery. The voltage recovery characteristic dataset is then subjected to proportional limit search processing to obtain the proportional critical value that causes the bus voltage fluctuation to enter a critical oscillation state. The power value released under different refresh rate reductions is calculated, and the power value is compared with the transient power supply deficit gradient for profit and loss offset analysis. The proportional parameter that allows the released power to completely offset the transient power supply deficit gradient without generating electrical overshoot is determined as the gain slope coefficient.

9. The method for monitoring and controlling the status of computer peripherals according to claim 1, characterized in that, The adjustment of the operating state based on the frequency reduction control factor includes: The frequency reduction control factor is encapsulated into hardware control instructions using the hardware abstraction layer interface, and the hardware control instructions are sent to the display driver chip. In response to the hardware control command, the display driver chip adjusts the real-time physical refresh rate to the value corresponding to the down-frequency control factor and performs down-frequency processing.

10. A status monitoring and control system for computer peripherals, characterized in that, include: A processor and a memory, wherein the memory stores computer program instructions that, when executed by the processor, implement a state monitoring and control method for a computer peripheral according to any one of claims 1-9.

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