A method and device for processing memory data of an operating system under strong electromagnetic interference
By employing periodic polling and a hierarchical error repair mechanism, the problem of high multi-bit error detection rate in ECC memory verification under strong electromagnetic interference is solved, achieving proactive protection and stability improvement of memory data in environments with strong electromagnetic interference.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING GELINK TECHNOLOGY CO LTD
- Filing Date
- 2026-02-14
- Publication Date
- 2026-05-29
AI Technical Summary
Existing ECC memory verification cannot effectively protect against multi-bit errors in environments with strong electromagnetic interference, resulting in high false negative rates and untimely data recovery. Furthermore, the complex ECC algorithm consumes a large amount of CPU resources and cannot meet real-time requirements.
By periodically polling the power management chip's ripple voltage, the memory controller bus's eye width, and the DRAM's memory temperature, the system compares these data in real time and triggers bit error repair and memory frequency reduction operations. It employs a hierarchical error repair mechanism, including automatic hardware single-bit error flipping, DRAM hardware reserved area backup pages, and memory snapshot processes, to achieve proactive protection.
It achieves proactive protection of memory data under strong electromagnetic interference, improves system stability and data integrity, reduces the occurrence rate of multi-bit errors, avoids system crashes, and meets the business requirements of real-time performance and high reliability.
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