A method for manufacturing a vertical buried capacitor printed circuit board

Abstract

This invention relates to a method for manufacturing a printed circuit board with embedded vertical capacitors, comprising the following steps: drilling a first hole in a substrate to form a first hole; metallizing the hole wall of the first hole to form a conductive via ring; filling the metallized first hole to flatten it; drilling a second hole in the filled area of ​​the first hole, the second drilling using at least two different drill bits to form a second hole for placing the capacitor and a cutting hole for cutting the conductive via ring, the cutting hole dividing the conductive via ring into at least two mutually insulated conductive arc segments; placing the capacitor vertically into the second hole; and electrically connecting the capacitor's terminal electrodes to the conductive arc segments and / or external circuitry. The advantages of this invention are improved integration, enhanced high-frequency performance and power integrity, increased system reliability, and reduced manufacturing costs.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board technology, and specifically to a method for manufacturing a printed circuit board with embedded vertical capacitor components. Background Technology

[0002] As AI products increasingly demand higher integration and miniaturization of printed circuit boards (PCBs), embedded passive component technology, especially embedded capacitor technology, has become an effective way to improve system integration and accelerate system miniaturization. Traditional surface-mount capacitor technology mounts capacitors on the PCB surface, which not only occupies a large amount of wiring area, limiting further improvements in wiring density and system integration, but also introduces significant parasitic inductance through long decoupling loops, affecting high-frequency decoupling effectiveness and power integrity. Furthermore, surface-mount capacitors are susceptible to mechanical stress (such as impact and bending), thermal stress (such as soldering and temperature cycling), and external environmental factors (such as humidity and contamination) during subsequent assembly and use, posing potential reliability risks. Summary of the Invention

[0003] The purpose of this invention is to provide a method for manufacturing a printed circuit board with embedded vertical capacitors that can improve integration, enhance high-frequency performance and power integrity, increase system reliability, and reduce manufacturing costs.

[0004] A method for manufacturing a printed circuit board with embedded vertical capacitor components includes the following steps: The substrate is drilled for the first time to form the first hole; The hole wall of the first hole is metallized to form a conductive hole ring; After metallization, the first hole is filled to flatten it. A second drilling is performed in the area of ​​the first hole that has been filled. The second drilling uses at least two different drill bits to form a second hole for placing the capacitor and a cutting hole for cutting off the conductive hole ring. The cutting hole divides the conductive hole ring into at least two mutually insulated conductive arc segments. Place the capacitor vertically into the second hole; Electrically connect the capacitor's terminal electrodes to the conductive arc segment and / or external circuitry.

[0005] In the above solution, by vertically embedding the capacitor inside the printed circuit board, and by using the first drilling, hole wall metallization, hole filling treatment, and a second drilling with two different hole diameters, the conductive hole ring is divided into mutually insulated conductive arc segments. Then, the capacitor is placed in and electrically connected, thereby effectively saving PCB surface space, improving system integration, significantly shortening the decoupling loop, reducing parasitic inductance, improving high-frequency decoupling and power integrity, and protecting the capacitor from mechanical stress, thermal stress and environmental factors, thus improving system reliability.

[0006] Furthermore, the diameter of the first drilled hole is determined based on the diagonal distance of the capacitor, specifically the diagonal distance of the capacitor plus 0.5mm or more.

[0007] In the above scheme, by setting the diameter of the first drilling hole to be more than 0.5mm above the diagonal distance of the capacitor, it is ensured that there is enough space to accommodate the vertically placed capacitor when drilling the second hole, and that an operating margin is reserved for the arrangement of the cutting hole. This avoids the capacitor not being able to be inserted due to the hole diameter being too small or the copper ring of the hole wall being excessively damaged. At the same time, it also prevents the waste of board space caused by the hole diameter being too large, effectively improving the feasibility and processing yield of the embedded capacitor process.

[0008] Furthermore, the copper plating thickness of the metallized hole wall is 50 μm.

[0009] In the above solution, by setting the copper plating thickness of the hole wall metallization to 50μm, it is ensured that the conductive hole ring has sufficient current carrying capacity and mechanical strength to withstand the mechanical stress during subsequent second drilling and hole cutting without copper layer peeling or breakage. At the same time, it provides a low-resistance power supply or grounding path for the conductive arc segment formed after segmentation, effectively ensuring a reliable electrical connection between the embedded capacitor and the power / ground plane of the inner layer of the printed circuit board, and improving the electrical performance and long-term reliability of the product.

[0010] Furthermore, the aperture used in the filling process is the aperture of the first hole minus 0.1 mm.

[0011] In the above scheme, by setting the hole diameter of the filling treatment to the first hole diameter minus 0.1mm, it is ensured that the resin can be accurately and fully filled into the first hole, forming a flat, dense, and solid filling layer that is tightly bonded to the copper layer of the hole wall. This provides a stable and solid support platform for the subsequent second drilling, effectively preventing the drill bit from being displaced, broken, or having copper layer peeled off due to suspension or uneven force during the second drilling. This significantly improves the cutting accuracy of the cut-off hole and the process yield of the embedded capacitor.

[0012] Furthermore, in the second drilling, the diameter of the second hole used to place the capacitor is greater than or equal to the diagonal distance of the capacitor, and the diameter of the cutting hole used to cut off the conductive hole ring is smaller than the diameter of the second hole.

[0013] In the above scheme, by setting the diameter of the second hole to be greater than or equal to the diagonal distance of the capacitor, it is ensured that the capacitor can be smoothly inserted vertically with appropriate margin, avoiding the capacitor being unable to be inserted or being damaged due to the hole diameter being too small. At the same time, the diameter of the cutting hole is set to be smaller than the diameter of the second hole, so that the cutting hole can accurately cut in a local area of ​​the conductive ring. Under the premise of effectively dividing two mutually insulated conductive arc segments, it avoids damage to the second hole's accommodating space and structural integrity. Thus, within the limited area of ​​the first hole, reliable placement of the capacitor and precise division of the conductive ring are achieved simultaneously, ensuring the feasibility of the embedded capacitor process and the effectiveness of electrical isolation.

[0014] Furthermore, the at least two mutually insulated conductive segments include a first conductive segment and a second conductive segment, wherein the first conductive segment is configured as a power network and the second conductive segment is configured as a grounding network.

[0015] In the above scheme, by dividing the conductive hole ring into a first conductive segment and a second conductive segment, which are respectively configured as a power network and a ground network, the two ends of the vertically embedded capacitor can be connected to the power supply and grounding loops nearby, forming a tightly coupled low-impedance return path around the capacitor. This significantly shortens the decoupling loop length, reduces parasitic inductance, and effectively improves the high-frequency decoupling performance and power integrity of the printed circuit board.

[0016] Furthermore, the step of electrically connecting the terminal electrode of the capacitor to the conductive arc segment and / or external circuitry specifically includes: Laser drilling is performed in the area where the capacitor is located to form laser holes, so that the laser holes expose the two terminal electrodes of the capacitor respectively. The laser-etched holes are filled with electroplating to electrically connect the terminal electrodes of the capacitor to the external conductive layer.

[0017] In the above solution, the high-precision positioning capability of laser drilling is utilized to drill through the dielectric layer directly above the vertically embedded capacitor, precisely exposing the surfaces of the two terminal electrodes. Subsequently, through a hole-filling electroplating process, copper metal is deposited and filled into the laser hole to form a solid copper pillar connecting the terminal electrode and the outer copper layer of the board. This achieves a reliable electrical connection between the capacitor terminal electrode and the external conductive layer, avoiding the risk of poor contact or open circuit caused by the gap between the capacitor and the hole wall. At the same time, this connection method has an extremely short path, low resistance and parasitic inductance, effectively ensuring the high-frequency decoupling performance and long-term reliability of the embedded capacitor.

[0018] Furthermore, after performing hole-filling electroplating on the laser holes to electrically connect the terminal electrodes of the capacitor to the external conductive layer, the process also includes fabricating an outer layer circuit pattern on the PCB to form an electrical network corresponding to each of the two ends of the capacitor.

[0019] In the above scheme, by creating the outer circuit pattern, the two ends of the capacitors led out by the via electroplating are defined as different electrical networks, so that the embedded capacitors can be connected to the system circuit with clear power / ground polarity. At the same time, it provides a connection interface for subsequent chips and other components that can be directly soldered, thereby ensuring that the electrical functions of the capacitors such as decoupling and filtering are fully realized.

[0020] Furthermore, the pore-filling process employs resin plugging.

[0021] In the above solution, the solid filling layer formed after the resin is cured, which is flat, hard and tightly bonded to the copper layer of the hole wall, provides a stable support platform for the subsequent second drilling. This effectively prevents the drill bit from being displaced or broken due to suspension or uneven force during the second drilling. At the same time, the excellent insulation properties of the resin ensure that there will be no short circuit between the divided conductive arc segments, thereby improving the processing accuracy and product yield of the embedded capacitor process.

[0022] Furthermore, after completing the step of electrically connecting the terminal electrodes of the capacitor to the conductive arc segment and / or external circuitry, the process further includes multiple stacking and lamination processes to form a multi-level high-density interconnect printed circuit board with a multi-layer embedded capacitor structure.

[0023] In the above solution, after completing the single-layer capacitor embedding and electrical connection, multiple stacking and lamination processes are continued to vertically stack and integrate multiple embedded capacitor layers into a single printed circuit board, forming a multi-level high-density interconnect product with a multi-layer embedded capacitor structure. This significantly increases the number of embedded capacitors within a limited board thickness, improves system integration, and meets the needs of high-end products such as AI servers for higher density and better power integrity.

[0024] This invention discloses a method for manufacturing a printed circuit board (PCB) with embedded vertical capacitors. This method offers advantages such as improved integration, enhanced high-frequency performance and power integrity, increased system reliability, and reduced manufacturing costs. By vertically embedding the capacitors within the PCB, and utilizing a first drilling, hole wall metallization, hole filling, and a second drilling with two different hole diameters to divide the conductive via ring into mutually insulated conductive arc segments, the capacitors are then inserted and electrically connected. This effectively saves PCB surface space, improves system integration, significantly shortens decoupling loops, reduces parasitic inductance, improves high-frequency decoupling and power integrity, and protects the capacitors from mechanical stress, thermal stress, and environmental factors, thereby enhancing system reliability. Attached Figure Description

[0025] Figure 1 This is a flowchart illustrating a method for fabricating a printed circuit board for embedding vertical capacitor components, according to one embodiment.

[0026] Figure 2 This is a plan view of the capacitor location in one embodiment.

[0027] Figure 3 This is a schematic diagram illustrating the process of forming a laser hole by laser drilling in the area where the capacitor is located, according to one embodiment.

[0028] Figure 4 This is a schematic diagram of a multi-layered lamination structure according to one embodiment.

[0029] Figure 5 This is a step diagram illustrating a method for fabricating a printed circuit board for embedding vertical capacitor components, according to one embodiment.

[0030] Figure 6 This diagram illustrates the steps of electrically connecting the terminal electrode of a capacitor to the conductive arc segment and / or external circuitry, as described in one embodiment.

[0031] The following are the diagram labels: 1. First hole; 2. Second hole; 3. Capacitor; 4. Resin; 5. Cut hole; 6. Conductive hole ring; 7. Conductive arc segment. Detailed Implementation

[0032] The following will describe in further detail a method for manufacturing a printed circuit board for embedded vertical capacitor components according to the present invention, with reference to specific embodiments and accompanying drawings.

[0033] like Figure 1 and Figure 2 As shown in a preferred embodiment, a method for manufacturing a printed circuit board for embedded vertical capacitor components according to the present invention includes the following steps: S1. Drill a hole in the substrate for the first time to form the first hole 1.

[0034] S2. Metallize the hole wall of the first hole 1 to form a conductive hole ring 6. Through chemical copper deposition and electroplating processes, a layer of metallic copper is deposited on the hole wall of the first hole 1 to form a complete circular conductive hole ring 6, providing a conductive basis for subsequent segmentation into independent networks.

[0035] S3. After metallization, the first hole 1 is filled to flatten it.

[0036] S4. A second drilling is performed in the area of ​​the first hole 1 that has been filled. The second drilling uses at least two different drill bits to form a second hole 2 for placing the capacitor 3 and a cutting hole 5 for cutting off the conductive hole ring 6. The cutting hole 5 divides the conductive hole ring 6 into at least two mutually insulated conductive arc segments 7. The second hole 2 for placing the capacitor 3 is drilled with a larger drill bit, and the cutting hole 5 is drilled on the conductive hole ring 6 with a smaller drill bit.

[0037] S5. Place capacitor 3 vertically into the second hole 2. Position the ceramic capacitor 3 vertically into the second hole 2, ensuring its two terminals face a predetermined direction, in preparation for subsequent electrical connections.

[0038] S6. Connect the terminal electrode of capacitor 3 to conductive arc segment 7 and / or external circuitry.

[0039] In this embodiment, by vertically embedding capacitor 3 inside the printed circuit board, and by using the first drilling, hole wall metallization, hole filling treatment, and a second drilling with two different hole diameters, the conductive hole ring 6 is divided into mutually insulated conductive arc segments 7. Then, capacitor 3 is placed in and electrically connected, thereby effectively saving PCB surface space, improving system integration, significantly shortening the decoupling loop, reducing parasitic inductance, improving high-frequency decoupling and power integrity, and protecting capacitor 3 from mechanical stress, thermal stress and environmental factors, thus improving system reliability.

[0040] It should be noted that "vertical" means that the length of capacitor 3 is perpendicular to the PCB board surface. That is, the two electrodes of capacitor 3 are arranged vertically along the thickness of the board or facing the same side, rather than parallel to the board surface. The vertical placement allows the two electrodes of capacitor 3 to be connected to the power / ground pads on the surface layer and the power / ground plane on the inner layer respectively through the vertical laser hole and the conductive arc segment 7 in the shortest path.

[0041] Furthermore, existing structures for placing capacitors 3 and electrically dividing them typically require step-by-step, area-by-area completion, resulting in complex processes and high alignment accuracy requirements. This invention enables the simultaneous formation of the capacitor 3 receiving hole and the division of the conductive ring within the same area, significantly simplifying the process flow and improving processing efficiency. By controlling the position and number of the cutting holes 5, the conductive ring 6 can be divided into two, three, or more mutually insulated conductive arc segments 7, which can be configured as VCC, GND, or other signal networks to adapt to the needs of different capacitor types (such as multi-terminal capacitors 3) or different circuit topologies.

[0042] like Figure 2 As shown, in some embodiments, the diameter of the first drilled hole is determined based on the diagonal distance of capacitor 3, specifically, the diagonal distance of capacitor 3 plus 0.5mm or more. By setting the diameter of the first drilled hole to be at least 0.5mm plus the diagonal distance of capacitor 3, sufficient space is ensured for the vertically placed capacitor 3 during the subsequent second drilling, while also allowing for operational leeway in the arrangement of the cutting hole 5. This avoids the capacitor 3 being unable to be inserted due to an excessively small hole diameter or excessive damage to the copper ring on the hole wall, while also preventing the waste of board space due to an excessively large hole diameter. This effectively improves the feasibility and processing yield of the process of embedding capacitor 3.

[0043] like Figure 2As shown, in some embodiments, the copper plating thickness of the hole wall metallization is 50 μm. By setting the copper plating thickness of the hole wall metallization to 50 μm, it is ensured that the conductive hole ring 6 has sufficient current carrying capacity and mechanical strength to withstand the mechanical stress during subsequent second drilling and hole cutting 5 processing without copper layer peeling or breakage. At the same time, it provides a low-resistance power supply or grounding path for the conductive arc segment 7 formed after segmentation, effectively ensuring a reliable electrical connection between the embedded capacitor 3 and the power / ground plane of the inner layer of the printed circuit board, improving the electrical performance and long-term reliability of the product.

[0044] like Figure 2 As shown, in some embodiments, the aperture used in the via filling process is the aperture of the first hole 1 minus 0.1 mm. By setting the via diameter of the via filling process to the aperture of the first hole 1 minus 0.1 mm, it is ensured that the resin 4 can be accurately and fully filled into the first hole 1, forming a flat, dense, and solid filling layer that is tightly bonded to the copper layer of the hole wall. This provides a stable and solid support platform for the subsequent second drilling, effectively preventing the drill bit from being displaced, broken, or having copper layer peeling due to suspension or uneven force during the second drilling. This significantly improves the cutting accuracy of the cut hole 5 and the process yield of the embedded capacitor 3.

[0045] like Figure 2 As shown, in some embodiments, during the second drilling, the diameter of the second hole 2 used to place the capacitor 3 is greater than or equal to the diagonal distance of the capacitor 3, while the diameter of the cutting hole 5 used to cut the conductive ring 6 is smaller than the diameter of the second hole 2. By setting the diameter of the second hole 2 to be greater than or equal to the diagonal distance of the capacitor 3, it is ensured that the capacitor 3 can be smoothly inserted vertically with appropriate margin, avoiding the capacitor 3 being unable to be inserted or being damaged due to the hole diameter being too small. At the same time, setting the diameter of the cutting hole 5 to be smaller than the diameter of the second hole 2 allows the cutting hole 5 to precisely cut in a local area of ​​the conductive ring 6. Under the premise of effectively dividing two mutually insulated conductive arc segments 7, damage to the accommodating space and structural integrity of the second hole 2 is avoided. Thus, within the limited area of ​​the first hole 1, reliable placement of the capacitor 3 and precise division of the conductive ring are achieved simultaneously, ensuring the feasibility of the process of embedding the capacitor 3 and the effectiveness of electrical isolation.

[0046] like Figure 2As shown, in some embodiments, at least two mutually insulated conductive segments 7 include a first conductive segment and a second conductive segment. The first conductive segment is configured as a power network, and the second conductive segment is configured as a ground network. By configuring the first and second conductive segments, formed by dividing the conductive via ring 6, as a power network and a ground network respectively, the two ends of the vertically embedded capacitor 3 can be connected to the power and ground loops nearby, respectively. This forms a tightly coupled, low-impedance return path around the capacitor 3, thereby significantly shortening the decoupling loop length, reducing parasitic inductance, and effectively improving the high-frequency decoupling performance and power integrity of the printed circuit board.

[0047] In this embodiment, the segmented conductive arc 7 extends vertically through the entire board thickness along the hole wall, with its top connected to the surface pad and its bottom directly connected to the inner VCC or GND plane. This vertical channel provides the shortest path for the capacitor 3 terminal electrode to connect to the inner plane without the need for horizontal traces or additional vias, thereby significantly reducing the connection inductance.

[0048] like Figure 3 , Figure 5 and Figure 6 As shown, in some embodiments, the step of electrically connecting the terminal electrode of capacitor 3 to the conductive arc segment 7 and / or external circuitry specifically includes: S61. Laser drilling is performed in the area where capacitor 3 is located to form laser holes, so that the laser holes expose the two terminal electrodes of capacitor 3 respectively.

[0049] S62. Fill the laser holes with electroplating to make the terminal electrode of capacitor 3 electrically connected to the external conductive layer.

[0050] In this embodiment, the high-precision positioning capability of laser drilling is utilized to drill through the dielectric layer directly above the vertically embedded capacitor 3, precisely exposing the surfaces of the two end electrodes. Subsequently, through a hole-filling electroplating process, copper metal is deposited and filled into the laser hole to form a solid copper pillar connecting the end electrodes to the outer copper layer of the board. This achieves a reliable electrical connection between the end electrodes of capacitor 3 and the external conductive layer, avoiding the risk of poor contact or open circuit caused by the gap between capacitor 3 and the hole wall. At the same time, this connection method has an extremely short path, low resistance and parasitic inductance, effectively ensuring the high-frequency decoupling performance and long-term reliability of the embedded capacitor 3.

[0051] like Figure 5 and Figure 6 As shown, in some embodiments, after the step of filling the laser holes with electroplating to electrically connect the terminal electrodes of capacitor 3 to the external conductive layer, the method further includes: S63. Create the outer layer circuit pattern on the PCB to form an electrical network corresponding to the two ends of capacitor 3.

[0052] Specifically, by creating the outer circuit pattern, the two ends of the capacitor 3, which is led out through the through-hole electroplating, are defined as different electrical networks, so that the embedded capacitor 3 can be connected to the system circuit with a clear power / ground polarity. At the same time, it provides a connection interface for subsequent chips and other components that can be directly soldered, thereby ensuring that the electrical functions of capacitor 3, such as decoupling and filtering, are fully realized.

[0053] like Figure 1 As shown, in some embodiments, the hole filling process uses resin 4 to plug the holes. The solid filling layer formed by the curing of resin 4, which is flat, hard, and tightly bonded to the copper layer of the hole wall, provides a stable support platform for the subsequent second drilling. This effectively prevents the drill bit from being displaced or broken during the second drilling due to suspension or uneven force. At the same time, the excellent insulation properties of resin 4 ensure that there will be no short circuit between the divided conductive arc segments 7, thereby improving the processing accuracy and product yield of the embedded capacitor 3 process.

[0054] Reference Figure 1 In this embodiment, after the second drilling is completed and before the capacitor 3 is vertically placed into the second hole 2, an inner layer patterning step is included. Specifically, after the second drilling forms the second hole 2 and the cut-off hole 5, the substrate is patterned with inner layer circuitry. Through conventional dry film lamination, exposure, development, and etching processes, the required inner layer circuitry, including power networks, ground networks, and signal lines, is formed on the substrate surface. This inner layer pattern is electrically connected to the conductive arc segments 7 subsequently formed by the conductive via ring 6, providing a clear definition of the power and ground networks for the capacitor 3.

[0055] After the capacitor 3 is placed vertically into the second hole 2, and before the terminal electrodes of the capacitor 3 are electrically connected to the conductive arc segment 7 and / or external wiring, a filling and pressing step is also included. Specifically: Filling step: After the capacitor 3 is placed into the second hole 2, insulating glue is filled into the second hole 2 to completely fill the gap between the capacitor 3 and the hole wall, and to make the filling surface flush with the substrate surface. This filling step fixes the capacitor 3 in the second hole 2 to prevent it from shifting in subsequent processes; on the other hand, it provides a flat surface for subsequent lamination. Lamination Step: After the filling step is completed, a lamination operation is performed. The substrate with the embedded capacitor 3 is stacked together with the upper or lower layer board and pressed into one piece under high temperature and high pressure conditions. This lamination step completely seals the capacitor 3 inside the printed circuit board, while providing a flat and firm processing surface for subsequent laser drilling. After completing the above filling and pressing steps, subsequent processes such as laser drilling, hole filling electroplating, and outer layer circuit pattern fabrication are carried out in the area where capacitor 3 is located.

[0056] like Figure 4As shown, in some embodiments, after completing the step of electrically connecting the terminal electrodes of capacitor 3 to the conductive arc segment 7 and / or external lines, multiple stacking and lamination processes are performed to form a multi-level high-density interconnect printed circuit board with a multi-layer embedded capacitor 3 structure. Continuing with multiple stacking and lamination processes after completing the single-layer embedded capacitor 3 and electrical connection allows multiple embedded capacitor 3 layers to be vertically stacked and integrated into a single printed circuit board, forming a multi-level high-density interconnect product with a multi-layer embedded capacitor 3 structure. This significantly increases the number of embedded capacitors 3 within a limited board thickness, improves system integration, and meets the requirements of high-end products such as AI servers for higher density and better power integrity.

[0057] The working principle and process of the printed circuit board manufacturing method for embedded vertical capacitors of the present invention are as follows: a first drilling and hole wall metallization are performed on the substrate to form a complete conductive hole ring 6. Then, the first hole 1 is filled to provide a stable support platform. Subsequently, a second drilling is performed using two drill bits with different hole diameters. The larger hole diameter drill bit drills a second hole 2 for placing the capacitor 3, and the smaller hole diameter drill bit drills a cutting hole 5 on the conductive hole ring 6, dividing the originally complete conductive hole ring 6 into at least two mutually insulated conductive arc segments 7. Then, the capacitor 3 is placed vertically into the second hole 2. Finally, through laser drilling, hole filling electroplating, and outer layer circuit patterning, the two terminal electrodes of the capacitor 3 are electrically connected to the conductive arc segment 7 and / or external circuits, respectively. Thus, the embedded capacitor 3 is connected to the power network and ground network through a vertical short path, realizing the application of the embedded capacitor 3 with low inductance and high reliability.

[0058] In the description of this invention, it should be understood that terms such as "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0059] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0060] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0061] Although the description of the invention has been given in conjunction with the specific embodiments described above, it will be apparent to those skilled in the art that many substitutions, modifications, and variations can be made based on the foregoing. Therefore, all such substitutions, modifications, and variations are included within the spirit and scope of the appended claims.

Claims

1. A method for manufacturing a printed circuit board for embedded vertical capacitor components, characterized in that, Includes the following steps: The substrate is drilled for the first time to form the first hole; The hole wall of the first hole is metallized to form a conductive hole ring; After metallization, the first hole is filled to flatten it. A second drilling is performed in the area of ​​the first hole that has been filled. The second drilling uses at least two different drill bits to form a second hole for placing the capacitor and a cutting hole for cutting off the conductive hole ring. The cutting hole divides the conductive hole ring into at least two mutually insulated conductive arc segments. Place the capacitor vertically into the second hole; Electrically connect the capacitor's terminal electrodes to the conductive arc segment and / or external circuitry.

2. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, The diameter of the first hole is determined based on the diagonal distance of the capacitor, specifically the diagonal distance of the capacitor plus 0.5mm or more.

3. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, The copper plating thickness of the metallized hole wall is 50 μm.

4. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, The hole diameter used in the filling process is the diameter of the first hole minus 0.1 mm.

5. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, In the second drilling, the diameter of the second hole used to place the capacitor is greater than or equal to the diagonal distance of the capacitor, and the diameter of the cutting hole used to cut off the conductive hole ring is smaller than the diameter of the second hole.

6. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, The at least two mutually insulated conductive segments include a first conductive segment and a second conductive segment, wherein the first conductive segment is configured as a power network and the second conductive segment is configured as a ground network.

7. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, The step of electrically connecting the terminal electrode of the capacitor to the conductive arc segment and / or external circuitry specifically includes: Laser drilling is performed in the area where the capacitor is located to form laser holes, so that the laser holes expose the two terminal electrodes of the capacitor respectively. The laser-etched holes are filled with electroplating to electrically connect the terminal electrodes of the capacitor to the external conductive layer.

8. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 7, characterized in that, After the laser-filled holes are electroplated to electrically connect the terminal electrodes of the capacitor to the external conductive layer, the process further includes fabricating an outer layer circuit pattern on the PCB to form an electrical network corresponding to each of the two ends of the capacitor.

9. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, The pore-filling process uses resin plugging.

10. The method for manufacturing a printed circuit board for embedded vertical capacitor components according to claim 1, characterized in that, After completing the step of electrically connecting the terminal electrodes of the capacitor to the conductive arc segment and / or external circuitry, the process further includes multiple stacking and lamination processes to form a multi-level high-density interconnect printed circuit board with a multi-layer embedded capacitor structure.

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