Intelligent direct current lighting brightness self-adaptive control system and method

Abstract

The application discloses a kind of intelligent direct current lighting brightness self-adapting control system and method, belong to lighting control technical field.Aiming at the problem that existing reactive power compensation and brightness control are independent, lack of cooperation leads to unstable brightness when power fluctuates, the application calculates real-time power factor and extracts reactive component by collecting bus voltage and current;The optimal capacitor combination scheme is determined by the reactive power compensation amount calculation unit, and the power compensation capacitor dynamic switching array quickly executes switching;At the same time, the power factor value is used as the feedforward input by the cooperative control strategy engine, and the brightness adjustment pre-compensation amount is calculated by the pre-built coupling adjustment model;The brightness stability control loop superimposes the deviation feedback correction amount with the feedforward compensation amount, and the final control signal is output to the drive power supply.The application realizes the cooperative regulation of reactive power compensation and brightness control, effectively suppresses the brightness flicker caused by bus voltage fluctuation, and improves the lighting stability.

Description

Technical Field

[0001] This invention belongs to the field of lighting control technology, specifically relating to an intelligent DC lighting brightness adaptive control system and method. Background Technology

[0002] In DC lighting systems, fluctuations in reactive power can cause transient changes in bus voltage. In existing technologies, reactive power compensation and brightness control are two separate systems that operate independently. There is a lack of information exchange and coordination mechanisms between the two. As a result, when the reactive power compensation device makes dynamic adjustments, the brightness control system cannot detect and respond to these changes in electrical parameters in a timely manner, leaving a technical gap in ensuring the stability of lighting brightness.

[0003] Common DC lighting systems typically employ independent power factor correction modules for reactive power compensation, along with separate brightness adjustment circuits for lighting control. For example, Chinese patent CN119031548B discloses an explosion-proof lighting lamp and its brightness control method. These two systems operate with disconnected control strategies: the reactive power compensation module adjusts the connection state of the compensation capacitor solely based on its own power factor feedback, while the brightness control module adjusts the voltage based only on the output deviation of the light intensity sensor. When reactive power compensation frequently switches due to load changes, the bus voltage fluctuates accordingly. The independent brightness control system, lacking the ability to anticipate such electrical disturbances, can only passively rely on hysteresis feedback for correction, resulting in perceptible flickering of the lighting brightness. This makes it impossible to achieve high-precision, stable brightness control under dynamic reactive power fluctuations. This technical bottleneck has become a key challenge restricting the performance improvement of DC lighting systems. Summary of the Invention

[0004] To address the technical problem in existing technologies where the reactive power compensation module and brightness control module are independent and lack a coordination mechanism, resulting in insufficient brightness stability and accuracy of DC lighting systems during power fluctuations, this invention provides an intelligent DC lighting brightness adaptive control system and method, which can effectively solve the problems mentioned above.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] In a first aspect, the present invention provides an intelligent DC lighting brightness adaptive control method, the method comprising the following steps:

[0007] The DC bus voltage and current real-time acquisition unit synchronously acquires the real-time voltage signal and real-time current signal of the DC bus, and converts the real-time voltage signal and the real-time current signal into a digital sequence.

[0008] The power factor detection module receives the digital sequence, calculates the real-time power factor value based on the instantaneous reactive power theory, and determines the current compensation state based on the comparison result of the real-time power factor value and the preset threshold.

[0009] The harmonic and reactive component extraction algorithm module performs spectral analysis or time-domain filtering on the digital sequence to separate the fundamental reactive component value and the effective value of the harmonic current.

[0010] The reactive power compensation calculation unit calculates the required reactive power compensation value based on the fundamental reactive component value and the effective value of the harmonic current, and determines the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array.

[0011] The collaborative control strategy engine obtains the real-time power factor value, uses the real-time power factor value as a feedforward input signal, and calculates the brightness adjustment pre-compensation amount through a pre-built coupled adjustment model.

[0012] The brightness stabilization control loop receives the brightness adjustment pre-compensation amount as a feedforward input signal, and performs feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. The feedforward compensation amount and the feedback correction amount are superimposed and synthesized to output the final brightness adjustment control signal.

[0013] Furthermore, the brightness stabilization control loop performs feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. It then combines the feedforward compensation and the feedback correction to output the final brightness adjustment control signal, specifically including:

[0014] The brightness stabilization control loop uses the brightness adjustment pre-compensation amount as the input to the feedforward control channel to generate the feedforward compensation amount;

[0015] The brightness stabilization control loop calculates the deviation between the preset brightness control target value and the actual brightness value, and inputs the deviation value into the proportional-integral-derivative control algorithm to generate the feedback correction amount.

[0016] The brightness stabilization control loop adds the feedforward compensation amount and the feedback correction amount to synthesize the brightness adjustment control signal and outputs it.

[0017] Furthermore, the process of pre-building the coupled regulation model in the collaborative control strategy engine includes:

[0018] A first sub-model is established to study the effect of power factor variation on bus voltage, and a second sub-model is established to study the effect of bus voltage variation on lighting brightness.

[0019] By connecting the first sub-model and the second sub-model in series, a transfer function from power factor change to brightness change is obtained, and the transfer function is approximated as a combined model of proportional element and hysteresis element connected in series.

[0020] The proportional gain coefficient of the proportional element and the lag time constant of the lag element are identified offline and adjusted online to obtain the coupled adjustment model. The online adjustment adopts the gradient descent method, and its trigger condition is that the absolute value of the deviation between the actual brightness value and the preset brightness control target value is greater than 5% and the duration is more than 1 second.

[0021] Furthermore, the reactive power compensation calculation unit determines the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array, specifically including:

[0022] Among multiple capacitor combination schemes that meet the preset compensation accuracy requirements, a secondary optimization objective is used to minimize the number of switching actions for secondary screening; the number of switching actions refers to the number of capacitor groups whose access status needs to be changed when switching from the current capacitor combination scheme to a candidate scheme.

[0023] The reactive power compensation calculation unit selects the capacitor combination scheme with the fewest switching operations as the final optimal capacitor combination scheme.

[0024] Furthermore, before the secondary screening, the reactive power compensation calculation unit also performs the following steps:

[0025] Using a traversal search algorithm or a genetic algorithm, the scheme with the smallest deviation between the total compensation capacitance value and the required compensation reactive power value is selected from all feasible capacitor combination schemes of the power compensation capacitor dynamic switching array as the preliminary optimal solution;

[0026] The reactive power compensation calculation unit takes the preliminary optimal solution and other capacitor combination schemes that meet the compensation error requirements as the objects of the secondary screening.

[0027] Furthermore, when the power compensation capacitor dynamic switching array performs capacitor switching, it operates according to a sequence of first turning off the power semiconductor switching devices corresponding to the capacitor group to be switched out, waiting for a preset discharge time, and then turning on the power semiconductor switching devices corresponding to the capacitor group to be connected. During the switching process, a hardware interlock mechanism and a software protection mechanism are activated. The hardware interlock mechanism makes the connection signal and the switching signal of the same group of capacitors mutually exclusive at the hardware level, and the software protection mechanism verifies the legality and integrity of the optimal capacitor combination scheme.

[0028] Furthermore, the power factor detection module determines the current compensation state based on the comparison result between the real-time power factor value and a preset threshold, specifically including:

[0029] The real-time power factor value is compared with the preset undercompensation and overcompensation thresholds.

[0030] A hysteresis width is provided between the undercompensation judgment threshold and the overcompensation judgment threshold. When the real-time power factor value changes within the hysteresis width, the current compensation state judgment result remains unchanged.

[0031] Furthermore, the method divides the control process into four logical levels:

[0032] The data acquisition layer is composed of the real-time DC bus voltage and current acquisition units;

[0033] The signal processing layer consists of the power factor detection module and the harmonic and reactive component extraction algorithm module;

[0034] The control decision layer is composed of the reactive power compensation calculation unit and the collaborative control strategy engine;

[0035] The power compensation capacitor dynamic switching array and the brightness stabilization control loop constitute the execution drive layer;

[0036] The data acquisition layer, the signal processing layer, the control decision layer, and the execution drive layer are connected in sequence to form a closed-loop control path from electrical parameter acquisition to brightness control signal output.

[0037] Furthermore, the process of time-domain filtering of the digital sequence by the harmonic and reactive component extraction algorithm module includes:

[0038] Perform a Clarke transform on the digitized bus current sequence in the digital sequence to transform it to a two-phase stationary coordinate system to obtain the p-component current and the q-component current.

[0039] The p-component current and the q-component current are filtered by a low-pass filter to separate the DC component of the corresponding fundamental active power and the AC component of the corresponding harmonic and reactive power.

[0040] The fundamental reactive component is extracted from the AC component by synchronous detection.

[0041] On the other hand, the present invention provides an intelligent DC lighting brightness adaptive control system, comprising:

[0042] A real-time DC bus voltage and current acquisition unit is used to synchronously acquire the real-time voltage signal and the real-time current signal of the DC bus, and convert the real-time voltage signal and the real-time current signal into a digital sequence.

[0043] The power factor detection module is used to receive the digital sequence, calculate the real-time power factor value based on the instantaneous reactive power theory, and determine the current compensation state based on the comparison result of the real-time power factor value and the preset threshold.

[0044] The harmonic and reactive component extraction algorithm module is used to perform spectrum analysis or time-domain filtering on the digital sequence to separate the fundamental reactive component value and the effective value of the harmonic current.

[0045] The reactive power compensation calculation unit is used to calculate the required reactive power compensation value based on the fundamental reactive component value and the effective value of the harmonic current, and to determine the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array.

[0046] The power compensation capacitor dynamic switching array is used to dynamically connect or disconnect capacitors according to the optimal capacitor combination scheme.

[0047] The collaborative control strategy engine is used to obtain the real-time power factor value, use the real-time power factor value as a feedforward input signal, and calculate the brightness adjustment pre-compensation amount through a pre-built coupled adjustment model.

[0048] The brightness stabilization control loop is used to receive the brightness adjustment pre-compensation amount as a feedforward input signal, and to perform feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. The feedforward compensation amount and the feedback correction amount are superimposed and synthesized to output the final brightness adjustment control signal.

[0049] The collaborative control strategy engine is connected to the brightness stabilization control loop to provide the brightness adjustment pre-compensation amount to the brightness stabilization control loop.

[0050] In summary, this application includes at least one of the following beneficial technical effects:

[0051] 1. The intelligent DC lighting brightness adaptive control method provided by the present invention acquires the system electrical parameters in real time through a DC bus voltage and current real-time acquisition unit; acquires the system power factor status in real time through a power factor detection module; and accurately extracts the reactive power component through a harmonic and reactive component extraction algorithm.

[0052] 2. This invention calculates dynamic reactive power compensation demand through a reactive power compensation calculation unit and achieves rapid dynamic compensation through a dynamic switching array of power compensation capacitors; furthermore, the adjusted power factor is used as a feedforward signal input to the brightness stabilization control loop through a collaborative control strategy engine, ultimately realizing the coordinated adjustment of reactive power compensation and brightness control.

[0053] 3. This invention uses the adjustment state of the reactive power compensation module as the feedforward input of the brightness control loop, establishing an information interaction and coordinated adjustment mechanism between the two independent control loops. When the reactive power compensation device dynamically adjusts due to load changes, the brightness control system can sense the trend of power factor changes in advance and generate corresponding pre-compensation amounts, effectively suppressing the impact of bus voltage fluctuations on lighting brightness and solving the problem of lighting flicker caused by the independent operation of two systems in the prior art.

[0054] 4. This invention combines a graded capacitor array with a fast semiconductor switching device to shorten the compensation response time from milliseconds to microseconds, greatly improving the dynamic response speed of reactive power compensation and providing a technical basis for high-precision brightness stability control. Attached Figure Description

[0055] Figure 1 A schematic diagram of the overall technical solution for an intelligent DC lighting brightness adaptive control method;

[0056] Figure 2 This is a schematic diagram illustrating the core principles of the collaborative control strategy engine.

[0057] Figure 3 A schematic diagram of the fast switching control logic for a dynamic switching array of power compensation capacitors;

[0058] Figure 4 This is a schematic diagram of the closed-loop control structure for the brightness stabilization control loop. Detailed Implementation

[0059] To make the objectives, technical solutions, and advantages of this invention clearer, the following description is provided in conjunction with the appendix. Figure 1 To be continued Figure 4 Specific embodiments are provided to further illustrate the present invention in detail.

[0060] Firstly, the intelligent DC lighting brightness adaptive control method provided by this invention encompasses four logical layers: a data acquisition layer, a signal processing layer, a control decision layer, and an execution drive layer, forming a complete closed-loop control path from electrical parameter perception to stable brightness output. This method acquires the system operating status through a real-time DC bus voltage and current acquisition unit, performs signal analysis and feature extraction through a power factor detection module and a harmonic and reactive power component extraction algorithm module, generates an optimal compensation strategy through a reactive power compensation calculation unit, and then performs rapid dynamic compensation through a dynamic switching array of power compensation capacitors. Finally, relying on the coordinated operation of the collaborative control strategy engine and the brightness stability control loop, it achieves deep coupling and synchronous adjustment of reactive power compensation and brightness control.

[0061] The first step is S1, the data acquisition step. A real-time DC bus voltage and current acquisition unit is installed at the bus output end of the DC lighting system. It is responsible for synchronously acquiring the real-time voltage and current signals of the DC bus and converting the analog signals into digital sequences, providing raw data support for subsequent power factor calculation and harmonic reactive component extraction. The specific workflow of data acquisition is as follows.

[0062] Step S101: Deploy the real-time DC bus voltage and current acquisition unit and determine the sampling frequency. The real-time DC bus voltage and current acquisition unit is set at the bus output terminal of the DC lighting system. The real-time DC bus voltage and current acquisition unit synchronously acquires the real-time voltage signal and real-time current signal of the DC bus.

[0063] The sampling frequency of the real-time DC bus voltage and current acquisition unit is set based on the following principle: the sampling frequency should not be less than twice the highest harmonic frequency expected to occur in the DC lighting system, i.e., following the Nyquist sampling theorem. For example, if the highest harmonic frequency that may occur in the DC lighting system is fmax, then the sampling frequency fs should be at least 2fmax. The specific value of the sampling frequency is configured during implementation based on the actual electromagnetic compatibility environment and signal processing requirements of the DC lighting system.

[0064] During the sampling process, the bus voltage sampling operation and the bus current sampling operation are synchronized in the time dimension, that is, the two signals have the same sampling time and sampling interval.

[0065] Step S102: Perform signal conditioning and filtering, and send the acquired analog voltage signal and analog current signal to their respective signal conditioning circuits.

[0066] The signal conditioning circuit performs two functions: the first function is impedance matching and signal amplification. Impedance matching matches the output impedance of the original signal with the input impedance of the subsequent analog-to-digital converter, and signal amplification amplifies the amplitude of the original signal to the optimal input range of the analog-to-digital converter. The second function is low-pass filtering. The low-pass filter module built into the signal conditioning circuit filters the signal. The cutoff frequency of the low-pass filter module is no higher than half of the sampling frequency.

[0067] The low-pass filter module filters out high-frequency noise components in the analog signal that are higher than the Nyquist frequency, preventing high-frequency noise from falling into the useful signal frequency band through aliasing during the digitization process and interfering with subsequent power calculations and harmonic analysis.

[0068] Step S103: Perform analog-to-digital conversion and generate digital sequences. The analog signal processed by the signal conditioning circuit is sent to the high-precision analog-to-digital converter. The high-precision analog-to-digital converter samples and quantizes the continuously changing analog voltage signal at discrete time points, converting it into a bus voltage digital sequence; the high-precision analog-to-digital converter samples and quantizes the continuously changing analog current signal at discrete time points, converting it into a bus current digital sequence.

[0069] The resolution of the high-precision analog-to-digital converter is selected according to the control precision required in this embodiment. A 12-bit or 16-bit high-precision analog-to-digital converter can be selected.

[0070] Step S104: Align the sampling data time axis. During the analog-to-digital conversion process, the voltage sampling channel and the current sampling channel are allocated a unified sampling clock source, ensuring strict alignment of the two sets of digital sequences on the time axis. Each data point is assigned a global time tag upon generation, and the global time tag corresponds to the sampling time. Each data point in the two sets of digital sequences has a synchronized timestamp, providing a data foundation with precise time matching for subsequent instantaneous power calculation, power factor analysis, and harmonic component extraction.

[0071] Step S105: Output raw data. After completing analog-to-digital conversion and time axis alignment, the real-time DC bus voltage and current acquisition unit outputs a digital bus voltage sequence and a digital bus current sequence with synchronization time information. The digital bus voltage sequence and digital bus current sequence serve as the raw data input for subsequent signal processing layer algorithm modules, supporting power factor calculation, fundamental reactive component extraction, and harmonic component analysis.

[0072] Step S1 above, through synchronous sampling, hardware filtering, and time axis alignment, acquires timing-matched digital signals of the bus voltage and bus current, providing raw data for subsequent signal processing in the entire control system. The digital sequences output by the real-time DC bus voltage and current acquisition unit are then sent to the power factor detection module and harmonic and reactive power component extraction algorithm module in the signal processing layer for further analysis.

[0073] Regarding step S2, the power factor detection step: The power factor detection module receives the digital bus voltage sequence and digital bus current sequence output from step S105 as input data. The power factor detection module calculates the real-time power factor value of the DC lighting system based on instantaneous reactive power theory. The power factor detection module also compares the real-time power factor value with a preset threshold to determine whether the DC lighting system is currently in an under-compensated or over-compensated state, providing a basis for subsequent reactive power compensation decisions. The specific workflow of power factor detection is as follows.

[0074] Step S201: Receive input data. The power factor detection module acquires the digital bus voltage sequence and digital bus current sequence from the real-time DC bus voltage and current acquisition unit. Both the digital bus voltage sequence and the digital bus current sequence carry synchronization time information, and the two sets of sequences maintain a corresponding relationship on the time axis.

[0075] Step S202: Perform data synchronization preprocessing. The power factor detection module performs synchronous preprocessing on the digital bus voltage sequence and the digital bus current sequence. The preprocessing operation includes removing DC offset and calibrating the time delay deviation between sampling channels.

[0076] The DC offset removal operation is achieved by calculating the arithmetic mean of the digital bus voltage sequence and the digital bus current sequence respectively, and then subtracting the corresponding arithmetic mean from each data point in the sequence.

[0077] The time delay deviation between the calibration sampling channels is achieved in the following way: the power factor detection module stores the inherent time delay calibration value between the voltage sampling channel and the current sampling channel. The inherent time delay calibration value is determined by injecting a standard test signal with known phase into the bus before the DC lighting system leaves the factory.

[0078] In real-time calculations, the power factor detection module interpolates and resamples the digitized bus voltage and current sequences based on their inherent time delay calibration values, aligning the two sets of data on the time axis. The preprocessed data maintain a correspondence on the time axis, providing a data foundation for subsequent power factor calculations.

[0079] Step S203: Calculate the power factor value based on instantaneous reactive power theory. After preprocessing, the power factor detection module calculates the power factor value according to the instantaneous reactive power theory. The power factor detection module selects either the PQ algorithm or the IP-IQ algorithm for coordinate transformation and power calculation based on the DC lighting system configuration.

[0080] When using the PQ algorithm, the power factor detection module performs coordinate transformation on the preprocessed instantaneous voltage and current values. This coordinate transformation converts the voltage and current signals from the natural coordinate system to a two-phase orthogonal stationary coordinate system, obtaining the voltage and current components in the two-phase stationary coordinate system. Based on these components, the instantaneous active power and instantaneous reactive power are calculated.

[0081] The instantaneous active power is calculated by multiplying the voltage components in the two-phase stationary coordinate system by the corresponding current components and then summing the results. The instantaneous reactive power is calculated by cross-multiplying the voltage components in the two-phase stationary coordinate system by the corresponding current components and then summing the results. After obtaining the instantaneous active and reactive power, the power factor detection module calculates the power factor value as follows:

[0082]

[0083] Where PF is the power factor, P is the instantaneous active power, and Q is the instantaneous reactive power.

[0084] When using the IP-IQ algorithm, the power factor detection module first performs a Parker transform on the preprocessed instantaneous voltage and current values. The Parker transform converts the voltage and current signals from a stationary coordinate system to a coordinate system that rotates synchronously with the fundamental voltage. In this rotating coordinate system, the instantaneous current is decomposed into active and reactive current components. The power factor detection module then calculates the power factor value as follows:

[0085]

[0086] Where PF is the power factor value. For active current components, This represents the reactive current component.

[0087] The power factor reflects the proportion of active power to apparent power in a DC lighting system; a lower value indicates a higher proportion of reactive power. The power factor detection module outputs the calculated real-time power factor value.

[0088] Step S204, Threshold Comparison and Compensation Status Determination: The power factor detection module compares the real-time power factor value calculated in step S203 with the preset first threshold and second threshold.

[0089] The preset first threshold is the undercompensation judgment threshold. If the real-time power factor value is lower than the first threshold, the power factor detection module determines that the DC lighting system is currently in an undercompensated state and additional compensation capacitors are required.

[0090] The preset second threshold is the overcompensation judgment threshold. If the real-time power factor value is higher than the second threshold, the power factor detection module determines that the DC lighting system is currently in an overcompensated state and needs to disconnect some of the connected compensation capacitors.

[0091] A hysteresis width is provided between the first threshold and the second threshold. The purpose of the hysteresis width is to ensure that when the power factor value changes between the first threshold and the second threshold, the power factor detection module maintains the current judgment result and does not trigger a new compensation action, thereby preventing frequent switching of the compensation state due to signal noise or small fluctuations near the threshold boundary.

[0092] The specific value of the hysteresis width is determined based on the steady-state fluctuation amplitude of the power factor under normal operating conditions of the DC lighting system, and is usually taken as 10% to 30% of the difference between the first threshold and the second threshold.

[0093] Step S205: Output the judgment result. The power factor detection module outputs the compensation state judgment result obtained in step S204. The compensation state judgment result includes three possible values: undercompensation, overcompensation, and normal. The detection response time of the power factor detection module is controlled within a preset range. The detection response time starts from the arrival time of the input data and ends at the time the judgment result is output. The preset range is set according to the rate of change of the power factor of the DC lighting system to ensure that the power factor detection module can capture the dynamic changes of the power factor in a timely manner.

[0094] In summary, step S2 receives the digitized bus voltage sequence and digitized bus current sequence output from the data acquisition layer. After synchronous preprocessing to eliminate the impact of inter-channel time delay deviation and DC offset on calculation accuracy, it calculates the real-time power factor value based on instantaneous reactive power theory using either the PQ algorithm or the IP-IQ algorithm. Finally, it determines the current compensation state through a dual-threshold hysteresis comparison mechanism. The compensation state determination result output by the power factor detection module will serve as input information for the control decision layer, driving the subsequent reactive power compensation calculation unit to execute the corresponding compensation strategy.

[0095] The next step is step S3, harmonic and reactive power component extraction. The harmonic and reactive power component extraction algorithm module receives the digitized bus current sequence output in step S105 as input data. The algorithm module performs spectral analysis on the digitized bus current sequence to separate the fundamental reactive power component and each harmonic component, providing data for the accurate calculation of subsequent reactive power compensation. In this embodiment, the harmonic and reactive power component extraction algorithm module selects one of the following two algorithms to execute based on the system configuration.

[0096] Step S301: Perform windowing preprocessing. The harmonic and reactive component extraction algorithm module applies a window function to the digitized bus current sequence. The window function is selected from either the Hanning window or the Hamming window. The purpose of applying the window function is to reduce spectral leakage caused by data truncation. After windowing preprocessing is completed, the windowed bus current sequence is obtained.

[0097] Step S302: Perform Fast Fourier Transform (FFT). The harmonic and reactive power component extraction algorithm module performs FFT on the windowed bus current sequence. The FFT converts the windowed bus current sequence in the time domain into a complex coefficient sequence in the frequency domain. Each complex coefficient in the sequence corresponds to a frequency point; the magnitude of the complex coefficient represents the amplitude of the signal component at that frequency point, and the argument of the complex coefficient represents the phase of the signal component at that frequency point.

[0098] Step S303: Extract the fundamental frequency component. The harmonic and reactive power component extraction algorithm module locates the corresponding spectral position in the frequency domain based on the fundamental frequency of the DC lighting system in this embodiment. The fundamental frequency is pre-stored within the harmonic and reactive power component extraction algorithm module.

[0099] After locating the spectral position corresponding to the fundamental frequency, the harmonic and reactive component extraction algorithm module extracts the complex coefficients at that position and calculates the amplitude and phase of the fundamental current component based on the complex coefficients. The harmonic and reactive component extraction algorithm module then combines the phase information of the fundamental bus voltage component obtained in steps S201 to S203 to calculate the phase difference between the fundamental current component and the fundamental bus voltage component, thereby obtaining the fundamental reactive component value.

[0100] Step S304: Extract each harmonic component. The harmonic and reactive power component extraction algorithm module locates the corresponding spectral positions according to each harmonic frequency. Each harmonic frequency is an integer multiple of the fundamental frequency. For each harmonic frequency, the harmonic and reactive power component extraction algorithm module extracts the complex coefficients at the corresponding spectral positions and calculates the amplitude of each harmonic component based on the complex coefficients. After extraction, the harmonic and reactive power component extraction algorithm module calculates the effective value of the harmonic current based on the amplitude of each harmonic component.

[0101] When using the Fast Fourier Transform algorithm, steps S301 to S304 together complete the spectrum analysis of the bus current, separating the fundamental reactive component and each harmonic component.

[0102] The processing flow using the IP-IQ algorithm based on instantaneous reactive power theory is as follows:

[0103] Step S305: Perform coordinate transformation. The harmonic and reactive component extraction algorithm module performs Clark transformation on the digital bus current sequence to transform the current from the natural coordinate system to the two-phase stationary coordinate system, and obtain the p-component current and q-component current.

[0104] Step S306: Separate the DC and AC components. The harmonic and reactive power component extraction algorithm module filters the p-component current and q-component current using a low-pass filter to separate the DC and AC components. The p-component DC current and q-component DC current correspond to the fundamental active power component. The p-component AC current and q-component AC current correspond to the superposition of the fundamental reactive power and harmonic power.

[0105] Step S307: Extract the fundamental reactive component. The harmonic and reactive component extraction algorithm module separates the fundamental reactive component from the q-component AC current. The separation operation is achieved through synchronous detection: a sine reference signal and a cosine reference signal with the same frequency and phase as the fundamental frequency are generated. The q-component AC current is multiplied by the sine reference signal and the cosine reference signal, respectively. After the product is filtered by a low-pass filter to remove high-frequency components, the amplitude of the fundamental frequency component in the q-component AC current is obtained. This amplitude is the current amplitude of the fundamental reactive component.

[0106] When using the ip-iq algorithm based on instantaneous reactive power theory, steps S305 to S307 above together complete the extraction of the fundamental reactive component.

[0107] Step S308: Output the extraction results. The harmonic and reactive component extraction algorithm module provides the fundamental reactive component value obtained in step S303 or step S307, and the effective value of the harmonic current calculated based on the p-component and q-component AC components in step S304 or step S306, as output data to the reactive compensation calculation unit.

[0108] Both algorithms described above can extract the fundamental reactive component and the effective value of the harmonic current. The Fast Fourier Transform algorithm directly obtains detailed information about each harmonic through frequency domain analysis, while the IP-IQ algorithm obtains the fundamental reactive component through time domain filtering and synchronous detection. The fundamental reactive component value and the effective value of the harmonic current output by the harmonic and reactive component extraction algorithm module will serve as input information for the control decision layer, driving the subsequent reactive power compensation calculation unit to perform compensation calculations.

[0109] Regarding step S4 of the method in this embodiment, the reactive power compensation calculation unit receives the fundamental reactive component value and the effective value of the harmonic current output in step S308 as input data. Based on preset compensation accuracy requirements, the reactive power compensation calculation unit calculates the required compensation reactive power value for the current reactive power component, and accordingly determines the optimal capacitor combination and the optimal number of groups to be connected to the dynamic switching array for power compensation capacitors, providing a decision-making basis for subsequent capacitor switching execution. The specific workflow of the reactive power compensation calculation is as follows.

[0110] Step S401: The input data and configuration parameters are received. The reactive power compensation calculation unit obtains the fundamental reactive power component value and the effective value of the harmonic current from the harmonic and reactive power component extraction algorithm module. Simultaneously, the reactive power compensation calculation unit obtains the preset compensation accuracy requirement. The compensation accuracy requirement is characterized by the ratio of the remaining reactive power after compensation to the total apparent power not exceeding a set percentage. This set percentage is determined based on the specific application scenario of the DC lighting system and is typically between 5% and 10%.

[0111] Step S402: Calculate the required reactive power compensation value. The reactive power compensation calculation unit calculates the required reactive power compensation value based on the fundamental reactive component value and the effective value of the harmonic current. The required reactive power compensation value includes two parts: the first part is the fundamental compensation power required to compensate the fundamental reactive component, and the second part is the harmonic compensation power required to compensate the reactive power generated by each harmonic component.

[0112] The fundamental frequency compensation power is calculated by multiplying the fundamental frequency reactive component value by the effective value of the bus voltage. The harmonic compensation power is calculated by multiplying the squares of the effective values ​​of each harmonic current by the corresponding harmonic impedance and then summing the results. Finally, the fundamental frequency reactive power value and the harmonic reactive power value are added together to obtain the total required compensation reactive power.

[0113] Step S403: Determine feasible capacitor combination schemes for the dynamic switching array of power compensation capacitors. The reactive power compensation calculation unit obtains the capacitor configuration information of the dynamic switching array of power compensation capacitors. The capacitor configuration information includes the capacitance value of each group of capacitors in the dynamic switching array of power compensation capacitors, the number of the power semiconductor switching device corresponding to each group of capacitors, and all capacitor combination schemes that the dynamic switching array of power compensation capacitors can form.

[0114] The power compensation capacitor dynamic switching array consists of multiple groups of tiered capacitors, with the capacitance value of each group set according to a binary distribution or a stepped distribution. In the binary distribution, the capacitance value of each group increases in a power of 2 relationship, for example, the first group has a capacitance value of 1 unit, the second group has a capacitance value of 2 units, the third group has a capacitance value of 4 units, and so on. In the stepped distribution, the capacitance value of each group increases in an arithmetic or geometric sequence relationship.

[0115] The reactive power compensation calculation unit enumerates all feasible capacitor combination schemes based on the capacitor configuration information. Each capacitor combination scheme corresponds to a specific set of capacitor connection states, that is, determining whether each set of capacitors is connected to the bus or disconnected from the bus.

[0116] Step S404: Execute the optimization algorithm to select the optimal capacitor combination scheme. The reactive power compensation calculation unit uses a traversal search algorithm or a genetic algorithm to select the optimal scheme from all feasible capacitor combination schemes enumerated in step S403.

[0117] When using a traversal search algorithm, the reactive power compensation calculation unit sequentially calculates the total compensation capacitance value for each capacitor combination scheme. The total compensation capacitance value is calculated by adding the capacitance values ​​of all connected capacitor banks in the combination scheme. The deviation between the total compensation capacitance value of each capacitor combination scheme and the required reactive power compensation value is then calculated.

[0118] The deviation is calculated as the absolute value of the difference between the total compensation capacitance and the required reactive power compensation. After the iteration is complete, the capacitor combination scheme with the smallest deviation is selected as the preliminary optimal solution.

[0119] When using a genetic algorithm, the reactive power compensation calculation unit encodes each capacitor combination scheme as a binary chromosome. Each bit in the binary chromosome corresponds to the connection status of a group of capacitors, with 1 indicating connection and 0 indicating disconnection. The fitness function of the genetic algorithm is set to the square of the reciprocal of the deviation between the total compensation capacitance value and the required reactive power compensation value. The control parameters of the genetic algorithm are set as follows: population size of 20 to 100 individuals, crossover probability of 0.6 to 0.9, mutation probability of 0.01 to 0.1, and the maximum number of iterations is set according to the number of capacitor groups N. When N≤8, the maximum number of iterations is 50 generations, and when N>8, the maximum number of iterations is 100 generations. The algorithm retains chromosomes with higher fitness through selection, generates new chromosome combinations through crossover, and introduces new gene combinations through mutation. It terminates when the maximum number of iterations is reached or the fitness function value no longer increases for 10 consecutive generations. The capacitor combination scheme corresponding to the chromosome with the highest fitness is taken as the preliminary optimal solution.

[0120] Step S405: After adjusting the secondary optimization objective and obtaining the preliminary optimal solution, the reactive power compensation calculation unit performs a second-stage screening with minimizing the number of switching actions as the secondary optimization objective. The number of switching actions refers to the number of capacitor banks whose connection status needs to be changed when switching from the current capacitor combination scheme to a candidate scheme.

[0121] Based on the preliminary optimal solution obtained in step S404, the reactive power compensation calculation unit filters out all capacitor combination schemes with compensation errors less than the preset compensation accuracy requirement. From these schemes, the scheme with the fewest switching operations is selected as the final optimal capacitor combination scheme. If multiple schemes have the same number of switching operations, one of them is randomly selected.

[0122] The purpose of the secondary optimization objective is to prioritize the option that requires the fewest capacitor groups to be switched when multiple capacitor combination schemes can meet the compensation accuracy requirements, thereby avoiding unnecessary frequent switching operations and extending the service life of power semiconductor switching devices.

[0123] Step S406: Output the optimal capacitor combination scheme and the number of connected groups. The reactive power compensation calculation unit uses the final optimal capacitor combination scheme obtained in step S405 as output data. The final optimal capacitor combination scheme clearly indicates the connection status of each capacitor group in the power compensation capacitor dynamic switching array. The reactive power compensation calculation unit also counts the number of capacitor groups in the connected state in the final optimal capacitor combination scheme and outputs it as the optimal number of connected groups.

[0124] Step S4 described above constitutes the complete process of the reactive power compensation calculation stage. This stage calculates the required compensation capacity based on the fundamental reactive power component and the effective value of the harmonic current. An optimization algorithm is used to select the scheme with the smallest compensation error and the fewest switching operations from all feasible capacitor combinations. The optimal capacitor combination scheme and the optimal number of connected groups output by the reactive power compensation calculation unit will be used to drive the subsequent power compensation capacitor dynamic switching array to perform capacitor connection or disconnection operations.

[0125] Regarding step S5, the dynamic capacitor switching step, the power compensation capacitor dynamic switching array receives the optimal capacitor combination scheme and the optimal number of access groups output in step S406. Based on the optimal capacitor combination scheme, the power compensation capacitor dynamic switching array controls the on / off state of the power semiconductor switching devices corresponding to each group of capacitors, realizing the rapid dynamic access or disconnection of compensation capacitors. The specific workflow of dynamic capacitor switching is as follows.

[0126] Step S501: Obtain capacitor configuration information. The power compensation capacitor dynamic switching array consists of multiple groups of tiered capacitors. The capacitance value of each group of capacitors is set according to a binary distribution or a stepped distribution. In the binary distribution, the capacitance value of each group of capacitors increases in a power of 2 relationship. For example, the first group has a capacitance value of 1 unit, the second group has a capacitance value of 2 units, the third group has a capacitance value of 4 units, and so on. By connecting different combinations, various compensation needs from small to large can be covered. In the stepped distribution, the capacitance value of each group of capacitors increases in an arithmetic or geometric sequence relationship, which can achieve a smooth transition of compensation capacity during switching.

[0127] In the power compensation capacitor dynamic switching array, each group of capacitors corresponds to a power semiconductor switching device. These power semiconductor switching devices employ metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated-gate bipolar transistors (IGBTs). The turn-on and turn-off times of these power semiconductor switching devices are controlled within the microsecond range to ensure that the switching time for group access meets dynamic response requirements.

[0128] Step S502: Analyze the optimal capacitor combination scheme. The power compensation capacitor dynamic switching array obtains the optimal capacitor combination scheme from step S406. The optimal capacitor combination scheme clearly indicates the target connection state of each group of capacitors in the power compensation capacitor dynamic switching array, that is, whether each group of capacitors is connected to the bus or cut off from the bus.

[0129] The power compensation capacitor dynamic switching array compares the optimal capacitor combination scheme with the current capacitor combination scheme to determine the capacitor groups whose access status needs to be changed. The capacitor groups whose access status needs to be changed fall into two categories: the first category is capacitor groups currently in the access state but whose target state is to be switched out; the second category is capacitor groups currently in the switch-out state but whose target state is to be accessed.

[0130] Step S503: Perform the first-off-then-on sequence operation. The power compensation capacitor dynamic switching array performs the switching according to the first-off-then-on sequence operation.

[0131] The first step is to turn off the power semiconductor switching devices corresponding to the capacitor bank that needs to be cut off. After the turn-off operation is completed, wait for the preset discharge waiting time. The discharge waiting time is determined according to the capacitance value of the capacitor bank and the bus voltage level to ensure that the charge stored in the cut-off capacitor bank has been discharged to a safe level.

[0132] The second step involves turning on the power semiconductor switching devices corresponding to the capacitor bank to be connected after the discharge waiting time has ended. This sequential operation of disconnecting before turning on avoids circulating current surges that could damage the power semiconductor switching devices or cause a momentary drop in bus voltage when the newly connected capacitor bank is connected in parallel with the disconnected capacitor bank that has not yet been fully discharged.

[0133] Step S504: Implement hardware interlock and software protection. During the switching process, the power compensation capacitor dynamic switching array activates the hardware interlock mechanism and software protection mechanism.

[0134] The hardware interlocking mechanism is implemented through logic gate circuits: at any given time, for the same group of capacitors, the turn-on signal of the power semiconductor switching device that controls its connection to the bus and the turn-off signal of the power semiconductor switching device that controls its disconnection from the bus are mutually exclusive at the hardware level, ensuring that the same group of capacitors will not receive both the connection command and the disconnection command at the same time.

[0135] The software protection mechanism is implemented through a control program: before issuing a switching command, the main control chip of the power compensation capacitor dynamic switching array first verifies the legality and completeness of the optimal capacitor combination scheme, confirming that the scheme does not contain abnormal states, such as the target access state of the same group of capacitors being marked as both accessed and disconnected. The switching operation can only be executed after the verification is passed.

[0136] The hardware interlocking mechanism and the software protection mechanism work together to ensure that under any single point of failure, such as when the main control chip outputs an incorrect command or the communication line is interfered with, there will be no situation where two or more sets of capacitors are connected and disconnected at the same time.

[0137] Step S505: Status Feedback Confirmation and Fault Handling. After the switching is completed, the power compensation capacitor dynamic switching array reads the actual status of each power semiconductor switching device through the status feedback loop. The actual status includes the on state and the off state.

[0138] The power compensation capacitor dynamic switching array compares the actual state with the target state in the optimal capacitor combination scheme output in step S406 one by one. If the actual state of all power semiconductor switching devices matches the target state, the switching is considered successful, and the capacitor dynamic switching process ends.

[0139] If the actual state of one or more power semiconductor switching devices is inconsistent with the target state, a switching anomaly is determined, and the power compensation capacitor dynamic switching array triggers a fault handling procedure. The fault handling procedure includes: recording the anomaly information, reporting the fault status to the upper-level controller, and executing protective actions according to the preset safety strategy.

[0140] Step S5, based on the optimal capacitor combination scheme, achieves rapid connection or disconnection of tiered capacitors through a sequential operation of disconnecting first and then connecting. A dual mechanism of hardware interlocking and software protection ensures a safe and reliable switching process, and a status feedback loop confirms the switching result. After the power compensation capacitor dynamic switching array completes the switching, the power factor detection module acquires the updated power factor value, providing the subsequent collaborative control strategy engine with the current system power factor status.

[0141] Regarding step S6 in this embodiment, the collaborative control step involves the collaborative control strategy engine acquiring the compensation state determination result output in step S205 and the real-time power factor value calculated in step S203. The collaborative control strategy engine uses the real-time power factor value as a feedforward input signal, combines it with a preset brightness control target value, and calculates the brightness adjustment pre-compensation amount, providing feedforward input for subsequent brightness stabilization control. The specific workflow of the collaborative control is as follows.

[0142] Step S601: Obtain input data. The collaborative control strategy engine obtains the real-time power factor value from the power factor detection module. The collaborative control strategy engine obtains the preset brightness control target value from the system configuration parameters.

[0143] Step S602: Establish a coupled regulation model. The collaborative control strategy engine establishes a coupled regulation model between reactive power compensation and brightness control based on a digital signal processor or field-programmable gate array. The coupled regulation model represents the mapping relationship from the power factor value to the brightness regulation pre-compensation amount, and its core is to construct a transfer function from the power factor to the brightness regulation pre-compensation amount.

[0144] The transfer function is constructed as follows: First, a first sub-model is established to illustrate the impact of power factor changes on the bus voltage. Based on the reactive power changes generated when the power compensation capacitor dynamically switches the array to connect or disconnect capacitors, and combined with the equivalent impedance parameters of the DC bus, the transient change in bus voltage is calculated. Then, a second sub-model is established to illustrate the impact of bus voltage changes on lighting brightness. Based on the voltage-brightness response characteristic curve of the DC lighting drive power supply, the transient change in bus voltage is mapped to the transient change in lighting brightness. The first and second sub-models are then connected in series to obtain a complete causal chain from power factor changes to brightness changes, serving as the mathematical basis of the transfer function.

[0145] Step S603: Simplify the transfer function model. The cooperative control strategy engine approximates the transfer function established in step S602 as a combined model of a proportional element and a hysteresis element. The input of the proportional element is the change in power factor, and the output is the static value of the brightness adjustment pre-compensation amount. The hysteresis element characterizes the time delay between the occurrence of a power factor change and the generation of a measurable brightness response. The hysteresis element is approximated using a first-order inertial element, and its mathematical expression is:

[0146]

[0147] in, Let be the transfer function of the lag element. For the Laplace operator, This is the proportional gain coefficient. This is the time lag constant.

[0148] By connecting the proportional and hysteresis circuits in series, a simplified coupled regulation model is obtained. This simplified model takes the change in power factor as input, calculates the static pre-compensation amount through the proportional circuit, and then outputs the brightness regulation pre-compensation amount after applying a time delay through the hysteresis circuit.

[0149] Step S604 involves offline identification and online parameter tuning of the model parameters. The collaborative control strategy engine determines and updates the proportional gain coefficient and lag time constant. The offline identification phase is performed before the DC lighting system is put into operation. A reactive power disturbance signal with known amplitude and rate of change is injected into the bus of the DC lighting system. The change process of the power factor and the response process of the lighting brightness are recorded. The least squares fitting algorithm is used to estimate the proportional gain coefficient and lag time constant.

[0150] The online parameter tuning phase is performed during normal system operation. Based on the deviation between the actual brightness response and the model prediction output, the gradient descent method is used to make slight corrections to the proportional gain coefficient and the lag time constant. The online parameter tuning is triggered when the absolute value of the deviation between the actual brightness value and the preset brightness control target value is greater than 5% and the duration exceeds 1 second.

[0151] Step S605: Calculate and output the brightness adjustment pre-compensation amount. The cooperative control strategy engine compares the real-time power factor value with the power factor value at the previous moment to obtain the change in power factor. This change is input into the simplified coupled control model from step S603, and after proportional gain amplification and lag processing, the brightness adjustment pre-compensation amount is output. The brightness adjustment pre-compensation amount represents the amount of brightness control that needs to be applied in advance to offset the impact of reactive power compensation adjustment on brightness. The cooperative control strategy engine sends the calculated brightness adjustment pre-compensation amount to the brightness stabilization control loop as the input signal for the feedforward control channel.

[0152] Step S6 establishes a coupled adjustment model between power factor change and brightness change, simplifying the model to a proportional-hysteresis loop. It then combines offline identification and online parameter tuning to determine the model parameters, achieving a mapping from reactive power compensation adjustment to brightness pre-compensation. The brightness adjustment pre-compensation amount output by the collaborative control strategy engine is sent as a feedforward input signal to the brightness stabilization control loop for superposition on top of feedback control.

[0153] Finally, in step S7, brightness stabilization control is implemented. The brightness stabilization control loop receives the brightness adjustment pre-compensation amount output in step S606 as a feedforward input signal. The loop also receives the actual brightness value detected by the light intensity sensor. Based on the deviation between the actual brightness value and the preset brightness control target value, the loop performs closed-loop correction using a proportional-integral-derivative (PID) control algorithm. It then superimposes the feedforward input signal and the feedback correction signal to synthesize the final brightness adjustment control signal, outputting it to the DC lighting drive power supply. This achieves stable brightness maintenance during reactive power compensation dynamic adjustment. The specific workflow of brightness stabilization control is as follows.

[0154] Step S701: Receive input data. The brightness stabilization control loop obtains the brightness adjustment pre-compensation amount from the collaborative control strategy engine. The brightness stabilization control loop obtains the actual brightness value from the light intensity sensor. The light intensity sensor is set within the illumination area of ​​the DC lighting system to detect the actual illuminance value of that area. The brightness stabilization control loop obtains the preset brightness control target value from the system configuration parameters.

[0155] In step S702, feedforward control is executed. The brightness stabilization control loop uses the brightness adjustment pre-compensation amount as the input signal to the feedforward control channel. The feedforward control channel generates a corresponding feedforward compensation amount based on the brightness adjustment pre-compensation amount. The feedforward compensation amount is output in advance before the reactive power compensation adjustment has an actual impact on the brightness, in order to counteract the impending brightness disturbance.

[0156] Step S703: Execute feedback control. The brightness stabilization control loop calculates the deviation between the preset brightness control target value and the actual brightness value detected by the light intensity sensor. The deviation is calculated by subtracting the preset brightness control target value from the actual brightness value, or subtracting the actual brightness value from the preset brightness control target value. The two methods are kept consistent by adjusting the sign of the subsequent control algorithm.

[0157] The brightness stabilization control loop inputs the deviation value into the proportional-integral-derivative (PID) control algorithm. The PID algorithm comprises three parallel channels: a proportional channel, an integral channel, and a derivative channel. The proportional channel multiplies the deviation value by a proportional parameter to generate a correction amount proportional to the current deviation; the proportional parameter determines the system's response strength to the deviation. The integral channel integrates the deviation value over time and multiplies it by an integral parameter to generate a correction amount proportional to the accumulated deviation; the integral parameter is used to eliminate steady-state error. The derivative channel differentiates the deviation value over time and multiplies it by a derivative parameter to generate a correction amount proportional to the rate of change of the deviation; the derivative parameter is used to predict the trend of deviation change and apply damping in advance.

[0158] The brightness stabilization control loop adds the outputs of the proportional, integral, and derivative channels to obtain the feedback correction value. The magnitude and direction of the feedback correction value are dynamically adjusted according to the real-time deviation, so that the actual brightness value continuously approaches the preset brightness control target value.

[0159] Step S704: Superimpose and synthesize the control signal. The brightness stabilization control loop superimposes and synthesizes the feedforward compensation amount obtained in step S702 and the feedback correction amount obtained in step S703. The superposition and synthesis method is to add the feedforward compensation amount and the feedback correction amount to obtain the final brightness adjustment control signal.

[0160] The brightness adjustment control signal can be an analog voltage signal or a digital control word. When using an analog voltage signal, a digital-to-analog converter (DAC) converts the digital control quantity into a standard analog signal of 0 to 10 volts or 4 to 20 milliamps. When using a digital control word, the duty cycle control word of the pulse width modulation signal is directly generated.

[0161] In step S705, a control signal is output to the drive power supply. The brightness stabilization control loop transmits the brightness adjustment control signal obtained in step S704 to the DC lighting drive power supply. The brightness adjustment control signal is transmitted to the control input terminal of the DC lighting drive power supply via wired communication or pulse width modulation signal transmission.

[0162] The DC lighting driver adjusts its output parameters according to the brightness adjustment control signal. When the brightness adjustment control signal is a pulse width modulation (PWM) signal, the driver adjusts the output current or output voltage according to the duty cycle of the PWM signal. When the brightness adjustment control signal is an analog voltage signal, the driver adjusts the output current or output voltage according to the amplitude of the analog voltage. The changes in the output current or output voltage of the driver directly change the luminous intensity of the LED lighting fixture, achieving precise control of the lighting brightness.

[0163] Step S7 adopts a feedforward and feedback composite control structure. The feedforward channel outputs compensation in advance based on the brightness adjustment pre-compensation amount to suppress disturbances. The feedback channel eliminates steady-state error and dynamic deviation through proportional-integral-derivative control algorithm. After the two channel signals are superimposed, they drive the DC lighting drive power supply to adjust the output, thereby achieving stable maintenance of lighting brightness during the reactive power compensation dynamic adjustment process.

[0164] For ease of understanding, in a specific application example, assume that the DC lighting system is installed in the underground parking area of ​​a large commercial building. This area adopts a distributed DC power supply architecture, with the DC bus supplying power to the LED lighting fixtures distributed on each floor. The lighting load in the underground parking lot exhibits obvious time-of-day characteristics. During peak hours, all lighting fixtures are on, while during off-peak hours, only a small number of guide lights and monitoring lights are on. The reactive power fluctuations generated during load switching cause transient changes in the DC bus voltage, thereby affecting the stability of the lighting brightness.

[0165] Under the intelligent DC lighting brightness adaptive control method of the present invention, the system monitors the voltage and current signals of the DC bus in real time, calculates the current power factor value and extracts the reactive power component. When a sudden load change is detected that causes the power factor to drop below the threshold, the reactive power compensation calculation unit quickly calculates the required compensation capacity and determines the optimal capacitor combination. The power compensation capacitor dynamic switching array completes the connection operation of the compensation capacitor in a very short time.

[0166] Meanwhile, the collaborative control strategy engine calculates the brightness pre-compensation amount based on the change in power factor using a coupled adjustment model. The brightness stabilization control loop uses this pre-compensation amount as a feedforward input and superimposes it into the feedback control signal. The brightness control signal output to the DC lighting drive power supply is synchronously adjusted in reverse at the moment the compensation capacitor is connected, effectively offsetting the impact of bus voltage fluctuations on lighting brightness. Through the collaborative control mechanism of this invention, the fluctuation range of lighting brightness in the underground parking lot is controlled within an acceptable range when switching between different load conditions, avoiding the brightness flickering phenomenon commonly found in traditional independent control systems.

[0167] On the other hand, the intelligent DC lighting brightness adaptive control system provided by the present invention includes:

[0168] The DC bus voltage and current real-time acquisition unit is used to synchronously acquire the real-time voltage and current signals of the DC bus and convert the real-time voltage and current signals into digital sequences.

[0169] The power factor detection module is used to receive digital sequences, calculate the real-time power factor value based on the instantaneous reactive power theory, and determine the current compensation status based on the comparison result between the real-time power factor value and the preset threshold.

[0170] The harmonic and reactive component extraction algorithm module is used to perform spectrum analysis or time-domain filtering on digital sequences to separate the fundamental reactive component value and the effective value of the harmonic current.

[0171] The reactive power compensation calculation unit is used to calculate the required reactive power compensation value based on the fundamental reactive component value and the effective value of harmonic current, and to determine the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array.

[0172] A power compensation capacitor dynamic switching array is used to dynamically connect or disconnect capacitors according to the optimal capacitor combination scheme.

[0173] The collaborative control strategy engine is used to obtain the real-time power factor value, and uses the real-time power factor value as a feedforward input signal to calculate the brightness adjustment pre-compensation amount through a pre-built coupled adjustment model.

[0174] The brightness stabilization control loop receives the brightness adjustment pre-compensation amount as a feedforward input signal, and performs feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. The feedforward compensation amount and the feedback correction amount are superimposed and synthesized to output the final brightness adjustment control signal.

[0175] The collaborative control strategy engine is connected to the brightness stabilization control loop to provide the brightness adjustment pre-compensation amount to the brightness stabilization control loop.

[0176] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be regarded as exemplary and non-limiting in all respects.

[0177] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for adaptive control of intelligent DC lighting brightness, characterized in that, include: The DC bus voltage and current real-time acquisition unit synchronously acquires the real-time voltage signal and real-time current signal of the DC bus, and converts the real-time voltage signal and the real-time current signal into a digital sequence. The power factor detection module receives the digital sequence, calculates the real-time power factor value based on the instantaneous reactive power theory, and determines the current compensation state based on the comparison result of the real-time power factor value and the preset threshold. The harmonic and reactive component extraction algorithm module performs spectral analysis or time-domain filtering on the digital sequence to separate the fundamental reactive component value and the effective value of the harmonic current. The reactive power compensation calculation unit calculates the required reactive power compensation value based on the fundamental reactive component value and the effective value of the harmonic current, and determines the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array. The collaborative control strategy engine obtains the real-time power factor value, uses the real-time power factor value as a feedforward input signal, and calculates the brightness adjustment pre-compensation amount through a pre-built coupled adjustment model. The brightness stabilization control loop receives the brightness adjustment pre-compensation amount as a feedforward input signal, and performs feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. The feedforward compensation amount and the feedback correction amount are superimposed and synthesized to output the final brightness adjustment control signal.

2. The intelligent DC lighting brightness adaptive control method according to claim 1, characterized in that, The brightness stabilization control loop performs feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. It then combines the feedforward compensation and feedback correction to output the final brightness adjustment control signal, specifically including: The brightness stabilization control loop uses the brightness adjustment pre-compensation amount as the input to the feedforward control channel to generate the feedforward compensation amount; The brightness stabilization control loop calculates the deviation between the preset brightness control target value and the actual brightness value, and inputs the deviation value into the proportional-integral-derivative control algorithm to generate the feedback correction amount. The brightness stabilization control loop adds the feedforward compensation amount and the feedback correction amount to synthesize the brightness adjustment control signal and outputs it.

3. The intelligent DC lighting brightness adaptive control method according to claim 1, characterized in that, The process of pre-building a coupled regulation model in the collaborative control strategy engine includes: A first sub-model is established to study the effect of power factor variation on bus voltage, and a second sub-model is established to study the effect of bus voltage variation on lighting brightness. By connecting the first sub-model and the second sub-model in series, a transfer function from power factor change to brightness change is obtained, and the transfer function is approximated as a combined model of proportional element and hysteresis element connected in series. The proportional gain coefficient of the proportional element and the lag time constant of the lag element are identified offline and adjusted online to obtain the coupled adjustment model. The online adjustment adopts the gradient descent method, and its trigger condition is that the absolute value of the deviation between the actual brightness value and the preset brightness control target value is greater than 5% and the duration is more than 1 second.

4. The intelligent DC lighting brightness adaptive control method according to claim 1, characterized in that, The reactive power compensation calculation unit determines the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array, specifically including: Among multiple capacitor combination schemes that meet the preset compensation accuracy requirements, a secondary optimization objective is used to minimize the number of switching actions for secondary screening; the number of switching actions refers to the number of capacitor groups whose access status needs to be changed when switching from the current capacitor combination scheme to a candidate scheme. The reactive power compensation calculation unit selects the capacitor combination scheme with the fewest switching operations as the final optimal capacitor combination scheme.

5. The intelligent DC lighting brightness adaptive control method according to claim 4, characterized in that, Before the secondary screening, the reactive power compensation calculation unit also performs the following steps: Using a traversal search algorithm or a genetic algorithm, the scheme with the smallest deviation between the total compensation capacitance value and the required compensation reactive power value is selected from all feasible capacitor combination schemes of the power compensation capacitor dynamic switching array as the preliminary optimal solution; The reactive power compensation calculation unit takes the preliminary optimal solution and other capacitor combination schemes that meet the compensation error requirements as the objects of the secondary screening.

6. The intelligent DC lighting brightness adaptive control method according to claim 5, characterized in that, When the power compensation capacitor dynamic switching array performs capacitor switching, it operates according to a sequence of first turning off the power semiconductor switching devices corresponding to the capacitor group to be switched out, waiting for a preset discharge time, and then turning on the power semiconductor switching devices corresponding to the capacitor group to be connected. During the switching process, a hardware interlock mechanism and a software protection mechanism are activated. The hardware interlock mechanism makes the connection signal and the disconnection signal of the same group of capacitors mutually exclusive at the hardware level, and the software protection mechanism verifies the legality and integrity of the optimal capacitor combination scheme.

7. The intelligent DC lighting brightness adaptive control method according to claim 1, characterized in that, The power factor detection module determines the current compensation state based on the comparison result between the real-time power factor value and a preset threshold, specifically including: The real-time power factor value is compared with the preset undercompensation and overcompensation thresholds. A hysteresis width is provided between the undercompensation judgment threshold and the overcompensation judgment threshold. When the real-time power factor value changes within the hysteresis width, the current compensation state judgment result remains unchanged.

8. The intelligent DC lighting brightness adaptive control method according to claim 1, characterized in that, The method divides the control process into four logical levels: The data acquisition layer is composed of the real-time DC bus voltage and current acquisition units; The signal processing layer consists of the power factor detection module and the harmonic and reactive component extraction algorithm module; The control decision layer is composed of the reactive power compensation calculation unit and the collaborative control strategy engine; The power compensation capacitor dynamic switching array and the brightness stabilization control loop constitute the execution drive layer; The data acquisition layer, the signal processing layer, the control decision layer, and the execution drive layer are connected in sequence to form a closed-loop control path from electrical parameter acquisition to brightness control signal output.

9. The intelligent DC lighting brightness adaptive control method according to claim 1, characterized in that, The process of time-domain filtering of the digital sequence by the harmonic and reactive component extraction algorithm module includes: Perform a Clarke transform on the digitized bus current sequence in the digital sequence to transform it to a two-phase stationary coordinate system to obtain the p-component current and the q-component current. The p-component current and the q-component current are filtered by a low-pass filter to separate the DC component of the corresponding fundamental active power and the AC component of the corresponding harmonic and reactive power. The fundamental reactive component is extracted from the AC component by synchronous detection.

10. An intelligent DC lighting brightness adaptive control system, applied to the method described in any one of claims 1-9, characterized in that, include: A real-time acquisition unit for DC bus voltage and current is used to synchronously acquire real-time voltage and current signals of the DC bus and convert the real-time voltage and current signals into digital sequences. The power factor detection module is used to receive the digital sequence, calculate the real-time power factor value based on the instantaneous reactive power theory, and determine the current compensation state based on the comparison result of the real-time power factor value and the preset threshold. The harmonic and reactive component extraction algorithm module is used to perform spectrum analysis or time-domain filtering on the digital sequence to separate the fundamental reactive component value and the effective value of the harmonic current. The reactive power compensation calculation unit is used to calculate the required reactive power compensation value based on the fundamental reactive component value and the effective value of the harmonic current, and to determine the optimal capacitor combination scheme to be connected to the power compensation capacitor dynamic switching array. The power compensation capacitor dynamic switching array is used to dynamically connect or disconnect capacitors according to the optimal capacitor combination scheme. The collaborative control strategy engine is used to obtain the real-time power factor value, use the real-time power factor value as a feedforward input signal, and calculate the brightness adjustment pre-compensation amount through a pre-built coupled adjustment model. The brightness stabilization control loop is used to receive the brightness adjustment pre-compensation amount as a feedforward input signal, and to perform feedback correction based on the deviation between the actual brightness value detected by the light intensity sensor and the preset brightness control target value. The feedforward compensation amount and the feedback correction amount are superimposed and synthesized to output the final brightness adjustment control signal. The collaborative control strategy engine is connected to the brightness stabilization control loop to provide the brightness adjustment pre-compensation amount to the brightness stabilization control loop.

Images