TO3P packaging MOSFET chip with Clip structure

Abstract

The utility model discloses a TO3P packaging MOSFET chip with a Clip structure, comprising a bottom base island, a packaging cover installed on the bottom base island, a packaging space between the packaging cover and the bottom base island, a positioning frame arranged inside the packaging space, a heat radiation plate arranged on the packaging cover and having a heat radiation effect, a heat conduction layer filled in the positioning frame, and a heat conduction layer filled in the heat conduction layer. The packaging cover is tightly combined with the bottom base island to form a packaging space for sealing the chip, when the chip works, heat generated by the chip is transmitted to the heat conduction layer and then is conducted to the heat dissipation plate through the heat conduction layer, and the heat dissipation plate is arranged on the packaging cover to serve as a main heat dissipation structure. The heat conducted by the heat conduction layer is further dissipated to the environment, and the stable working temperature of the chip is kept.

Description

Technical Field

[0001] The utility model relates to a TO3P packaged MOSFET chip with a Clip structure, belonging to the technical field of chip packaging. Background Art

[0002] In the existing TO3P packaged MOSFET chip technology, the design of the heat dissipation structure is the key to solving the heat dissipation problem. However, in practical applications, the traditional heat dissipation structure often has the limitation of low heat dissipation efficiency. In a high-power, high-frequency working environment, the heat generated by the chip far exceeds the heat dissipation capacity of the heat dissipation structure, resulting in excessively high internal temperature of the chip. Therefore, a TO3P packaged MOSFET chip with a Clip structure is proposed. Utility Model Content

[0003] The utility model aims to provide a TO3P packaged MOSFET chip with a Clip structure to solve the problems raised in the above background technology.

[0004] In order to achieve the above-mentioned purpose, the utility model adopts the following technical solution: a TO3P packaged MOSFET chip with a Clip structure, comprising:

[0005] bottom base island;

[0006] A packaging cover is mounted on the bottom base island, and there is a packaging space for packaging the chip between the packaging cover and the bottom base island;

[0007] A positioning frame is arranged in the packaging space to define and maintain the packaging position of the chip in the packaging space, and the positioning frame is fixed to the middle of the inner surface of the packaging cover to ensure that the chip will not be displaced during the packaging process, thereby ensuring the stability of the chip after packaging;

[0008] A heat sink, the heat sink is arranged on the packaging cover, and the heat sink has a side facing outward and a side facing the packaging space;

[0009] Among them, the positioning frame is filled with a thermal conductive layer, which is made of a material with high thermal conductivity, such as thermal conductive silicone. One side of the thermal conductive layer is in contact with the chip surface, and the other side is in contact with the side of the heat sink facing the packaging space. The heat sink is arranged on the packaging cover as the main heat dissipation structure, which further dissipates the heat conducted by the thermal conductive layer into the environment to maintain a stable operating temperature of the chip.

[0010] Preferably, a plurality of heat dissipation protrusions are evenly distributed on the inner surface of the heat dissipation plate, and a plurality of grooves adapted to the heat dissipation protrusions are provided on the surface of the heat conductive layer.

[0011] Preferably, a plurality of side grooves are formed on the inner side wall of the positioning frame, each side groove is filled with a heat-conducting column, the heat-conducting column contacts the side of the chip, and one end of the heat-conducting column is connected to the heat-conducting layer.

[0012] Preferably, the cross-sectional profile of the side groove is a concave square, a semicircle or any combination thereof.

[0013] Preferably, a gap is left between the positioning frame and the bottom base island to form an air layer or a heat dissipation channel, which is helpful for heat dissipation, thereby further improving the overall heat dissipation performance.

[0014] Preferably, a layer of primer is coated on the bottom base island for adhering the chip to the bottom base island. By coating a layer of primer on the bottom base island for adhering the chip to the bottom base island, the stability and reliability of the packaged chip are further improved.

[0015] Preferably, a Clip structure TOP packaged MOSFET chip further comprises a plurality of pins, the plurality of pins are distributed on one side of the package cover, and one end of the plurality of pins is inserted into the package space from the connection between the bottom base island and the package cover and electrically connected to the chip therein.

[0016] Compared with existing technologies:

[0017] 1. The utility model forms a packaging space for a closed chip by tightly combining the packaging cover with the bottom base island. When the chip is working, the heat generated by the chip is transferred to the heat-conducting layer, and then conducted to the heat sink by the heat-conducting layer. The heat sink is arranged on the packaging cover as the main heat dissipation structure, which further dissipates the heat conducted by the heat-conducting layer into the environment to maintain a stable working temperature of the chip.

[0018] 2. The utility model uses the side grooves on the inner wall of the positioning frame and the heat-conducting columns filled therein, so that the heat on the side of the chip can be quickly transferred to the heat-conducting layer and dissipated to the environment through the heat dissipation plate together with the heat generated on the top surface, thereby improving the heat dissipation efficiency of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the structure of the utility model;

[0020] Figure 2 For the utility model Figure 1 Sectional view at AA;

[0021] Figure 3 It is a cross-sectional exploded view of the bottom base island, packaging cover, positioning frame and heat conducting layer of the utility model;

[0022] Figure 4 This is a front view of the packaging cover, positioning frame and side groove of the utility model. Figure 1 ;

[0023] Figure 5 This is a front view of the packaging cover, positioning frame and side groove of the utility model. Figure 2 .

[0024] In the figure: 1. bottom base island, 2. packaging cover, 3. positioning frame, 301. side groove, 4. thermal conductive layer, 401. groove, 5. heat sink, 501. heat dissipation protrusion, 6. thermal conductive column, 7. bottom glue, 8. pin. DETAILED DESCRIPTION

[0025] The present invention is described below with specific embodiments, but is not intended to be a limitation of the present invention.

[0026] Embodiment 1

[0027] like Figure 1-Figure 5 As shown, in this embodiment, a TO3P packaged MOSFET chip with a Clip structure is provided, comprising a bottom base island 1, a packaging cover 2 is installed on the bottom base island 1, and a packaging space for packaging the chip is provided between the packaging cover 2 and the bottom base island 1; a positioning frame 3 is provided inside the packaging space, which is used to define and maintain the packaging position of the chip in the packaging space, and the positioning frame 3 is fixed to the middle part of the inner surface of the packaging cover 2 to ensure that the chip will not be displaced during the packaging process, thereby ensuring the stability of the chip after packaging; a heat sink 5 for heat dissipation is provided on the packaging cover 2, and the heat sink 5 has a side facing outward and a side facing the packaging space;

[0028] The positioning frame 3 is filled with a heat-conducting layer 4, which is made of a material with high thermal conductivity, such as thermally conductive silica gel. One side of the heat-conducting layer 4 contacts the surface of the chip, and the other side contacts the side of the heat sink 5 facing the packaging space. The heat sink 5 is arranged on the packaging cover 2 as the main heat dissipation structure, which further dissipates the heat conducted by the heat-conducting layer 4 to the environment, so as to maintain a stable working temperature of the chip.

[0029] During the packaging process, the chip (MOSFET chip) is first placed in the positioning frame 3, and one surface of the chip is tightly fitted with the thermal conductive layer 4. Then, the packaging cover 2 is tightly combined with the bottom base island 1 to form a closed packaging space. The thermal conductive layer 4 can efficiently conduct the heat generated by the chip to the heat sink 5 and finally dissipate it into the environment.

[0030] This Clip-structured TO3P packaged MOSFET chip structure not only provides stable positioning, but also ensures the stability and reliability of the chip under high-power working conditions.

[0031] There is a gap between the positioning frame 3 and the bottom base island 1 to form an air layer or a heat dissipation channel, which helps to dissipate heat. When the chip is working, the generated heat can be more effectively transferred to the outside of the package through these channels, thereby further improving the overall heat dissipation performance.

[0032] A layer of primer 7 is coated on the bottom base island 1 for adhering the chip to the bottom base island 1. By coating a layer of primer 7 on the bottom base island 1 for adhering the chip to the bottom base island 1, the stability and reliability of the packaged chip are further improved.

[0033] A TO3P packaged MOSFET chip with a Clip structure also includes multiple pins 8, which are distributed on one side of the package cover 2, and one end of the multiple pins 8 is inserted into the package space from the connection between the bottom base island 1 and the package cover 2 and electrically connected to the chip therein.

[0034] Embodiment 2

[0035] like Figure 2-Figure 3 As shown, on the basis of the first embodiment, in order to further improve the heat dissipation efficiency, the inner surface of the heat sink 5 is evenly distributed with a plurality of heat dissipation protrusions 501, and the surface of the thermal conductive layer 4 is provided with a plurality of grooves 401 adapted to the heat dissipation protrusions 501. When the chip is working, the generated heat is firstly conducted to the heat sink 5 through the thermal conductive layer 4. Since the heat dissipation protrusions 501 are closely matched with the grooves 401, the heat can be transferred to the heat sink 5 more quickly and dissipated into the environment through its outer surface, which effectively reduces the thermal resistance and improves the heat dissipation efficiency, thereby ensuring that the chip can still maintain a stable temperature and working performance under high-power working conditions.

[0036] Embodiment 3

[0037] like Figure 3-Figure 5 As shown, on the basis of the first embodiment, in order to further improve the heat dissipation efficiency, a plurality of side grooves 301 are opened on the inner wall of the positioning frame 3 in this embodiment, and the interior of each side groove 301 is filled with a heat-conducting column 6, the heat-conducting column 6 is in contact with the side of the chip, and one end of the heat-conducting column 6 is connected to the heat-conducting layer 4. When the chip is working, the heat on the side of the chip can be quickly conducted to the heat-conducting layer 4 through the side grooves 301 on the inner wall of the positioning frame 3 and the heat-conducting column 6 filled therein, and together with the heat generated on the top surface, it is dissipated to the environment through the heat dissipation plate 5, thereby improving the heat dissipation efficiency of the chip.

[0038] like Figure 4 , Figure 5As shown, the cross-sectional profile of the side groove 301 is a concave square, semicircle or any combination thereof. When the chip is working, a certain amount of heat will be generated on its side, and the heat generated on the side can be quickly conducted to the thermal conductive column 6 filled therein. The cross-sectional profile of the side groove 301 is designed with a concave square, semicircle or any combination thereof. The thermal conductive column 6 can form a close and uniform contact with the side of the chip, thereby ensuring that the heat can be efficiently conducted to the thermal conductive layer 4 and finally dissipated into the environment.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate rather than limit the technical solutions of the present invention. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that the present invention can still be modified or replaced by equivalents. Any modification or partial replacement that does not depart from the spirit and scope of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A TO3P packaged MOSFET chip with a Clip structure, characterized in that: include: Bottom base island (1); A packaging cover (2), the packaging cover (2) being mounted on the bottom base island (1), and a packaging space for packaging chips exists between the packaging cover (2) and the bottom base island (1); A positioning frame (3), the positioning frame (3) being arranged in the packaging space and used for defining and maintaining the packaging position of the chip in the packaging space, and the positioning frame (3) being fixed to the middle part of the inner surface of the packaging cover (2); A heat dissipation plate (5), the heat dissipation plate (5) being arranged on the packaging cover (2), the heat dissipation plate (5) having a side facing outwards and a side facing the packaging space; The positioning frame (3) is filled with a heat-conducting layer (4), one side of the heat-conducting layer (4) is in contact with the chip surface, and the other side is in contact with a side of the heat dissipation plate (5) facing the packaging space.

2. A TO3P packaged MOSFET chip with a Clip structure according to claim 1, characterized in that: The inner surface of the heat dissipation plate (5) is evenly distributed with a plurality of heat dissipation protrusions (501), and the surface of the heat conductive layer (4) is provided with a plurality of grooves (401) adapted to the heat dissipation protrusions (501).

3. A TO3P packaged MOSFET chip with a Clip structure according to claim 1, characterized in that: A plurality of side grooves (301) are provided on the inner side wall of the positioning frame (3), and a heat-conducting column (6) is filled inside each side groove (301). The heat-conducting column (6) contacts the side edge of the chip, and one end of the heat-conducting column (6) is connected to the heat-conducting layer (4).

4. A TO3P packaged MOSFET chip with a Clip structure according to claim 3, characterized in that: The cross-sectional profile of the side groove (301) is a concave square, semicircular or any combination thereof.

5. A TO3P packaged MOSFET chip with a Clip structure according to claim 1, characterized in that: A spacing is left between the positioning frame (3) and the bottom base island (1).

6. A TO3P packaged MOSFET chip with a Clip structure according to claim 1, characterized in that: The bottom base island (1) is coated with a layer of primer (7) for adhering the chip to the bottom base island (1).

7. A TO3P packaged MOSFET chip with a Clip structure according to claim 1, characterized in that: It also includes a plurality of pins (8), which are distributed on one side of the packaging cover (2), and one end of the plurality of pins (8) is inserted into the packaging space from the connection between the bottom base island (1) and the packaging cover (2) and electrically connected to the chip therein.

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