Two-way CAN interface adapter plate based on 3U-CPCI bus

Abstract

The utility model discloses a two-way CAN interface adapter plate based on a 3U-CPCI bus, and relates to the technical field of integrated circuits, the two-way CAN interface adapter plate comprises an adapter plate, the adapter plate is provided with a CPCI interface, a bottom plate interface and a power supply module, the input end of the power supply module is electrically connected with the bottom plate interface, the whole adapter plate adopts a 3U size, and the power supply module is electrically connected with the CPCI interface. The adapter plate can be widely applied to the fields of military computers and industrial personal computers, a main control unit in the adapter plate takes an XC7Z020-2CLG484 chip as a main control, adopted CPCI interfaces and the like are high in applicability, a CPCI interface bus is directly connected to the main control unit, slave interface equipment is realized by a programmable logic array end in the main control unit, a bridging or adapter chip is not needed, the integration degree is high, and the adapter plate can be widely applied to the fields of military computers and industrial personal computers. The coding unit is connected to the PS end of a control chip in the main control unit, the main control unit serves as a controller of the coding unit and a main controller at the same time, the size is saved, the development difficulty is low, the bottom plate interface provides two CAN interfaces, and the structure is simple.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuits, in particular to a dual-channel CAN interface adapter board based on a 3U-CPCI bus. Background Art

[0002] The dual-CAN interface adapter board is a module designed specifically for industrial control and automation, enabling efficient communication and data transmission. With the growth of the Industrial Internet of Things (IIoT), the CAN (Controller Area Network) protocol is widely used in automotive, manufacturing, and smart devices due to its reliability and real-time performance. This adapter board can be easily integrated with other standard modules, enhancing system flexibility and scalability. Through its dual interfaces, the board can simultaneously support multiple CAN networks, providing efficient data exchange solutions for complex systems and meeting the demands of modern industrial applications.

[0003] The existing dual-channel CAN interface adapter board is large in size and complex in structure, resulting in low flexibility, high development difficulty, and difficulty in widespread application. Therefore, it is necessary to provide a dual-channel CAN interface adapter board based on the 3U-CPCI bus to solve the above problems. Utility Model Content

[0004] In order to solve the above technical problems, a dual-channel CAN interface adapter board based on the 3U-CPCI bus is provided. This technical solution solves the problem that the existing dual-channel CAN interface adapter board proposed in the above background technology is large in size and complex in structure, resulting in low flexibility, high development difficulty and difficulty in widespread application.

[0005] In order to achieve the above purpose, the technical solution adopted by this utility model is:

[0006] A dual-channel CAN interface adapter board based on a 3U-CPCI bus, comprising:

[0007] An adapter board, wherein the adapter board is provided with a CPCI interface and a baseboard interface;

[0008] A power module, wherein the input end of the power module is electrically connected to the baseboard interface, and the output end of the power module is electrically connected to the main control unit, the dynamic random access memory unit, the encoding unit, the serial port transceiver unit, the non-volatile flash memory unit and the clock crystal oscillator unit;

[0009] Among them, the dynamic random access memory unit is electrically connected to the main control unit for realizing the caching of programs, data and intermediate results. One end of the main control unit is electrically connected to the CPCI interface, and the other end is electrically connected to the encoding unit. One end of the encoding unit is electrically connected to the baseboard interface, and the baseboard interface is electrically connected to the serial port transceiver unit. The serial port transceiver unit interacts with the main control unit. One end of the main control unit is electrically connected to the non-volatile flash memory unit and the clock crystal oscillator unit at the same time.

[0010] In an optional embodiment, the encoding unit includes:

[0011] The fifth chip, the sixth chip and the eighth chip, several filter capacitors are electrically connected between the second pin and the tenth pin of the fifth chip, the sixth pin and the seventh pin of the sixth chip are electrically connected to a relay and an inductor respectively, the fifth pin of the sixth chip is connected in series with a fourteenth capacitor, and the fifth pin of the sixth chip is electrically connected to the sixth pin and the seventh pin. The peripheral circuit of the eighth chip is the same as that of the sixth chip.

[0012] In an optional embodiment, the dynamic random access memory unit includes:

[0013] A dynamic random access memory chip, wherein the peripheral circuit of the dynamic random access memory chip is provided with a 77th resistor and an 80th resistor, and is also provided with a 68th capacitor and an 89th capacitor, and one end of the 68th capacitor and the 89th capacitor is grounded and the other end is electrically connected to the H7 port and the P7 port of the dynamic random access memory chip.

[0014] In an optional embodiment, the main control unit includes:

[0015] An external communication chip, the peripheral circuit of the external communication chip is provided with a ninety-fourth resistor and a one hundred and thirty-fourth capacitor, one end of the one hundred and thirty-fourth capacitor is grounded, and the other end is electrically connected to the C9 port of the external communication chip and the ninety-fourth resistor at the same time.

[0016] In an optional embodiment, the main control unit further includes:

[0017] The first control chip and the second control chip have ports for electrical connection to the encoding unit and ports for electrical connection to the CPCI interface on their peripheries.

[0018] In an optional embodiment, the method includes:

[0019] The A11 port, F9 port, C7 port and G13 port of the external communication chip leave interfaces electrically connected to the encoding unit.

[0020] Compared with the prior art, the beneficial effects of the present invention are:

[0021] This solution proposes a dual-channel CAN interface adapter board based on the 3U-CPCI bus. The main control unit in the adapter board uses the XC7Z020-2CLG484 chip as the main control and is designed to 3U-CPCI specifications. It can be widely used in military computers and industrial control computers. The CPCI and other interfaces used are highly applicable and comply with the Revision 3 and Revision 4 interface specifications. The CAN interface in the encoding unit is compatible with the ISO-11898-1, CAN 2.0A and CAN 2.0B standards. The CPCI interface bus is directly connected to the main control unit, and the programmable logic array end (PL end) in the main control unit realizes the slave interface device without the need for a bridge or adapter chip, with high integration. The encoding unit is connected to the PS end of the control chip in the main control unit, and the main control unit serves as both the controller and the main controller of the encoding unit, saving volume and reducing development difficulty. In addition, the baseboard interface provides two CAN interfaces, a serial port interface and a power supply interface, with a simple structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a block diagram of the composition of the utility model;

[0023] Figure 2 This is a circuit diagram of the encoding unit in the present utility model;

[0024] Figure 3 A circuit diagram of the dynamic random access memory in the present utility model;

[0025] Figure 4 This is a circuit diagram for external communication of the main control unit in the present utility model;

[0026] Figure 5 A circuit diagram of the main control unit and the CPCI interface in the present utility model; DETAILED DESCRIPTION

[0027] The following description is intended to disclose the present invention so that those skilled in the art can implement the present invention. The preferred embodiments described below are merely examples, and those skilled in the art may conceive of other obvious variations.

[0028] Reference Figure 1 - Figure 5 As shown, a dual-channel CAN interface adapter board based on a 3U-CPCI bus includes:

[0029] Adapter board, on which CPCI interface and baseboard interface are provided;

[0030] A power module, wherein the input end of the power module is electrically connected to the baseboard interface, and the output end of the power module is electrically connected to the main control unit, the dynamic random access memory unit, the encoding unit, the serial port transceiver unit, the non-volatile flash memory unit, and the clock crystal oscillator unit;

[0031] Among them, the dynamic random access memory unit is electrically connected to the main control unit for realizing the caching of programs, data and intermediate results. One end of the main control unit is electrically connected to the CPCI interface, and the other end is electrically connected to the encoding unit. One end of the encoding unit is electrically connected to the baseboard interface, and the baseboard interface is electrically connected to the serial port transceiver unit. The serial port transceiver unit interacts with the main control unit. One end of the main control unit is electrically connected to the non-volatile flash memory unit and the clock crystal oscillator unit at the same time.

[0032] Furthermore, the encoding unit includes:

[0033] The fifth chip, the sixth chip and the eighth chip, several filter capacitors are electrically connected between the second pin and the tenth pin of the fifth chip, the sixth pin and the seventh pin of the sixth chip are electrically connected to a relay and an inductor respectively, the fifth pin of the sixth chip is connected in series with a fourteenth capacitor, and the fifth pin of the sixth chip is electrically connected to the sixth pin and the seventh pin. The peripheral circuit of the eighth chip is the same as that of the sixth chip.

[0034] Furthermore, the dynamic random access memory unit includes:

[0035] A dynamic random access memory chip, the peripheral circuit of the dynamic random access memory chip is provided with a 77th resistor and an 80th resistor, and is also provided with a 68th capacitor and an 89th capacitor, and one end of the 68th capacitor and the 89th capacitor is grounded and the other end is electrically connected to the H7 port and the P7 port of the dynamic random access memory chip.

[0036] Furthermore, the main control unit includes:

[0037] The external communication chip, the peripheral circuit of the external communication chip is provided with a ninety-fourth resistor and a one hundred and thirty-fourth capacitor, one end of the one hundred and thirty-fourth capacitor is grounded, and the other end is electrically connected to the C9 port of the external communication chip and the ninety-fourth resistor.

[0038] Furthermore, the main control unit also includes:

[0039] The first control chip and the second control chip have ports for electrical connection to the encoding unit on their peripheries, and ports for electrical connection to the CPCI interface on their peripheries.

[0040] Further, including:

[0041] The A11 port, F9 port, C7 port and G13 port of the external communication chip have interfaces electrically connected to the encoding unit.

[0042] Specifically, the adapter board adopts a 3U form factor and is widely applicable in military and industrial computers. The main control unit in the adapter board uses the XC7Z020-2CLG484 chip as the main controller, allowing it to be used in chassis compatible with 3U-CPCI boards and offering flexible configuration options. The CPCI interface bus connector connects to the Zynq-7020 SoC chip. The main control unit implements the PCI slave bus interface and connects to the dynamic random access memory (DRAM), encoding unit, serial transceiver unit, non-volatile flash memory, and clock crystal oscillator unit, forming the core controller of the entire adapter board. The DRAM is used to cache programs, data, and intermediate results. The encoding unit uses a CAN-PHY chip for bidirectional conversion between TTL and CAN levels. The serial transceiver unit, which contains a serial transceiver chip, provides debug printing functionality for the main control unit and can also exchange data / commands with the main control unit via command lines. The non-volatile flash memory unit is used for data storage, program hardening, and startup. The clock crystal oscillator unit provides a clock signal for the SoC. The power module is used to provide the required voltages for the adapter board. The baseboard interface is a connector for power supply and external communication.

[0043] Furthermore, the main control unit uses the XC7Z020-2CLG484 chip as the main control, and its PS end has two CAN controllers that are compatible with ISO-11898-1, CAN2.0A and CAN2.0B standards. In addition, the PS end debug serial port can also be used to interact with the main control unit in command line mode to configure the encoding unit, including the port rate, ID setting, filter setting, etc. The other end of the main control unit is the PL end, which is essentially a programmable logic array. Therefore, the function of the PIC slave device can be realized through the hardware description language. The block diagram is as follows Figure 1 The dynamic random access memory unit is connected to the dedicated DDR pin of the main control unit to realize the cache of programs, data and intermediate results. The dynamic random access memory unit contains two 512MB DDR3 SDRAMs to better utilize the performance of the central processor. The DDR connection is as shown in the figure. Figure 3 shown.

[0044] The encoding unit and serial transceiver unit are the external communication interfaces of the main control unit. They are directly connected to the XC7Z020-2CLG484 chip. Their hardware pin positions can be flexibly connected to the PS end or the PL end. They only need to be configured in the PS end main control. There are two identical CAN controllers in the PS end, which can be operated independently. The connection between the encoding and serial transceiver units is as follows: Figure 2The CPCI interface is directly connected to the PL side of the main control unit. Since the pins of the programmable logic array can be flexibly constrained, the CPCI bus interface needs to be connected to the I / O pins of the HR-BANK on the PL side.

[0045] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions merely illustrate the principles of the present invention. Various changes and improvements are possible without departing from the spirit and scope of the present invention. Such changes and improvements are intended to fall within the scope of the present invention. The scope of protection claimed for the present invention is defined by the appended claims and their equivalents.

Claims

1. A dual-channel CAN interface adapter board based on 3U-CPCI bus, characterized in that: include: An adapter board, wherein the adapter board is provided with a CPCI interface and a baseboard interface; A power module, wherein the input end of the power module is electrically connected to the baseboard interface, and the output end of the power module is electrically connected to the main control unit, the dynamic random access memory unit, the encoding unit, the serial port transceiver unit, the non-volatile flash memory unit and the clock crystal oscillator unit; Among them, the dynamic random access memory unit is electrically connected to the main control unit for realizing the caching of programs, data and intermediate results. One end of the main control unit is electrically connected to the CPCI interface, and the other end is electrically connected to the encoding unit. One end of the encoding unit is electrically connected to the baseboard interface, and the baseboard interface is electrically connected to the serial port transceiver unit. The serial port transceiver unit interacts with the main control unit. One end of the main control unit is electrically connected to the non-volatile flash memory unit and the clock crystal oscillator unit at the same time.

2. A dual-channel CAN interface adapter board based on 3U-CPCI bus according to claim 1, characterized in that: The encoding unit includes: The fifth chip, the sixth chip and the eighth chip, several filter capacitors are electrically connected between the second pin and the tenth pin of the fifth chip, the sixth pin and the seventh pin of the sixth chip are electrically connected to a relay and an inductor respectively, the fifth pin of the sixth chip is connected in series with a fourteenth capacitor, and the fifth pin of the sixth chip is electrically connected to the sixth pin and the seventh pin. The peripheral circuit of the eighth chip is the same as that of the sixth chip.

3. A dual-channel CAN interface adapter board based on 3U-CPCI bus according to claim 1, characterized in that: The dynamic random access memory unit comprises: A dynamic random access memory chip, wherein the peripheral circuit of the dynamic random access memory chip is provided with a 77th resistor and an 80th resistor, and is also provided with a 68th capacitor and an 89th capacitor, and one end of the 68th capacitor and the 89th capacitor is grounded and the other end is electrically connected to the H7 port and the P7 port of the dynamic random access memory chip.

4. A dual-channel CAN interface adapter board based on 3U-CPCI bus according to claim 1, characterized in that: The main control unit comprises: An external communication chip, the peripheral circuit of the external communication chip is provided with a ninety-fourth resistor and a one hundred and thirty-fourth capacitor, one end of the one hundred and thirty-fourth capacitor is grounded, and the other end is electrically connected to the C9 port of the external communication chip and the ninety-fourth resistor at the same time.

5. The dual-channel CAN interface adapter board based on 3U-CPCI bus according to claim 1, characterized in that: The main control unit also includes: The first control chip and the second control chip have ports for electrical connection to the encoding unit and ports for electrical connection to the CPCI interface on their peripheries.

6. A dual-channel CAN interface adapter board based on 3U-CPCI bus according to claim 4, characterized in that: include: The A11 port, F9 port, C7 port and G13 port of the external communication chip leave interfaces electrically connected to the encoding unit.

Images