Wideband amplifier

Abstract

The utility model discloses a broadband amplifier, which belongs to the technical field of amplifiers, and comprises a pre-stage amplification circuit, an automatic gain control circuit, a post-stage amplification circuit, a peak detection circuit and a main control module, the input end of the pre-stage amplification circuit is respectively connected with a signal input end, the output end of the automatic gain control circuit and the output end of the main control module; the output end of the pre-stage amplification circuit is respectively connected with the input end of the automatic gain control circuit and the input end of the post-stage amplification circuit, the output end of the post-stage amplification circuit is respectively connected with the signal output end and the input end of the peak detection circuit, and the output end of the peak detection circuit is connected with the input end of the main control module; automatic gain control is achieved in a voltage feedback control mode, the AGC range is wide, the peak value output by the amplifier is taken out to serve as the gain control voltage, the finally output voltage signal is kept between a certain peak-to-peak value, and a stable signal is output.

Description

Technical Field

[0001] The utility model belongs to the technical field of amplifiers, and in particular relates to a broadband amplifier. Background Art

[0002] The statements in this section merely provide background information related to the present disclosure and do not necessarily constitute prior art.

[0003] With the rapid development of information technology, people are placing higher demands on the transmission rate, bandwidth, and modulation methods of wireless communication systems. To meet the growing demand for data transmission, wireless communication systems need to be continuously upgraded and improved. As a key component, broadband amplifiers are crucial for optimizing the performance of the entire system.

[0004] Existing broadband amplifiers are prone to distortion or insufficient amplification when the signal amplitude is large or small. This results in inconsistent amplification for input signals of varying strengths and unstable output. Furthermore, existing broadband amplifiers are prone to large offset errors when connected to large resistors. Furthermore, when amplifying high-frequency signals, existing amplifiers are prone to nonlinear distortion. Utility Model Content

[0005] In order to solve the technical problems existing in the prior art, the utility model provides a broadband amplifier, which takes the peak value of the amplifier output as the gain control voltage, so that the final output voltage signal is maintained between a certain peak-to-peak value and outputs a more stable signal.

[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0007] A broadband amplifier comprises a pre-stage amplifier circuit, an automatic gain control circuit, a post-stage amplifier circuit, a peak detection circuit, and a main control module, wherein the input end of the pre-stage amplifier circuit is respectively connected to a signal input end, an output end of the automatic gain control circuit, and an output end of the main control module; the output end of the pre-stage amplifier circuit is respectively connected to an input end of the automatic gain control circuit and an input end of the post-stage amplifier circuit; the output end of the post-stage amplifier circuit is respectively connected to a signal output end and an input end of the peak detection circuit; and the output end of the peak detection circuit is connected to an input end of the main control module;

[0008] The peak detection loop includes a negative feedback circuit, which includes an operational amplifier. The negative input terminal of the operational amplifier is respectively connected to the second end of the third resistor and the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, the first end of the third resistor is respectively connected to the second end of the second resistor and the first end of the third capacitor, the first end of the second resistor is connected to the connection end of the sixth pin and the fourteenth pin, and the second end of the third capacitor is connected to the output terminal of the operational amplifier; the positive input terminal of the operational amplifier is respectively connected to the first end of the fourth resistor and the first end of the fifth capacitor, the second end of the fourth resistor is connected to the second end of the fifth capacitor, and then connected to the output terminal of the operational amplifier.

[0009] According to a further technical solution, the peak detection circuit includes a detector, the thirteenth pin of the detector is connected to the output end of the post-amplification circuit, and the sixth pin and the fourteenth pin are connected to the negative feedback circuit.

[0010] According to a further technical solution, the first pin of the detector is respectively connected to the first end of the first capacitor and the first end of the first resistor, the second end of the first resistor is connected to the output end of the ninth pin, and the second end of the first capacitor is grounded.

[0011] According to a further technical solution, the post-amplification circuit includes a pre-amplification module and a symmetrical output module connected in sequence.

[0012] According to a further technical solution, the preamplifier stage module includes a first transistor and a second transistor connected in series, and the symmetrical output stage module includes a third transistor and a fourth transistor connected in series.

[0013] A further technical solution is as follows: the emitter of the first transistor is respectively connected to the second end of the seventh resistor and the second end of the sixth capacitor, the first end of the sixth capacitor is connected to the first end of the seventh capacitor, the second end of the seventh capacitor is connected to the collector of the fourth transistor, the first end of the seventh resistor is connected to the first end of the sixth resistor, the second end of the sixth resistor is respectively connected to the first end of the eighth resistor and the first end of the eighth capacitor, the second end of the eighth capacitor is connected to the first end of the sixteenth resistor, the second end of the sixteenth resistor is connected to the second end of the eighth resistor and then connected to the second end of the seventeenth resistor, and the first end of the seventeenth resistor is connected to the emitter of the second transistor; the base of the first transistor is respectively connected to the first end of the eighth resistor, the second end of the sixth resistor, and the first end of the eighth capacitor; the collector of the first transistor is respectively connected to the base of the third transistor and the first end of the ninth resistor, and the second end of the ninth resistor is connected to the collector of the second transistor.

[0014] In a further technical solution, the collector of the second triode is connected to the base of the fourth triode, the base of the second triode is connected to the first end of the fifteenth resistor, the second end of the fifteenth resistor is grounded, the emitter of the second triode is respectively connected to the first end of the seventeenth resistor and the first end of the tenth capacitor, the second end of the seventeenth resistor is connected to the second end of the tenth capacitor and then to the collector of the fourth triode.

[0015] In a further technical solution, the collector of the third triode is connected to the power supply, the base of the third triode is connected to the collector of the first triode, the emitter of the third triode is connected to the first end of the eleventh resistor, the second end of the eleventh resistor is respectively connected to the second end of the twelfth resistor and the first end of the thirteenth resistor, and the second end of the thirteenth resistor is connected to the emitter of the fourth triode.

[0016] In a further technical solution, the first end of the twelfth resistor is connected between the second end of the eighth capacitor and the first end of the sixteenth resistor, and the second end is connected between the second end of the eleventh resistor and the first end of the thirteenth resistor.

[0017] In a further technical solution, the first end of the twelfth resistor is connected to the first end of the tenth resistor, the second end of the tenth resistor is connected to the first end of the ninth capacitor, the second end of the ninth capacitor is connected to the first end of the fourteenth resistor, and the second end of the fourteenth resistor is grounded.

[0018] Beneficial effects of the utility model:

[0019] This utility model incorporates a peak detection circuit that extracts the peak value of the amplifier output as a gain control voltage, maintaining the final output voltage signal within a certain peak-to-peak value range and outputting a relatively stable signal. Automatic gain control is achieved through voltage feedback control, allowing the gain to be adjusted in real time, enabling the amplifier to maintain a stable output over a wide range of signal strengths, avoiding overdrive distortion caused by excessively strong input signals or underamplification when signals are too weak.

[0020] The utility model uses a low input current and low bias voltage amplifier to replace an internal buffer amplifier in a peak detection circuit, so as to reduce as much as possible the offset error introduced by the combination of the amplifier input current and a larger resistance.

[0021] The post-amplifier circuit of this utility model utilizes a two-stage structure consisting of a pre-amplifier stage and a symmetrical output stage. By adjusting the bias of the pre-amplifier stage, the amplifier circuit can amplify within its linear operating range. Simultaneously, the complementary symmetrical design of the output stage ensures efficiency and signal integrity during power amplification. Through a negative feedback circuit, the circuit's gain, stability, and frequency response are optimized, providing a high output voltage and excellent linearity. Furthermore, the post-amplifier circuit is constructed using discrete components, achieving a wide output voltage range. Where performance requirements permit, the input impedance is minimized to reduce interference from spatial radiation. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation to the present invention.

[0023] Figure 1 This is the overall circuit diagram of the broadband amplifier of the utility model;

[0024] Figure 2 This is a peak detection circuit diagram of the broadband amplifier of the utility model;

[0025] Figure 3 This is the post-amplification circuit diagram of the broadband amplifier of the utility model. DETAILED DESCRIPTION

[0026] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0027] See also Figure 1 As shown, an embodiment of the present utility model provides a broadband amplifier, comprising a pre-stage amplifier circuit, an automatic gain control circuit, a post-stage amplifier circuit, a peak detection circuit, and a main control module, wherein the input end of the pre-stage amplifier circuit is respectively connected to the signal input end, the output end of the automatic gain control circuit, and the output end of the main control module; the output end of the pre-stage amplifier circuit is respectively connected to the input end of the automatic gain control circuit and the input end of the post-stage amplifier circuit; the output end of the post-stage amplifier circuit is respectively connected to the signal output end and the input end of the peak detection circuit; and the output end of the peak detection circuit is connected to the input end of the main control module;

[0028] The peak detection loop includes a negative feedback circuit, which includes an operational amplifier. The negative input terminal of the operational amplifier is respectively connected to the second end of the third resistor and the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, the first end of the third resistor is respectively connected to the second end of the second resistor and the first end of the third capacitor, the first end of the second resistor is connected to the connection end of the sixth pin and the fourteenth pin, and the second end of the third capacitor is connected to the output terminal of the operational amplifier; the positive input terminal of the operational amplifier is respectively connected to the first end of the fourth resistor and the first end of the fifth capacitor, the second end of the fourth resistor is connected to the second end of the fifth capacitor, and then connected to the output terminal of the operational amplifier.

[0029] In this embodiment, the preamplifier circuit uses the AD603 chip. The AD603 chip is a single-channel, low-noise, controllable gain amplifier with a continuously adjustable gain range. The automatic gain control circuit uses an AGC circuit.

[0030] In this embodiment, if Figure 2 As shown, the peak detection circuit includes a detector, wherein the thirteenth pin of the detector is connected to the output of the post-amplifier circuit, the first pin is respectively connected to the first end of the first capacitor C1 and the first end of the first resistor R1, the second end of the first resistor R1 is connected to the output of the ninth pin, the second end of the first capacitor C1 is grounded, the output of the ninth pin is also connected to the first end of the second capacitor C2, the second end of the second capacitor C2 is connected to the eighth pin, the third pin is grounded, and the sixth and fourteenth pins are connected to the negative feedback circuit. C1 and C2 are filter capacitors used to block and filter the input signal, ensuring that the signal is not affected by low-frequency or DC interference during transmission.

[0031] The detector model mentioned above is the AD637. Pin 13 is the input, pin 1 is the buffer input, pin 9 is the RMS output, which outputs the converted RMS DC signal. Pin 8 is the integrating capacitor terminal, pin 3 is ground, pin 6 is the denominator current input, and pin 14 is the buffer output. The AD637 RMS detector samples the output AC signal, converts it to DC, and displays it on a digital display after A / D conversion by the microcontroller. In other words, the AD637 converts the RMS value of the external input AC signal into a DC signal output, obtaining the RMS value of the input sinusoidal waveform. The AD637 is a true RMS / DC converter integrated circuit that is simple to use, easy to adjust, has a fast settling time, and provides accurate and stable readings. In actual applications, the only external adjustment component is the absolute value squared averaging capacitor, which affects averaging time, low-frequency accuracy, output ripple level, and output settling time. The internal circuit structure of the AD637 is conventional and will not be further described here.

[0032] The negative feedback circuit includes an operational amplifier, wherein the negative input terminal of the operational amplifier is respectively connected to the second end of the third resistor R3 and the first end of the fourth capacitor C4, the second end of the fourth capacitor C4 is grounded, the first end of the third resistor R3 is respectively connected to the second end of the second resistor R2 and the first end of the third capacitor C3, the first end of the second resistor R2 is connected to the connection end of the sixth pin and the fourteenth pin, and the second end of the third capacitor C3 is connected to the output terminal of the operational amplifier; the positive input terminal of the operational amplifier is respectively connected to the first end of the fourth resistor R4 and the first end of the fifth capacitor C5, and the second end of the fourth resistor R4 is connected to the second end of the fifth capacitor C5, and then connected to the output terminal of the operational amplifier. The negative feedback circuit adjusts the output signal by feeding back a portion of the output signal of the operational amplifier to its input terminal, thereby reducing the deviation. Among them, C5 is used to reduce the impact of high-frequency noise and interference on the output signal.

[0033] The operational amplifier mentioned above is model AD548JN. AD548 is an amplifier with low input current and low bias voltage. AD548 is used to replace the internal buffer amplifier of AD637. It has higher input impedance and lower output impedance and can be used with extremely low current input signals without burdening the signal. It minimizes the current input from the information source, thereby reducing the impact on the signal source and preventing power loss and signal distortion that may occur when a high impedance signal source is directly connected to a low impedance load, so as to minimize the offset error introduced by the combination of the amplifier input current and the larger resistance.

[0034] The fourth pin of the detector is output bias adjustment through the fifth resistor R5. Specifically, the output bias is adjusted by adjusting the sliding rheostat, which is also called the output voltage zero adjustment terminal. When the output voltage should be 0, rotate the sliding rheostat to make the output voltage 0.

[0035] In some embodiments, the resistance of resistor R1 is 400 kΩ, the resistance of R2 and R3 is 3.3 MΩ, the resistance of R4 is 6.8 MΩ, and the resistance of R5 is 1 MΩ. The capacitance of capacitor C1 is 3.3 μF, the capacitance of C2 is 100 μF, the capacitance of C3 and C4 is 1 μF, and the capacitance of C5 is 1000 pF. The resistance values ​​of the resistors and the capacitance of the capacitors in this embodiment can be flexibly set according to actual conditions and are not specifically limited.

[0036] In this embodiment, if Figure 3 As shown, the post-stage amplifier circuit is a typical symmetrical complementary circuit powered by a single power supply. The post-stage amplifier circuit includes a pre-amplifier stage module and a symmetrical output stage module connected in sequence.

[0037] Specifically, the preamplifier stage module includes a first transistor Q1 and a second transistor Q2 connected in series, the emitter of the first transistor Q1 is connected to the second end of the seventh resistor R7 and the second end of the sixth capacitor C6, the first end of the sixth capacitor C6 is connected to the first end of the seventh capacitor C7, the second end of the seventh capacitor C7 is connected to the collector of the fourth transistor Q4, the first end of the seventh resistor R7 is connected to the first end of the sixth resistor R6, the second end of the sixth resistor R6 is connected to the first end of the eighth resistor R8 and the first end of the eighth capacitor C8, and the second end of the eighth capacitor C8 is connected to the collector of the fourth transistor Q4. A first end of the sixteenth resistor R16 is connected, a second end of the sixteenth resistor R16 is connected to the second end of the eighth resistor R8 and then to the second end of the seventeenth resistor R17, and the first end of the seventeenth resistor R17 is connected to the emitter of the second transistor Q2; the base of the first transistor Q1 is respectively connected to the first end of the eighth resistor R8, the second end of the sixth resistor R6, and the first end of the eighth capacitor C8; the collector of the first transistor Q1 is respectively connected to the base of the third transistor Q3 and the first end of the ninth resistor R9, and the second end of the ninth resistor R9 is connected to the collector of the second transistor Q2.

[0038] The collector of the second transistor Q2 is connected to the base of the fourth transistor Q4, the base of the second transistor Q2 is connected to the first end of the fifteenth resistor R15, the second end of the fifteenth resistor R15 is grounded, the emitter of the second transistor Q2 is connected to the first end of the seventeenth resistor R17 and the first end of the tenth capacitor C10, respectively, the second end of the seventeenth resistor R17 is connected to the second end of the tenth capacitor C10, and then to the collector of the fourth transistor Q4.

[0039] The first transistor Q1 is a B649A model, and the second transistor Q2 is a D669A model. These transistors form the preamplifier stage. The input signal enters the circuit through the base of Q1, which amplifies the input signal. Q1 and Q2 process the positive and negative half-cycles of the input signal, respectively, completing the initial signal amplification. The emitters of Q1 and Q2 are connected via multiple resistors and capacitors to provide appropriate bias and frequency compensation. Adjusting the resistance of the sixth resistor R6 provides the appropriate bias current for the preamplifier stage. The output of the preamplifier stage module is driven by the base of the third transistor Q3.

[0040] The symmetrical output stage module includes a third transistor Q3 and a fourth transistor Q4 connected in series, the collector of the third transistor Q3 is connected to a 30V power supply, the base of the third transistor Q3 is connected to the collector of the first transistor Q1, the emitter of the third transistor Q3 is connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11 is respectively connected to the second end of the twelfth resistor R12 and the first end of the thirteenth resistor R13, and the second end of the thirteenth resistor R13 is connected to the emitter of the fourth transistor Q4.

[0041] The third transistor, Q3, is a D669A, and the fourth transistor, Q4, is a B649A. These transistors form a symmetrical output stage, responsible for providing high power amplification. Q3's collector is directly connected to the power supply, while Q4's collector is grounded, providing symmetrical voltage amplification. The output stage implements negative feedback through resistors R11, R12, and R13. This feedback signal is connected back to the preamplifier input to stabilize the circuit's gain and output DC potential.

[0042] This embodiment uses a tenth resistor R10, a twelfth resistor R12, and a ninth capacitor C9 to connect the output terminal to the input terminals of the first transistor Q1 and the second transistor Q2 to introduce negative feedback. Specifically, the first end of the twelfth resistor R12 is connected between the second end of the eighth capacitor C8 and the first end of the sixteenth resistor R16, and the second end is connected between the second end of the eleventh resistor R11 and the first end of the thirteenth resistor R13. The first end of the twelfth resistor R12 is connected to the first end of the tenth resistor R10, the second end of the tenth resistor R10 is connected to the first end of the ninth capacitor C9, the second end of the ninth capacitor C9 is connected to the first end of the fourteenth resistor R14, and the second end of the fourteenth resistor R14 is grounded. The above is a negative feedback structure, which feeds the signal at the output terminal back to the input terminal of the preamplifier stage through R10, R12, and C9 to control the circuit gain and stabilize the operating point. By introducing a negative feedback structure, the linearity of the circuit is improved, distortion is reduced, and the frequency response of the amplifier is improved.

[0043] The transistors used are B649A and D669A high-frequency twin transistors. When the input signal is 0, adjusting the resistance of the sixth resistor can provide appropriate bias for the transistor, so that the potential between the tenth and twelfth resistors is Vcc / 2.

[0044] In static state, the output potential is usually Vcc / 2. In order to ensure the stability of the circuit operating point, the tenth resistor, the twelfth resistor and the ninth capacitor are used to connect the output terminal to the first transistor and the second transistor input terminal to introduce negative feedback. The characteristic frequency ft of the transistor largely determines the bandwidth of the amplifier. Because the frequency characteristics and noise characteristics of the active load are poor, resistors are used as loads in the circuit to avoid the additional noise brought by the active load, which helps to improve the bandwidth performance of the circuit and enhance the stability of the circuit. When using discrete components to make a post-stage amplifier, if the indicators allow, try to reduce the input impedance as much as possible to reduce the interference caused by space radiation. The post-stage power output module is composed of discrete components to obtain a higher output voltage range. Discrete components refer to devices with certain functions composed of independent components such as diodes, transistors, resistors, capacitors, etc., which are relatively large in size. Compared with integrated circuit devices, this embodiment refers to Figure 3The transistors, resistors, capacitors and other components in it.

[0045] In some embodiments, the sixth resistor R6 adjusts the bias current of the preamplifier stages Q1 and Q2 to ensure stable operation of the circuit; the seventh resistor R7 provides negative feedback for the emitter of Q1, stabilizes the operating point of Q1, and adjusts the emitter current to help control gain and linearity; the eighth resistor R8, together with the sixth resistor R6, adjusts the bias and gain of Q1, and cooperates with the eighth capacitor C8 to participate in signal coupling and frequency compensation; the ninth resistor R9 is used in the collector circuit of Q1 to provide a load for the collector; the tenth resistor R10 is used in the negative feedback circuit to help stabilize the gain of the entire circuit, reduce distortion, and control the stability of the output voltage; the eleventh resistor R11 is located in the emitter circuit of the output stage, provides a load for the emitter of Q3, and controls the current of the output stage; the twelfth resistor R12 is combined with C9 to feed back part of the output signal to the preamplifier stage, thereby stabilizing the operating point. The thirteenth resistor R13 is connected between the emitters of Q3 and Q4, and is used to adjust the current distribution of the output stage and balance the working conditions of the upper and lower stages; the fourteenth resistor R14 is grounded and used at the end point of C9 to provide a reference potential for the negative feedback path and maintain a stable negative feedback signal; the fifteenth resistor R15 is used to bias the base of Q2 to ensure that Q2 can work stably; the sixteenth resistor R16 is used in the bias network of Q1 and Q2 to assist in adjusting the operating point and maintain the stability of the preamplifier stage; the seventeenth resistor is used to adjust the emitter current of Q2 to control the gain and linearity.

[0046] In some embodiments, C6 acts as a bypass capacitor to bypass the AC signal generated by R7, ensuring that the transistor can have better gain when the signal is high frequency; C7 is connected between Q1 and Q4 for signal coupling, transmitting the amplified signal to the output stage; C8 forms a high-frequency filter circuit with R8 and R6 to suppress high-frequency noise and provide signal coupling function; C9 is a feedback capacitor to form a feedback circuit to reduce distortion; C10 is a bypass capacitor to filter out the AC part of the current and stabilize the current.

[0047] In this embodiment, the broadband amplifier further includes a keyboard module and a display module. The keyboard module is connected to the input end of the main control module, and the display module is connected to the output end of the main control module.

[0048] The keyboard module adopts a matrix keyboard, the display module adopts an LCD1602 liquid crystal display, and the main control module adopts an STC12C5A60S2 single-chip microcomputer.

[0049] Working principle detailed description:

[0050] The pre-amplifier circuit in this broadband amplifier uses an AD603 chip, whose input end receives the signal from the signal input end, the output signal of the automatic gain control circuit, and the output signal of the main control module. The output signal of the pre-amplifier circuit is sent to the input end of the automatic gain control circuit and the input end of the post-amplifier circuit. The automatic gain control circuit adjusts the gain of the pre-amplifier circuit to maintain the amplitude of its output signal stable. The output signal of the pre-amplifier circuit is also sent to the post-amplifier circuit for further amplification, and the output signal of the post-amplifier circuit is output through the signal output end. The output signal of the post-amplifier circuit is also sent to the peak detection circuit, which is used to detect the peak amplitude of the signal and convert the information into a DC level and output it to the main control module. The main control module receives the DC level signal from the peak detection circuit, adjusts the gain of the automatic gain control circuit and the pre-amplifier circuit according to the DC level signal or the setting input by the keyboard, and the display module displays the output voltage.

[0051] In the post-amplifier circuit, input signal processing involves the coordinated operation of the preamplifier stage and the symmetrical output stage. The input signal enters the circuit through the base of Q1. Resistor R7 and capacitor C6, located between the base and emitter of Q1, provide a DC bias for the input signal, enabling proper signal amplification. The amplified signal is transferred from Q1's collector through R9 to the collector of Q2, forming a cascade amplifier structure. Q2 amplifies the negative half-cycle of the signal. The signal from Q2's collector is directly coupled to Q3 and the base of the fourth transistor, Q4, before entering the symmetrical output stage. The amplified signal enters the symmetrical output stage, where Q3 and Q4 process the positive and negative half-cycles of the signal, respectively. After the positive half-cycle of the input signal is amplified by Q1, Q3 amplifies the positive half of the signal through its base, amplifies it, and outputs it to the load. Similarly, after the negative half-cycle is amplified by Q2, Q4 amplifies the negative half of the signal and outputs it to the load. This complementary and symmetrical output mode ensures signal integrity, reduces crossover distortion, and improves circuit efficiency. A negative feedback loop is also designed. The negative feedback signal is sent back to the preamplifier stage through R10, R12, and C9 to adjust the input signal's amplification factor and frequency response. The feedback signal can stabilize the operating point, reduce nonlinear distortion, and optimize frequency characteristics.

[0052] This broadband amplifier uses voltage feedback control to achieve automatic gain control (AGC) with a wide AGC range. The peak value of the amplifier output is used as the gain control voltage, keeping the final output voltage signal within a certain peak-to-peak value range, resulting in a relatively stable output signal.

[0053] The AD603 preamplifier circuit has a large input resistance, resulting in a very low input current. This minimizes the control circuit's influence on the external circuitry that provides the gain control voltage. The AD603 offers an operating bandwidth from DC to over 30 MHz. A single stage can provide over 20 dB of gain, while a two-stage cascade can achieve over 40 dB of gain. Through the post-amplifier output, it can also provide over 60 dB of gain at high frequencies. Its advantages include high circuit integration, clear logic, convenient control, and ease of digital processing.

[0054] In order to remove 50Hz power frequency interference and other low-frequency interference, a series capacitor can be added between the two stages of AD603 to form a high-pass filter with the input impedance of AD603.

[0055] Although the above description of the specific implementation methods of the present invention is combined with the accompanying drawings, it does not limit the scope of protection of the present invention. Technical personnel in the relevant field should understand that on the basis of the technical solution of the present invention, various modifications or deformations that can be made by technical personnel in this field without creative work are still within the scope of protection of the present invention.

Claims

1. A broadband amplifier, characterized in that: The system comprises a pre-stage amplifier circuit, an automatic gain control circuit, a post-stage amplifier circuit, a peak detection circuit and a main control module, wherein the input end of the pre-stage amplifier circuit is respectively connected to the signal input end, the output end of the automatic gain control circuit and the output end of the main control module; the output end of the pre-stage amplifier circuit is respectively connected to the input end of the automatic gain control circuit and the input end of the post-stage amplifier circuit; the output end of the post-stage amplifier circuit is respectively connected to the signal output end and the input end of the peak detection circuit; and the output end of the peak detection circuit is connected to the input end of the main control module; The peak detection loop includes a negative feedback circuit, which includes an operational amplifier. The negative input terminal of the operational amplifier is respectively connected to the second end of the third resistor and the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, the first end of the third resistor is respectively connected to the second end of the second resistor and the first end of the third capacitor, the first end of the second resistor is connected to the connection end of the sixth pin and the fourteenth pin, and the second end of the third capacitor is connected to the output terminal of the operational amplifier; the positive input terminal of the operational amplifier is respectively connected to the first end of the fourth resistor and the first end of the fifth capacitor, the second end of the fourth resistor is connected to the second end of the fifth capacitor, and then connected to the output terminal of the operational amplifier.

2. The broadband amplifier according to claim 1, wherein: The peak detection circuit includes a detector, wherein the thirteenth pin of the detector is connected to the output end of the post-stage amplifier circuit, and the sixth pin and the fourteenth pin of the detector are connected to the negative feedback circuit.

3. The broadband amplifier according to claim 2, wherein: The first pin of the detector is connected to the first end of the first capacitor and the first end of the first resistor respectively, the second end of the first resistor is connected to the output end of the ninth pin, and the second end of the first capacitor is grounded.

4. The broadband amplifier according to claim 1, wherein: The post-amplification circuit includes a pre-amplification module and a symmetrical output module which are connected in sequence.

5. The broadband amplifier according to claim 4, wherein: The preamplifier stage module includes a first transistor and a second transistor connected in series, and the symmetrical output stage module includes a third transistor and a fourth transistor connected in series.

6. The broadband amplifier according to claim 5, wherein: The emitter of the first transistor is respectively connected to the second end of the seventh resistor and the second end of the sixth capacitor, the first end of the sixth capacitor is connected to the first end of the seventh capacitor, the second end of the seventh capacitor is connected to the collector of the fourth transistor, the first end of the seventh resistor is connected to the first end of the sixth resistor, the second end of the sixth resistor is respectively connected to the first end of the eighth resistor and the first end of the eighth capacitor, the second end of the eighth capacitor is connected to the first end of the sixteenth resistor, the second end of the sixteenth resistor is connected to the second end of the eighth resistor and then to the second end of the seventeenth resistor, and the first end of the seventeenth resistor is connected to the emitter of the second transistor; the base of the first transistor is respectively connected to the first end of the eighth resistor, the second end of the sixth resistor, and the first end of the eighth capacitor; the collector of the first transistor is respectively connected to the base of the third transistor and the first end of the ninth resistor, and the second end of the ninth resistor is connected to the collector of the second transistor.

7. The broadband amplifier according to claim 5, wherein: The collector of the second transistor is connected to the base of the fourth transistor, the base of the second transistor is connected to the first end of the fifteenth resistor, the second end of the fifteenth resistor is grounded, the emitter of the second transistor is respectively connected to the first end of the seventeenth resistor and the first end of the tenth capacitor, the second end of the seventeenth resistor is connected to the second end of the tenth capacitor and then to the collector of the fourth transistor.

8. The broadband amplifier according to claim 5, wherein: The collector of the third transistor is connected to the power supply, the base of the third transistor is connected to the collector of the first transistor, the emitter of the third transistor is connected to the first end of the eleventh resistor, the second end of the eleventh resistor is respectively connected to the second end of the twelfth resistor and the first end of the thirteenth resistor, and the second end of the thirteenth resistor is connected to the emitter of the fourth transistor.

9. The broadband amplifier according to claim 8, wherein: The first end of the twelfth resistor is connected between the second end of the eighth capacitor and the first end of the sixteenth resistor, and the second end is connected between the second end of the eleventh resistor and the first end of the thirteenth resistor.

10. The broadband amplifier according to claim 8, wherein: The first end of the twelfth resistor is connected to the first end of the tenth resistor, the second end of the tenth resistor is connected to the first end of the ninth capacitor, the second end of the ninth capacitor is connected to the first end of the fourteenth resistor, and the second end of the fourteenth resistor is grounded.

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