Development board based on ESP32 chip

Abstract

The utility model discloses a development board based on an ESP32 chip, and the development board comprises a main control module which comprises an ESP32-S3-R8 chip and an onboard FLASH chip; the ESP32-S3-R8 chip is used for providing a storage space of the 8MBPSRAM; the onboard FLASH chip is used for providing a 16MBFLASH storage space; the onboard FLASH chip is electrically connected with the ESP32-S3-R8 chip, and the ESP32-S3-R8 chip The SPACE-S3 development board has the beneficial effects that the SPACE-S3 development board is high in integration level and small in size, can be used as a development board, can also be used as a core board of a minimum system, can be selectively provided with a screen, is fully led out and is suitable for various application development.

Description

Technical Field

[0001] The utility model belongs to the technical field of development boards, and in particular relates to a development board based on an ESP32 chip. Background Art

[0002] Currently, the ESP32-S3 chip development board on the market is large in size, the ESP32-S3 chip core board has single functions and low integration. Utility Model Content

[0003] In order to solve the problems raised in the above background technology, the utility model provides a development board based on the ESP32 chip.

[0004] To achieve the above-mentioned purpose, the present invention provides the following technical solution: a development board based on the ESP32 chip comprises:

[0005] Main control module; the main control module includes the ESP32-S3-R8 chip and an onboard FLASH chip; the ESP32-S3-R8 chip provides 8MB of PSRAM storage space; the onboard FLASH chip provides 16MB of FLASH storage space; the onboard FLASH chip is electrically connected to the ESP32-S3-R8 chip;

[0006] Power indicator light: The power indicator light is located on the upper left side of the development board and lights up when the power supply to the development board is normal.

[0007] GPIO expansion interface: The GPIO expansion interface is set on the ESP32-S3 chip. The GPIO expansion interface is led out through two 2*10PIN 1.27mm SMD female headers. The GPIO expansion interface is used for expansion connections. The main control module is connected to external devices through the GPIO expansion interface.

[0008] Onboard passive buzzer; the onboard passive buzzer is used to emit different tones by changing the input frequency; the onboard passive buzzer is electrically connected to the main control module; the onboard passive buzzer is electrically connected to the audio output pin of the ESP32-S3-R8 chip.

[0009] Further, including:

[0010] 1.3-inch IPS screen; The 1.3-inch IPS screen is set on the development board and electrically connected to the main control module via an FPC cable; The 1.3-inch IPS screen is set on the front of the development board for user viewing and operation; The 1.3-inch IPS screen is electrically connected to the screen interface of the development board via an FPC cable.

[0011] RESET button; used to provide hardware reset function; RESET button is electrically connected to the reset pin of the ESP32-S3-R8 chip; RESET button is set in a corner of the development board or in an easily accessible location for hardware reset operation.

[0012] Furthermore, it includes: a PCB board; the PCB board adopts a four-layer through-hole board.

[0013] Further, including:

[0014] RF module; the RF module is connected to the onboard ceramic antenna through π-type matching and is equipped with an IPEX4 generation antenna terminal; the IPEX4 generation antenna terminal is selected through a 0R resistor to enable connection to an external antenna, improving RF performance.

[0015] Further, including:

[0016] Onboard USB-UART bridge circuit; the onboard USB-UART bridge circuit uses the Type-C interface to power and program the development board, as well as the USB interface in the expansion interface; the onboard USB-UART bridge circuit is electrically connected to the main control module; the Type-C interface is set at the edge of the development board.

[0017] Further, including:

[0018] Programmable buttons A and B. Button A is set to manually enter BOOT mode when the development board is powered on. Buttons A and B are electrically connected to the main control module. Buttons A and B are electrically connected to the pins of the ESP32-S3-R8 chip.

[0019] Further, including:

[0020] The backflow protection diode is used to improve the reliability and safety of the development board. The backflow protection diode is electrically connected to the power input and signal input / output interfaces of the development board.

[0021] Furthermore, the RF module has a flexible antenna selection design, allowing users to switch between ceramic antennas and IPEX4 generation external antennas to adapt to different application scenarios and performance requirements.

[0022] Furthermore, the GPIO expansion interface uses a 2*10PIN 1.27mm SMD female header, providing a stable and reliable connection, making it easy to expand the connection with other devices or modules.

[0023] Furthermore, the anti-backflow current diode effectively prevents damage to the development board caused by current backflow and electrostatic discharge, thereby improving the stability and service life of the development board.

[0024] The present invention solves the defects in the background technology and has the following beneficial effects:

[0025] The ESP32-based SPACE-S3 development board integrates the high-performance processing and storage provided by the ESP32-S3-R8 chip and 16MB of onboard Flash. It features an intuitive power indicator, robust GPIO expansion, an audible onboard passive buzzer, a clear 1.3-inch IPS display, a convenient RESET button, a stable four-layer through-hole PCB design, and flexible RF module and antenna options. An onboard USB-UART bridge circuit and Type-C port simplify power supply and programming. Programmable buttons A and B provide more control options, while backflow protection diodes effectively enhance the board's stability and lifespan. These high-performance and reliable components combine to create a powerful, flexible, and secure development platform, providing developers with an efficient and convenient development experience. The SPACE-S3 development board's high integration density and compact size make it suitable for both development and as the core board of a minimal system. With an optional display and full IO pinout, it's suitable for a wide range of application development. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0027] Figure 1 It is a structural diagram of the utility model;

[0028] In the figure: 1. ESP32-S3-R8 chip; 2. Onboard FLASH chip; 3. Power indicator light; 4. GPIO expansion interface; 5. Onboard passive buzzer; 6. 1.3-inch IPS screen; 7. RESET button; 8. RF module; 9. Button A; 10. Button B; 11. Anti-backflow current diode. DETAILED DESCRIPTION

[0029] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. These drawings are simplified schematic diagrams that only illustrate the basic structure of the present invention in a schematic manner, and therefore only show components related to the present invention.

[0030] A development board based on the ESP32 chip includes:

[0031] Main control module; the main control module includes ESP32-S3-R8 chip 1 and onboard FLASH chip 2; ESP 32-S3-R8 chip 1 provides 8MB of PSRAM storage space; onboard FLASH chip 2 provides 16MB of FLASH storage space; onboard FLASH chip 2 is electrically connected to ESP32-S3-R8 chip 1;

[0032] Power indicator light 3: The power indicator light 3 is located on the upper left side of the development board and lights up when the power supply to the development board is normal.

[0033] GPIO expansion interface 4; GPIO expansion interface 4 is set on the ESP32-S3 chip. GPIO expansion interface 4 is led out through two 2*10PIN 1.27mm SMD female headers. GPIO expansion interface 4 is used for expansion connection. The main control module is connected to external devices through GPIO expansion interface 4.

[0034] Onboard passive buzzer 5; the onboard passive buzzer 5 is used to emit different tones by changing the input frequency; the onboard passive buzzer 5 is electrically connected to the main control module; the onboard passive buzzer 5 is electrically connected to the audio output pin of the ESP32-S3-R8 chip 1.

[0035] Further, including:

[0036] 1.3-inch IPS screen 6; 1.3-inch IPS screen 6 is set on the development board and electrically connected to the main control module through an FPC cable; 1.3-inch IPS screen 6 is set on the front of the development board for user viewing and operation; 1.3-inch IPS screen 6 is electrically connected to the screen interface of the development board through an FPC cable.

[0037] RESET button 7 is used to provide a hardware reset function. RESET button 7 is electrically connected to the reset pin of ESP32-S3-R8 chip 1. RESET button 7 is set in a corner of the development board or in an easily accessible location to facilitate hardware reset operations.

[0038] Furthermore, it includes: a PCB board; the PCB board adopts a four-layer through-hole board.

[0039] Further, including:

[0040] RF module 8; RF module 8 is connected to the onboard ceramic antenna through π-type matching and is equipped with an IPE X4 generation antenna terminal; the IPEX4 generation antenna terminal is selected through a 0R resistor to enable external antenna connection, improving RF performance.

[0041] Further, including:

[0042] Onboard USB-UART bridge circuit; the onboard USB-UART bridge circuit uses the Type-C interface to power and program the development board, as well as the USB interface in the expansion interface; the onboard USB-UART bridge circuit is electrically connected to the main control module; the Type-C interface is set at the edge of the development board.

[0043] Further, including:

[0044] Programmable buttons A9 and B10; button A9 is set to manually enter BOOT mode when the development board is powered on after being pressed; buttons A9 and B10 are electrically connected to the main control module; buttons A9 and B10 are electrically connected to the pins of ESP32-S3-R8 chip 1.

[0045] Further, including:

[0046] The anti-backflow current diode 11 is used to improve the reliability and safety of the development board; the anti-backflow diode is electrically connected to the power input and signal input / output interfaces of the development board.

[0047] Furthermore, the RF module 8 has a flexible antenna selection design, allowing users to switch between ceramic antennas and IPEX4 generation external antennas to adapt to different application scenarios and performance requirements.

[0048] Furthermore, the GPIO expansion interface 4 uses a 2*10PIN 1.27mm SMD female header, providing a stable and reliable connection, facilitating expansion connections with other devices or modules.

[0049] Furthermore, the anti-backflow current diode 11 effectively prevents damage to the development board caused by current backflow and electrostatic discharge, thereby improving the stability and service life of the development board.

[0050] The working principle of the present invention is as follows: the main control adopts ESP32-S3-R8 chip 1 and onboard FALSH chip 2, which can provide 8MBPSRAM and 16MBFALSH storage space; the PCB uses a four-layer through-hole board, which can effectively reduce the cost; the RF module 8 is connected to the onboard ceramic antenna through π-type matching by default, and the IPEX4 generation antenna terminal can also be selected through a 0R resistor, and better RF performance can be obtained through an external antenna; when the development board is powered normally, the power indicator light 3 on the upper left of the board lights up; the GPIO expansion interface 4 is brought out through two 2*10PIN 1.27mm patch headers, which can be used as an expansion interface; buttons A9 and B10 can be called through the program, and after button A9 is pressed, the development board can be powered on to manually enter the BOOT mode; the onboard passive buzzer 5 can emit different tones by modifying the input frequency; the front of the development board is 1.3in The chIPS screen 6 is connected to the development board's screen interface via an FPC cable; the RESET button 7 provides a hardware reset; the onboard USB-UART bridge can power and program the development board via the Type-C interface, and can also be programmed through a pair of USB ports in the expansion interface; the board has an anti-backflow current diode 11 and an ESD protection design to improve the reliability of the development board.

[0051] In the description of this utility model, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of this utility model, "plurality" means two or more, unless otherwise specifically defined.

[0052] In the description of this specification, the terms "one embodiment", "some embodiments", "embodiment", "example", "specific example" or "some examples" refer to the specific features, structures, materials or characteristics described in combination with the embodiment or example being included in at least one embodiment or example of the present invention.

[0053] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are illustrative and cannot be understood as limitations on the present invention. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A development board based on the ESP32 chip, characterized in that: include: Main control module; The main control module includes an ESP32-S3-R8 chip (1) and an onboard FLASH chip (2); the ESP32-S3-R8 chip (1) provides 8MB of PSRAM storage space; the onboard FLASH chip (2) provides 16MB of FLASH storage space; the onboard FLASH chip (2) is electrically connected to the ESP32-S3-R8 chip (1); A power indicator light (3); the power indicator light (3) is arranged at the upper left of the development board and is used to light up when the power supply of the development board is normal; GPIO expansion interface (4); the GPIO expansion interface (4) is provided on the ESP32-S3 chip, the GPIO expansion interface (4) is led out through two 2*10PIN 1.27mm patch headers, and the GPIO expansion interface (4) is used for expansion connection; the main control module is connected to the external device through the GPIO expansion interface (4); An onboard passive buzzer (5); the onboard passive buzzer (5) is used to emit different tones by changing the input frequency; the onboard passive buzzer (5) is electrically connected to the main control module; the onboard passive buzzer (5) is electrically connected to the audio output pin of the ESP32-S3-R8 chip (1).

2. A development board based on the ESP32 chip according to claim 1, characterized in that, include: 1.3-inch IPS screen (6); the 1.3-inch IPS screen (6) is arranged on the development board and is electrically connected to the main control module via an FPC cable; the 1.3-inch IPS screen (6) is arranged on the front of the development board for easy viewing and operation by a user; the 1.3-inch IPS screen (6) is electrically connected to the screen interface of the development board via an FPC cable; A RESET button (7); used to provide a hardware reset function; the RESET button (7) is electrically connected to a reset pin of the ESP32-S3-R8 chip (1); the RESET button (7) is arranged in a corner of the development board or in an easily accessible position to facilitate a hardware reset operation.

3. A development board based on the ESP32 chip according to claim 1, characterized in that: It includes a PCB board; the PCB board adopts a four-layer through-hole board.

4. A development board based on the ESP32 chip according to claim 1, characterized in that: include The radio frequency module (8) is connected to the onboard ceramic antenna through a π-type matching and is provided with an IPEX4 generation antenna terminal; the IPEX4 generation antenna terminal is gated through a 0R resistor to achieve external antenna connection, thereby improving radio frequency performance.

5. A development board based on the ESP32 chip according to claim 1, characterized in that, include: An onboard USB-UART bridge circuit; the onboard USB-UART bridge circuit realizes power supply and programming of the development board through the Type-C interface, and programming through the USB interface in the expansion interface; the onboard USB-UART bridge circuit is electrically connected to the main control module; the Type-C interface is set at the edge of the development board.

6. A development board based on the ESP32 chip according to claim 1, characterized in that, include: A programmable control button A (9) and a button B (10); the button A (9) is configured to manually enter the BOOT mode when the development board is powered on after being pressed; the button A (9) and the button B (10) are electrically connected to the main control module; the button A (9) and the button B (10) are electrically connected to the pins of the ESP32-S3-R8 chip.

7. A development board based on the ESP32 chip according to claim 1, characterized in that: include: The anti-backflow current diode (11) is used to improve the reliability and safety of the development board; the anti-backflow current diode (11) is electrically connected to the power input and signal input / output interface of the development board.

8. A development board based on the ESP32 chip according to claim 4, characterized in that: The radio frequency module (8) allows the user to switch between a ceramic antenna and an IPEX4 generation external antenna through a flexible antenna selection design to adapt to different application scenarios and performance requirements.

9. A development board based on the ESP32 chip according to claim 1, characterized in that: The GPIO expansion interface (4) uses a 2*10PIN 1.27mm female patch header to provide a stable and reliable connection, facilitating expansion and connection with other devices or modules.

10. The development board based on the ESP32 chip according to claim 7, characterized in that: The anti-backflow current diode (11) effectively prevents damage to the development board caused by current backflow and electrostatic discharge, thereby improving the stability and service life of the development board.

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