Asymmetrical bit line current sensing amplifier for SRAM applications
A current sensing/reading amplifier maintains a constant bit line voltage to reduce power consumption and read time, addressing issues of increased density and capacitance in semiconductor memory units, enhancing stability and performance.
DE112016002677B4Active Publication Date: 2026-03-19INTERNATIONAL BUSINESS MACHINE CORPORATION
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Patent Information
- Application Number
- DE112016002677
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2015-09-17
- Filing Date
- 2016-09-01
- Publication Date
- 2026-03-19
- Estimated Expiration
- 2036-09-01
AI Technical Summary
Technical Problem
Existing semiconductor memory units face challenges with increased integration density leading to higher load capacitance, reduced read speed, and significant power consumption due to voltage fluctuations and peak currents during data read operations.
Method used
Implementing a current sensing/reading amplifier that maintains a constant bit line voltage, using a voltage regulator, current detector, and generator to quickly detect high or low current values, reducing voltage fluctuations and peak currents.
Benefits of technology
This approach significantly reduces power consumption and read time, allowing for higher operating frequencies and increased SRAM cell density without the need for pre-charging, thus improving stability and performance.
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Abstract
Current sensing read amplifier (304; 403; 613) for use as a read amplifier in a memory arrangement of memory cell groups, wherein each of the cells (402; 720) of the memory cell groups contains at least one read terminal which is connected to a read amplifier by a bit line (102; 302; 405), and wherein the read amplifiers are connected to a data output, wherein the current sensing read amplifier comprises: a voltage regulator to maintain a bit line voltage at a constant voltage value below a power supply voltage and above ground; a measuring circuit for detecting a high current value and a low current value in an input signal; a generator for producing a high-voltage output signal when a high current input value is detected, and for producing a low-voltage output signal when a low current input value is detected; and Setting circuit for adjusting the independence of the measuring circuit from bit line leakage currents.
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