Pixel circuitry, control method and display device

Abstract

The present disclosure provides a pixel circuit, a control method and a display device.The pixel circuit comprises a light-emitting element, a first energy storage circuit, a first driver circuit, a second driver circuit, a first driver control circuit, a second driver control circuit, a second energy storage circuit, and a first control data voltage write circuit; the first control data voltage write circuit controls it, under the control of a first write control signal, to write a first control data voltage to the third node; the first terminal of the first driver circuit and the first terminal of the second driver circuit are both electrically connected to the supply voltage terminal, the first driver circuit driving the light-emitting element under the control of the potential of its control terminal, and the second driver circuit driving the light-emitting element under the control of the potential of its control terminal.The present disclosure can be used for a multi-grayscale display, thereby achieving an unconventional 256-grayscale display, and increasing the number of displayed grayscale levels without significantly increasing the cost.

Description

TECHNICAL AREA

[0001] The present disclosure relates to the technical field and in particular to a pixel circuit, a control method and a display device. STATE OF THE ART

[0002] In recent years, organic light-emitting diode (OLED) displays have become a hotspot in display research as intelligent display technology has advanced. With the thinning of display panels and the narrowing of bezels, the optimal design of display panels is becoming increasingly critical.

[0003] The associated pixel circuits cannot be used for multi-grayscale display, cannot achieve an unconventional 256-grayscale display, and cannot increase the number of displayed grayscale levels without significantly increasing the cost. REVELATION OF THE INVENTION

[0004] In one aspect, an embodiment of the present disclosure provides a pixel circuit comprising a light-emitting element, a first energy storage circuit, a first driver circuit, a second driver circuit, a first driver control circuit, a second driver control circuit, a second energy storage circuit, and a first control data voltage write circuit;

[0005] The first terminal of the first energy storage circuit is electrically connected to the first node, the second terminal of the first energy storage circuit is electrically connected to the second node, and the first energy storage circuit serves to store electrical energy;

[0006] The control terminal of the first driver control circuit is electrically connected to the third node; the control terminal of the second driver control circuit is electrically connected to the fourth node;

[0007] The first driver control circuit is also electrically connected to the second node or the control terminal of the first driver circuit in order to control a connection or a disconnection between the second node and the control terminal of the first driver circuit under control of a potential of the third node;

[0008] The second driver control circuit is also electrically connected to the second node or the control terminal of the second driver circuit in order to control an electrical connection or a disconnection between the second node and the control terminal of the second driver circuit under control of a potential of the fourth node;

[0009] The first terminal of the second energy storage circuit is electrically connected to the third node, the second terminal of the second energy storage circuit is electrically connected to the first terminal of the first driver circuit, and the second energy storage circuit serves to store electrical energy;

[0010] The first control data voltage write circuit is electrically connected to the first write control terminal, the first control data voltage write terminal, and the third node to control, under the control of a first write control signal provided by the first write control terminal, it to write a first control data voltage, provided by the first control data voltage write terminal, to the third node;

[0011] The first terminal of the first driver circuit and the first terminal of the second driver circuit are both electrically connected to the supply voltage terminal, and the second terminal of the first driver circuit and the second terminal of the second driver circuit are both electrically connected to the light-emitting element. The first driver circuit serves to drive the light-emitting element by controlling the potential of its control terminal, and the second driver circuit serves to drive the light-emitting element by controlling the potential of its control terminal. The first driver circuit is used to drive the light-emitting element under control of the potential of its control terminal, and the second driver circuit is used to drive the light-emitting element under control of the potential of its control terminal.

[0012] Optionally, the third and fourth nodes can be the same node.

[0013] Optionally, the pixel circuit according to at least one embodiment of the present disclosure further comprises a third energy storage circuit and a second control data voltage write circuit;

[0014] The first terminal of the third energy storage circuit is electrically connected to the first terminal of the first driver circuit, and the second terminal of the third energy storage circuit is electrically connected to the control terminal of the second driver control circuit; the third energy storage circuit is used to store electrical energy; The second control data voltage write circuit is electrically connected to a second write control terminal, a second control data voltage write terminal, and a fourth node to write the second control data voltage, provided by the second control data voltage write terminal, to the fourth node under the control of a second write control signal provided by the second write control terminal.

[0015] Optionally, the pixel circuit according to at least one embodiment of the present disclosure also includes a data writing circuit, an adjustment circuit and a compensation control circuit;

[0016] The data write circuit is electrically connected to the data line, the third write control terminal, and the first node, in order to use the third write control signal, provided by the third write control terminal, to write the voltage provided by the data line to the first node;

[0017] The setting circuit is electrically connected to the setting control terminal, the setting voltage terminal, and the first node, and is used to write the setting voltage provided by the setting voltage terminal to the first node under the control of the setting control signal provided by the setting control terminal;

[0018] The compensation control circuit is electrically connected to the compensation control terminal, the second node and the second terminal of the first driver circuit, and is used to control the connection and disconnection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal provided by the compensation control terminal.

[0019] Optionally, the pixel circuit according to at least one embodiment of the present disclosure also includes a light emission control circuit;

[0020] The light emission control circuit is electrically connected to the light emission control terminal, the second terminal of the first driver circuit, and the first electrode of the light-emitting element in order to control the connection and disconnection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal provided by the light emission control terminal;

[0021] The second electrode of the light-emitting element is electrically connected to the first voltage terminal.

[0022] Optionally, the pixel circuit according to at least one embodiment of the present disclosure also includes a reset circuit;

[0023] The reset circuit is electrically connected to the reset control terminal, the reset voltage terminal, and the first electrode of the light-emitting element in order to write the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal.

[0024] The second electrode of the light-emitting element is electrically connected to the first voltage terminal.

[0025] Optionally, the first driver control circuit includes a first transistor, the second driver control circuit a second transistor, the first driver circuit a first driver transistor, and the second driver circuit a second driver transistor; the control electrode of the first transistor is electrically connected to the third node, the first electrode of the first transistor is electrically connected to the second node, and the second electrode of the first transistor is electrically connected to the control terminal of the first driver circuit;

[0026] The control electrode of the second transistor is electrically connected to the fourth node, the first electrode of the second transistor is electrically connected to the second node, and the second electrode of the second transistor is electrically connected to the control terminal of the second driver circuit;

[0027] The control electrode of the first driver transistor is electrically connected to the control terminal of the first driver circuit, the first electrode of the first driver transistor is electrically connected to the first terminal of the first driver circuit, and the second electrode of the first driver transistor is electrically connected to the second terminal of the first driver circuit;

[0028] The control electrode of the second driver transistor is electrically connected to the control terminal of the second driver circuit, the first electrode of the second driver transistor is electrically connected to the first terminal of the second driver circuit, and the second electrode of the second driver transistor is electrically connected to the second terminal of the second driver circuit.

[0029] Optionally, the first energy storage circuit includes a first capacitor and the second energy storage circuit includes a second capacitor;

[0030] The first terminal of the first capacitor is electrically connected to the first node, and the second terminal of the first capacitor is electrically connected to the second node;

[0031] The first terminal of the second capacitor is electrically connected to the third node, and the second terminal of the second capacitor is electrically connected to the first terminal of the first driver circuit.

[0032] Optionally, the first control data voltage write circuit includes a third transistor;

[0033] The control electrode of the third transistor is electrically connected to the first write control terminal, the first electrode of the third transistor is electrically connected to the first control data voltage write terminal, and the second electrode of the third transistor is electrically connected to the third node.

[0034] Optionally, the third energy storage circuit includes a third capacitor and the second control data voltage write circuit includes a fourth transistor;

[0035] The first terminal of the third capacitor is electrically connected to the first terminal of the first driver circuit, and the second terminal of the third capacitor is electrically connected to the control terminal of the second driver control circuit;

[0036] The control electrode of the fourth transistor is electrically connected to the second write control terminal, the first electrode of the fourth transistor is electrically connected to the second control data voltage write terminal, and the second electrode of the fourth transistor is electrically connected to the fourth node.

[0037] Optionally, the data writing circuit includes a fifth transistor; the adjustment circuit includes a sixth transistor; the compensation control circuit includes a seventh transistor;

[0038] The control electrode of the fifth transistor is electrically connected to the third write control terminal, the first electrode of the fifth transistor is electrically connected to the data line, and the second electrode of the fifth transistor is electrically connected to the first node;

[0039] The control electrode of the sixth transistor is electrically connected to the adjustment control terminal, the first electrode of the sixth transistor is electrically connected to the adjustment voltage terminal, and the second electrode of the sixth transistor is electrically connected to the first node;

[0040] The control electrode of the seventh transistor is electrically connected to the compensation control terminal, the first electrode of the seventh transistor is electrically connected to the second node, and the second electrode of the seventh transistor is electrically connected to the second terminal of the first driver circuit.

[0041] Optionally, the light emission control circuit includes an eighth transistor;

[0042] The control electrode of the eighth transistor is electrically connected to the light emission control terminal, the first electrode of the eighth transistor is electrically connected to the second terminal of the first driver circuit, and the second electrode of the eighth transistor is electrically connected to the first electrode of the light-emitting element.

[0043] Optionally, the reset circuit includes a ninth transistor;

[0044] The control electrode of the ninth transistor is electrically connected to the reset control terminal, the first electrode of the ninth transistor is electrically connected to the reset voltage terminal, and the second electrode of the ninth transistor is electrically connected to the first electrode of the light-emitting element.

[0045] In a second aspect, an embodiment of the present disclosure provides a control method that is applied to the aforementioned pixel circuit. The control method comprises: The first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; The second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node; The first control data voltage write circuit, under the control of a first write control signal, controls the writing of a first control data voltage, provided by the first control data voltage write terminal, to the third node; The first driver circuit drives the light-emitting element under control of the potential of its control terminal; the second driver circuit drives the light-emitting element under control of the potential of its control terminal.

[0046] Optionally, the third and fourth nodes are the same node; the pixel circuit also includes a data write circuit, an adjustment circuit, a compensation control circuit, a light emission control circuit, and a reset circuit; the display cycle comprises a first stage, a second stage, and a third stage, which are provided sequentially; the control method includes: In the first stage, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal to write the reset voltage to the second node; the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal;

[0047] In the second stage, the data write circuit writes the data voltage provided by the data line to the first node under the control of the third write control signal, and the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal;The compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal; the first control data voltage write circuit controls, under the control of a first write control signal, to write a first control data voltage, provided by the first control data voltage write terminal, to the third node; the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under the control of the potential of the third node; the second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under the control of the potential of the third node;

[0048] In the third stage, the setting circuit applies the setting voltage provided by the setting voltage terminal to the first node under the control of the setting control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the first driver circuit or the second driver circuit drives the light-emitting element to emit light.

[0049] Optionally, the step in which the first driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node includes the following: If the first control data voltage is a second voltage signal, the first driver control circuit controls the connection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; If the first control data voltage is a third voltage signal, the first driver control circuit controls the disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node;

[0050] The step in which the second driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the third node comprises the following: If the first control data voltage is a second voltage signal, the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the third node; If the first control data voltage is a third voltage signal, the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit under control of the potential of the third node;

[0051] The step in which the first driver circuit or the second driver circuit drives the light-emitting element to emit light includes the following: While the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit under control of the potential of the third node, the first driver circuit in the third stage drives the light-emitting element to emit light; While the second driver control circuit in the second stage controls the connection between the second node and the control terminal of the second driver circuit under control of the potential of the third node, the second driver circuit in the third stage drives the light-emitting element to emit light.

[0052] Optionally, the pixel circuit also includes a third energy storage circuit and a second control data voltage write circuit; the pixel circuit further includes a data write circuit, an adjustment circuit, a compensation control circuit, a light emission control circuit, and a reset circuit; the display cycle comprises a first stage, a second stage, and a third stage, which are provided sequentially. The control method includes: In the first stage, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal to write the reset voltage to the second node; the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal;

[0053] In the second stage, the data write circuit writes the data voltage provided by the data line to the first node under the control of the third write control signal, and the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal;The compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal; the first control data voltage write circuit controls, under the control of a first write control signal, to write a first control data voltage, provided by the first control data voltage write terminal, to the third node; the second control data voltage write circuit writes the second control data voltage, provided by the second control data voltage write terminal, to the fourth node under the control of the second write control signal; the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under the control of the potential of the third node;The second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node;

[0054] In the third stage, the setting circuit applies the setting voltage provided by the setting voltage terminal to the first node under the control of the setting control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the first driver circuit and / or the second driver circuit drives the light-emitting element to emit light.

[0055] Optionally, the step in which the first driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node includes the following: If the first control data voltage is a fourth voltage signal, the first driver control circuit controls the connection between the second node and the control terminal of the first driver circuit; If the first control data voltage is a fifth voltage signal, the first driver control circuit controls the disconnection between the second node and the control terminal of the first driver circuit; The step in which the second driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node comprises the following: If the second control data voltage is a sixth voltage signal, the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit; If the second control data voltage is a seventh voltage signal, the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit; The step in which the first driver circuit and / or the second driver circuit drives the light-emitting element to emit light includes the following: While the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit, and the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit, the first driver circuit, by controlling the potential of its control terminal, drives the light-emitting element to emit light; While the first driver control circuit in the second stage controls the disconnection between the second node and the control terminal of the first driver circuit, and the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit, the second driver circuit, by controlling the potential of its control terminal, drives the light-emitting element to emit light; While the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit, and the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit, the first driver circuit and the second driver circuit each, under control of the potential of the corresponding control terminal, drive the light-emitting element together to emit light.

[0056] In a third aspect, an embodiment of the present disclosure provides a display device comprising the pixel circuit mentioned above. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a structural diagram of a pixel circuit according to an embodiment of the present disclosure; Fig. 2 is a structure diagram of a pixel circuit according to at least one embodiment of the present disclosure; Fig. 3 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure; Fig. 4 is a structure diagram of a pixel circuit according to at least one embodiment of the present disclosure; Fig. 5 is a structure diagram of a pixel circuit according to at least one embodiment of the present disclosure; Fig. Figure 6 is a circuit diagram of a pixel circuit according to at least one embodiment of the present disclosure; Fig. 7 is an operating time diagram of a pixel circuit according to at least one embodiment of the present disclosure from Fig. 6; Fig. Figure 8A is the schematic representation of the operating state of the pixel circuit in the first stage S1 according to at least one embodiment of the present disclosure. Fig. 6; Fig. Figure 8B is the schematic representation of the operating state of the pixel circuit in the second stage S2 according to at least one embodiment of the present disclosure. Fig. 6; Fig. Figure 8C is the schematic representation of the operating state of the pixel circuit in the third stage S3 according to at least one embodiment of the present disclosure. Fig. 6; Fig. 9A is a waveform diagram of the current I flowing through the organic light-emitting diode O1 during high grayscale display; Fig. 9B is a waveform diagram of the current I flowing through the organic light-emitting diode O1 during low grey value display; Fig. Figure 10 is a circuit diagram of a pixel circuit according to at least one embodiment of the present disclosure; Fig. 11 is an operating time diagram of a pixel circuit according to at least one embodiment of the present disclosure from Fig. 10; Fig. 12A is the schematic representation of the operating state of the pixel circuit in the first stage S1 according to at least one embodiment of the present disclosure from Fig. 10; Fig. Figure 12B is the schematic representation of the operating state of the pixel circuit in the second stage S2 according to at least one embodiment of the present disclosure. Fig. 10; Fig. 12C is the schematic representation of the operating state of the pixel circuit in the third stage S3 according to at least one embodiment of the present disclosure from Fig. 10. FORMS OF EXECUTION OF THE INVENTION

[0057] The technical solutions in the embodiments of this disclosure are clearly and completely described below in conjunction with the drawings in those embodiments. Obviously, the described embodiments represent only a subset of the embodiments of this disclosure, but not all of them. Starting from the embodiments in this disclosure, all other embodiments that a person skilled in the art obtains without inventive step fall within the scope of protection of this disclosure.

[0058] The transistors used in all embodiments of this disclosure can be triodes, thin-film transistors, field-effect transistors, or other components with the same properties. In the embodiments of this disclosure, to distinguish between the two electrodes of the transistor, in addition to the control electrode, one electrode is referred to as the first electrode and the other as the second electrode.

[0059] If the transistor is a triode during actual operation, the control electrode can be a base, the first electrode a collector, and the second electrode an emitter; or the control electrode can be a base, the first electrode an emitter, and the second electrode a collector.

[0060] If the transistor is a thin-film transistor or a field-effect transistor during actual operation, the control electrode can be a gate, the first electrode a drain, and the second electrode a source; or the control electrode can be a gate, the first electrode a source, and the second electrode a drain.

[0061] As in Fig. As shown in Figure 1, the pixel circuit according to the embodiment of the present disclosure comprises a light-emitting element E0, a first energy storage circuit 11, a first driver circuit 12, a second driver circuit 13 and a first driver control circuit 14, a second driver control circuit 15, a second energy storage circuit 16 and a first control data voltage write circuit 17;

[0062] The first terminal of the first energy storage circuit 11 is electrically connected to the first node c, and the second terminal of the first energy storage circuit 11 is electrically connected to the second node b. The first energy storage circuit 11 serves to store electrical energy;

[0063] The control terminal of the first driver control circuit 14 is electrically connected to the third node a; the control terminal of the second driver control circuit 15 is electrically connected to the fourth node d;

[0064] The first driver control circuit 14 is also electrically connected to the second node b or the control terminal of the first driver circuit 12 in order to control a connection or a disconnection between the second node b and the control terminal of the first driver circuit under control of a potential of the third node a;

[0065] The second driver control circuit 15 is also electrically connected to the second node b or the control terminal of the second driver circuit 13 in order to control an electrical connection or a disconnection between the second node b and the control terminal of the second driver circuit 13 under control of a potential of the fourth node d;

[0066] The first terminal of the second energy storage circuit 16 is electrically connected to the third node a, and the second terminal of the second energy storage circuit 16 is electrically connected to the first terminal of the first driver circuit 12; the second energy storage circuit 16 serves to store electrical energy;

[0067] The first control data voltage write circuit 17 is electrically connected to the first write control terminal G1, the first control data voltage write terminal D1 and the third node a in order to control it under the control of the first write control signal provided by the first write control terminal G1, to write the first control data voltage Vdata1, which is provided by the first control data voltage write terminal D1, to the third node.

[0068] The first terminal of the first driver circuit 12 and the first terminal of the second driver circuit 13 are both electrically connected to the supply voltage terminal ELVDD, and the second terminal of the first driver circuit 12 and the second terminal of the second driver circuit 13 are both electrically connected to the light-emitting element E0. The first driver circuit 12 is used to drive the light-emitting element E0 by controlling the potential of its control terminal. The second driver circuit 13 is also used to drive the light-emitting element E0 by controlling the potential of its control terminal.

[0069] In one specific implementation, the supply voltage terminal ELVDD is used to provide the supply voltage Vdd.

[0070] The pixel circuit described in the embodiment of the present disclosure, when put into operation, drives the light-emitting element E0 by means of the first driver circuit 12 to emit light during the display with low gray levels, and drives the light-emitting element E0 by means of the second driver circuit 13 to emit light during the display with high gray levels; alternatively, the pixel circuit drives the light-emitting element E0 by means of the first driver circuit 12 to emit light during the display with low gray levels, drives the light-emitting element E0 by means of the second driver circuit 13 to emit light during the display with mid-gray levels, and drives the light-emitting element E0 by means of the first 12 and second driver circuit 13 to emit light during the display with high gray levels;

[0071] The subthreshold swing of the first driver transistor included in the first driver circuit 12 matches the SS swing of the second driver transistor included in the second driver circuit 13, and they can share a data voltage value range.

[0072] In at least one embodiment of the present disclosure, the width-to-length ratio of the first driver transistor differs from the width-to-length ratio of the second driver transistor, and the width-to-length ratio of the second driver transistor is larger than the width-to-length ratio of the first driver transistor. The width-to-length ratio of the second driver transistor may, for example, be twice as large as the width-to-length ratio of the first driver transistor, but is not limited thereto.

[0073] In one embodiment of the present disclosure, the pixel circuit described can be used for a display with multiple shades of gray, thereby achieving an exceptional display with 256 shades of gray, and thus increasing the number of shades of gray displayed without significantly increasing the cost.

[0074] In at least one embodiment of the present disclosure, the third node and the fourth node can be the same node.

[0075] As in Fig. As shown in 2, the third node and the fourth node can be determined based on the one in Fig. In the embodiment of the pixel circuit shown in 1, the same node should be used;

[0076] The control terminal of the second driver control circuit 15 is electrically connected to the third node a and serves to control the connection or disconnection of the second node b and the second driver circuit 13 under control of the potential of the third node a.

[0077] Based on the in Fig. In the embodiment of the pixel circuit shown in 1, the pixel circuit can be implemented according to at least one embodiment of the present disclosure, as shown in 1. Fig. 3 shown, further comprising a third energy storage circuit 31 and a second control data voltage write circuit 32;

[0078] The first terminal of the third energy storage circuit 31 is electrically connected to the first terminal of the first driver circuit 12, and the second terminal of the third energy storage circuit 31 is electrically connected to the control terminal of the second driver control circuit 15; the third energy storage circuit 31 serves to store electrical energy;

[0079] The second control data voltage write circuit 32 is electrically connected to the second write control terminal G2, the second control data voltage write terminal D2 and the fourth node d in order to write the second control data voltage Vdata2, which is provided by the second control data voltage write terminal D2, to the fourth node d under control of the second write control signal provided by the second write control terminal G2.

[0080] In at least one embodiment of the present disclosure, the first write control port and the second write control port can be the same write control port, but are not limited to this.

[0081] In at least one embodiment of the present disclosure, the pixel circuit also comprises a data writing circuit, an adjustment circuit and a compensation control circuit;

[0082] The data write circuit is electrically connected to the data line, the third write control terminal, and the first node, respectively, in order to write the data voltage supplied by the data line to the first node for data voltage writing under the control of the third write control signal provided by the third write control terminal G2.

[0083] The adjustment circuit is electrically connected to the adjustment control terminal, the adjustment voltage terminal, and the first node in order to write the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal provided by the adjustment control terminal, in order to adjust the potential of the first node;

[0084] The compensation control circuit is electrically connected to the compensation control terminal, the second node, and the second terminal of the first driver circuit in order to control the connection or disconnection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal provided by the compensation control terminal.

[0085] In at least one embodiment of the present disclosure, the first write control port, the second write control port and the third write control port can be the same write control port, but are not limited to this.

[0086] The pixel circuit in at least one embodiment of the present disclosure further comprises a light emission control circuit;

[0087] The light emission control circuit is electrically connected to the light emission control terminal, the second terminal of the first driver circuit or the first electrode of the light-emitting element, in order to control the connection or disconnection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal provided by the light emission control terminal;

[0088] The second electrode of the light-emitting element is electrically connected to the first voltage terminal.

[0089] The pixel circuit in at least one embodiment of the present disclosure further comprises a reset circuit;

[0090] The reset circuit is electrically connected to the reset control terminal, the reset voltage terminal, and the first electrode of the light-emitting element in order to write the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal;

[0091] The second electrode of the light-emitting element is electrically connected to the first voltage terminal.

[0092] Based on at least one embodiment of the in Fig. 2 pixel circuit shown, comprises the pixel circuit b described in one embodiment of the present disclosure, as shown in Fig. 4 shown, furthermore a data recording circuit 41, a setting circuit 42 and a compensation control circuit 43. Light emission control circuit 44 and reset circuit 45;

[0093] The data write circuit 41 is electrically connected to the data line D0, the third write control terminal G3 and the first node c in order to write the data voltage supplied by the data line D0 to the first node c under the control of the third write control signal provided by the third write control terminal G3;

[0094] The setting circuit 42 is electrically connected to the setting control terminal Z1, the setting voltage terminal Vz or the first node c, in order to write the setting voltage provided by the setting voltage terminal to the first node c under the control of the setting control signal provided by the setting control terminal Z1;

[0095] The compensation control circuit 43 is electrically connected to the compensation control terminal R0, the second node b and the second terminal of the first driver circuit 12 in order to control the connection or disconnection between the second node b and the second terminal of the first driver circuit 12 under the control of the compensation control signal provided at the compensation control terminal R0;

[0096] The light emission control circuit 44 is electrically connected to the light emission control terminal E1, the second terminal of the first driver circuit 12 or the first electrode of the light-emitting element E0, in order to control the connection or disconnection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal provided by the light emission control terminal E1;

[0097] The second electrode of the light-emitting element E0 is electrically connected to the first voltage terminal V1;

[0098] The reset circuit 45 is electrically connected to the reset control terminal R1, the reset voltage terminal Vr or the first electrode of the light-emitting element E0 in order to write the reset voltage provided by the reset voltage terminal Vr to the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal R1;

[0099] In at least one embodiment of the present disclosure, the adjustment control connection can be a light emission control connection, the adjustment voltage connection can be a first voltage connection, and the compensation control connection R0 and the reset control connection R1 can be the same control connection; the reset voltage connection Vr can be the first voltage connection, but is not limited to that.

[0100] In the like Fig. In the pixel circuit shown in section 4 of the present disclosure, the display cycle comprises a first stage, a second stage, and a third stage, which are provided sequentially; The control method comprises: In the first stage, the reset circuit 45 writes the reset voltage provided by the reset voltage terminal Vr, under the control of the reset control signal, to the first electrode of the light-emitting element E0 in order to control it so that the light-emitting element E0 does not emit light and to clear the charge remaining on the first electrode of the light-emitting element E0; the light emission control circuit 44 controls the connection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal; the compensation control circuit 43 controls the connection between the second node b and the second terminal of the first driver circuit 12 under the control of the compensation control signal in order to write the reset voltage to the second node b;The setting circuit 42 writes the setting voltage provided by the setting voltage terminal Vz to the first node c under the control of the setting control signal; optionally, the reset voltage and the setting voltage are the same, both can, for example, provide the low voltage Vss to the low voltage terminal;

[0101] In the second stage, the data write circuit 41 writes the data voltage Vdata0 provided by the data line D0 to the first node c under the control of the third write control signal, and the reset circuit 45 writes the reset voltage provided by the reset voltage terminal Vr to the first electrode of the light-emitting element under the control of the reset control signal, the light emission control circuit 44 controls the connection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal;The compensation control circuit 43 controls the connection between the second node b and the second terminal of the first driver circuit 12 under the control of the compensation control signal, and the first control data voltage write circuit 17 controls it under the control of a first write control signal to write a first control data voltage Vdata1, which is provided by the first control data voltage write terminal D1, to the third node a; the first driver control circuit 14 controls the connection or disconnection between the second node b and the control terminal of the first driver circuit 12 under the control of the potential of the third node a; the second driver control circuit 15 controls the connection or disconnection between the second node b and the control terminal of the second driver circuit 13 under the control of the potential of the third node a;

[0102] In the third stage, the setting circuit 42 applies the setting voltage provided by the setting voltage terminal Vz to the first node c under the control of the setting control signal; the light emission control circuit 44 controls the connection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal; the first driver circuit 12 or the second driver circuit 13 drives the light-emitting element E0 to emit light.

[0103] In one embodiment of the in Fig. In the second stage, the following applies to the pixel circuit shown in section 4 of the present disclosure, which is put into operation: If the first control data voltage Vdata1 is the second voltage signal, the first driver control circuit 14, under control of the potential of the third node a, controls the connection between the second node b and the control terminal of the first driver circuit 12; If the first control data voltage Vdata1 is a third voltage signal, the first driver control circuit 14, under control of the potential of the third node a, controls the disconnection between the second node b and the control terminal of the first driver circuit 12; If the first control data voltage Vdata1 is the second voltage signal, the second driver control circuit 15, under control of the potential of the third node a, controls the separation between the second node b and the control terminal of the second driver circuit 13; If the first control data voltage Vdata1 is a third voltage signal, the second driver control circuit 15, under control of the potential of the third node a, controls the connection between the second node b and the control terminal of the second driver circuit 13; While the first driver control circuit in the second stage controls the connection between the second node b and the control terminal of the first driver circuit 12 under control of the potential of the third node a, the first driver circuit 12 in the third stage drives the light-emitting element E0 to emit light; While the second driver control circuit 15 in the second stage controls the connection between the second node b and the control terminal of the second driver circuit 13 under control of the potential of the third node, the second driver circuit 13 in the third stage drives the light-emitting element E0 to emit light.

[0104] In at least one embodiment of the present disclosure, the second voltage signal can be a high-voltage signal and the third voltage signal can be a low-voltage signal, but is not limited to this.

[0105] Based on at least one embodiment of the in Fig. The pixel circuit shown in section 3 comprises, according to at least one of the pixel circuits shown in the diagram, the pixel circuit as described in Fig. 5 in the embodiment shown in the present disclosure also includes a data writing circuit 41, an adjustment circuit 42, a compensation control circuit 43, a light emission control circuit 44 and a reset circuit 45;

[0106] The data write circuit is electrically connected to the data line D0, the third write control terminal G3, and the first node c, respectively, in order to write the data voltage supplied by the data line D0 to the first node c under the control of the third write control signal provided by the third write control terminal G3;

[0107] The setting circuit 42 is electrically connected to the setting control terminal Z1, the setting voltage terminal Vz, and the first node c, respectively, in order to write the setting voltage provided by the setting voltage terminal Vz to the first node c under the control of the setting control signal provided by the setting control terminal Z1;

[0108] The compensation control circuit 43 is electrically connected to the compensation control terminal R0, the second node b and the second terminal of the first driver circuit 12 in order to control the connection or disconnection between the second node b and the second terminal of the first driver circuit 12 under the control of the compensation control signal provided by the compensation control terminal R0;

[0109] The light emission control circuit 44 is electrically connected to the light emission control terminal E1, the second terminal of the first driver circuit 12, and the first electrode of the light-emitting element E0, respectively, in order to control the connection or disconnection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal provided by the light emission control terminal E1;

[0110] The second electrode of the light-emitting element E0 is electrically connected to the first voltage terminal V1;

[0111] The reset circuit 45 is electrically connected to the reset control terminal R1, the reset voltage terminal Vr and the first electrode of the light-emitting element E0 in order to write the reset voltage provided by the reset voltage terminal Vr to the first electrode of the light-emitting element under control of the reset control signal provided by the reset control terminal R1.

[0112] In at least one embodiment of the present disclosure, the adjustment control connection can be a light emission control connection, the adjustment voltage connection can be a first voltage connection, the compensation control connection R0 and the reset control connection R1 can be the same control connection, and the reset voltage connection Vr can be the first voltage connection, but is not limited to being so.

[0113] In the like Fig. The display cycle of the pixel circuit shown in section 5 of the present disclosure, which is put into operation, comprises a first stage, a second stage and a third stage;

[0114] In the first stage, the reset circuit 45 writes the reset voltage provided by the reset voltage terminal Vr to the first electrode of the light-emitting element E0 under the control of the reset control signal; the light emission control circuit 44 controls the connection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal; the compensation control circuit 43 controls the connection between the second node b and the second terminal of the first driver circuit 12 under the control of the compensation control signal in order to write the reset voltage to the second node b; the adjustment circuit 42 writes the adjustment voltage provided by the adjustment voltage terminal Vz to the first node c under the control of the adjustment control signal;

[0115] In the second stage, the data write circuit 41 writes the data voltage Vdata0 provided by the data line D0 to the first node c under the control of the third write control signal, and the reset circuit 45 writes the reset voltage provided by the reset voltage terminal Vr to the first electrode of the light-emitting element E0 under the control of the reset control signal, the light emission control circuit 44 controls the connection between the second terminal of the first driver circuit 12 and the first electrode of the light-emitting element E0 under the control of the light emission control signal;The compensation control circuit 43 controls the connection between the second node b and the second terminal of the first driver circuit 12 under the control of the compensation control signal, and the first control data voltage write circuit 17 controls it under the control of a first write control signal to write a first control data voltage Vdata1, which is provided by the first control data voltage write terminal D1, to the third node a; the second control data voltage write circuit 32 writes the second control data voltage Vdata2, which is provided by the second control data voltage write terminal D2, to the fourth node d under the control of the second write control signal, the first driver control circuit 14 controls the connection or disconnection between the second node b and the control terminal of the first driver circuit 12 under the control of the potential of the third node a;The second driver control circuit 15 controls the connection or disconnection between the second node and the control terminal of the second driver circuit 13 under control of the potential of the fourth node d;

[0116] In the third stage, the setting circuit 42 applies the setting voltage provided by the setting voltage terminal Vz to the first node c under the control of the setting control signal; the light emission control circuit 44 controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element E0 under the control of the light emission control signal; the first driver circuit 12 and / or the second driver circuit 13 drives the light-emitting element E0 to emit light.

[0117] In the like Fig. In the pixel circuit shown in Figure 5 of the present disclosure, which is put into operation, the first driver control circuit 14 in the second stage controls the connection between the second node b and the control terminal of the first driver circuit 12 when the first control data voltage is the fourth voltage signal;

[0118] If the first control data voltage is the fifth voltage signal, the first driver control circuit 14 controls the separation between the second node b and the control terminal of the first driver circuit 12;

[0119] If the second control data voltage is the sixth voltage signal, the second driver control circuit 15 in the second stage controls the connection between the second node b and the control terminal of the second driver circuit 13;

[0120] If the second control data voltage is the seventh voltage signal, the second driver control circuit 15 controls the disconnection between the second node b and the control terminal of the second driver circuit 13;

[0121] When the first driver control circuit 14 in the second stage controls the connection between the second node b and the control terminal of the first driver circuit 12, and the second driver control circuit 15 controls the disconnection between the second node b and the control terminal of the second driver circuit 13, the first driver circuit 12, under control of the potential of its control terminal, drives the light-emitting element E0 to emit light;

[0122] If the first driver control circuit 14 in the second stage controls the disconnection between the second node b and the control terminal of the first driver circuit 12, and the second driver control circuit 15 controls the connection between the second node b and the control terminal of the second driver circuit 13, the second driver circuit 13, under control of the potential of its control terminal, drives the light-emitting element E0 to emit light;

[0123] When the first driver control circuit 14 in the second stage controls the connection between the second node b and the control terminal of the first driver circuit 12, and the second driver control circuit 15 controls the connection between the second node b and the control terminal of the second driver circuit 13, the first driver circuit 12 and the second driver circuit 13 each control the potential of the corresponding control terminal, drive the light-emitting element E0 together to emit light.

[0124] In at least one embodiment of the present disclosure, the fourth voltage signal and the sixth voltage signal can be low-voltage signals, and the fifth voltage signal and the seventh voltage signal can be high-voltage signals, but are not limited to them.

[0125] Optionally, the first driver control circuit includes a first transistor, the second driver control circuit a second transistor, the first driver circuit a first driver transistor, and the second driver circuit a second driver transistor; the control terminal of the first transistor is electrically connected to the third node, the first electrode of the first transistor is electrically connected to the second node, and the second electrode of the first transistor is electrically connected to the control terminal of the first driver circuit;

[0126] The control electrode of the second transistor is electrically connected to the fourth node, the first electrode of the second transistor is electrically connected to the second node, and the second electrode of the second transistor is electrically connected to the control terminal of the second driver circuit;

[0127] The control electrode of the first driver transistor is electrically connected to the control terminal of the first driver circuit, the first electrode of the first driver transistor is electrically connected to the first terminal of the first driver circuit, and the second electrode of the first driver transistor is electrically connected to the second terminal of the first driver circuit;

[0128] The control electrode of the second driver transistor is electrically connected to the control terminal of the second driver circuit, the first electrode of the second driver transistor is electrically connected to the first terminal of the second driver circuit, and the second electrode of the second driver transistor is electrically connected to the second terminal of the second driver circuit.

[0129] Optionally, the first energy storage circuit includes a first capacitor and the second energy storage circuit includes a second capacitor;

[0130] The first terminal of the first capacitor is electrically connected to the first node, and the second terminal of the first capacitor is electrically connected to the second node;

[0131] The first terminal of the second capacitor is electrically connected to the third node, and the second terminal of the second capacitor is electrically connected to the first terminal of the first driver circuit.

[0132] Optionally, the first control data voltage write circuit includes a third transistor;

[0133] The control electrode of the third transistor is electrically connected to the first write control terminal, the first electrode of the third transistor is electrically connected to the first control data voltage write terminal, and the second electrode of the third transistor is electrically connected to the third node.

[0134] Optionally, the third energy storage circuit includes a third capacitor and the second control data voltage write circuit includes a fourth transistor;

[0135] The first terminal of the third capacitor is electrically connected to the first terminal of the first driver circuit, and the second terminal of the third capacitor is electrically connected to the control terminal of the second driver control circuit;

[0136] The control electrode of the fourth transistor is electrically connected to the second write control terminal, the first electrode of the fourth transistor is electrically connected to the second control data voltage write terminal, and the second electrode of the fourth transistor is electrically connected to the fourth node.

[0137] Optionally, the data writing circuit includes a fifth transistor; the adjustment circuit includes a sixth transistor; the compensation control circuit includes a seventh transistor;

[0138] The control electrode of the fifth transistor is electrically connected to the third write control terminal, the first electrode of the fifth transistor is electrically connected to the data line, and the second electrode of the fifth transistor is electrically connected to the first node;

[0139] The control electrode of the sixth transistor is electrically connected to the adjustment control terminal, the first electrode of the sixth transistor is electrically connected to the adjustment voltage terminal, and the second electrode of the sixth transistor is electrically connected to the first node;

[0140] The control electrode of the seventh transistor is electrically connected to the compensation control terminal, the first electrode of the seventh transistor is electrically connected to the second node, and the second electrode of the seventh transistor is electrically connected to the second terminal of the first driver circuit.

[0141] Optionally, the light emission control circuit includes an eighth transistor;

[0142] The control electrode of the eighth transistor is electrically connected to the light emission control terminal, the first electrode of the eighth transistor is electrically connected to the second terminal of the first driver circuit, and the second electrode of the eighth transistor is electrically connected to the first electrode of the light-emitting element.

[0143] Optionally, the reset circuit includes a ninth transistor;

[0144] The control electrode of the ninth transistor is electrically connected to the reset control terminal, the first electrode of the ninth transistor is electrically connected to the reset voltage terminal, and the second electrode of the ninth transistor is electrically connected to the first electrode of the light-emitting element.

[0145] Based on an embodiment of the in Fig. The pixel circuit shown in the 4 is like in Fig. 6. The light-emitting element shown is an organic light-emitting diode O1;

[0146] The first driver control circuit 14 includes a first transistor T1, the second driver control circuit 15 includes a second transistor T2, the first driver circuit 12 includes a first driver transistor T01 and the second driver circuit 13 includes a second driver transistor T02;

[0147] The gate of the first transistor T1 is electrically connected to the third node a, the source of the first transistor T1 is electrically connected to the second node b, and the drain of the first transistor T1 is electrically connected to the gate of the first driver transistor T01;

[0148] The gate of the second transistor T2 is electrically connected to the third node a, the source of the second transistor T2 is electrically connected to the second node b, and the drain of the second transistor T2 is electrically connected to the gate of the second driver transistor T02;

[0149] The first energy storage circuit 11 includes a first capacitor C1 and the second energy storage circuit 16 includes a second capacitor C2;

[0150] The first terminal of the first capacitor C1 is electrically connected to the first node c, and the second terminal of the first capacitor C1 is electrically connected to the second node b;

[0151] The first terminal of the second capacitor C2 is electrically connected to the third node a, and the second terminal of the second capacitor C2 is electrically connected to the source of the first driver transistor T01;

[0152] The source of the first driver transistor T01 and the source of the second driver transistor T02 are both electrically connected to the supply voltage terminal ELVDD; the supply voltage terminal ELVDD is used to provide the supply voltage Vdd.

[0153] The drain of the second driver transistor T02 is electrically connected to the second node b;

[0154] The first control data voltage write circuit 17 includes a third transistor T3;

[0155] The gate of the third transistor T3 is electrically connected to the first write control terminal G1, and the source of the third transistor T3 is electrically connected to the first control data voltage write terminal D1. The drain of the third transistor T3 is electrically connected to the third node a;

[0156] The data writing circuit 41 includes a fifth transistor T5; the setting circuit 42 includes a sixth transistor T6; the compensation control circuit 43 includes a seventh transistor T7;

[0157] The gate of the fifth transistor T5 is electrically connected to the first write control terminal G1, the source of the fifth transistor T5 is electrically connected to the data line D0, and the drain of the fifth transistor T5 is electrically connected to the first node c;

[0158] The gate of the sixth transistor T6 is electrically connected to the light emission control terminal E1, the source of the sixth transistor T6 is electrically connected to the low voltage terminal VS, and the drain of the sixth transistor T6 is electrically connected to the first node c; the low voltage terminal VS is used to provide the low voltage Vss;

[0159] The gate of the seventh transistor T7 is electrically connected to the reset control terminal R1, the source of the seventh transistor T7 is electrically connected to the second node b, and the drain of the seventh transistor T7 is electrically connected to the drain of the first driver transistor T01;

[0160] The light emission control circuit 44 includes an eighth transistor T8;

[0161] The gate of the eighth transistor T8 is electrically connected to the light emission control terminal E1, the source of the eighth transistor T8 is electrically connected to the drain of the first driver transistor T01, and the drain of the eighth transistor T8 is electrically connected to the anode of the organic light-emitting diode O1;

[0162] The reset circuit 45 includes a ninth transistor T9;

[0163] The gate of the ninth transistor T9 is electrically connected to the reset control terminal R1, the first electrode of the ninth transistor T9 is electrically connected to the low voltage terminal VS, and the drain of the ninth transistor T9 is electrically connected to the anode of the organic light-emitting diode O1.

[0164] In at least one embodiment of the Fig. In the 6 pixel circuit shown, the first write control connection G1 and the third write control connection are the same write control connection; the setting control connection is the light emission control connection E1; the compensation control connection is the reset control connection R1; the setting voltage connection is the low voltage connection VS; the reset voltage connection is the low voltage connection VS; however, it is not limited to this.

[0165] In at least one embodiment of the Fig. In the pixel circuit shown in Figure 6, T1 is an n-type transistor, and the transistors included in the pixel circuit other than T1 are p-type transistors, but this is not limited to them.

[0166] In at least one embodiment of the Fig. In the pixel circuit shown in Figure 6, the width-to-length ratio of T02 can be twice that of T01, but is not limited to this.

[0167] As in Fig. As shown in 7, the display cycle can be adjusted in the Fig. 6 shown, at least one embodiment of the pixel circuit in operation comprises the first stage S1, the second stage S2 and the third stage S3, which are provided one after the other;

[0168] In the first stage S1, R1 provides a low-voltage signal, E1 provides a low-voltage signal, and G1 provides a high-voltage signal, as shown in Fig. As shown in 8A, T7 is switched on, and T6, T9 and T8 are all switched on to drive the second node b to achieve a potential of VSS, and the potential of the third node a is VSS.

[0169] In the second stage S2, R1 provides a low-voltage signal, E1 provides a high-voltage signal, and G1 provides a low-voltage signal. As in Fig. As shown in 8B, T9, T7, T5 and T3 are all switched on and D1 supplies the first control data voltage Vdata1 to the three nodes a; D0 supplies the data voltage Vdata0 to the first node c;

[0170] If Vdata1 is a low-voltage signal in the second stage S2, T2 is switched on and T1 is switched off. At the beginning of the second stage S2, T02 is switched on and the supply voltage Vdd charges C1 via T02 and T7 to increase the gate potential of T02 until T02 switches off, at which point the gate potential of T02 becomes Vdd+Vth2, and Vth2 is the threshold voltage of T02.

[0171] If Vdata1 is a high-voltage signal in the second stage S2, T1 is switched on and T2 is switched off. At the beginning of the second stage S2, T01 is switched on and the supply voltage Vdd charges C1 via T01 and T7 to increase the gate potential of T01 until T01 switches off, at which point the gate potential of T01 becomes Vdd+Vth1, and Vth1 is the threshold voltage of T01.

[0172] In the third stage S3, R1 provides a high-voltage signal, E1 provides a low-voltage signal, and G1 provides a high-voltage signal, as in Fig. 8C is shown, T6 and T8 are switched on;

[0173] If Vdata1 is a low-voltage signal in the second stage S2, then in the third stage S3 the potential of the second node b becomes Vdd+Vth2+Vss-Vdata0, and T02 drives O1 to emit light for the high-grayscale display; the current I flowing through O1 at this time is equal to K2×(Vdd+Vth2+Vss-Vdata0-Vdd-Vth2)2 , and I is equal to K2×(Vss-Vdata0) 2 ; K2 is the current coefficient of T02;

[0174] If Vdata1 is a high-voltage signal in the second stage S2, the potential of the second node b in the third stage S3 becomes Vdd+Vth1+Vss-Vdata0, and T01 drives O1 to emit light for the low grayscale display; the current I flowing through O1 at this time is equal to K1×(Vdd+Vth1+Vss-Vdata0-Vdd-Vth1) 2 , and I is equal to K1×(Vss-Vdata0) 2 , K1 is the current coefficient of T01.

[0175] In a low grayscale display in one embodiment of the Fig. 6 of the pixel circuit shown in this disclosure, the display gray level can be 0-255, but is not limited to this.

[0176] If the width-to-length ratio of the T02 in an embodiment of the in Fig. The pixel circuit shown in section 6 is 20µm / 5µm and the width-to-length ratio of the T01 is 10µm / 5µm, shows Fig. 9A a waveform diagram of the current I flowing through O1 during high grayscale display, and Fig. 9B a waveform diagram of the current I flowing through the O1 during the low grey value display.

[0177] In the Fig. 9A and Fig. 9B is the horizontal axis the time t in seconds and the vertical axis the current I flowing through O1 in A (amperes).

[0178] In at least one embodiment of the present disclosure, the current coefficient of the driver transistor is proportional to the width-to-length ratio of the driver transistor; if the width-to-length ratio of the driver transistor is changed and the other parameters remain unchanged, then the driver current generated by the driver transistor changes.

[0179] Based on at least one embodiment of the in Fig. In the pixel circuit shown in section 5, the light-emitting element is as shown in Fig. 10 shows an organic light-emitting diode O1;

[0180] The first driver control circuit 14 includes a first transistor T1, the second driver control circuit 15 includes a second transistor T2, the first driver circuit 12 includes a first driver transistor T01 and the second driver circuit 13 includes a second driver transistor T02;

[0181] The gate of the first transistor T1 is electrically connected to the third node a, the source of the first transistor T1 is electrically connected to the second node b, and the drain of the first transistor T1 is electrically connected to the gate of the first driver transistor T01;

[0182] The gate of the second transistor T2 is electrically connected to the third node a, the source of the second transistor T2 is electrically connected to the second node b, and the drain of the second transistor T2 is electrically connected to the gate of the second driver transistor T02;

[0183] The first energy storage circuit 11 includes a first capacitor C1 and the second energy storage circuit 16 includes a second capacitor C2;

[0184] The first terminal of the first capacitor C1 is electrically connected to the first node c, and the second terminal of the first capacitor C1 is electrically connected to the second node b;

[0185] The first terminal of the second capacitor C2 is electrically connected to the third node a, and the second terminal of the second capacitor C2 is electrically connected to the source of the first driver transistor T01;

[0186] The source of the first driver transistor T01 and the source of the second driver transistor T02 are both electrically connected to the supply voltage terminal ELVDD; the supply voltage terminal ELVDD is used to provide the supply voltage Vdd.

[0187] The drain of the second driver transistor T02 is electrically connected to the second node b;

[0188] The third energy storage circuit 31 includes a third capacitor C3 and the second control data voltage write circuit 32 includes a fourth transistor T4;

[0189] The first terminal of the third capacitor C3 is electrically connected to the source of the first driver transistor T01, and the second terminal of the third capacitor C3 is electrically connected to the gate of the second transistor T2;

[0190] The gate of the fourth transistor T4 is electrically connected to the first write control terminal G1, and the source of the fourth transistor T4 is electrically connected to the second control data voltage write terminal D2. The drain of transistor T4 is electrically connected to the fourth node d;

[0191] The first control data voltage write circuit 17 includes a third transistor T3;

[0192] The gate of the third transistor T3 is electrically connected to the first write control terminal G1, and the source of the third transistor T3 is electrically connected to the first control data voltage write terminal D1. The drain of the third transistor T3 is electrically connected to the third node a;

[0193] The data writing circuit 41 includes a fifth transistor T5; the setting circuit 42 includes a sixth transistor T6; the compensation control circuit 43 includes a seventh transistor T7;

[0194] The gate of the fifth transistor T5 is electrically connected to the first write control terminal G1, the source of the fifth transistor T5 is electrically connected to the data line D0, and the drain of the fifth transistor T5 is electrically connected to the first node c;

[0195] The gate of the sixth transistor T6 is electrically connected to the light emission control terminal E1, the source of the sixth transistor T6 is electrically connected to the low voltage terminal VS, and the drain of the sixth transistor T6 is electrically connected to the first node c; the low voltage terminal VS is used to provide the low voltage Vss;

[0196] The gate of the seventh transistor T7 is electrically connected to the reset control terminal R1, the source of the seventh transistor T7 is electrically connected to the second node b, and the drain of the seventh transistor T7 is electrically connected to the drain of the first driver transistor T01;

[0197] The light emission control circuit 44 includes an eighth transistor T8;

[0198] The gate of the eighth transistor T8 is electrically connected to the light emission control terminal E1, the source of the eighth transistor T8 is electrically connected to the drain of the first driver transistor T01, and the drain of the eighth transistor T8 is electrically connected to the anode of the organic light-emitting diode O1;

[0199] The reset circuit 45 includes a ninth transistor T9;

[0200] The gate of the ninth transistor T9 is electrically connected to the reset control terminal R1, the first electrode of the ninth transistor T9 is electrically connected to the low voltage terminal VS, and the drain of the ninth transistor T9 is electrically connected to the anode of the organic light-emitting diode O1.

[0201] In at least one embodiment of the Fig. In the 10 pixel circuits shown, the first write control connection is G1, the second write control connection and the third write control connection are the same write control connection; the setting control connection is the light emission control connection E1; the compensation control connection is the reset control connection R1; the setting voltage connection is the low voltage connection VS; the reset voltage connection is the low voltage connection VS; however, it is not limited to this.

[0202] In at least one embodiment of the Fig. In the 10 pixel circuits shown, all transistors are p-type transistors, but this is not the only factor.

[0203] In at least one embodiment of the Fig. In the pixel circuit shown in Figure 10, the threshold voltage of the first driver transistor T01 is equal to the threshold voltage of the second driver transistor T02. The threshold voltages of T01 and T02 are both the threshold voltage Vth, but are not limited to it.

[0204] In at least one embodiment of the Fig. In the pixel circuit shown in Figure 10, the width-to-length ratio of T02 can be twice that of T01, but is not limited to this.

[0205] As in Fig. As shown in 11, the display cycle can be adjusted in the Fig. 10 shown, at least one embodiment of the pixel circuit in operation comprises the first stage S1, the second stage S2 and the third stage S3, which are provided one after the other;

[0206] In the first stage S1, R1 provides a low-voltage signal, E1 provides a low-voltage signal, G1 provides a high-voltage signal, T7 is switched on, as shown in Fig. As shown in 12A, T6, T9 and T8 are all switched on and the potential of the second node b is Vss. The potential of the first node c is Vss;

[0207] In the second stage S2, R1 provides a low-voltage signal, E1 provides a high-voltage signal, and G1 provides a low-voltage signal. As in Fig. As shown in Figure 12B, T9, T7, T5, and T3 are all switched on. D1 supplies the first control data voltage Vdata1 to the three nodes a; D2 supplies the second control data voltage Vdata2 to the fourth node d; D0 supplies the data voltage Vdata0 to the first node c;

[0208] If Vdata1 is a low-voltage signal and Vdata2 is a high-voltage signal in the second stage S2, T1 is switched on and T2 is switched off; At the beginning of the second stage S2, T01 is switched on and the supply voltage Vdd charges C1 via T01 and T7 to increase the potential of the gate of T01 until T01 is switched off. At this point, the gate potential of T01 becomes Vdd+Vth;

[0209] If Vdata1 is a high-voltage signal and Vdata2 is a low-voltage signal in the second stage S2, T1 is switched off and T2 is switched on; at the beginning of the second phase S2, T02 is switched on and the supply voltage Vdd charges C1 via T02 and T7 to increase the potential of the gate of T02 until T02 is switched off. At this point, the gate potential of T02 becomes Vdd+Vth;

[0210] If Vdata1 and Vdata2 are low-voltage signals in the second stage S2, T1 and T2 are switched on; at the beginning of the second stage S2, T01 and T02 are both switched on and the supply voltage Vdd charges C1 via T01, T02 and T7 to increase the gate potential of T01 and the gate potential of T02 until T01 and T02 are switched off. At this point, the gate potential of T01 and the gate potential of T02 become Vdd+Vth;

[0211] In the third stage S3, R1 provides a high-voltage signal, E1 provides a low-voltage signal, and G1 provides a high-voltage signal, as shown in Fig. 12C shown, T6 and T8 are switched on;

[0212] If in the second stage S2 Vdata1 is a low-voltage signal and Vdata2 is a high-voltage signal, then in the third stage S3 the potential of the second node b becomes Vdd+Vth1+Vss-Vdata0 and controls T01 for the low grayscale display, the O1 to emit light; at this time the current I flowing through O1 is equal to K1×(Vdd+Vth+Vss-Vdata0-Vdd-Vth) 2 , I is equal to K1×(Vss-Vdata0) 2 ; K1 is the current coefficient of T01;

[0213] If in the second stage S2 Vdata1 is a high-voltage signal and Vdata2 is a low-voltage signal, then in the third stage S3 the potential of the second node b becomes Vdd+Vth1+Vss-Vdata0 and controls T02 for the central grayscale display, O1 to emit light; at this time the current I flowing through O1 is equal to K2×(Vdd+Vth+Vss-Vdata0-Vdd-Vth) 2 , I is equal to K2×(Vss-Vdata0) 2 ; K2 is the current coefficient of T02;

[0214] If in the second stage S2 Vdata1 and Vdata2 are low-voltage signals, then in the third stage S3 the potential of the second node b becomes Vdd+Vth1+Vss-Vdata0 and T01 and T02 together control O1 to emit light for the high grayscale display; at this time the current I flowing through O1 is equal to (K1+K2) × (Vdd+Vth+Vss-Vdata0-Vdd-Vth) 2 and I equals (K1+K2) × (Vss-Vdata0) 2; K1 is the current coefficient of T01; K2 is the current coefficient of T02.

[0215] When the pixel circuit in at least one embodiment of the present disclosure is applied to a portable device, the width-to-length ratio W / L of the driver transistor in the red pixel circuit, the width-to-length ratio of the driver transistor in the green pixel circuit and the width-to-length ratio of the driver transistor in the blue pixel circuit can be set differently from each other, but are not limited to doing so.

[0216] The control method described in the present disclosure can be applied to the above-mentioned pixel circuit and comprises the following: The first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; The second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node; The first control data voltage write circuit, under the control of a first write control signal, controls the writing of a first control data voltage, provided by the first control data voltage write terminal, to the third node; The first driver circuit drives the light-emitting element under control of the potential of its control terminal; the second driver circuit drives the light-emitting element under control of the potential of its control terminal.

[0217] Optionally, the third and fourth nodes are the same node; the pixel circuit also includes a data write circuit, an adjustment circuit, a compensation control circuit, a light emission control circuit, and a reset circuit; the display cycle comprises a first stage, a second stage, and a third stage, which are provided sequentially; the control method includes: In the first stage, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal to write the reset voltage to the second node; the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal; In the second stage, the data write circuit writes the data voltage provided by the data line to the first node under the control of the third write control signal, and the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal;The compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal; the first control data voltage write circuit controls, under the control of a first write control signal, to write a first control data voltage, provided by the first control data voltage write terminal, to the third node; the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under the control of the potential of the third node; the second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under the control of the potential of the third node; In the third stage, the setting circuit applies the setting voltage provided by the setting voltage terminal to the first node under the control of the setting control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the first driver circuit or the second driver circuit drives the light-emitting element to emit light.

[0218] In at least one embodiment of the present disclosure, the step in which the first driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node comprises the following: If the first control data voltage is a second voltage signal, the first driver control circuit controls the connection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; If the first control data voltage is a third voltage signal, the first driver control circuit controls the disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node;

[0219] The step in which the second driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the third node comprises the following: If the first control data voltage is a second voltage signal, the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the third node; If the first control data voltage is a third voltage signal, the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit under control of the potential of the third node; The step of driving the light-emitting element to emit light by the first driver circuit or the second driver circuit includes: While the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit under control of the potential of the third node, the first driver circuit in the third stage drives the light-emitting element to emit light; While the second driver control circuit in the second stage controls the connection between the second node and the control terminal of the second driver circuit under control of the potential of the third node, the second driver circuit in the third stage drives the light-emitting element to emit light.

[0220] Optionally, the pixel circuit also includes a third energy storage circuit and a second control data voltage write circuit; the pixel circuit further includes a data write circuit, an adjustment circuit, a compensation control circuit, a light emission control circuit, and a reset circuit; the display cycle comprises a first stage, a second stage, and a third stage, which are provided sequentially. The control method includes: In the first stage, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal to write the reset voltage to the second node; the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal;

[0221] In the second stage, the data write circuit writes the data voltage provided by the data line to the first node under the control of the third write control signal, and the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal;The compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal; the first control data voltage write circuit controls, under the control of a first write control signal, to write a first control data voltage, provided by the first control data voltage write terminal, to the third node; the second control data voltage write circuit writes the second control data voltage, provided by the second control data voltage write terminal, to the fourth node under the control of the second write control signal; the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under the control of the potential of the third node;The second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node;

[0222] In the third stage, the setting circuit applies the setting voltage provided by the setting voltage terminal to the first node under the control of the setting control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the first driver circuit and / or the second driver circuit drives the light-emitting element to emit light.

[0223] In at least one embodiment of the present disclosure, the step in which the first driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node comprises the following: If the first control data voltage is a fourth voltage signal, the first driver control circuit controls the connection between the second node and the control terminal of the first driver circuit; If the first control data voltage is a fifth voltage signal, the first driver control circuit controls the disconnection between the second node and the control terminal of the first driver circuit; The step in which the second driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node comprises the following: If the second control data voltage is a sixth voltage signal, the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit; If the second control data voltage is a seventh voltage signal, the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit; The step in which the first driver circuit and / or the second driver circuit drives the light-emitting element to emit light includes the following: While the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit, and the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit, the first driver circuit, by controlling the potential of its control terminal, drives the light-emitting element to emit light; While the first driver control circuit in the second stage controls the disconnection between the second node and the control terminal of the first driver circuit, and the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit, the second driver circuit, by controlling the potential of its control terminal, drives the light-emitting element to emit light; While the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit, and the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit, the first driver circuit and the second driver circuit each, under control of the potential of the corresponding control terminal, drive the light-emitting element together to emit light.

[0224] The display device of at least one embodiment of the present disclosure comprises the pixel circuit mentioned above.

[0225] The display device provided by the embodiment of the present disclosure can be any product or component with a display function, such as a portable device, a mobile phone, a tablet, a television, a monitor, a laptop, a digital picture frame, a navigation device and the like.

[0226] The above is the preferred embodiment of the present disclosure. It should be noted that, for the person skilled in the art, several improvements and modifications can be made without departing from the principles described in the present disclosure. Such improvements and modifications should also be considered to be within the scope of protection of the present disclosure.

Claims

[1] A pixel circuit comprising a light-emitting element, a first energy storage circuit, a first driver circuit, a second driver circuit, a first driver control circuit, a second driver control circuit, a second energy storage circuit, and a first control data voltage writing circuit; wherein the first terminal of the first energy storage circuit is electrically connected to the first node, the second terminal of the first energy storage circuit is electrically connected to the second node, and the first energy storage circuit is for storing electrical energy; wherein the control terminal of the first driver control circuit is electrically connected to the third node, and the control terminal of the second driver control circuit is electrically connected to the fourth node; wherein the first driver control circuit is further electrically connected to the second node or the control terminal of the first driver circuit to control a connection or a separation between the second node and the control terminal of the first driver circuit under control of a potential of the third node; wherein the second driver control circuit is also electrically connected to the second node or the control terminal of the second driver circuit, respectively, in order to control an electrical connection or a separation between the second node and the control terminal of the second driver circuit under control of a potential of the fourth node; wherein the first terminal of the second energy storage circuit is electrically connected to the third node, the second terminal of the second energy storage circuit is electrically connected to the first terminal of the first driver circuit, and the second energy storage circuit is for storing electrical energy; wherein the first control data voltage write circuit is electrically connected to the first write control terminal, the first control data voltage write terminal, and the third node, respectively, to control, under control of a first write control signal provided by the first write control terminal, a first control data voltage provided by the first control data voltage write terminal to the third node; wherein the first terminal of the first driver circuit and the first terminal of the second driver circuit are both electrically connected to the supply voltage terminal, and the second terminal of the first driver circuit and the second terminal of the second driver circuit are both electrically connected to the light-emitting element, and wherein the first driver circuit serves to drive the light-emitting element under control of the potential of its control terminal, and the second driver circuit serves to drive the light-emitting element under control of the potential of its control terminal. [2] The pixel circuit of claim 1, wherein the third node and the fourth node are the same node. [3] The pixel circuit of claim 1, wherein the pixel circuit further comprises a third energy storage circuit and a second control data voltage writing circuit; wherein the first terminal of the third energy storage circuit is electrically connected to the first terminal of the first driver circuit, and the second terminal of the third energy storage circuit is electrically connected to the control terminal of the second driver control circuit, and the third energy storage circuit serves to store electrical energy; wherein the second control data voltage write circuit is electrically connected to a second write control terminal, a second control data voltage write terminal, and a fourth node, respectively, for writing the second control data voltage provided by the second control data voltage write terminal to the fourth node under control of a second write control signal provided by the second write control terminal. [4] A pixel circuit according to any one of claims 1 to 3, further comprising a data writing circuit, an adjustment circuit and a compensation control circuit; wherein the data write circuit is electrically connected to the data line, the third write control terminal, and the first node, respectively, to write the data voltage provided by the data line to the first node under the control of the third write control signal provided by the third write control terminal, wherein the adjustment circuit is electrically connected to the adjustment control terminal, the adjustment voltage terminal, and the first node, respectively, to write the adjustment voltage provided by the adjustment voltage terminal to the first node under control of the adjustment control signal provided by the adjustment control terminal; wherein the compensation control circuit is electrically connected to the compensation control terminal, the second node, and the second terminal of the first driver circuit, respectively, to control the connection or disconnection between the second node and the second terminal of the first driver circuit under control of the compensation control signal provided by the compensation control terminal. [5] Pixel circuit according to one of claims 1 to 3, further comprising a light emission control circuit; wherein the light emission control circuit is electrically connected to the light emission control terminal, the second terminal of the first driver circuit, and the first electrode of the light-emitting element, respectively, to control the connection or disconnection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal provided by the light emission control terminal; wherein the second electrode of the light-emitting element is electrically connected to the first voltage terminal. [6] Pixel circuit according to one of claims 1 to 3, further comprising a reset circuit; wherein the reset circuit is electrically connected to the reset control terminal, the reset voltage terminal, and the first electrode of the light-emitting element, respectively, to write the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal; wherein the second electrode of the light-emitting element is electrically connected to the first voltage terminal. [7] The pixel circuit according to any one of claims 1 to 3, wherein the first driver control circuit comprises a first transistor, the second driver control circuit comprises a second transistor, the first driver circuit comprises a first driver transistor, and the second driver circuit comprises a second driver transistor; wherein the control electrode of the first transistor is electrically connected to the third node, and the first electrode of the first transistor is electrically connected to the second node, and the second electrode of the first transistor is electrically connected to the control terminal of the first driver circuit; wherein the control electrode of the second transistor is electrically connected to the fourth node, the first electrode of the second transistor is electrically connected to the second node, and the second electrode of the second transistor is electrically connected to the control terminal of the second driver circuit; wherein the control electrode of the first driver transistor is electrically connected to the control terminal of the first driver circuit, the first electrode of the first driver transistor is electrically connected to the first terminal of the first driver circuit, and the second electrode of the first driver transistor is electrically connected to the second terminal of the first driver circuit; wherein the control electrode of the second driver transistor is electrically connected to the control terminal of the second driver circuit, the first electrode of the second driver transistor is electrically connected to the first terminal of the second driver circuit, and the second electrode of the second driver transistor is electrically connected to the second terminal of the second driver circuit. [8] Pixel circuit according to one of claims 1 to 3, wherein the first energy storage circuit comprises a first capacitor and the second energy storage circuit comprises a second capacitor; wherein the first terminal of the first capacitor is electrically connected to the first node and the second terminal of the first capacitor is electrically connected to the second node; wherein the first terminal of the second capacitor is electrically connected to the third node and the second terminal of the second capacitor is electrically connected to the first terminal of the first driver circuit. [9] The pixel circuit of claim 2, wherein the first control data voltage write circuit comprises a third transistor; wherein the control electrode of the third transistor is electrically connected to the first write control terminal, the first electrode of the third transistor is electrically connected to the first control data voltage write terminal, and the second electrode of the third transistor is electrically connected to the third node. [10] The pixel circuit of claim 3, wherein the third energy storage circuit comprises a third capacitor and the second control data voltage writing circuit comprises a fourth transistor; wherein the first terminal of the third capacitor is electrically connected to the first terminal of the first driver circuit, and the second terminal of the third capacitor is electrically connected to the control terminal of the second driver control circuit; wherein the control electrode of the fourth transistor is electrically connected to the second write control terminal, the first electrode of the fourth transistor is electrically connected to the second control data voltage write terminal, and the second electrode of the fourth transistor is electrically connected to the fourth node. [11] The pixel circuit according to claim 4, wherein the data writing circuit comprises a fifth transistor; the adjustment circuit comprises a sixth transistor; the compensation control circuit comprises a seventh transistor; wherein the control electrode of the fifth transistor is electrically connected to the third write control terminal, the first electrode of the fifth transistor is electrically connected to the data line, and the second electrode of the fifth transistor is electrically connected to the first node; wherein the control electrode of the sixth transistor is electrically connected to the setting control terminal, the first electrode of the sixth transistor is electrically connected to the setting voltage terminal, and the second electrode of the sixth transistor is electrically connected to the first node; wherein the control electrode of the seventh transistor is electrically connected to the compensation control terminal, the first electrode of the seventh transistor is electrically connected to the second node, and the second electrode of the seventh transistor is electrically connected to the second terminal of the first driver circuit. [12] The pixel circuit according to claim 5, wherein the light emission control circuit comprises an eighth transistor; wherein the control electrode of the eighth transistor is electrically connected to the light emission control terminal, the first electrode of the eighth transistor is electrically connected to the second terminal of the first driver circuit, and the second electrode of the eighth transistor is electrically connected to the first electrode of the light emitting element. [13] The pixel circuit of claim 6, wherein the reset circuit comprises a ninth transistor; wherein the control electrode of the ninth transistor is electrically connected to the reset control terminal, the first electrode of the ninth transistor is electrically connected to the reset voltage terminal, and the second electrode of the ninth transistor is electrically connected to the first electrode of the light-emitting element. [14] A driving method applied to the pixel circuit according to any one of claims 1 to 13, the driving method comprising: the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; the second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node; the first control data voltage write circuit controls, under control of a first write control signal, to write a first control data voltage provided from the first control data voltage write terminal to the third node; The first driver circuit drives the light-emitting element under control of the potential of its control terminal; the second driver circuit drives the light-emitting element under control of the potential of its control terminal. [15] The driving method according to claim 14, wherein the third node and the fourth node are the same node; wherein the pixel circuit also includes a data write circuit, a setting circuit, a reset circuit, a compensation control circuit, a light emission control circuit; wherein the display cycle includes a first stage, a second stage, and a third stage provided sequentially, the driving method comprising: In the first stage, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal to write the reset voltage to the second node; the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal; In the second stage, the data write circuit writes the data voltage provided by the data line to the first node under control of the third write control signal, and the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under control of the reset control signal, the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under control of the light emission control signal;The compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under control of the compensation control signal, and the first control data voltage write circuit controls it under control of a first write control signal to write a first control data voltage provided by the first control data voltage write terminal to the third node; the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; the second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the third node; In the third stage, the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under control of the adjustment control signal; the light emission control circuit controls the connection between the second terminal of the first drive circuit and the first electrode of the light-emitting element under control of the light emission control signal; the first drive circuit or the second drive circuit drives the light-emitting element to emit light. [16] The driving method according to claim 15, wherein the step of the first driving control circuit in the second stage controlling the connection or disconnection between the second node and the control terminal of the first driving circuit under control of the potential of the third node comprises: when the first control data voltage is a second voltage signal, the first driver control circuit controls the connection between the second node and the control terminal of the first driver circuit under control of the potential of the third node; when the first control data voltage is a third voltage signal, the first driver control circuit controls the separation between the second node and the control terminal of the first driver circuit under control of the potential of the third node; the step in which the second driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the third node comprises the following: when the first control data voltage is a second voltage signal, the second driver control circuit controls the separation between the second node and the control terminal of the second driver circuit under control of the potential of the third node; when the first control data voltage is a third voltage signal, the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit under control of the potential of the third node; The step in which the first driving circuit or the second driving circuit drives the light-emitting element to emit light includes the following: while the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit under control of the potential of the third node, the first driver circuit in the third stage drives the light-emitting element to emit light; while the second driver control circuit in the second stage controls the connection between the second node and the control terminal of the second driver circuit under control of the potential of the third node, the second driver circuit in the third stage drives the light-emitting element to emit light. [17] The driving method according to claim 14, wherein the pixel circuit further comprises a third energy storage circuit and a second control data voltage writing circuit, wherein the pixel circuit further comprises a data writing circuit, an adjustment circuit, a compensation control circuit, a light emission control circuit, and the reset circuit, wherein the display cycle comprises a first stage, a second stage, and a third stage provided sequentially; wherein the driving method comprises: In the first stage, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under the control of the light emission control signal; the compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal to write the reset voltage to the second node; the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under the control of the adjustment control signal; In the second stage, the data write circuit writes the data voltage provided by the data line to the first node under control of the third write control signal, and the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under control of the reset control signal, the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under control of the light emission control signal;The compensation control circuit controls the connection between the second node and the second terminal of the first driver circuit under the control of the compensation control signal, and the first control data voltage write circuit controls it, under the control of a first write control signal, to write a first control data voltage provided by the first control data voltage write terminal to the third node; the second control data voltage write circuit writes the second control data voltage provided by the second control data voltage write terminal to the fourth node under the control of the second write control signal; the first driver control circuit controls the connection or disconnection between the second node and the control terminal of the first driver circuit under the control of the potential of the third node;the second driver control circuit controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node; In the third stage, the adjustment circuit writes the adjustment voltage provided by the adjustment voltage terminal to the first node under control of the adjustment control signal; the light emission control circuit controls the connection between the second terminal of the first driver circuit and the first electrode of the light-emitting element under control of the light emission control signal; the first driver circuit and / or the second driver circuit drives the light-emitting element to emit light. [18] The driving method according to claim 17, wherein the step of the first driver control circuit in the second stage controlling the connection or disconnection between the second node and the control terminal of the first driver circuit under control of the potential of the third node comprises: when the first control data voltage is a fourth voltage signal, the first driver control circuit controls the connection between the second node and the control terminal of the first driver circuit; When the first control data voltage is a fifth voltage signal, the first driver control circuit controls the disconnection between the second node and the control terminal of the first driver circuit; the step in which the second driver control circuit in the second stage controls the connection or disconnection between the second node and the control terminal of the second driver circuit under control of the potential of the fourth node comprises the following: When the second control data voltage is a sixth voltage signal, the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit; When the second control data voltage is a seventh voltage signal, the second driver control circuit controls the disconnection between the second node and the control terminal of the second driver circuit; The step in which the first driver circuit and / or the second driver circuit drives the light-emitting element to emit light comprises the following: while the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit and the second driver control circuit controls the separation between the second node and the control terminal of the second driver circuit, the first driver circuit drives the light-emitting element to emit light under control of the potential of its control terminal; while the first driver control circuit in the second stage controls the separation between the second node and the control terminal of the first driver circuit and the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit, the second driver circuit drives the light-emitting element to emit light under control of the potential of its control terminal; while the first driver control circuit in the second stage controls the connection between the second node and the control terminal of the first driver circuit and the second driver control circuit controls the connection between the second node and the control terminal of the second driver circuit, the first driver circuit and the second driver circuit each drive the light-emitting element together to emit light under control of the potential of the corresponding control terminal. [19] A display device comprising the pixel circuit according to any one of claims 1 to 13 .

Images