Semiconductor device and method for manufacturing semiconductor device
Patent Information
- Application Number
- JP2023141123
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-31
- Publication Date
- 2025-03-13
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【0007】 本開示によれば、電流コラプスを抑制できる。
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]
[0002] 2. Description of the Related Art Conventionally, a high electron mobility transistor (HEMT) has been proposed in which the polarity of the upper surface of a nitride semiconductor layer is gallium (Ga) polarity and the gate insulating film is a hafnium silicon oxynitride (HfSiON) film. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Special Publication No. 2009-506537 [Patent Document 2] Japanese Patent Application Publication No. 5-223855 Summary of the Invention [Problem to be solved by the invention]
[0004] In recent years, there has been an increasing demand for suppressing current collapse.
[0005] An object of the present disclosure is to provide a semiconductor device capable of suppressing current collapse and a method for manufacturing the semiconductor device. [Means for solving the problem]
[0006] A method for manufacturing a semiconductor device according to the present disclosure includes the steps of forming a dielectric oxide film having a higher dielectric constant than silicon dioxide on a nitride semiconductor layer, nitriding the dielectric oxide film to form a dielectric oxynitride film, forming a first silicon nitride film on the dielectric oxynitride film by a thermal film formation method, forming a second silicon nitride film on the first silicon nitride film, forming an opening in the second silicon nitride film and the first silicon nitride film reaching the dielectric oxynitride film, and forming a gate electrode on the second silicon nitride film in contact with the dielectric oxynitride film through the opening. Effect of the Invention
[0007] According to the present disclosure, current collapse can be suppressed. [Brief description of the drawings]
[0008] [Figure 1] FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment. [Diagram 2] FIG. 2 is a cross-sectional view (part 1) showing the method for manufacturing the semiconductor device according to the embodiment. [Diagram 3] FIG. 3 is a cross-sectional view (part 2) showing the method for manufacturing the semiconductor device according to the embodiment. [Figure 4] FIG. 4 is a cross-sectional view (part 3) showing the method for manufacturing the semiconductor device according to the embodiment. [Diagram 5] FIG. 5 is a cross-sectional view (part 4) showing the method for manufacturing the semiconductor device according to the embodiment. [Figure 6] 6A to 6C are cross-sectional views (part 5) illustrating the method for manufacturing a semiconductor device according to the embodiment. [Figure 7] FIG. 7 is a cross-sectional view (part 6) showing the method for manufacturing a semiconductor device according to the embodiment. [Figure 8] FIG. 8 is a cross-sectional view (part 7) showing the method for manufacturing a semiconductor device according to the embodiment. [Figure 9] FIG. 9 is a cross-sectional view (part 8) showing the method for manufacturing a semiconductor device according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] [Description of the embodiments of the present disclosure] First, the embodiments of the present disclosure will be listed and described.
[0010] [1] A method for manufacturing a semiconductor device according to one embodiment of the present disclosure includes the steps of forming a dielectric oxide film having a higher dielectric constant than silicon dioxide on a nitride semiconductor layer, nitriding the dielectric oxide film to form a dielectric oxynitride film, forming a first silicon nitride film on the dielectric oxynitride film by a thermal deposition method, forming a second silicon nitride film on the first silicon nitride film, forming an opening in the second silicon nitride film and the first silicon nitride film reaching the dielectric oxynitride film, and forming a gate electrode on the second silicon nitride film in contact with the dielectric oxynitride film through the opening.
[0011] The dielectric oxynitride film functions as the gate insulating film. The dielectric oxynitride film has higher insulation properties and voltage resistance than the dielectric oxide film, and can reduce gate leakage. In addition, because the first silicon nitride film is formed on the nitride semiconductor layer by thermal deposition before the second silicon nitride film is formed, the desorption of nitrogen from the dielectric oxynitride film during the formation of the second silicon nitride film is suppressed. This makes it possible to suppress current collapse caused by the desorption of nitrogen from the dielectric oxynitride film.
[0012] [2] In the above [1], the dielectric oxide film may contain at least one selected from the group consisting of hafnium, lanthanum, and zirconium. In this case, a high relative dielectric constant can be easily obtained in the dielectric oxynitride film.
[0013] [3] In the above [2], the dielectric oxide film may contain at least one selected from the group consisting of silicon and aluminum. In this case, a high relative dielectric constant can be easily obtained in the dielectric oxynitride film.
[0014] [4] In any one of [1] to [3], the surface of the nitride semiconductor layer facing the dielectric oxide film may have nitrogen polarity. In this case, low resistance can be easily achieved.
[0015] [5] In any one of [1] to [4], the first silicon nitride film may have a thickness of 0.2 nm to 5 nm. If the thickness of the first silicon nitride film is less than 0.2 nm, it may be difficult to suppress desorption of nitrogen from the dielectric oxynitride film, and if the thickness of the first silicon nitride film is more than 5 nm, traps contained in the first silicon nitride film may cause current collapse.
[0016] [6] In any one of [1] to [5], the nitridation of the dielectric oxide film and the formation of the first silicon nitride film may be performed in the same film formation chamber, which makes it easier to suppress desorption of nitrogen from the dielectric oxynitride film before the formation of the first silicon nitride film.
[0017] [7] In any one of [1] to [6], the second silicon nitride film may be formed using nitrogen plasma.
[0018] [8] A semiconductor device according to another embodiment of the present disclosure includes a nitride semiconductor layer, a dielectric oxynitride film provided on the nitride semiconductor layer, a first silicon nitride film provided on the dielectric oxynitride film, a second silicon nitride film provided on the first silicon nitride film, an opening formed in the second silicon nitride film and the first silicon nitride film reaching the dielectric oxynitride film, and a gate electrode formed on the second silicon nitride film and in contact with the dielectric oxynitride film through the opening.
[0019] The first silicon nitride film can be formed by a thermal film formation method. Therefore, it is possible to suppress the desorption of nitrogen from the dielectric oxynitride film when the first silicon nitride film is formed. In addition, the second silicon nitride film is provided on the first silicon nitride film. Therefore, it is possible to suppress the desorption of nitrogen from the dielectric oxynitride film when the second silicon nitride film is formed. Therefore, it is possible to suppress the current collapse caused by the desorption of nitrogen from the dielectric oxynitride film.
[0020] [9] In the method of [8], the first silicon nitride film may have a lower concentration of hydrogen atoms than the second silicon nitride film. When the first silicon nitride film is formed by a thermal film formation method and the second silicon nitride film is formed using nitrogen plasma, the first silicon nitride film tends to have a lower concentration of hydrogen atoms than the second silicon nitride film.
[0021]
[10] In the method of [8] or [9], the density of the first silicon nitride film may be higher than that of the second silicon nitride film. When the first silicon nitride film is formed by a thermal film formation method and the second silicon nitride film is formed using nitrogen plasma, the density of the first silicon nitride film tends to be higher than that of the second silicon nitride film.
[0022] [Details of the embodiment of the present disclosure] Hereinafter, the embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto. In this specification and drawings, components having substantially the same functional configurations may be denoted by the same reference numerals to avoid redundant description. In this disclosure, "planar view" refers to viewing an object from above.
[0023] The embodiment relates to a semiconductor device including a GaN-based high electron mobility transistor (HEMT). Fig. 1 is a cross-sectional view showing a semiconductor device according to the embodiment.
[0024] As shown in FIG. 1, the semiconductor device 1 according to the embodiment mainly includes a growth substrate 10, a nitride semiconductor layer 20, a dielectric oxynitride film 31, a first silicon nitride (SiN) film 51, a second SiN film 52, a regrown layer 41S, a regrown layer 41D, a gate electrode 43, a source electrode 42S, and a drain electrode 42D.
[0025] The growth substrate 10 is, for example, a semi-insulating silicon carbide (SiC) substrate. When the growth substrate 10 is a SiC substrate, the upper surface of the growth substrate 10 is a carbon (C) polarity surface. When the surface of the growth substrate 10 is a C polarity surface, the nitride semiconductor layer 20 can grow as a crystal with a nitrogen (N) polarity surface as the growth surface.
[0026] The nitride semiconductor layer 20 includes a buffer layer 21 , a barrier layer 22 , a spacer layer 23 , a channel layer 24 , and a cap layer 25 .
[0027] The buffer layer 21 is on the growth substrate 10. The buffer layer 21 is, for example, an aluminum nitride (AlN) layer. The thickness of the AlN layer is, for example, not less than 1 nm and not more than 2000 nm. The buffer layer 21 may include an AlN layer and a GaN layer or an aluminum gallium nitride (AlGaN) layer on the AlN layer.
[0028] The barrier layer 22 is on the buffer layer 21. The barrier layer 22 is, for example, an AlGaN layer. The band gap of the barrier layer 22 is larger than the band gap of the channel layer 24. The thickness of the barrier layer 22 is, for example, 1 nm or more and 50 nm or less. The composition of the barrier layer 22 is, for example, Al Y Ga 1-Y N (0.15≦Y≦0.55). The conductivity type of the barrier layer 22 is, for example, n-type or undoped (i-type). Instead of the AlGaN layer, a scandium aluminum nitride (ScAlN), an indium aluminum nitride (InAlN) layer, or an indium aluminum gallium nitride (InAlGaN) layer may be used.
[0029] The spacer layer 23 is on the barrier layer 22. The spacer layer 23 is, for example, an AlN layer. The thickness of the spacer layer 23 is, for example, in the range of 0.2 nm to 5 nm.
[0030] The channel layer 24 is on the spacer layer 23. The channel layer 24 is, for example, a GaN layer. The band gap of the channel layer 24 is smaller than the band gap of the barrier layer 22. The thickness of the channel layer 24 is, for example, 1 nm or more and 50 nm or less. Distortion occurs between the channel layer 24 and the barrier layer 22 and the spacer layer 23 due to the difference in lattice constants thereof, and this distortion induces a piezoelectric charge at the interface between the two layers. As a result, a two dimensional electron gas (2DEG) is generated in the channel layer 24 near the surface facing the barrier layer 22, and a channel region 26 is formed. The conductivity type of the channel layer 24 is, for example, n-type or undoped (i-type).
[0031] The cap layer 25 is on the channel layer 24. The cap layer 25 is, for example, an AlGaN layer. The thickness of the cap layer 25 is, for example, not less than 0.2 nm and not more than 10 nm.
[0032] On the C-polarity surface of the SiC substrate, the buffer layer 21, the barrier layer 22, the spacer layer 23, the channel layer 24, and the cap layer 25 grow as crystals with the N-polarity surface as the growth surface. Therefore, the upper surface of each of the buffer layer 21, the barrier layer 22, the spacer layer 23, the channel layer 24, and the cap layer 25 has N-polarity, and the lower surface of each has gallium (Ga)-polarity.
[0033] A recess 40S for a source and a recess 40D for a drain are formed in the nitride semiconductor layer 20. The bottom of the recess 40S and the bottom of the recess 40D are closer to the lower surface of the nitride semiconductor layer 20 than the upper surface 24A of the channel layer 24. In other words, the recess 40S and the recess 40D are formed deeper than the upper surface 24A of the channel layer 24. The bottom of the recess 40S and the bottom of the recess 40D may be in the channel layer 24, the spacer layer 23, or the barrier layer 22.
[0034] The dielectric oxynitride film 31 is on the nitride semiconductor layer 20. The dielectric oxynitride film 31 is in contact with the upper surface of the nitride semiconductor layer 20. The dielectric constant of the dielectric oxynitride film 31 is higher than that of silicon dioxide (SiO2). The dielectric oxynitride film 31 is a high dielectric constant film. The dielectric oxynitride film 31 may contain at least one selected from the group consisting of hafnium (Hf), lanthanum (La) and zirconium (Zr). The dielectric oxynitride film 31 may also contain at least one selected from the group consisting of silicon (Si) and aluminum (Al). For example, the dielectric oxynitride film 31 is a hafnium silicon oxynitride (HfSiON) film or a hafnium aluminum oxynitride (HfAlON) film. The thickness of the dielectric oxynitride film 31 is, for example, 1 nm or more and 30 nm or less. An opening 31S for a source and an opening 31D for a drain are formed in the dielectric oxynitride film 31. The opening 31S is connected to the recess 40S, and the opening 31D is connected to the recess 40D.
[0035] The first SiN film 51 is on the dielectric oxynitride film 31. The first SiN film 51 is in contact with the upper surface of the dielectric oxynitride film 31. The dielectric oxynitride film 31 is between the nitride semiconductor layer 20 and the first SiN film 51, and the first SiN film 51 is separated from the nitride semiconductor layer 20 by the dielectric oxynitride film 31. The thickness of the first SiN film 51 is, for example, 0.2 nm to 5 nm. An opening 51S for a source, an opening 51D for a drain, and an opening 51G for a gate are formed in the first SiN film 51. The opening 51S is connected to the opening 31S, and the opening 51D is connected to the opening 31D. In a plan view, the opening 51G is between the openings 51S and 51D. A part of the dielectric oxynitride film 31 is exposed from the opening 51G.
[0036] The regrown layer 41S is on the channel layer 24, the spacer layer 23, or the barrier layer 22 in the recess 40S. The regrown layer 41D is on the channel layer 24, the spacer layer 23, or the barrier layer 22 in the recess 40D. The regrown layer 41S and the regrown layer 41D are, for example, n-type GaN layers. The regrown layer 41S and the regrown layer 41D contain germanium (Ge) or Si as an n-type impurity. The electrical resistance of the regrown layer 41S and the regrown layer 41D is lower than the electrical resistance of the channel layer 24. For example, the regrown layer 41S and the regrown layer 41D are formed by regrowth of an n-type GaN layer after the formation of the recess 40S and the recess 40D in the nitride semiconductor layer 20.
[0037] The source electrode 42S is on the regrown layer 41S, and the drain electrode 42D is on the regrown layer 41D. The source electrode 42S contacts the regrown layer 41S, and the drain electrode 42D contacts the regrown layer 41D. The source electrode 42S makes ohmic contact with the regrown layer 41S, and the drain electrode 42D makes ohmic contact with the regrown layer 41D.
[0038] The second SiN film 52 covers the first SiN film 51, the regrown layer 41S, the regrown layer 41D, the source electrode 42S, and the drain electrode 42D. The thickness of the second SiN film 52 is, for example, 5 nm to 100 nm in a portion having a uniform thickness on the first SiN film 51. The second SiN film 52 has a source opening 52S, a drain opening 52D, and a gate opening 52G formed therein. A part of the source electrode 42S is exposed from the opening 52S, and a part of the drain electrode 42D is exposed from the opening 52D. The opening 52G is connected to the opening 51G.
[0039] In a plan view, the gate electrode 43 is located between the source electrode 42S and the drain electrode 42D. The gate electrode 43 is located on the second SiN film 52, the first SiN film 51 and the dielectric oxynitride film 31, and contacts the dielectric oxynitride film 31 through the openings 52G and 51G.
[0040] Next, a method for manufacturing the semiconductor device 1 according to the embodiment will be described. Figures 2 to 9 are cross-sectional views showing the method for manufacturing the semiconductor device 1 according to the embodiment.
[0041] 2, a nitride semiconductor layer 20 is formed on a growth substrate 10 by, for example, metal organic chemical vapor deposition (MOCVD). In forming the nitride semiconductor layer 20, a buffer layer 21, a barrier layer 22, a spacer layer 23, a channel layer 24, and a cap layer 25 are formed in this order.
[0042] Next, as shown in FIG. 3, a dielectric oxide film 39 is formed on the nitride semiconductor layer 20. The dielectric oxide film 39 can be formed by, for example, atomic layer deposition (ALD). The dielectric oxide film 39 is in contact with the upper surface of the nitride semiconductor layer 20. The dielectric constant of the dielectric oxide film 39 is higher than the dielectric constant of silicon dioxide (SiO2). The dielectric oxide film 39 is a high-dielectric-constant film. The dielectric oxide film 39 may contain at least one selected from the group consisting of Hf, La, and Zr. The dielectric oxide film 39 may also contain at least one selected from the group consisting of Si and Al. For example, the dielectric oxide film 39 may be made of hafnium silicate (HfSiO X ) membrane or hafnium aluminate (HfAlO X The thickness of the dielectric oxide film 39 is, for example, not less than 1 nm and not more than 30 nm.
[0043] 4, the dielectric oxide film 39 is nitrided to form the dielectric oxynitride film 31. The nitridation of the dielectric oxide film 39 is performed in a chamber of a film forming apparatus such as an MOCVD apparatus. As an N source for the nitridation of the dielectric oxide film 39, for example, N atoms generated by thermally decomposing ammonia (NH3) are used.
[0044] 5, a first SiN film 51 is formed on the dielectric oxynitride film 31 by a thermal film formation method such as a thermal CVD method. The first SiN film 51 is formed in the chamber used for nitriding the dielectric oxide film 39. As raw materials for the first SiN film 51, for example, silane (SiH4) and NH3 are used.
[0045] 6, an opening 51S for a source and an opening 51D for a drain are formed in the first SiN film 51, an opening 31S for a source and an opening 31D for a drain are formed in the dielectric oxynitride film 31, and a recess 40S for a source and a recess 40D for a drain are formed in the nitride semiconductor layer 20. The bottom of the recess 40S and the bottom of the recess 40D may be closer to the lower surface of the nitride semiconductor layer 20 than the upper surface 24A of the channel layer 24. That is, the recess 40S and the recess 40D may be formed deeper than the upper surface 24A of the channel layer 24. The bottom of the recess 40S and the bottom of the recess 40D may be in the channel layer 24, the spacer layer 23, or the barrier layer 22.
[0046] The openings 51S, 51D, 31S, 31D, recesses 40S, and 40D can be formed by reactive ion etching (RIE) using a mask (not shown). For example, a fluorine (F)-based gas is used as a reactive gas in forming the openings 51S and 51D, and a chlorine (Cl)-based gas is used as a reactive gas in forming the openings 31S, 31D, recesses 40S, and 40D.
[0047] 7, a regrown layer 41S is formed on the channel layer 24, the spacer layer 23, or the barrier layer 22 in the recess 40S, and a regrown layer 41D is formed on the channel layer 24, the spacer layer 23, or the barrier layer 22 in the recess 40D. The regrown layer 41S and the regrown layer 41D can be formed by a physical vapor deposition (PVD) method such as an evaporation method, a sputtering method, or a molecular beam epitaxy (MBE) method.
[0048] 8, a source electrode 42S is formed on the regrown layer 41S, and a drain electrode 42D is formed on the regrown layer 41D. In forming the source electrode 42S and the drain electrode 42D, a metal layer (not shown) constituting the source electrode 42S and the drain electrode 42D is first formed. When forming the metal layer, for example, a growth mask (not shown) having an opening formed in an area where the metal layer is to be formed is used for film formation, and then the growth mask is removed together with the metal layer (not shown) formed thereon. In other words, lift-off is performed.
[0049] 9, a second SiN film 52 is formed on the first SiN film 51, the regrown layer 41S, the regrown layer 41D, the source electrode 42S, and the drain electrode 42D. The second SiN film 52 covers the first SiN film 51, the regrown layer 41S, the regrown layer 41D, the source electrode 42S, and the drain electrode 42D. The second SiN film 52 is formed by, for example, a plasma CVD method. That is, the second SiN film 52 is formed by using, for example, nitrogen plasma.
[0050] Next, an opening 52G for a gate is formed in the second SiN film 52, and an opening 51G for a gate is formed in the first SiN film 51 (see FIG. 1). The openings 52G and 51G can be formed by, for example, RIE using a mask (not shown). For example, an F-based gas is used as a reactive gas in forming the openings 52G and 51G.
[0051] Next, the gate electrode 43, which is in contact with the dielectric oxynitride film 31 through the openings 52G and 51G, is formed on the second SiN film 52 (see FIG. 1). When forming the gate electrode 43, for example, a metal layer is formed using a growth mask (not shown) having an opening formed in the region where the gate electrode 43 is to be formed, and then the growth mask is removed together with the metal layer (not shown) formed thereon. In other words, lift-off is performed.
[0052] Next, an opening 52S for a source and an opening 52D for a drain are formed in the second SiN film 52 (see FIG. 1). The openings 52S and 52D can be formed by, for example, RIE using a mask (not shown). For example, an F-based gas is used as a reactive gas in forming the openings 52S and 52D.
[0053] In this manner, the semiconductor device 1 can be manufactured.
[0054] In the semiconductor device 1 according to the embodiment, the dielectric oxynitride film 31 functions as a gate insulating film, and the second SiN film 52 functions as a passivation film. The first SiN film 51 formed by the thermal film formation method suppresses desorption of nitrogen from the dielectric oxynitride film 31 when the second SiN film 52 is formed by the plasma CVD method. Therefore, according to the present embodiment, it is possible to suppress current collapse caused by desorption of nitrogen from the dielectric oxynitride film 31.
[0055] Furthermore, when the second SiN film 52 is formed using nitrogen plasma, the film formation temperature of the second SiN film 52 can be made relatively low. Therefore, even metal materials that cannot be used in the case of forming the second SiN film 52 by the thermal CVD method due to their melting points and the like can be used for the source electrode 42S and the drain electrode 42D. Furthermore, the plasma CVD method can improve throughput compared to the thermal CVD method.
[0056] The first SiN film 51 formed by the thermal deposition method and the second SiN film 52 formed using nitrogen plasma differ as follows. That is, the concentration of hydrogen (H) atoms in the first SiN film 51 tends to be lower than the concentration of H atoms in the second SiN film 52. Also, the density of the first SiN film 51 tends to be higher than the density of the second SiN film 52. The concentration of H atoms in the first SiN film 51 and the concentration of H atoms in the second SiN film 52 can be measured by, for example, Fourier transform infrared spectroscopy (FTIR). Also, the density of the first SiN film 51 and the density of the second SiN film 52 can be measured by, for example, X-ray reflectometry (XRR).
[0057] When the dielectric oxide film 39 contains at least one selected from the group consisting of hafnium, lanthanum, and zirconium, a high relative dielectric constant can be easily obtained in the dielectric oxynitride film 31. Furthermore, when the dielectric oxide film 39 contains at least one selected from the group consisting of silicon and aluminum, a high relative dielectric constant can be easily obtained in the dielectric oxynitride film 31.
[0058] Since the surface of the nitride semiconductor layer 20 facing the dielectric oxide film 39, and after nitridation, the surface facing the dielectric oxynitride film 31, have N polarity, it is easier to shorten the distance between the channel region 26 and the source electrode 42S and the drain electrode 42D, and it is easier to achieve low resistance.
[0059] If the thickness of the first SiN film 51 is less than 0.2 nm, it may be difficult to suppress desorption of nitrogen from the dielectric oxynitride film 31. On the other hand, if the thickness of the first SiN film 51 is more than 5 nm, traps contained in the first SiN film 51 may cause current collapse. The thickness of the first SiN film 51 may be 0.2 nm or more and 4 nm or less, or 0.2 nm or more and 3 nm or less.
[0060] The nitridation of the dielectric oxide film 39 and the formation of the first SiN film 51 do not have to be performed in the same deposition chamber, but performing the nitridation of the dielectric oxide film 39 and the formation of the first SiN film 51 in the same deposition chamber makes it easier to suppress desorption of nitrogen from the dielectric oxynitride film 31 before the formation of the first SiN film 51.
[0061] The polarity of the nitride semiconductor layer is not limited. That is, when the nitride semiconductor layer contains gallium, the surface of the nitride semiconductor layer facing the dielectric oxide film may have a gallium polarity.
[0062] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims. [Explanation of symbols]
[0063] 1: Semiconductor device 10: Growth substrate 20: Nitride semiconductor layer 21: Buffer layer 22: Barrier layer 23: Spacer layer 24: Channel layer 24A:Top surface 25: Cap layer 26: Channel region 31: Dielectric oxynitride film 31D, 31S, 51D, 51G, 51S, 52D, 52G, 52S: Aperture 39: Dielectric oxide film 40D, 40S: Concave 41D, 41S: Regrowth layer 42D: Drain electrode 42S: Source electrode 43: Gate electrode 51: 1st SiN film 52:Second SiN film
Claims
1. forming a dielectric oxide film having a higher dielectric constant than silicon dioxide on the nitride semiconductor layer; nitriding the dielectric oxide film to form a dielectric oxynitride film; forming a first silicon nitride film on the dielectric oxynitride film by a thermal deposition method; forming a second silicon nitride film on the first silicon nitride film; forming openings in the second silicon nitride film and the first silicon nitride film reaching the dielectric oxynitride film; forming a gate electrode on the second silicon nitride film through the opening so as to contact the dielectric oxynitride film; The method for manufacturing a semiconductor device comprising the steps of:
2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein said dielectric oxide film contains at least one selected from the group consisting of hafnium, lanthanum and zirconium.
3. 3. The method for manufacturing a semiconductor device according to claim 2, wherein said dielectric oxide film contains at least one type selected from the group consisting of silicon and aluminum.
4. The method for manufacturing a semiconductor device according to claim 1 , wherein a surface of said nitride semiconductor layer facing said dielectric oxide film has a nitrogen polarity.
5. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the first silicon nitride film has a thickness of 0.2 nm or more and 5 nm or less.
6. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the nitridation of said dielectric oxide film and the formation of said first silicon nitride film are carried out in a same film formation chamber.
7. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the second silicon nitride film is formed using nitrogen plasma.
8. A nitride semiconductor layer; a dielectric oxynitride film provided on the nitride semiconductor layer; a first silicon nitride film provided on the dielectric oxynitride film; a second silicon nitride film provided on the first silicon nitride film; an opening formed in the second silicon nitride film and the first silicon nitride film, the opening reaching the dielectric oxynitride film; a gate electrode formed on the second silicon nitride film and in contact with the dielectric oxynitride film through the opening; The semiconductor device has
9. 9. The semiconductor device according to claim 8, wherein a concentration of hydrogen atoms in said first silicon nitride film is lower than a concentration of hydrogen atoms in said second silicon nitride film.
10. 10. The semiconductor device according to claim 8, wherein the first silicon nitride film has a density higher than a density of the second silicon nitride film.
Citation Information
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