Information processing method and information processing device

The information processing device and method address the challenge of setting penalty coefficients in Ising machines by adjusting penalty functions based on constraint conditions, enhancing the efficiency and accuracy of combinatorial optimization solutions.

JP2025140037APending Publication Date: 2025-09-29HITACHI VANTARA LTD
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Application Number
JP2024039181
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-13
Publication Date
2025-09-29

AI Technical Summary

Technical Problem

Existing methods for solving combinatorial optimization problems using Ising machines face challenges in efficiently setting the penalty coefficient for constraint conditions, leading to either unsatisfactory solutions or reduced influence on the original evaluation index.

Method used

An information processing device and method that utilizes a penalty coefficient setting unit to adjust the penalty function based on constraint conditions, ensuring solutions satisfy logical operations by calculating appropriate penalty coefficients for logical constraints between variables.

Benefits of technology

Enables efficient and effective setting of penalty coefficients, allowing Ising machines to find solutions that satisfy constraint conditions, thereby improving the efficiency and accuracy of combinatorial optimization problems.

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Abstract

To appropriately and efficiently set a magnitude of a penalty coefficient in representing a constraint condition about a logic operation as a penalty function.SOLUTION: According to one desirable aspect of the present invention, an information processing device includes a processor and a storage device, and has a penalty coefficient setting part for using a solution function for calculating a solution of a combination optimization problem by using a cost function and a constraint condition, and being realized by the processor and the storage device. In the information processing device, the penalty coefficient setting part sets a penalty function and a penalty coefficient such that a solution of the combination optimization problem satisfies the constraint condition on the basis of the constraint condition about a logic operation applied to two variables of the cost function and a value of a model coefficient of the cost function, and executes solution search of the combination optimization problem on the basis of the penalty function and the penalty coefficient.SELECTED DRAWING: Figure 12
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Description

[Technical Field]

[0001] The present invention relates to an information processing method and an information processing device. [Background technology]

[0002] Patent Document 1 describes a method for performing a ground state search for an Ising model while reducing the degree of violation of the constraint conditions of the solution by adjusting the coefficient of a penalty function corresponding to the constraint conditions.

[0003] Patent Document 2 describes a method of creating Ising models with different coefficients for penalty functions and performing ground state search processing in parallel while executing information communication between them.

[0004] Patent Document 3 describes that the coefficient adjustment of the extended Lagrangian function is performed by an algorithm called the alternating direction multiplier method, and that solution and coefficient adjustment are repeated.

[0005] Non-Patent Document 1 describes various forms of information processing devices (Ising machines) for finding an optimal solution (ground state) or a local optimal solution to a problem of minimizing the energy function of an Ising model.

[0006] Non-Patent Document 2 describes a method for reducing a constrained optimization problem to a ground state search problem of an Ising model by creating a penalty function corresponding to a constraint condition. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] WO2022 / 024329 [Patent Document 2] Japanese Patent Application Publication No. 2019-159637 [Patent Document 3] Japanese Patent Publication No. 2023-121046 [Non-patent literature]

[0008] [Non-Patent Document 1] N. Mohseni, PL McMahon, and Tim Byrnes, Ising machines as hardware solvers of combinatorial optimization problems, Nat. Rev. Phys. 4, pp.363-379 (2022). [Non-patent document 2] F. Glover, G. Kochenberger, and Y. Du, A Tutorial on Formulating and Using QUBO Models, in preprint(arXiv:1811.11538). Summary of the Invention [Problem to be solved by the invention]

[0009] Various physical and social phenomena can be expressed using mathematical models. In particular, it can be useful to understand phenomena by regarding the variables that make up the mathematical model as nodes and viewing it as a network in which the energy function changes depending on the state of the nodes. The energy function is defined by the nonlinear coefficients between nodes (also called interaction coefficients), the linear coefficients acting on each node (also called bias coefficients or external magnetic field coefficients), and the state of the node. The state that minimizes the energy function is called the ground state.

[0010] Efficiently solving the ground-state search problem for such networks is important in solving social issues. For example, the clique detection problem can be solved by constructing a model in which the energy function decreases when a clique of a certain size is detected in a social network. The energy function used in this way is also called a cost function. In addition, by assigning the breakdown of financial asset allocation (called a portfolio) to nodes as variables, the problem of calculating a portfolio with good evaluation indices can be solved through the ground-state search problem.

[0011] A representative example of the above-mentioned network model is the Ising model, in which each node takes on two values: +1 / -1. A dedicated system that solves the ground state search of the Ising model using physical phenomena themselves or algorithms inspired by them is called an Ising machine. Therefore, by expressing the social problem to be solved as a network model and searching for the ground state using an Ising machine, it is possible to obtain a solution to that problem.

[0012] When solving problems with an Ising machine, the constraints of the problem to be solved are often added to the energy function as a penalty function. If the penalty coefficient, which is the coefficient of the penalty function, is too small, the solution will not satisfy the corresponding constraints, and if it is too large, the influence of the original evaluation index on the solution will be reduced. Therefore, it is necessary to appropriately set the penalty coefficient and adjust the weighting of the penalty function and the evaluation index.

[0013] The present invention has been made in view of the above background, and has as its object to appropriately and efficiently set the magnitude of a penalty coefficient when a constraint condition relating to a logical operation is expressed as a penalty function. [Means for solving the problem]

[0014] A preferred aspect of the invention is an information processing device comprising a processor and a storage device, which utilizes a solution-finding function that finds a solution to a combinatorial optimization problem using a cost function and constraint conditions, and which has a penalty coefficient setting unit implemented by the processor and the storage device, wherein the penalty coefficient setting unit sets a penalty function and a penalty coefficient based on the constraint condition related to a logical operation imposed between two variables of the cost function and the value of a model coefficient of the cost function so that the solution to the combinatorial optimization problem satisfies the constraint conditions, and performs a solution search for the combinatorial optimization problem based on the penalty function and the penalty coefficient.

[0015] Another preferred aspect of the present invention is an information processing method that uses an information processing device including a processor and a storage device, and an Ising machine that performs a ground state search of an Ising model, wherein, when a solution to a combinatorial optimization problem that satisfies constraint conditions is sought by using the Ising machine to search for a local optimum solution of a function that reflects an energy function and a penalty function, the information processing device executes the following steps: a first step in which the information processing device sets an interaction model using the energy function based on the combinatorial optimization problem; a second step in which the information processing device sets the penalty function based on the constraint conditions and calculates, based on the energy function, a weight for the penalty function so that the solution satisfies the constraint conditions; and a third step in which the Ising machine applies the penalty function and the weight for the penalty function to the energy function to search for a solution to the combinatorial optimization problem that satisfies the constraint conditions.

[0016] Other problems and solutions disclosed in the present application will be made clear in the detailed description and drawings. [Effects of the Invention]

[0017] According to the present invention, it is possible to appropriately and efficiently set the magnitude of the penalty coefficient when expressing constraints on logical operations as penalty functions. Other problems, configurations, and effects will become clear from the following description of the embodiments of the invention. [Brief explanation of the drawings]

[0018] [Figure 1] A conceptual diagram of the energy landscape. [Figure 2] This is a conceptual diagram of simulated annealing, an algorithm for searching for optimal solutions. [Figure 3] This is a conceptual diagram showing how the energy landscape changes when the magnitude of the penalty coefficient, which is the weight of the penalty function relative to the cost function, is changed. Admissible solutions and non-admissible solutions refer to solutions that satisfy and do not satisfy the constraints under consideration, respectively. [Figure 4] This is a table showing typical logical operations on Boolean variables expressed as linear expressions. Although it is not a common abbreviation, CIMPLY is defined here as an abbreviation for converse imply. [Figure 5] This is a conceptual diagram showing how a variable whose domain changes depending on its value is transformed into two variables whose domains fall within the [0,1] interval. [Figure 6] This is a conceptual diagram showing a variable transformation, such as converting two variables in the interval [0,1] into two variables in the interval [-1,1]. [Figure 7] FIG. 10 is a diagram showing the feasible region of constraints regarding four logical operations. [Figure 8] This is a contour plot showing the energy landscape when two variables with NAND constraints are varied, with and without a penalty function. The darker (whiter) the color, the smaller (larger) the value of the energy function. x* indicates the local optimum when xi and xj are moved. [Figure 9] FIG. 2 is a block diagram of an arithmetic circuit. [Figure 10] FIG. 2 is a functional block diagram showing main functions of the information processing device. [Figure 11] 10 is a flowchart showing the entire ground state search process. [Figure 12] 1 is a flowchart of a method for setting a penalty coefficient for satisfying a logical constraint between two variables. [Figure 13] FIG. 10 is a conceptual diagram of a user interface showing the progress of the ground state search process. DETAILED DESCRIPTION OF THE INVENTION

[0019] The embodiments will be described in detail with reference to the drawings. However, the present invention should not be interpreted as being limited to the description of the embodiments shown below. Those skilled in the art will easily understand that the specific configuration can be changed without departing from the concept or spirit of the present invention.

[0020] The designations "first," "second," "third," etc. in this specification are used to identify components and do not necessarily limit the number, order, or content thereof. Furthermore, numbers used to identify components are used in different contexts, and numbers used in one context do not necessarily indicate the same configuration in another context. Furthermore, this does not prevent a component identified by a certain number from also serving the function of a component identified by another number.

[0021] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings etc. may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings etc.

[0022] All publications, patents, and patent applications cited herein are incorporated by reference in their entirety.

[0023] As used herein, elements referred to in the singular are intended to include the plural unless the context clearly indicates otherwise.

[0024] The configuration of the embodiment may be configured as a stand-alone computer, or any part of the input device, output device, processing device, and storage device may be configured as other computers connected via a network. The concept of the invention is equivalent and remains unchanged.

[0025] In the present embodiment, functions equivalent to those configured by software can also be realized by hardware such as FPGA (Field Programmable Gate Array) and ASIC (Application Specific Integrated Circuit). Such embodiments are also included in the scope of the present invention.

[0026] The following examples explain how determining appropriate coefficient values ​​for penalty functions for logical constraints between two variables in mixed binary quadratic programming problems makes it possible to efficiently search for good solutions that satisfy constraint conditions.

[0027] In the following description, the same or similar components may be assigned common reference numerals, and duplicate descriptions may be omitted. Furthermore, when there are multiple elements having the same or similar functions, different subscripts may be assigned to the same reference numeral. Furthermore, when there is no need to distinguish between multiple elements, the subscripts may be omitted.

[0028] First, we will explain the energy function of the network model. The energy function H(x) (also called Hamiltonian) is defined by the multiple nodes that make up the model, the nonlinear coefficients acting between the nodes, and the linear coefficients acting on each node. Here, x is the variable x corresponding to each node i (i = 1 to N, N is a natural number). i is a vector with elements, and each variable x i is a binary variable x i ∈{-1,1} or continuous variable x i∈[-1,1]. Also, the nonlinear coefficient between node i and node j is J ij , the linear coefficient for node i is h i Then the energy function becomes the following quadratic equation:

[0029]

number

[0030] The first term in Equation 1 can be considered to represent the interaction between nodes, and the second term represents the energy due to the bias towards the nodes. Here, we assume that the network can be represented as an undirected graph, and J ij =J ji That is, the matrix J in Equation 1 is a real symmetric matrix.

[0031] The energy function in Equation 1 is a concept that includes the Ising model. All variables are expressed as binary variables x i When we restrict it to ∈{-1,1}, we get the Ising model, which is used, for example, as a lattice model to describe magnetic materials in statistical mechanics, with +1 / -1 corresponding to up / down spin.

[0032] The ground state search in Equation 1 is an optimization problem to find the state x that minimizes the above energy function. This is equivalent to a mixed binary quadratic programming problem with interval constraints on the variables.

[0033] Figure 1 is a conceptual diagram of the energy landscape of Equation 1. The horizontal axis of the graph is the state space, which is the domain of state x, and the vertical axis is the value of the energy function. In Figure 1, state A has the smallest energy, and updating -1 from state A to 1 results in state B, which has higher energy, and updating another 1 to -1 results in state C, which has lower energy.

[0034] An Ising machine is a computer specialized for quickly finding optimal or locally optimal solutions to the ground state search problem of Equation 1 or the Ising model. Details are described in Non-Patent Document 1, and an overview will be provided here. Operating principles for finding ground states include simulated annealing, an algorithm that mimics the thermal fluctuations of physical systems; quantum annealing, which utilizes state fluctuations due to quantum effects; and methods that utilize the behavior of dynamical systems. Methods for implementing these operating principles include simulators using electronic circuits, and methods that directly utilize physical phenomena such as optical circuits and superconducting quantum circuits.

[0035] Here, we will explain simulated annealing as an example of the operating principle of an Ising machine. We introduce T, which is called the annealing parameter or temperature parameter, as a parameter corresponding to the heat of a physical system. For a vector x with an energy function E(x), the probability density function called the Boltzmann distribution is

[0036]

number

[0037] Z is the normalization factor of the Boltzmann distribution, which is called the partition function. For example, if you want to consider the Boltzmann distribution for the energy function in Equation 1, you can set E(x) = H(x).

[0038] The Markov chain Monte Carlo method is a method for updating states so that state x appears probabilistically according to the Boltzmann distribution in Equation 2. One method that satisfies the requirements of the Markov chain Monte Carlo method is Gibbs sampling (or heat bath method). The state generated at the i-th step by Gibbs sampling is x (i) ={x1 (i) , …, x N (i)}. In this case, the conditional probability for the i+1th state is n=1, …, N.

[0039]

number

[0040] As shown in Figure 2, the temperature parameter T is updated to the maximum value T while the state is updated so that the state appears probabilistically according to the Boltzmann distribution in Equation 2. High to the minimum value T Lоw This gradually increases the probability of a state with a small energy function E(x), allowing the state to converge asymptotically to the ground state. This is the operating principle of simulated annealing.

[0041] Like the simulated annealing described above, the Ising machine targets the problem of searching for the ground state of a certain energy function E(x). Therefore, some ingenuity is required to perform the ground state search while taking into account constraints on the state x.

[0042] One method for dealing with constraints is the penalty function method. As explained in Non-Patent Document 2, the penalty function method constructs a penalty function P(x) that is 0 if the state x satisfies the target constraint and a positive value if it does not (a specific example will be shown later). In the penalty function method, a new energy function H(x) is constructed, which is the sum of the energy function H(x) corresponding to the original evaluation index and the weighted penalty function P(x).

[0043]

number

[0044] Figure 3 shows the change in the energy landscape of Equation 4 when the value of α is changed. When α = 0, the penalty function is ignored, so it is possible that the ground state of the energy function E(x) = H(x) of Equation 4 will be an infeasible solution rather than a solution that satisfies the constraints (also known as an admissible solution or a feasible solution). As the value of α increases, the value of the energy function for infeasible solutions increases, making it more difficult for the ground state to appear in the infeasible solution region. If α is set to a sufficiently large positive value, the ground state of the energy function E(x) of Equation 4 will become an admissible solution.

[0045] Patent Document 1 describes a method for performing a ground state search of an Ising model while adjusting the coefficient of a penalty function corresponding to a constraint condition to reduce the degree of violation of the constraint condition of the solution. Patent Document 2 describes a method for creating Ising models with different coefficients for the penalty function and performing ground state search processing in parallel while communicating information between them. This makes it possible to set an appropriate penalty coefficient by iteratively and gradually adjusting the penalty coefficient.

[0046] However, as mentioned above, the appropriate size of the penalty coefficient differs for each problem, so even if an appropriate size of the penalty coefficient is searched for, if the initial value is significantly different from the appropriate value, the search may not be carried out efficiently.

[0047] Therefore, in this embodiment, we focus on logical operation constraints related to the truth or falsity of propositions that frequently appear when a real problem is formulated as a combinatorial optimization problem. Hereinafter, these will be referred to as logical constraints. We show that for this logical constraint, it is possible to calculate the upper limit of the value required as the penalty coefficient α from the value of the energy function H(x). In other words, this also makes it possible to estimate the initial value for the search of the penalty coefficient.

[0048] Figure 4 shows a table of typical logical operations on Boolean variables expressed as linear expressions. iAssuming that z1 and z2 take the values ​​1 and 0 corresponding to true and false, respectively, the logical constraint between two basic variables can be expressed as shown in Figure 4. For example, Figure 4 summarizes that for z1 AND z2 = 1 to be true, z1 = z2 = 1 must be true.

[0049] In Figure 4, logical conjunction (AND), logical disjunction (NOR), non-implication (IMPLY), and inverse implication determine the values ​​of the two variables to which the constraints are imposed in order for the corresponding logical constraint to be true, so the variables can be fixed and the constraint can be removed from the problem. Exclusive OR (XOR) and equivalence (XOR) are equality constraints between two variables, so the constraint can be removed from the problem by expressing one of the variables as its paired variable. Therefore, below we will focus on negative logical conjunction (NAND), logical disjunction (OR), implication (IMPLY), and inverse implication (CIMPLY), which leave a degree of freedom in the state of the allowable solution. Although CIMPLY is not a common abbreviation, we will use it here as an abbreviation for converse imply.

[0050] Here is an example where logical constraints appear. Figure 5 is a conceptual diagram showing how a variable and a variable whose domain changes depending on its value are transformed into two variables whose domains fall within the [0,1] interval.

[0051] As shown in Figure 5, a certain flag variable v i is on (v i =1), then variable v j is a range of values ​​v min ≦v j ≦v max Take off (v i =0), then v j =v fix Constraints like this frequently appear in modeling optimization problems. For example, in financial portfolio optimization, if a stock is selected to change the investment ratio, a certain amount of change is allowed, but if it is not selected, the current value is left unchanged.

[0052] The constraint between these two variables is expressed as the following equation:

[0053]

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[0054]

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[0055]

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[0056] In the following, in order to handle logical constraints with an Ising machine, the variables in the [0, 1] interval in Figure 4 are handled in a format converted into variables in the [-1, 1] interval. To do this, the following variable conversion shown in Figure 6 is performed.

[0057]

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[0058] Figure 6 is a conceptual diagram showing a variable transformation that converts two variables in the interval [0,1] into two variables in the interval [-1,1]. When this variable transformation is performed, the areas of the bold lines in Figure 7 become feasible solutions for NAND, OR, IMPLY, and CIMPLY.

[0059] The thick line area in Figure 7 is the allowable solution, and the other x i ,x j The following penalty function can be considered to make the area ∈[0, 1] an infeasible solution:

[0060]

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[0061] Below, we consider the local minimum solution x of Eq. 4 for Eq. 1 and Eq. 9. * This section explains how to find the upper limit of the penalty coefficient α required for x to be in the region of the allowable solution in Figure 7. i NAND x j The case of CIMPLY, OR, IMPLY is also explained. i is a binary variable x i ∈{-1, 1}, x j is a binary variable x j ∈{-1, 1} or continuous variable x j Let ∈[-1, 1].

[0062] x i NAND x j About x i = -1 then x j Since the domain of is all feasible, x i Consider the case of =1. From equations 1 and 9, x in equation 4 j If we write out the parts that depend on

[0063]

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[0064] So, if x * i = 1, x * j Let us consider the sufficient condition for J = -1. jj If =0, then from Eq.

[0065]

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[0066] If x * j =-1. The sufficient condition for this is

[0067]

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[0068] Next, J jj If <0, then x from Eq. 10 j If we write out the part that depends on the value of

[0069]

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[0070]

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[0071] If x * j =-1. The sufficient condition for this is Equation 12. Finally, J jj If >0, then from Equation 13

[0072]

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[0073] If x * j =-1. The sufficient condition is Equation 12. From the above discussion, if we use α larger than the right-hand side of Equation 12, the local minimum solution x of Equation 4 * x i NAND x j is an acceptable solution.

[0074] The above discussion is shown in Figure 8. When α=0, i.e., when the penalty function does not affect Eq. 4, the local optimum solution x * x* i , x * j x i NAND x j However, if α is set within the range that satisfies Equation 14, then as shown in Figure 8, x i NAND x j The value of the energy function E(x) other than the allowable solution of x becomes large. i NAND x j- There is a local minimum solution x in the region that satisfies * Also, x i NAND x j In the range where E(x) = H(x) + αP(x) = H(x) also holds.

[0075] Above, we showed that for one NAND constraint, a penalty coefficient large enough to allow the local optimum to satisfy the NAND constraint can be found from the model coefficient of the original energy function H(x). As shown in Equation 9, the penalty functions for CIMPLY, OR, and IMPLY can be discussed in a similar manner to the penalty function for NAND, except that their signs differ. In addition, there can be cases where multiple penalty functions (k=1,...,K) exist for a logical constraint, as shown in the following equation.

[0076]

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[0077] In this case, we can apply the above argument repeatedly to find the penalty coefficients α1,...,α K The upper limit required for the above can be calculated sequentially. A flowchart summarizing the above is shown below (Figure 12).

[0078] Next, an embodiment of an information processing device that performs the above information processing will be described. 9 includes a processor 11, a main memory device 12, an auxiliary memory device 13, an input device 14, an output device 15, a communication device 16, one or more arithmetic units 20, and a system bus 5 that communicatively connects these devices. The information processing device 10 may be realized, for example, using virtual information processing resources such as a cloud server, part or all of which is provided by a cloud system. The information processing device 10 may also be realized, for example, by multiple information processing devices that are communicatively connected and operate in cooperation with each other.

[0079] The processor 11 is configured using, for example, a CPU (Central Processing Unit) or an MPU (Micro Processing Unit). The main storage device 12 is a device that stores programs and data, and is, for example, a ROM (Read Only Memory) (SRAM (Static Random Access Memory), NVRAM (Non Volatile RAM), Mask ROM (Mask Read Only Memory), PROM (Programmable ROM), etc.), a RAM (Random Access Memory) (DRAM (Dynamic Random Access Memory)), etc. The auxiliary storage device 13 is, for example, a hard disk drive, a flash memory, an SSD (Solid State Drive), an optical storage device (CD (Compact Disc), DVD (Digital Versatile Disc), etc.), etc. The programs and data stored in the auxiliary storage device 13 are loaded into the main storage device 12 as needed.

[0080] The input device 14 is a user interface that accepts information input from a user, and is, for example, a keyboard, a mouse, a card reader, a touch panel, etc. The output device 15 is a user interface that provides information to a user, and is, for example, a display device (LCD (Liquid Crystal Display), a graphics card, etc.) that visualizes various information, an audio output device (speaker), a printer, etc. The communication device 16 is a communication interface that communicates with other devices, and is, for example, a NIC (Network Interface Card), a wireless communication module, a USB (Universal Serial Interface) module, a serial communication module, etc.

[0081] The arithmetic device 20 is a device that executes a ground state search known as, for example, an Ising machine. The arithmetic device 20 may take the form of an expansion card that is attached to the information processing device 10, such as a GPU (Graphics Processing Unit). The arithmetic device 20 is configured by hardware such as, for example, a CMOS (Complementary Metal Oxide Semiconductor) circuit, an FPGA (Field Programmable Gate Array), or an ASIC (Application Specific Integrated Circuit).

[0082] The arithmetic device 20 includes a control device, a storage device, an interface for connecting to the system bus 5, and transmits and receives commands and information to and from the processor 11 via the system bus 5. The arithmetic device 20 may be communicably connected to other arithmetic devices 20 via a communication line, for example, and may operate in cooperation with the other arithmetic devices 20. The functions realized by the arithmetic device 20 may be realized, for example, by having a processor (CPU, GPU, etc.) execute a program.

[0083] Figure 10 shows the main functions of the information processing device 10. The information processing device 10 is a device for solving mixed binary quadratic programming problems, and operates based on a method of reading constraints related to logical operations imposed between the variables of the problem and setting an appropriate penalty function and penalty coefficient for each logical constraint from the value of the energy function, thereby effectively solving mixed binary quadratic programming problems with the above constraints. With this configuration, by determining appropriate coefficient values ​​of the penalty function for the logical constraints between two variables for mixed binary quadratic programming problems, it becomes possible to efficiently search for good solutions that satisfy the constraints.

[0084] 10, the information processing device 10 includes a storage unit 900, a ground state search processing unit 910, and a penalty coefficient setting unit 920. These functions are realized by the processor 11 reading and executing a program stored in the main storage device 12, or by hardware included in the arithmetic device 20. In addition to the above functions, the information processing device 10 may also include other functions such as an operating system, a file system, a device driver, and a DBMS (DataBase Management System).

[0085] Of the above functions, the storage unit 900 stores problem data 901 and a calculation device control program 902 in the main storage unit 12 or the auxiliary storage unit 13. The problem data 901 is data in which a combinatorial optimization problem is input in a predetermined description format, and holds information on the nonlinear coefficients, linear coefficients, and variable types of Equation 1, as well as constraint conditions. The problem data 901 is set, for example, by a user via a user interface (input device, output device, communication device, etc.). The calculation device control program 902 is a program that controls the operation sequence and communication of the ground state search processing unit 910 and the penalty coefficient setting unit 920.

[0086] Of the above functions, the ground state search processing unit 910 has a model coefficient setting unit 911 , a variable value initialization unit 912 , a parameter control unit 913 , a state update control unit 914 , and a variable value reading unit 915 .

[0087] The model coefficient setting unit 911 passes model information to the calculation device 20 based on the question data 901 .

[0088] The variable value initialization unit 912 initializes the values ​​stored in the variable memory of the arithmetic unit 20 .

[0089] The parameter control unit 913 controls parameters of the ground state search process, such as the temperature parameter in simulated annealing.

[0090] The state update control unit 914 executes calculations and state updates related to the state update in the ground state search process, and is a part of the arithmetic unit 20. For example, this is the Gibbs sampling process in simulated annealing.

[0091] When the ground state search process is completed by the calculation device 20, the variable value reading unit 915 reads the value stored in the variable memory and outputs the read value to the output device 15 or the communication device 16, thereby completing the ground state search process.

[0092] The penalty coefficient setting unit 920 reads the model coefficients and logical constraints from the problem data 901, and calculates the penalty coefficients and modifies the model coefficients. The processor 11 and the arithmetic unit 20 can be used for these processes.

[0093] 11 is a flowchart illustrating the overall processing performed by the information processing device 10 for a ground state search to solve a combinatorial optimization problem (hereinafter referred to as ground state search processing S1100). The ground state search processing S1100 will be described below with reference to FIG. 11. In the following, the letter "S" before a reference numeral denotes a processing step. The ground state search processing S1100 is started, for example, by receiving an instruction from a user via the input device 14.

[0094] First, based on the target combinatorial optimization problem, the model coefficient setting unit 911 sets information on the model coefficients J and h in the calculation device 20 (S1101). The values ​​can also be set or edited by the user via a user interface (realized by, for example, the input device 14, the output device 15, the communication device 16, etc.).

[0095] Next, based on the logical constraints entered by the user, an initial value of the penalty coefficient for the logical constraints is determined using the method described in the embodiment (S1102). Details of this process S1102 will be described later together with the explanation of the flowchart in Fig. 12. The initial value of the penalty coefficient in process S1102 is the correction coefficient α obtained as a result of the process in Fig. 12.

[0096] Next, the variable value initialization unit 912 initializes the variable values ​​of the arithmetic device 20, and then the parameter control unit 913 and the state update control unit 914 give instructions to the arithmetic device 20 to perform a ground state search (S1103). There are already well-known techniques for ground state searches using Ising machines and the like, and these can be applied, so a description thereof will be omitted here.

[0097] Next, the variable value reading unit 916 reads the values ​​stored in the variable memory of the arithmetic unit 20 and stores them as the results of the ground state search (S1104). Here, the obtained solution is evaluated to what extent it satisfies the given logical constraints and what kind of performance it shows with respect to the evaluation index of the problem.

[0098] Next, if requested, a new penalty coefficient is calculated again based on the evaluation result of S1104 (S1015: YES). If no request is made, the solution obtained up to this point is stored as the result of the ground state search, and the ground state search process S1100 ends. The readjustment of the penalty coefficient, which is performed as needed in process S1015, can be performed using known methods such as those shown in Patent Documents 1 and 2.

[0099] In the above embodiment, since the upper limit value is given as the initial value of the penalty coefficient in step S1102, if the true optimal solution is obtained in step S1103, a solution that satisfies the constraint conditions can be obtained. However, in consideration of the case where only a locally optimal solution can be obtained in step S1103 using the Ising machine (constraint conditions are not fully satisfied), the flow is designed to take into account the possibility of tuning from the initial value.

[0100] 12 is a flowchart illustrating the process (hereinafter referred to as penalty coefficient calculation process S1200 (S1102)) performed by the information processing device 10 to calculate a penalty coefficient corresponding to a logical constraint input by the user. The contents and operations of the main process are explained below. S1200 is started by receiving an instruction or the like in S1102 of FIG. 11.

[0101] First, in order to calculate the penalty coefficient from the original model coefficient J,h, the model coefficient is copied to another memory (S1201). The copied model coefficient is written as new model coefficient J',h'. The model coefficient setting unit 911 sets information about the model coefficient in the arithmetic unit 20. In addition, the new model coefficient is temporarily written to, for example, the auxiliary storage device 13.

[0102] Hereafter, the variable x i and x j The logical constraints imposed between i and j are checked sequentially. Therefore, i and j are initialized (S1202) to check sequentially as i, j = 1, ..., N. In this flow, x j Regarding x i =x1,…x N It is then checked sequentially whether logical constraints are imposed on the

[0103] Next, a correction coefficient, a candidate value for the penalty coefficient, is calculated from the new model coefficients J' and h' (S1203). This corresponds to the value of α in Equation 12. An appropriate positive value can be used for ε (for example, when performing numerical calculations in single precision or double precision, the minimum value of that precision, etc.).

[0104] Next, x i and x j It is checked whether any of the logical constraints NAND, CIMPLY, OR, or IMPLY is imposed between i and j. If no logical constraint is imposed (S1204: NO), no operation is performed for this i, j. If a logical constraint is imposed (S1204: YES), the operation proceeds to adding a penalty coefficient correction to the new model coefficient for this i, j.

[0105] Next, we set the correction sign (s ij ,s i ,s j ) is set (S1205).

[0106] Next, the value of the correction coefficient α′ is recorded for calculation of the penalty coefficient after i+1 (S1206).

[0107] Next, the correction corresponding to the penalty coefficient is applied to the new model coefficients J' and h' (S1207). i and x j is the penalty coefficient between

[0108] Next, the correction coefficient α to be used in subsequent calculations of the correction coefficient is updated with the correction coefficient α' that was temporarily recorded earlier (S1208).

[0109] Then, for variable indices i and j, i and x j If the check is not completed, the process returns to the above operation (S1209).

[0110] Finally, the model coefficients are updated with new model coefficients that reflect the penalty coefficients of all logical constraints (S1210), and the penalty coefficient calculation process S1200 ends.

[0111] In step S1206, the correction coefficient α' for updating is

[0112]

number

[0113] which corresponds to the right-hand side of equation 12 for the new model coefficients updated in process S1207. The term added or subtracted from α in process S1206 corresponds to the correction (added or subtracted value) to J', h' in process S1207. Since α' corresponds to the right-hand side of equation 12 for the model coefficients updated in S1207, it becomes the upper limit of the penalty coefficient calculated using the updated model coefficients. α is updated to this value in S1208, and thereafter, updates to the model coefficients are taken into consideration sequentially.

[0114] 13 illustrates an example of a user interface that displays the status of the ground state search process S1100 as it progresses. This user interface allows the user to check the penalty coefficient settings and the performance evaluation status, as described in the above embodiment.

[0115] The processing result screen 1300 comprises a display area 1301 for each ground state search processing result and a display area 1302 for each penalty coefficient value. Here, each run corresponds to the loop from S1103 to S1105 in FIG.

[0116] The results of evaluating the energy function and penalty function values ​​for the obtained solutions are displayed in the ground state search processing result display area 1301 for each iteration. For solutions with non-zero penalty coefficients, adjustments are made in the next loop, such as imposing a larger penalty coefficient.

[0117] The penalty coefficient value display area 1302 displays the penalty coefficient value for each loop, allowing the user to check how it is gradually adjusted. This allows the user to determine whether the initial value is too large, and to read the relationship between the magnitudes of each parameter.

[0118] Although one embodiment has been described above in detail, it goes without saying that the present invention is not limited to the above embodiment and can be modified in various ways without departing from the spirit of the present invention. For example, the above embodiment has been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those having all of the described configurations. Furthermore, some of the configurations of the above embodiment can be added, deleted, or replaced with other configurations.

[0119] Furthermore, the above-described configurations, functional units, processing units, processing means, etc. may be partially or entirely implemented in hardware, for example, by designing them as integrated circuits. The above-described configurations, functions, etc. may also be implemented in software, with a processor interpreting and executing a program that implements each function. Information such as the programs, tables, and files that implement each function can be stored in a memory, a hard disk, a recording device such as an SSD (Solid State Drive), an IC card, an SD card, a DVD, or other recording media.

[0120] In addition, in the above figures, the control lines and information lines shown are those that are considered necessary for explanation, and do not necessarily show all the control lines and information lines that are actually implemented. For example, it may be considered that almost all components are actually connected to each other.

[0121] The above-described layout of the various functional units, processing units, and databases of the information processing device 10 is merely an example. The layout of the various functional units, processing units, and databases can be changed to an optimal layout in terms of the performance, processing efficiency, communication efficiency, etc. of the hardware and software included in the information processing device 10.

[0122] Furthermore, the configuration (schema, etc.) of the database that stores the various types of data described above can be flexibly changed from the viewpoint of efficient use of resources, improved processing efficiency, improved access efficiency, improved search efficiency, and the like.

[0123] In the above embodiment, the upper limit of the penalty coefficient is calculated, and the initial value of the coefficient is set to the upper limit (S1102). Conventionally, it has been difficult to estimate a sufficient value (upper limit) of the magnitude of the penalty coefficient for a general penalty function, but in this embodiment, the upper limit can be estimated by narrowing the target to logical constraints. If necessary, various methods shown in Patent Documents 1 and 2 can be used to find an appropriate coefficient between the upper limit and lower limit (the lower limit is obviously 0 as conceptually shown in FIG. 3).

[0124] According to the above embodiment, it is possible to provide a technique for finding an appropriate guideline value for the penalty coefficient when solving constraints related to logical operations between two variables using an Ising machine. Since it is possible to realize efficient operation of the Ising machine, it is possible to reduce energy consumption and carbon emissions, prevent global warming, and contribute to the realization of a sustainable society. [Industrial Applicability]

[0125] The present invention can be used in an information processing method and an information processing device. [Explanation of symbols]

[0126] 5 system bus, 10 information processing device, 11 processor, 12 main memory device, 13 auxiliary memory device, 14 input device, 15 output device, 16 communication device, 20 arithmetic unit, 900 memory unit, 901 problem data, 902 arithmetic unit control program, 910 ground state search processing unit, 911 model coefficient setting unit, 912 variable value initialization unit, 913 parameter control unit, 914 state update control unit, 915 variable value reading unit, 920 penalty coefficient setting unit

Claims

1. An information processing device including a processor and a storage device, Using the solution function to find a solution to a combinatorial optimization problem using cost functions and constraints, a penalty coefficient setting unit realized by the processor and the storage device; the penalty coefficient setting unit sets a penalty function and a penalty coefficient based on the constraint condition related to a logical operation imposed between two variables of the cost function and values ​​of model coefficients of the cost function so that a solution to the combinatorial optimization problem satisfies the constraint condition; An information processing device that performs a solution search for the combinatorial optimization problem based on the penalty function and the penalty coefficient.

2. The penalty coefficient setting unit When the constraint is a constraint for making at least one logical operation selected from a logical AND, a logical NOR, a non-implication, and an inverse implication imposed between the two variables true, determining the penalty function for each of the constraint conditions; 2. The information processing device according to claim 1.

3. The penalty function is including the sign of the correction value to be added to or subtracted from the model coefficients.

3. The information processing device according to claim 2.

4. The cost function is expressed by a quadratic equation, The penalty coefficient setting unit calculating the value of the penalty coefficient based on the values ​​of each coefficient of the quadratic equation; 2. The information processing device according to claim 1.

5. The penalty coefficient setting unit Calculating an upper limit value of the penalty coefficient.

2. The information processing device according to claim 1.

6. the cost function includes an energy function H(x) defined by a plurality of nodes constituting a model based on the combinatorial optimization problem, a nonlinear coefficient acting between the nodes, and a linear coefficient acting for each node; where x is the variable x corresponding to each node i (i = 1 to N, N is a natural number). i is a vector with elements, and each variable x i is a binary variable x i ∈{-1, 1} or continuous variable x i ∈[−1, 1], and the nonlinear coefficient between node i and node j is J ij , the linear coefficient for node i is h i Then, H(x) becomes the following quadratic equation: [Equation 1] The penalty coefficient setting unit The nonlinear coefficient J ij and the linear coefficient h i Setting the penalty coefficient based on 2. The information processing device according to claim 1.

7. The penalty coefficient setting unit The nonlinear coefficient J ij and the linear coefficient h i Set the initial value α of the penalty coefficient based on The nonlinear coefficient J ij , the linear coefficient h i , updating the penalty coefficient based on the initial value α of the penalty coefficient and the penalty function; 7. The information processing device according to claim 6.

8. The solution function is Finding a solution to the combinatorial optimization problem using an Ising machine.

2. The information processing device according to claim 1.

9. An information processing method using an information processing device including a processor and a storage device, and an Ising machine that performs a ground state search of an Ising model, When a solution to a combinatorial optimization problem that satisfies constraints is sought by searching for a local optimum solution of a function that reflects an energy function and a penalty function using the Ising machine, a first step in which the information processing device sets an interaction model using the energy function based on the combinatorial optimization problem; a second step in which the information processing device sets the penalty function based on the constraint condition and calculates a weight of the penalty function based on the energy function so that the solution satisfies the constraint condition; a third step in which the Ising machine applies the penalty function and a weight of the penalty function to the energy function to search for a solution to the combinatorial optimization problem that satisfies the constraints; An information processing method that performs the above.

10. In the second step, calculating an upper bound on the weight of the penalty function; 10. The information processing method according to claim 9.

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