Photon detection efficiency (PDE) modulation with multi-junction single-photon avalanche diode (SPAD) pixels

Abstract

To provide a technique of photon detection efficiency (PDE) modulation with multi-junction single-photon avalanche diode (SPAD) pixels.SOLUTION: A sensing device includes an array of sensing elements and a bias control circuit. Each sensing element of the array of sensing elements includes (i) a photosensitive material, which is configured to generate photoelectrons in response to incident optical radiation, and (ii) a plurality of avalanche diodes, which are disposed at different, respective locations within the sensing element in electrical communication with the photosensitive material and are configured, when reverse-biased, to generate electrical avalanches in response to the generated photoelectrons. The bias control circuit is configured to selectively set respective reverse-bias voltage levels of the avalanche diodes within each sensing element to different, respective values.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims the benefit of U.S. Provisional Patent Application No. 63 / 575,739, filed April 16, 2024, the disclosure of which is incorporated herein by reference.

[0002] The present invention relates generally to optoelectronic devices, and more particularly to highly sensitive detector arrays. [Background technology]

[0003] Single-photon avalanche diodes (SPADs), also known as Geiger-mode avalanche photodiodes (GAPDs), are sensing elements capable of capturing individual photons with very high arrival time resolution, on the order of tens of picoseconds. They can be fabricated using dedicated semiconductor processes or standard CMOS technology. Arrays of SPAD sensing elements (also called SPAD pixels) fabricated on a single chip are used in 3D imaging cameras.

[0004] In a SPAD, the pn junction is reverse biased well above the breakdown voltage of the junction. At this bias, a single charge carrier injected into the depletion layer creates a sufficiently high electric field that an incident photon can trigger a self-sustaining avalanche. The rising edge of the avalanche current pulse indicates the arrival time of the detected photon. Reducing the bias voltage below the breakdown voltage causes the current to continue until the avalanche is extinguished. This latter function is performed by a quench circuit, which may simply comprise a high-resistance ballast load in series with the SPAD, or it may comprise an active circuit element.

[0005] SPAD arrays have been previously reported in the patent literature. For example, U.S. Patent No. 9,997,551 describes a sensing device including an array of sensing elements. Each sensing element includes a photodiode including a p-n junction and a local bias circuit coupled to reverse bias the p-n junction with a bias voltage greater than the breakdown voltage of the p-n junction by a sufficient margin so that a single photon incident on the p-n junction triggers an avalanche pulse output from the sensing element. A bias control circuit is coupled to set the bias voltage at different ones of the sensing elements to different respective values ​​greater than the breakdown voltage. Summary of the Invention

[0006] One embodiment of the present invention provides a sensing device including an array of sensing elements and a bias control circuit, each sensing element of the array of sensing elements including (i) a photosensitive material configured to generate photoelectrons in response to incident optical radiation, and (ii) a plurality of avalanche diodes disposed in electrical communication with the photosensitive material at different respective locations within the sensing element and configured to generate an electrical avalanche in response to the generated photoelectrons when reverse biased, the bias control circuit being configured to selectively set the reverse bias voltage level of each of the avalanche diodes within each sensing element to different respective values.

[0007] In some embodiments, the plurality of avalanche diodes includes a respective plurality of isolated pn junctions.

[0008] In some embodiments, the plurality of avalanche diodes comprises a continuous pn junction with a plurality of separated electrodes patterned to define the pn junction.

[0009] In one embodiment, the bias control circuit is configured to selectively set respective reverse bias voltage levels such that at least one of the avalanche photodiodes in a given sensing element is set to a reverse bias voltage level higher than the breakdown voltage of the avalanche diode and another of the avalanche diodes in the given sensing element is set to a reverse bias voltage level lower than the breakdown voltage of the avalanche diode.

[0010] In another embodiment, the bias control circuit is configured to set a reverse bias voltage that is less than the breakdown voltage of the avalanche diode by electrically grounding the avalanche diode.

[0011] In some embodiments, each sensing element includes switching circuitry configured to apply the same reverse bias voltage level to a group of avalanche diodes within the sensing element.

[0012] In some embodiments, the avalanche diode in each sensing cell includes a central photodiode surrounded by multiple peripheral photodiodes.

[0013] In one embodiment, each sensing element includes a switching circuit comprising a plurality of inverters coupled to a respective set of one or more of the avalanche diodes and an OR gate coupled to merge the outputs of each of the plurality of amplifiers.

[0014] In some embodiments, multiple diodes give rise to a total effective active area for each sensing element, and the control circuit is configured to vary the total effective active area by selectively setting the respective reverse bias voltage levels.

[0015] In some embodiments, each sensing element includes a switching circuit comprising a plurality of inverters coupled to a respective set of one or more of the avalanche diodes, respective one-shot circuits coupled to the inverters, and an OR gate coupled to merge the respective outputs of the plurality of one-shot circuits.

[0016] In one embodiment, each diode of the plurality of diodes is coupled to a respective switching circuit and a readout circuit that includes an inverter.

[0017] In some embodiments, each diode of the plurality of diodes is coupled to a respective switching circuit and a readout circuit that includes an inverter.

[0018] In one embodiment, the photosensitive material is configured to generate photoelectrons in response to near infrared (NIR) light radiation.

[0019] In another embodiment, the photosensitive material comprises silicon.

[0020] In one embodiment, the photosensitive material is configured to generate photoelectrons in response to short wave infrared (SWIR) radiation.

[0021] In another embodiment, the photosensitive material comprises germanium.

[0022] According to another embodiment of the present invention, there is further provided a method of sensing in an array of sensing elements, comprising generating photoelectrons in response to incident optical radiation in each sensing element of the array using a photosensitive material, wherein when reverse biased, an electrical avalanche is generated in response to the generated photoelectrons using a plurality of avalanche diodes positioned and configured in electrical communication with the photosensitive material at different respective locations within the sensing element, and wherein a bias control circuit is used to selectively set the reverse bias voltage level of each of the avalanche diodes to a different respective value within each sensing element.

[0023] The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken in conjunction with the accompanying drawings, in which: [Brief explanation of the drawings]

[0024] [Figure 1] FIG. 1 is a block diagram that schematically illustrates a SPAD-based sensing device, in accordance with one embodiment of the present invention. [Figure 2A] 1A-1C are schematic vertical and horizontal cross-sectional views of a sensing element according to one embodiment of the present invention; [Figure 2B] 1A-1C are schematic vertical and horizontal cross-sectional views of a sensing element according to one embodiment of the present invention; [Figure 2C] 10 is a horizontal cross-sectional view of a sensing element according to another embodiment of the present invention. [Figure 3A] 1A-1C are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. [Figure 3B] 1A-1C are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. [Figure 3C] 1A-1C are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. [Figure 3D] 1A-1C are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. [Figure 3E] 1A-1C are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. [Figure 3F] 1A-1C are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. [Figure 4] 3 is a schematic side cross-sectional view of a sensing element according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0025] In the sensing elements of a SPAD array (also referred to herein as "SPAD pixels" or "avalanche photodiodes"), higher pixel sensitivity, hereinafter also referred to as "increased photon detection efficiency (PDE)," is typically desired for improved system performance, such as a higher signal-to-noise ratio (SNR).

[0026]

number

[0027] However, due to the dead time of the SPAD pixels following an avalanche event, higher sensitivity is not desirable under all lighting conditions, for example, due to pixel saturation. Improved system performance, for example in scenes with strong background illumination, can be achieved in some situations by reducing pixel sensitivity. In particular, ranging of short-range targets in high-ambient-light scenes can benefit from lower pixel sensitivity.

[0028] One possible way to reduce the sensitivity is to adjust (e.g., modulate) the potential difference across the SPAD and thus adjust the overbias (i.e., bias above the breakdown voltage of the SPAD). A drawback of such an approach is the degradation of SPAD timing performance, since timing performance (e.g., dead time) depends on the overbias. The range of sensitivity modulation is also limited in practice in such implementations (i.e., does not cover the range that makes the benefits of modulation realizable).

[0029] Embodiments of the invention described herein provide SPAD pixels and readout circuitry that enable adjustment of individual pixel sensitivity (e.g., adjustment of the probability that incident photons will cause an avalanche pulse). In disclosed embodiments, a sensing device comprises an array of pixels, each pixel comprising a plurality of avalanche diodes. Each pixel comprises (a) a photosensitive material that generates photoelectrons in response to incident optical radiation, and (b) a plurality of avalanche diodes in electrical communication with the photosensitive material and at different respective locations within the sensing element. A bias control circuit selectively sets the reverse bias voltage level of each of the avalanche diodes within each sensing element to different respective values.

[0030] In one embodiment, the bias control circuit controls a switching circuit that can enable / disable one or more of the diodes of the pixel by switching the reverse bias of each of the diodes on or off.

[0031] When reverse biased with a sufficient voltage, the diode within each pixel generates an electrical avalanche in response to generated photoelectrons. The bias control circuit can change the sensitivity of each pixel by varying the percentage of enabled diodes within the pixel. Alternatively, the control circuit can change the sensitivity of each pixel by varying the effective active area of ​​each pixel, thereby changing the probability that an incident photon will cause an avalanche pulse within the pixel.

[0032] In one embodiment, the multiple avalanche diodes in each pixel are realized by patterning each of the multiple pn junctions in one of the pixel's active layers (e.g., an n-type layer) to divide it into separate regions (e.g., separate pn junctions) and separately electrically contacting each region. In another embodiment, the entire pixel includes a continuous pn junction with multiple electrodes patterned onto it to effectively create separate avalanche diodes.

[0033] In one embodiment, the bias control circuitry can individually set the reverse bias voltage level for each of the diodes in any given pixel, while in other embodiments, a subset of the diodes are grouped together such that one switching circuit applies the same bias level to the entire subset.

[0034] The bias control circuit sets the bias voltage to a level greater than the breakdown voltage of the pn junction to enable the junction. When the bias voltage is set lower than the breakdown voltage of the pn junction, the junction is disabled. In one example, the switching circuit disables the photodiode by grounding the junction (zero reverse bias).

[0035] In some embodiments, a global bias generator applies a global bias voltage to all of the sensing elements in the array. A bias control circuit sets the switching circuits of the individual diodes in each pixel (e.g., according to different regions on the array) to switch the reverse bias for each of the diodes on and off. Each individual diode and its switching circuit defines a subpixel.

[0036] To determine the required sensitivity level in real time, the pixel can operate at low sensitivity for a portion of the acquisition time window (e.g., over a portion of the acquisition subframes out of the total number of subframes used during a given acquisition period). The processor can instruct the bias control circuit to increase the sensitivity based on the low-sensitivity information (e.g., ambient light levels). In another example, the sensitivity control algorithm divides the subframes into groups, and in each group of subframes, the system is configured with different sensitivity for different use cases (such as short target distance or longer range mode).

[0037] Another way to optimize real-time sensitivity selection, which may require on-chip processing, is to apply dynamic feedback from one subframe to the next: the sensor reduces pixel sensitivity when it detects that the count rate (SPAD firing rate) is greater than a given set threshold.

[0038] The disclosed techniques for adjusting the PDE can be useful, for example, to optimize the detection capabilities of an array by matching the sensing area of ​​the array to the shape of an illuminating light beam or the shape of a region of interest in a scene being imaged. Using the disclosed techniques, a processor can vary sensitivity among sensing elements in an array by setting the PDE of the sensing elements. For example, the PDE can be set lower in one region of the array than outside that region. In general, any region of any suitable shape can be selected in this manner. In some embodiments, the bias control circuitry can dynamically modify the sensitivity of individual sensing elements to sweep a selected region across the array.

[0039] Some embodiments provide a readout circuit that utilizes the disclosed multi-SPAD readout technique. In one example, a one-shot circuit is added to each subpixel output to reduce the output pulse width. In this way, an OR gate is used so that even when one of the subpixels in a pixel is actuated, the other subpixels remain available. By reducing the pulse width in this way, the dead time following each SPAD actuation can be reduced, improving the dynamic range of the pixel.

[0040] The strategies devised above can be used to tune the PDE in different wavelength bands, for example, for near-infrared (NIR, e.g., 750-1400 nm range) or short-wavelength infrared (SWIR, e.g., 1400-3000 nm range). Different types of detectors using photon conversion materials (photosensitive materials) with different band gap energies can be used to suit different wavelength bands.

[0041] The disclosed embodiments allow control over pixel sensitivity to simultaneously support multiple features, such as macro-mode autofocus (short range) and tele-autofocus (long range), using the same pixel array. The principles of the invention can be applied to SPAD imaging arrays, such as those used in 3D cameras based on time-of-flight (TOF) measurements, as well as silicon photomultiplier (SiPM) devices and other types of avalanche diode arrays.

[0042] 1 is a block diagram that schematically illustrates a sensing device 20, in accordance with one embodiment of the present invention. The device 20 comprises an array 22 of sensing elements 24 (also called pixels), each of which comprises a SPAD and associated bias switching circuitry 28 controlled by a bias control circuit 30 configured as a bias switching control module, as described further below. A global high-voltage bias generator 26 applies a global bias voltage to all sensing elements 24 in the array 22. A local bias switching circuit 28 within each sensing element 24 enables or disables the bias, and therefore the respective pn junction within the pixel.

[0043] 2A and 2B are schematic vertical and horizontal cross-sectional views 201 and 212, respectively, of sensing element 24, according to one embodiment of the present invention.

[0044] 2A shows two separate diodes 205, each made from a p-type semiconductor layer 208 and a separate n-type semiconductor layer 210. Layer 208 is in ohmic contact with anodes 1 and 2 via contact semiconductor layer 218. Layer 210 is in ohmic contact with respective cathodes 1 and 2. Separate bias voltages V1 and V2 are applied to the separate diodes 205, allowing avalanche current spikes to be generated in response to photoelectrons in each diode 205.

[0045] In vertical cross section 201, microlenses 204 focus incident near-IR (NIR) photons 111 onto a volume of photosensitive material 206, in this example silicon, which converts the photons into electrons. A bias voltage V across at least one of the pn junctions of diodes 205 in electrical communication with the photosensitive material is applied. i causes electrons to initiate a spike of breakdown current called an avalanche, giving rise to an output signal. i is applied to the pn junction of diode 205, the active area 215 of that layer 210 (seen in FIG. 2B) does not contribute to the pixel sensitivity, thereby reducing the overall sensitivity.

[0046] 2B shows four isolated diodes 205 realized by etching n-type semiconductor layer 210. The n-type layer within each diode 205 defines an active region 215.

[0047] By activating or deactivating each of the diodes 205 of the pixel, the sensitivity of the pixel 210 can be adjusted from 0 to maximum in steps of 25%.

[0048] 2C is a horizontal cross-sectional view of a sensing element 222 according to another embodiment of the present invention. In this layout, a central diode 232 is surrounded by multiple (four in this example) peripheral diodes 230. The active (avalanche) region of the diode is defined by a local high-field region at the interface between the p-type and n-type semiconductor layers. An advantage of such a configuration is that it reduces the granularity in sensitivity modulation, allowing sensitivity control in smaller steps.

[0049] A particular possible advantage of the N=5 layout over the N=4 layout is the increased sensitivity due to the use of a central junction. The higher maximum pixel sensitivity can be explained either by having a more optimal placement for the microlenses and / or by the increase in the total active area of ​​the pixel as the number of separate junctions, N, increases. However, increasing N may require tighter semiconductor processing controls per given pixel size.

[0050] Mutatis mutandis, other layouts of isolated diodes can be implemented to tune pixel PDE characteristics. These layouts can have different diode shapes and placements, limited only by feasible circuit design and CMOS process limitations.

[0051] 3A, 3B, 3C, 3D, 3E, and 3F are electrical circuit diagrams that schematically illustrate components of sensing elements according to six different embodiments of the present invention. In all of the embodiments of FIGS. 3A-3C, the diode 305 and respective quench circuit 304 are coupled in series with each other. The global bias voltage V bias is applied to all sensing elements 305 by the global bias generator 26.

[0052] Figure 3A shows an electrical circuit that can be used with the pixel shown in Figures 2A and 2B. The local bias switching circuit 28 (seen in Figure 1) within each sensing element includes a switch 307, and turning on and off the respective switch 307 enables or disables the biasing of each diode 305. In the illustrated embodiment, turning off any switch 307 connects each individual diode 305 to ground, thereby deactivating it.

[0053] The sensitivity varies between 0 and a maximum value in four steps, depending on the percentage of activated diodes 305. In response to each photon captured by the activated portion of the pixel, an avalanche pulse is output via a readout circuit comprising an inverter 309 (e.g., an inverting amplifier), which outputs a signal to a time-to-digital converter (TDC) 313. The digital signal is then input to a histogram readout circuit 315 to estimate the time-of-flight of the incident photon 111. When the area is limited, dedicated low-sensitivity and high-sensitivity operating modes can be used. This PDE adjustment circuit configuration can reduce the number of transistors. For example, FIG. 3B shows an alternative electrical circuit in which three of the four diodes are grouped under one switching element 307. The other diode 305 can be switched independently. The configuration of FIG. 3B provides pixel PDE control at levels of 0% (when the pixel is disabled), 25%, 75%, and 100%.

[0054] Figure 3C shows a pixel PDE control layout with improved timing performance compared to a single amplifier architecture. In this embodiment, the same PDE sensitivity level as in Figure 3B can be achieved with a readout circuit comprising two inverters 309 whose outputs are merged via an OR gate 311. The signal is output to a TDC 313. The digital signal is then input to a histogram readout circuit 315 to estimate the time-of-flight of the incident photons 111. In the OR gate layout, if the 75% level is not operational (e.g., due to saturation), the OR gate can pass a signal from a lower level of sensitivity of 25%, or vice versa, if the sensor benefits from this configuration for a given scene.

[0055] 3C layout includes switches 317 and 327 to allow for a 25% sensitivity mode (e.g., switch 317 open and switch 327 grounded) or a 100% sensitivity mode where both switches are open. The sometimes required 0% sensitivity is achieved when all junction cathode nodes are grounded by both switches 317 and 327.

[0056] 3D shows an electrical circuit with individual SPAD readout, where each diode 305 (e.g., of a subpixel of a SPAD pixel) has its own readout circuit including a quench circuit 304, a switching element 307, and an inverter 309. The signal is output to an individual TDC 313. The use of a dedicated readout circuit for each diode 305 can further increase the specificity, e.g., the spatial resolution and temporal response characteristics of the sensing element.

[0057] FIG. 3E shows the electrical circuit with individual SPAD readout, where each diode 305 (e.g., of a subpixel of a SPAD pixel) has its own readout circuit, including a quench circuit 304, a switching element 307, and an inverter 309. A one-shot circuit (monostable multivibrator 310) is added to the pixel output to reduce the output pulse width. The output of the multivibrator 310 is merged via an OR gate 321. In this way, even when one of the four junctions in the pixel is activated, the other junctions are available. By reducing the pulse width output by the multivibrator 310, the dynamic range is improved and the SNR is greater over a range of distances to the light source.

[0058] Figure 3F shows a pixel PDE control layout with improved timing performance compared to a single amplifier architecture and an improved photosensitive fill factor compared to the embodiment of Figure 3E. In this embodiment, the readout circuitry includes two inverters 309, each shared by a pair of diodes 305, and a shared quench circuit 304. A one-shot circuit (monostable multivibrator 310) is added to the pixel output to reduce the output pulse width, and the pulse outputs are merged via OR gate 311. The signal is output to TDC 313. The digital signal is then input to histogram readout circuit 315 to estimate the time-of-flight of the incident photons.

[0059] The layout of Figure 3F includes switches 337 and 357 to allow for 25% and 50% sensitivity modes or a 100% sensitivity mode where both switches are open. 25% sensitivity is achieved when all junction cathode nodes are grounded by both switches 337 and 357. The use of OR gate 311 in combination with switches 337 and 357 allows the sensitivity and saturation of the pixel to be adapted to a wide range of lighting conditions and applications.

[0060] The strategies devised above can be used to tailor the PDE for various types of detectors, for example, by using photosensitive materials with different bandgap energies to suit different wavelength bands without sacrificing the maximum nominal PDE provided by the device. For example, Figure 4 is a schematic vertical cross-section 432 of a SPAD pixel 401 having a 2x2 array of discrete diodes 405 according to another embodiment of the invention. Each microlens 404 can focus incident SWIR photons 411 into a respective germanium volume 407 (seen embedded in silicon volume 406), which converts the SWIR photons into photoelectrons. A bias voltage V across each pn junction 405 j When applied, causes electrons to initiate a respective breakdown current spike that produces a detectable output signal pulse.

[0061] By activating or deactivating each of the pixel's diodes 405, the sensitivity of the pixel 401 can be adjusted from 0 (referred to herein as 0%) to one maximum value (referred to herein as 100%) in 25% steps.

[0062] It will be understood that the above-described embodiments are given by way of example, and that the present invention is not limited to what has been particularly shown and described above. Rather, the scope of the present invention includes both combinations and subcombinations of the various features described above, as well as variations and modifications thereof not disclosed in the prior art that would occur to one skilled in the art upon reading the foregoing description.

Claims

1. an array of sensing elements, each sensing element comprising: a photosensitive material configured to generate photoelectrons in response to incident optical radiation; a plurality of avalanche diodes disposed at different respective locations within the sensing element in electrical communication with the photosensitive material and configured to generate an electrical avalanche in response to the generated photoelectrons when reverse biased; Including, an array of sensing elements; a bias control circuit configured to selectively set the reverse bias voltage levels of the avalanche diodes in each sensing element to different respective values; A sensing device comprising:

2. 2. The sensing device of claim 1, wherein the plurality of avalanche diodes comprises a respective plurality of isolated pn junctions.

3. 2. The sensing device of claim 1, wherein the plurality of avalanche diodes comprises a continuous pn junction with a plurality of separated electrodes patterned to define the pn junction.

4. 2. The sensing device of claim 1, wherein the bias control circuit is configured to selectively set the respective reverse bias voltage levels such that at least one of the avalanche photodiodes within a given sensing element is set to a reverse bias voltage level that is higher than a breakdown voltage of the avalanche diode and another one of the avalanche diodes within the given sensing element is set to a reverse bias voltage that is lower than the breakdown voltage of the avalanche diode.

5. 5. The sensing device of claim 4, wherein the bias control circuit is configured to set the reverse bias voltage below the breakdown voltage of the avalanche diode by electrically grounding the avalanche diode.

6. The sensing device of claim 1 , wherein each sensing element includes switching circuitry configured to apply the same reverse bias voltage level to the group of avalanche diodes within the sensing element.

7. The sensing device of claim 1 , wherein the avalanche diode in each sensing cell comprises a central photodiode surrounded by a plurality of peripheral photodiodes.

8. 2. The sensing device of claim 1, wherein each sensing element includes a switching circuit including a plurality of inverters coupled to a respective set of one or more of the avalanche diodes, and an OR gate coupled to merge outputs of each of the plurality of inverters.

9. 2. The sensing device of claim 1, wherein each sensing element includes a switching circuit including a plurality of inverters coupled to a respective set of one or more of the avalanche diodes, respective one-shot circuits coupled to the inverters, and an OR gate coupled to merge the outputs of each of the one-shot circuits.

10. 2. The sensing device of claim 1, wherein the plurality of diodes yields a total effective active area for each sensing element, and the control circuit is configured to vary the total effective active area by selectively setting respective reverse bias voltage levels.

11. The sensing device of claim 1 , wherein each diode of the plurality of diodes is coupled to a respective switching circuit and to a readout circuit including an inverter.

12. The sensing device of claim 1 , wherein the photosensitive material is configured to generate the photoelectrons in response to near-infrared (NIR) light radiation.

13. The sensing device of claim 12 , wherein the light-sensitive material comprises silicon.

14. The sensing device of claim 1 , wherein the photosensitive material is configured to generate the photoelectrons in response to short-wave infrared (SWIR) radiation.

15. The sensing device of claim 13 , wherein the photosensitive material comprises germanium.

16. In an array of sensing elements, at each sensing element of said array: generating photoelectrons in response to incident optical radiation using a photosensitive material; generating an electrical avalanche in response to the generated photoelectrons using a plurality of avalanche diodes positioned and configured at different respective locations within the sensing element in electrical communication with the photosensitive material when reverse biased; Selectively setting the reverse bias voltage levels of the avalanche diodes in each sensing element to different respective values; A sensing method comprising:

17. 17. The method of claim 16, wherein the plurality of avalanche diodes each include a plurality of isolated pn junctions.

18. 17. The sensing method of claim 16, wherein selectively setting the respective reverse bias voltage levels comprises setting at least one of the avalanche photodiodes in a given sensing element to a reverse bias voltage level higher than a breakdown voltage of the avalanche diode, and setting another of the avalanche diodes in the given sensing element to a reverse bias voltage level lower than the breakdown voltage of the avalanche diode.

19. 17. The sensing method of claim 16, wherein selectively setting the respective reverse bias voltage levels comprises applying the same reverse bias voltage level to groups of the avalanche diodes within the sense element.

20. 17. The sensing method of claim 16, wherein each sensing element includes a switching circuit including a plurality of inverters coupled to respective sets of one or more of the avalanche diodes, respective one-shot circuits coupled to the inverters, and an OR gate coupled to merge respective outputs of the plurality of one-shot circuits.

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