Chopper Modulation Device

Abstract

To provide a chopper modulation device designed to reduce an input offset current.SOLUTION: A chopper modulation device 1 includes two chopper modulation circuits 10a and 10b. The chopper modulation circuits 10a and 10b alternately switches a charge mode for charging the coupling capacitances C1a, C2a, C1b, and C2b, and a combined mode in which chopper modulators 11a and 11b are connected to a signal input terminal 21 and a signal output terminal 22, and one of the two chopper modulation circuits 10a and 10b operates as coupling mode and the other as charging mode. Further, the chopper modulators 11a and 11b are alternately switched between the positive phase path and the negative phase path, and switching of the paths is performed during the charging mode.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a chopper modulation device. [Background technology]

[0002] A chopper stabilized amplifier 300 shown in FIG. 14 is known as an amplifier device for amplifying a small signal such as a sensor signal. The chopper stabilized amplifier 300 described above includes a chopper modulator 301, an amplifier 302, and a chopper modulator 303. In the configuration shown in FIG. 14, an offset component (Voffset) and a low-frequency noise component (1 / fnoise) are generated in the chopper stabilized amplifier 300. Therefore, the chopper modulator 301 modulates the low-frequency band signal component to a high-frequency band with fewer offset components and low-frequency noise components of the amplifier 302. The output of the chopper modulator 301 is amplified by the amplifier 302 and then input to the chopper modulator 303. The chopper modulator 303 demodulates the signal component of the output of the amplifier 302 to a low-frequency band and modulates the offset component and low-frequency component to a high-frequency band. This makes it possible to reduce the offset component and low-frequency noise component of the chopper stabilized amplifier 300 as a whole.

[0003] Furthermore, as a method for reducing the offset component and low-frequency noise component of the above-mentioned chopper stabilized amplifier 300, the methods described in Patent Documents 1 to 5 and Non-Patent Documents 1 and 2 have been proposed.

[0004] However, when the MOS transistor switch used in the chopper modulator 301 is turned on and off, a charge leakage phenomenon such as charge injection or clock field through occurs, and this leakage phenomenon causes an input offset current of the chopper modulator 301.

[0005] 15 and 16 show how the chopper modulator 301 generates an input offset current. First, as an example of conditions, when the switches S31 to S34 are turned on as shown in FIG. 15 and FIG. 16, a charge q 1a, q 2a , q 1b , q 2b When it is turned off, a charge q moves from the inputs I1 and I2 to the outputs O1 and O2. 1a , q 2a , q 1b , q 2b In this case, when the switches S33 and S34 are turned off and the switches S31 and S32 are turned on, as shown in FIG. 15, the error charge Δq1 (=q 1a -q 1b ) flows from output O1 to input I1, and the error charge Δq2 (=q 2a -q 2b 16, when switches S31 and S32 are turned off and switches S33 and S34 are turned on, an error charge Δq1 flows from input I2 to output O1, and an error charge Δq2 flows from output O2 to input I1.

[0006] That is, as shown in Figures 15 and 16, at the outputs O1 and O2, the direction of the flow of the error charges Δq1 and Δq2 changes each time the switches S31 to S34 are turned on and off, but at the inputs I1 and I2, the direction of the flow of the error charges Δq1 and Δq2 does not change even if the switches S31 to S34 are turned on and off.

[0007] 17 shows how the error charges Δq1 and Δq2 in FIGS. 15 and 16 flow. Φch and Φch are control signals for switching the switches S31 to S34 on and off, ΔCp1 is, for example, a differential capacitance of the parasitic capacitance associated with the MOS transistors that constitute the switches S31 and S33, and ΔCp2 is, for example, a differential capacitance of the parasitic capacitance associated with the MOS transistors that constitute the switches S32 and S34. As shown in the figure, the flow of the error charges Δq1 and Δq2 pulsating at the output of the chopper modulator 301 is demodulated by the chopper modulator 301 to generate the input bias current Ib + , Ib - Moreover, the input bias current Ib + , Ib - Therefore, the input bias current Ib+ , Ib - This causes an increase in the input offset current, which is the difference between the input

[0008] Furthermore, this phenomenon becomes more pronounced as the size of the switches S31 to S34 increases, since the effects of charge injection and clock feed-through become greater. Therefore, if the size of the switches S31 to S34 is increased in order to reduce the thermal noise generated by the on-resistance of the switches S31 to S34 of the chopper modulator 301, the input offset current increases, which is a problem. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] U.S. Patent No. 6,476,671 [Patent Document 2] U.S. Patent No. 7,292,095 [Patent Document 3] U.S. Pat. No. 7,764,118 [Patent Document 4] U.S. Patent No. 8,120,422 [Patent Document 5] U.S. Pat. No. 9,685,933 [Non-patent literature]

[0010] [Non-Patent Document 1] Ion E. Opris and Gregory TA Kovacs, “A Rail-to-Rail Ping-Pong Op-Amp”, IEEE J. Solid-State Circuits, vol. 31, no 9, pp. 1320-1324, Sep. 1996. [Non-Patent Document 2] Qiuting Huang and Christian Menolfi, “A 200nV Offset 6.5nV / √Hz Noise PSD 5.6kHz Chopper Instrumentation Amplifier”, IEEE ISSCC Digest of Technical Papers, pp. 362-363, Feb. 2001. Summary of the Invention [Problem to be solved by the invention]

[0011] The present invention has been made in consideration of the above-mentioned circumstances, and an object of the present invention is to provide a chopper modulation device that reduces the input offset current. [Means for solving the problem]

[0012] In order to achieve the above-mentioned object, a chopper modulation device according to the present invention is characterized by the following [1] to [6]. [1] A chopper modulation device having two chopper modulation circuits, Each of the chopper modulation circuits is a chopper modulator having a chopper modulation switch for switching a pair of signal paths between a positive phase path and a negative phase path; a first switch connected between a signal input terminal to which a signal is input and an input of the chopper modulator; a second switch connected between a signal output terminal at which a modulated signal is output and the output of the chopper modulator; a third switch connected between the signal path between the first switch and the second switch and a common-mode input terminal to which an input common-mode voltage is supplied. It is a chopper modulation device. [2] In the chopper modulation device according to [1], a first control unit that controls the first switch, the second switch, and the third switch; a second control unit that controls the chopper modulation switch; the first control unit alternately switches between a first mode in which the first switch and the second switch are turned on and the third switch is turned off, and a second mode in which the first switch and the second switch are turned off and the third switch is turned on, and controls one of the two chopper modulation circuits to operate in the first mode and the other to operate in the second mode; The second control unit controls the chopper modulation switch so that the positive phase path and the negative phase path are alternately switched, and controls the chopper modulation switch so that path switching is performed during the second mode. It is a chopper modulation device. [3] In the chopper modulation device according to [2], The first control unit and the second control unit are configured to: A first state in which one of the two chopper modulation circuits is in the first mode and the positive phase path, and the other is in the second mode and the positive phase path; A second state in which one of the two chopper modulation circuits is in the second mode and the negative phase path, and the other is in the first mode and the positive phase path; a third state in which one of the two chopper modulation circuits is in the first mode and the anti-phase path, and the other is in the second mode and the anti-phase path; and a fourth state in which one of the two chopper modulation circuits is in the second mode and the positive phase path, and the other is in the first mode and the negative phase path. It is a chopper modulation device. [4] In the chopper modulation device according to any one of [1] to [3], The third switch is connected between the input or output of the chopper modulator and the common-phase input terminal. It is a chopper modulation device. [5] In the chopper modulation device according to any one of [1] to [3], The chopper modulation circuit includes a coupling capacitor connected between an output of the chopper modulator and the second switch; a fourth switch connected between one end of the coupling capacitance and a bias end to which a bias voltage is supplied; the third switch is connected between the other end of the coupling capacitance and the common-phase input end. It is a chopper modulation device. [6] In the chopper modulation device according to any one of [1] to [5], The common-mode detection amplifier detects a common-mode voltage of the signal input terminal and inputs the common-mode voltage to the common-mode input terminal. It is a chopper modulation device. Effect of the Invention

[0013] According to the present invention, it is possible to provide a chopper modulation device that reduces the input offset current.

[0014] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the following description of the embodiment of the present invention (hereinafter, referred to as "embodiment") with reference to the accompanying drawings. [Brief description of the drawings]

[0015] [Figure 1] FIG. 1 is a diagram showing a first state of the chopper modulation device according to the first embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram showing a second state of the chopper modulation device according to the first embodiment of the present invention. [Diagram 3] FIG. 3 is a diagram showing a third state of the chopper modulation device according to the first embodiment of the present invention. [Figure 4] FIG. 4 is a diagram showing a fourth state of the chopper modulation device according to the first embodiment of the present invention. [Diagram 5] FIG. 5 is a time chart of clocks supplied to the switches constituting the chopper modulation device shown in FIGS. [Figure 6] FIG. 6 is a diagram showing a modification of the chopper modulation device of the present invention in the first embodiment. [Figure 7] FIG. 7 is a diagram showing a chopper modulation device according to the second embodiment of the present invention. [Figure 8] FIG. 8 is a diagram showing a modified example of the chopper modulation device according to the second embodiment of the present invention. [Figure 9] FIG. 9 is a diagram showing the configuration of a chopper stabilized amplifier incorporating a chopper modulation device according to the third embodiment of the present invention. [Figure 10] FIG. 10 is a diagram illustrating an example of a chopper output circuit that constitutes the chopper stabilized amplifier illustrated in FIG. [Figure 11] FIG. 11 is a diagram illustrating an example of a chopper output circuit that constitutes the chopper stabilized amplifier illustrated in FIG. [Figure 12] FIG. 12 is a characteristic diagram showing an example of time waveforms and frequency characteristics of a signal component, a noise component, and an offset component by the chopper stabilized amplifier shown in FIG. [Figure 13] FIG. 13 is a diagram showing an example of the configuration of the amplifier shown in FIG. 9 according to another embodiment. [Figure 14] FIG. 14 is a diagram showing an example of a conventional chopper stabilized amplifier. [Figure 15] FIG. 15 is a diagram showing an example of the movement of charges in the chopper modulator shown in FIG. 14 in the positive phase mode. [Figure 16] FIG. 16 is a diagram showing an example of the state of charge transfer in the chopper modulator shown in FIG. 14 in the reverse phase mode. [Figure 17] FIG. 17 is a diagram illustrating an example of how the chopper modulator illustrated in FIG. 14 generates an input offset current. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Specific embodiments of the present invention will be described below with reference to the accompanying drawings.

[0017] (First embodiment) First, a first embodiment will be described. Figures 1 to 4 are diagrams showing the configuration of a chopper modulation device 1 of the first embodiment. The chopper modulation device 1 modulates a signal inputted from a signal input terminal 21 to a high frequency and outputs the signal from a signal output terminal 22. The chopper modulation device 1 includes two chopper modulation circuits 10a, 10b connected in parallel in a pair of signal paths through which the signal passes.

[0018] First, the chopper modulation circuit 10a will be described. The chopper modulation circuit 10a includes a chopper modulator 11a, a coupling circuit 12a, and switches S11a to S14a and S21a to S24a. The chopper modulator 11a switches a pair of signal paths between a positive phase path and a negative phase path.

[0019] The chopper modulator 11a has switches S31a to S34a as chopper modulation switches constituted by MOS transistors. The switch S31a is connected between the positive electrode side of the signal input terminal 21 and the positive electrode side of the signal output terminal 22. The switch S32a is connected between the negative electrode side of the signal input terminal 21 and the negative electrode side of the signal output terminal 22. The switch S33a is connected between the negative electrode side of the signal input terminal 21 and the positive electrode side of the signal output terminal 22. The switch S34a is connected between the positive electrode side of the signal input terminal 21 and the negative electrode side of the signal output terminal 22.

[0020] According to the above configuration, the chopper modulator 11a is switched to a positive phase path when the switches S31a and S32a are turned on and the switches S33a and S34a are turned off. The chopper modulator 11a is switched to a negative phase path when the switches S33a and S34a are turned on and the switches S31a and S32a are turned off. That is, the chopper modulator 11a can switch a pair of signal paths between the signal input terminal 21 and the signal output terminal 22 between a positive phase path and a negative phase path by turning on and off the switches S31a to S34a.

[0021] The coupling circuit 12a is a circuit that level-shifts the common-mode voltage of the chopper modulator 11a. The coupling circuit 12a has coupling capacitances C1a and C2a. The coupling capacitances C1a and C2a are connected between the output of the chopper modulator 11a and the switches S13a and S14a. To explain in detail, the coupling capacitance C1a is connected between the switches S31a and S33a of the chopper modulator 11a and the switch S13a, and the coupling capacitance C2a is connected between the switches S32a and S34a of the chopper modulator 11a and the switch S14a.

[0022] The coupling capacitances C1a and C2a are charged with the difference between the input common-mode voltage Vcmin and the bias voltage Vbias as a level shift voltage. The coupling capacitances C1a and C2a step down the signal input from the signal input terminal 21 by the level shift voltage and output it to the signal output terminal 22. As a result, the common-mode voltage component of the signal is level-shifted from the high-voltage input common-mode voltage Vcmin to the low-voltage bias voltage Vbias and output from the signal output terminal 22.

[0023] The switches S11a to S14a and S21a to S24a are switches for switching the chopper modulation circuit 10a between a coupling mode as a first mode and a charging mode as a second mode. In the coupling mode, the chopper modulator 11a and the coupling circuit 12a are connected between the signal input terminal 21 and the signal output terminal 22, and the coupling capacitances C1a and C2a are disconnected from the input common-mode voltage Vcmin and the bias voltage Vbias, and the signal is level-shifted by the level shift voltage charged by the coupling capacitances C1a and C2a. In the charging mode, the chopper modulator 11a and the coupling circuit 12a are disconnected from the signal input terminal 21 and the signal output terminal 22, and the coupling capacitances C1a and C2a are connected to the input common-mode voltage Vcmin and the bias voltage Vbias, and the level shift voltage is charged to the coupling capacitances C1a and C2a.

[0024] The switches S11a and S12a as first switches are connected between the signal input terminal 21 and the input of the chopper modulator 11a. The switches S13a and S14a as second switches are connected between the coupling circuit 12a and the signal output terminal 22. The switches S21a and S22a as third switches are connected between one end of the coupling capacitances C1a and C2a and a common-mode input terminal to which the input common-mode voltage Vcmin is supplied. The switches S23a and S24a as fourth switches are connected between the other end of the coupling capacitances C1a and C2a and a bias terminal to which the bias voltage Vbias is supplied.

[0025] When the switches S11a to S14a are turned on and the switches S21a to S24a are turned off, the chopper modulator 11a and the coupling circuit 12a are connected between the signal input terminal 21 and the signal output terminal 22, and the coupling capacitances C1a and C2a are disconnected from the input common-mode voltage Vcmin and the bias voltage Vbias, entering the coupling mode. When the switches S21a to S24a are turned on and the switches S11a to S14a are turned off, the chopper modulator 11a and the coupling circuit 12a are disconnected from the signal input terminal 21 and the output terminal 22, and the coupling capacitances C1a and C2a are connected to the input common-mode voltage Vcmin and the bias voltage Vbias, entering the charging mode.

[0026] The chopper modulation circuit 10b is similar to the chopper modulation circuit 10a, and can be explained by replacing "a" with "b" in the explanation of the chopper modulation circuit 10a, so a detailed explanation will be omitted here.

[0027] Next, the operation of the chopper modulation device 1 having the above-mentioned configuration will be described with reference to the time chart shown in Fig. 5. A clock CLK1 is supplied to the above-mentioned switches S11a to S14a and S21b to S24b, and a clock CLK2 is supplied to the switches S11b to S14b and S21a to S24a. A clock CLK11a is supplied to the switches S31a and S32a, and a clock CLK11b is supplied to the switches S33a and S34a. A clock CLK21a is supplied to the switches S31b and S32b, and a clock CLK21b is supplied to the switches S33b and S34b. A circuit (not shown) that supplies the clocks CLK1 and CLK2 constitutes a first control unit. A circuit (not shown) that supplies the clocks CLK11a, CLK11b, CLK21a, and CLK21b constitutes a second control unit.

[0028] The clocks CLK1 and CLK2 cause the chopper modulation circuits 10a and 10b to alternate between a coupling mode and a charging mode. As shown in Figs. 1 to 4, when one of the chopper modulation circuits 10a and 10b is in the coupling mode, the other is in the charging mode, and when one is in the charging mode, the other is in the coupling mode. This allows the chopper modulation device 1 to constantly modulate a signal input from a signal input terminal 21 to a high frequency and output it from a signal output terminal 22.

[0029] In addition, the chopper modulators 11a and 11b alternate between the positive phase path and the negative phase path by the clocks CLK11a, CLK11b, CLK21a, and CLK21b, and the path is switched at the timing when the coupled mode is switched to the charging mode. In other words, the chopper modulators 11a and 11b do not switch the path at the timing when the charging mode is switched to the coupled mode.

[0030] More specifically, the chopper modulation device 1 repeats transitions in the following order: a first state (FIG. 1) in which the chopper modulation circuit 10a is in the coupled mode and is the positive phase path, and the chopper modulation circuit 10b is in the charging mode and is the positive phase path; a second state (FIG. 2) in which the chopper modulation circuit 10a is in the charging mode and is the negative phase path, and the chopper modulation circuit 10b is in the coupled mode and is the positive phase path; a third state (FIG. 3) in which the chopper modulation circuit 10a is in the coupled mode and is the negative phase path, and the chopper modulation circuit 10b is in the charging mode and is the negative phase path; and a fourth state (FIG. 4) in which the chopper modulation circuit 10a is in the charging mode and is the positive phase path, and the chopper modulation circuit 10b is in the coupled mode and is the negative phase path.

[0031] According to the first embodiment described above, in the chopper modulation circuits 10a and 10b, the chopper modulators 11a and 11b are switched from the positive-phase path to the negative-phase path and from the negative-phase path to the positive-phase path during the charging mode. Therefore, the error charge caused by the charge injection and clock feed-through of the switches S31a to S34a and S31b to S34b generated by the switching can be released to the input common-mode voltage Vcmin. Furthermore, since the paths of the chopper modulators 11a and 11b are not switched during the coupling mode, the influence of the input offset current and the input bias current generated by the chopper modulators 11a and 11b can be reduced. In addition, there is no problem even if the sizes of the MOS transistor switches S31a to S34a and S31b to S34b are increased in order to reduce the on-resistance of the chopper modulators 11a and 11b.

[0032] Moreover, the influence on the input offset current and bias current caused by the error charges of the switches S11a to S14a and S11b to S14b is small because they are not demodulated like the chopper modulators 11a and 11b.

[0033] In the first embodiment described above, the switches S21a, S22a, S21b, and S22b are connected to the outputs of the chopper modulators 11a and 11b, but this is not limiting. As shown in Fig. 6, the switches S21a, S22a, S21b, and S22b may be connected to the inputs of the chopper modulators 11a and 11b.

[0034] Second embodiment Next, a second embodiment will be described with reference to Fig. 7. In Fig. 7, parts equivalent to those of the chopper modulation device 1 shown in Figs. 1 to 4 already described in the above-mentioned first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted. The difference between the chopper modulation device 1 of the first embodiment and the chopper modulation device 1B of the second embodiment is that while the chopper modulation circuits 10a and 10b of the first embodiment include the coupling circuits 12a and 12b, the chopper modulation circuits 10aB and 10bB of the second embodiment do not include the coupling circuits 12a and 12b.

[0035] As shown in the figure, the chopper modulation circuit 10aB has a chopper modulator 11a and switches S11a to S14a, S21a, and S21b. The chopper modulator 11a and the switches S11a to S14a are similar to the chopper modulator 11a and the switches S11a to S14a shown in Figures 1 to 4 described in the first embodiment above, so detailed description will be omitted here. The switches S21a and S22a are connected between the output of the chopper modulator 11a and the in-phase input terminal to which the input in-phase voltage Vcmin is supplied.

[0036] The above-mentioned switches S11a to S14a, S21a, and S21b switch the chopper modulation circuit 10aB between an in-phase mode (second mode) and a coupled mode (first mode). In the in-phase mode, the switches S11a to S14a are turned off and the switches S21a and S22a are turned on, so that the chopper modulator 11a is disconnected from the signal input terminal 21 and the signal output terminal 22, and the output of the chopper modulator 11a is connected to the input in-phase voltage Vcmin. In the coupled mode, the switches S11a to S14a are turned on and the switches S21a and S22a are turned off, so that the chopper modulator 11a is connected between the signal input terminal 21 and the signal output terminal 22, and the output of the chopper modulator 11a is disconnected from the input in-phase voltage Vcmin.

[0037] The chopper modulation circuit 10bB is similar to the chopper modulation circuit 10aB, and can be described by replacing "a" with "b", so detailed description will be omitted here. The chopper modulation circuits 10aB and 10bB alternate between an in-phase mode and a coupled mode in operation mode by the clocks CLK1 and CLK2. When one of the chopper modulation circuits 10aB and 10bB is in the coupled mode, the other is in the in-phase mode, and when one is in the in-phase mode, the other is in the coupled mode. This allows the chopper modulation device 1B to constantly modulate a signal input from the signal input terminal 21 to a high frequency and output it from the signal output terminal 22.

[0038] In addition, the chopper modulators 11a and 11b alternate between the positive-phase path and the negative-phase path by the clocks CLK11a, CLK11b, CLK21a, and CLK21b, and the path is switched at the timing when the coupled mode changes to the in-phase mode. In other words, the chopper modulators 11a and 11b do not switch the path at the timing when the in-phase mode changes to the coupled mode.

[0039] More specifically, the chopper modulation device 1B transitions in the following order: a first state in which the chopper modulation circuit 10aB is in the coupled mode and in the positive-phase path, and the chopper modulation circuit 10bB is in the in-phase mode and in the positive-phase path; a second state in which the chopper modulation circuit 10aB is in the in-phase mode and in the negative-phase path, and the chopper modulation circuit 10bB is in the coupled mode and in the positive-phase path; a third state in which the chopper modulation circuit 10aB is in the coupled mode and in the negative-phase path, and the chopper modulation circuit 10bB is in the in-phase mode and in the negative-phase path; and a fourth state in which the chopper modulation circuit 10aB is in the in-phase mode and in the positive-phase path, and the chopper modulation circuit 10bB is in the coupled mode and in the negative-phase path, and this sequence is repeated. The chopper modulation device 1B of the second embodiment described above can also reduce the input bias current and the input offset current, similar to the first embodiment.

[0040] According to the second embodiment described above, the switches S21a, S22a, S21b, and S2b are connected between the outputs of the chopper modulators 11a and 11b and the in-phase input terminal to which the input in-phase voltage Vcmin is supplied. However, as shown in FIG. 8, the switches S21a, S22a, S21b, and S2b may be connected between the inputs of the chopper modulators 11a and 11b and the in-phase input terminal.

[0041] Third embodiment Next, a third embodiment will be described. As shown in Fig. 9, in the third embodiment, a chopper stabilized amplifier 200 having three or more stages is configured using the chopper modulation device 1 or 1B described in the first or second embodiment. The chopper stabilized amplifier 200 includes the chopper modulation device 1 or 1B, a common-mode detection amplifier 201, a transconductance amplifier 202, a chopper output circuit 203, an amplifier 204, and a transconductance amplifier 205.

[0042] The chopper modulation device 1 or 1B modulates the signal Vin to a high frequency band. The common-mode detection amplifier 201 detects the common-mode voltage at the signal input terminal and supplies the detected common-mode voltage as an input common-mode voltage Vcmin to the chopper modulation device 1 or 1B. The transconductance amplifier 202 amplifies and outputs the signal modulated by the chopper modulation device 1 or 1B. The chopper output circuit 203 is configured, for example, as shown in FIG. 10. As shown in the figure, the chopper output circuit 203 has a chopper modulator 206 and a noise reduction loop circuit 207. The chopper modulator 206 demodulates the signal component of the output of the transconductance amplifier 202 to a low frequency band, and modulates the offset component and low frequency noise component to a high frequency band and outputs the result.

[0043] The noise reduction loop circuit 207 extracts the offset component of the transconductance amplifier 202 and negatively feeds back the extracted offset component to the output of the transconductance amplifier 202. This noise reduction loop circuit 207 reduces the offset component and low-frequency noise component generated in the transconductance amplifier 202, thereby making it possible to reduce the ripple noise included in the output of the chopper output circuit 203 (see FIGS. 12B and 12C).

[0044] 10, the noise reduction loop circuit 207 includes a Ping-Pong auto-zero amplifier 208 that amplifies the input of the noise reduction loop circuit 207, a filter circuit 209 that reduces high-frequency signal components in the output of the Ping-Pong auto-zero amplifier 208, and a transconductance amplifier 210 that amplifies the output of the filter circuit 209. The output of the transconductance amplifier 202 is input to the Ping-Pong auto-zero amplifier 208. The filter circuit 209 has a function of amplifying low-frequency signal components and reducing high-frequency signal components in the output of the Ping-Pong auto-zero amplifier 208. The filter circuit 209 can reduce high-frequency signal components and feed back the offset components of the amplifier.

[0045] Also, the chopper output circuit 203 may be configured, for example, as shown in Fig. 11. As shown in the figure, the chopper output circuit 203 has a chopper modulator 206 and a ripple calibration circuit 211. The chopper modulator 206 is similar to the chopper modulator 206 shown in Fig. 10.

[0046] The ripple calibration circuit 211 has an input connected to the output of the chopper modulator 206 and an output connected to the input of the chopper modulator 206. The ripple calibration circuit 211 is a circuit that extracts high-frequency noise components (ripple noise) from the output of the chopper modulator 206, modulates the extracted ripple noise to an offset component, and negatively feeds back the modulated offset component to the input of the chopper modulator 206. The ripple calibration circuit 211 reduces the offset component included in the input of the chopper modulator 206, and can reduce the ripple noise included in the output of the chopper modulator 206 (see FIGS. 12(B) and 12(C)).

[0047] In this embodiment, the ripple calibration circuit 211 includes a high-pass filter 212 that reduces low-frequency noise components input to the ripple calibration circuit 211 and detects ripple noise, a phase-inverting auto-zero amplifier 213 that demodulates the ripple noise of the output of the high-pass filter 212 into low-frequency components and modulates it into an offset component, a filter circuit 214 that reduces high-frequency components of the output of the phase-inverting auto-zero amplifier 213, and a mutual conductance amplifier 215 that amplifies the output of the filter circuit 214.

[0048] Fig. 12 is a characteristic diagram showing an example of the time waveforms and frequency characteristics of the signal component, noise component, and offset component by the chopper stabilized amplifier shown in Fig. 9. Fig. 12 shows an image of the time waveform and the process of change in frequency distribution for each of the signal component, noise component, and offset component. In Fig. 12, the upper part shows the time waveform, and the lower part shows the frequency characteristics. The chopping frequency of the chopper modulation devices 1, 1B and chopper modulator 206 is fch.

[0049] The signal components (FIG. 12(A)) input to the chopper stabilized amplifier shown in FIG. 9 are modulated to a high frequency band by the chopper modulation devices 1, 1B (FIG. 12(B)) and amplified by the transconductance amplifier 202. Thereafter, the signal components are demodulated by passing through the chopper modulator 206 in the output chopper circuit 203 (FIG. 12(C)), and are amplified and output by the subsequent amplifier. In this embodiment, by using the noise reduction loop circuit 207 or the ripple calibration circuit 211, the offset components and low frequency noise components of the transconductance amplifier 202 are reduced as shown by the dashed line → solid line in the figure. Therefore, the ripple noise output to the output terminal of the output chopper circuit 203 is reduced, and the ripple noise finally output as the output of the amplifier device is reduced.

[0050] 9, amplifier 204 amplifies the signal component output from chopper output circuit 203. In this embodiment, the output of amplifier 204 becomes the output terminal of chopper stabilized amplifier 200, and signal Vout is output. Amplifier 204 has transconductance amplifier 216, amplifier 217, and phase compensation circuit 218 that performs phase compensation for amplifiers 216 and 217. An input of amplifier 217 is connected to the output of transconductance amplifier 216, and the output of amplifier 217 becomes the output of amplifier 204, i.e., the output terminal of chopper stabilized amplifier 200.

[0051] The phase compensation circuit 218 is composed of capacitances Cc1 to Cc3. The capacitance Cc1 is connected between the input and output of the amplifier 217. The capacitance Cc2 is connected between the inverting input of the transconductance amplifier 216 and the output of the amplifier 217. The capacitance Cc3 is connected between the non-inverting input of the transconductance amplifier 216 and ground.

[0052] The transconductance amplifier 205 is connected between the input terminal and the input of the amplifier 204 and functions as a feedforward amplifier.

[0053] The present invention is not limited to the above-described embodiment, and can be appropriately modified, improved, etc. In addition, the material, shape, size, number, arrangement location, etc. of each component in the above-described embodiment are arbitrary as long as the present invention can be achieved, and are not limited.

[0054] For example, the output stage amplifier 204 shown in the third embodiment is composed of the transconductance amplifier 216 and the amplifier 217, but is not limited to this. For example, as shown in FIG. 13, two transconductance amplifiers 219 and 220 may be provided instead of the transconductance amplifier 216. In the example shown in FIG. 13, the phase compensation circuit 221 is composed of two capacitances Cc4 and Cc5. The capacitance Cc4 is connected between the inverting input and the positive output of the transconductance amplifier 219. The capacitance Cc5 is connected between the non-inverting input and the negative output of the transconductance amplifier 219. [Explanation of symbols]

[0055] 1, 1B Chopper Modulation Device 10a, 10b Chopper modulation circuit 10aB, 10bB Chopper Modulation Circuit 11a, 11b Chopper Modulator C1a, C2a coupling capacity C1b, C2b coupling capacitance S11a, S12a switch (first switch) S11b, S12b switch (first switch) S13a, S14a switch (second switch) S13b, S14b switch (second switch) S21a, S22a switch (third switch) S21b, S22b switch (4th switch) S31a~S34a Switches (chopper modulation switches) S31b~S34b Switches (chopper modulation switches) 201 Common-mode detection amplifier Vcmin Input common mode voltage Vbias Bias voltage

Claims

1. A chopper modulation device having two chopper modulation circuits, Each of the chopper modulation circuits is a chopper modulator having a chopper modulation switch for switching a pair of signal paths between a positive phase path and a negative phase path; a first switch connected between a signal input terminal to which a signal is input and an input of the chopper modulator; a second switch connected between a signal output terminal at which a modulated signal is output and the output of the chopper modulator; a third switch connected between the signal path between the first switch and the second switch and a common-mode input terminal to which an input common-mode voltage is supplied. Chopper modulation device.

2. 2. The chopper modulation device according to claim 1, a first control unit that controls the first switch, the second switch, and the third switch; a second control unit that controls the chopper modulation switch, the first control unit alternately switches between a first mode in which the first switch and the second switch are turned on and the third switch is turned off, and a second mode in which the first switch and the second switch are turned off and the third switch is turned on, and controls one of the two chopper modulation circuits to operate in the first mode and the other to operate in the second mode; The second control unit controls the chopper modulation switch so that the positive phase path and the negative phase path are alternately switched, and controls the chopper modulation switch so that path switching is performed during the second mode. Chopper modulation device.

3. 3. The chopper modulation device according to claim 2, The first control unit and the second control unit are in a first state in which one of the two chopper modulation circuits is in the first mode and the positive phase path, and the other is in the second mode and the positive phase path; a second state in which one of the two chopper modulation circuits is in the second mode and the negative phase path, and the other is in the first mode and the positive phase path; a third state in which one of the two chopper modulation circuits is in the first mode and the anti-phase path, and the other is in the second mode and the anti-phase path; and a fourth state in which one of the two chopper modulation circuits is in the second mode and the positive phase path and the other is in the first mode and the negative phase path. Chopper modulation device.

4. The chopper modulation device according to any one of claims 1 to 3, the third switch is connected between the input or output of the chopper modulator and the common-phase input terminal; Chopper modulation device.

5. The chopper modulation device according to any one of claims 1 to 3, The chopper modulation circuit includes a coupling capacitor connected between an output of the chopper modulator and the second switch; a fourth switch connected between one end of the coupling capacitance and a bias end to which a bias voltage is supplied; the third switch is connected between the other end of the coupling capacitance and the common-phase input end; Chopper modulation device.

6. The chopper modulation device according to any one of claims 1 to 5, The common-mode detection amplifier detects a common-mode voltage of the signal input terminal and inputs the common-mode voltage to the common-mode input terminal. Chopper modulation device.

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