Laminated Barista

Abstract

To suppress the occurrence of cross talk.SOLUTION: A laminated varistor 1 comprises: a sintered body 2; and a first inner electrode E1, a second inner electrode E2, a third inner electrode E3, and a fourth inner electrode E4 that are provided inside the sintered body 2. The first inner electrode E1, the second inner electrode E2, the third inner electrode E3, and the fourth inner electrode E4 are arranged in order of the first inner electrode E1, the third inner electrode E3, the fourth inner electrode E4, and the second inner electrode E2 from a first main surface side. The third inner electrode E3 and the fourth inner electrode E4 are electrically connected each other. In view from a third direction, at least one part of the first inner electrode E1 and at least one part of the third inner electrode E3 are overlapped. In a view of the third direction, at least a part of the second inner electrode E2 and at least a part of the fourth inner electrode E4 are overlapped each other.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a multilayer varistor, and more particularly to a multilayer varistor having a plurality of internal electrodes.

Background Art

[0002] [[ID=1十二]]In recent years, miniaturization has been progressing in home appliances and in-vehicle electronic devices, and there is also a demand for miniaturization of varistors, which are components thereof. Further, as the circuits in which varistors are used become higher in frequency, the capacitance of the varistors may affect the performance (surge absorption performance by the varistors). Therefore, there is a demand for varistors having a small capacitance and a small variation therein while ensuring a predetermined varistor voltage. Also, when using varistors in pairs, in order to reduce the difference in capacitance between the pairs, a device in which two varistors are formed in one element has been proposed. Note that, as prior art document information related to the invention of this application, for example, Patent Document 1 is known.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a conventional multilayer varistor, there has been a problem that crosstalk in which a signal leaks from one internal terminal to the other internal terminal easily occurs due to the generation of stray capacitance between the internal electrodes constituting one varistor and the internal electrodes constituting the other varistor.

[0005] In view of the above reasons, the present disclosure is made, and an object thereof is to provide a multilayer varistor capable of suppressing the occurrence of crosstalk.

Means for Solving the Problems

[0006] A multilayer varistor according to one aspect of the present disclosure comprises a sintered body and a first internal electrode, a second internal electrode, a third internal electrode, and a fourth internal electrode provided inside the sintered body. The sintered body has a first end face and a second end face facing each other in a first direction, a first side face and a second side face facing each other in a second direction intersecting the first direction, and a first main surface and a second main surface facing each other in a third direction intersecting the first and second directions. The first internal electrode, the second internal electrode, the third internal electrode, and the fourth internal electrode are arranged in the order of the first internal electrode, the third internal electrode, the fourth internal electrode, and the second internal electrode from the first main surface side. The third internal electrode and the fourth internal electrode are electrically connected. Viewed from the third direction, at least a portion of the first internal electrode and at least a portion of the third internal electrode overlap. Viewed from the third direction, at least a portion of the second internal electrode and at least a portion of the fourth internal electrode overlap. The first internal electrode has a first opposing portion and a first leading portion. The first leading portion is narrower in the second direction than the first opposing portion. The third internal electrode has a third opposing portion and a third leading portion. The third leading portion is narrower in the first direction than the third opposing portion. When viewed from the third direction, the third opposing portion is larger than the first opposing portion. [Effects of the Invention]

[0007] According to this disclosure, there is an advantage in that the occurrence of crosstalk can be suppressed. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a perspective view of a multilayer varistor according to one embodiment of the present disclosure. [Figure 2] Figure 2 is a cross-sectional view of the same multilayer varistor. [Figure 3] Figure 3 is a perspective top view of the same stacked varistor. [Figure 4] Figure 4 is a perspective view from below of the same stacked varistor. [Figure 5] Figure 5 is a perspective top view of the stacked varistor according to Modification 1. [Figure 6] Figure 6 is a perspective view from below of the same stacked varistor. [Figure 7] Figure 7 is a perspective top view of the stacked varistor of Modification 2. [Figure 8]Figure 8 is a cross-sectional view of the stacked varistor of Modification 3. [Figure 9] Figure 9 is a cross-sectional view of the stacked varistor of modified example 4. [Figure 10] Figure 10 is a cross-sectional view of the multilayer varistor of Modification 5. [Figure 11] Figure 11 is a perspective top view of the same multilayer varistor. [Figure 12] Figure 12 is a perspective view of the same stacked varistor from below. [Modes for carrying out the invention]

[0009] A stacked varistor 1 according to an embodiment of this disclosure will be described in detail with reference to the drawings. Note that the embodiments and modifications described below are merely examples of this disclosure, and this disclosure is not limited to these embodiments and modifications. Even other than these embodiments and modifications, various changes are possible depending on the design, etc., as long as they do not depart from the technical idea of ​​this disclosure. Furthermore, the embodiments (including modifications) described below may be implemented in appropriate combinations.

[0010] (1) Overview The following describes the overview of the laminated varistor 1 with reference to Figures 1 to 4. Note that the figures described in the following embodiments are schematic, and the ratios of the size and thickness of each component in each figure do not necessarily reflect the actual dimensional ratios.

[0011] The laminated varistor 1 comprises a sintered body 2 and a first internal electrode E1, a second internal electrode E2, a third internal electrode E3, and a fourth internal electrode E4 provided inside the sintered body 2.

[0012] The sintered body 2 has a first end face S11 and a second end face S12 that face each other in a first direction, a first side surface S21 and a second side surface S22 that face each other in a second direction intersecting the first direction, and a first main surface S31 and a second main surface S32 that face each other in a third direction intersecting the first and second directions.

[0013] The first internal electrode E1, the second internal electrode E2, the third internal electrode E3, and the fourth internal electrode E4 are arranged in the order of the first internal electrode E1, the third internal electrode E3, the fourth internal electrode E4, and the second internal electrode E2 from the side of the first main surface S31.

[0014] The third internal electrode E3 and the fourth internal electrode E4 are electrically connected.

[0015] When viewed from the third direction, at least a part of the first internal electrode E1 and at least a part of the third internal electrode E3 overlap.

[0016] When viewed from the third direction, at least a part of the second internal electrode E2 and at least a part of the fourth internal electrode E4 overlap.

[0017] In the multilayer varistor 1 of this embodiment, a first varistor region A1 is formed between the first internal electrode E1 and the third internal electrode E3, and a second varistor region A2 is formed between the second internal electrode E2 and the fourth internal electrode E4. When a surge voltage is applied between the first internal electrode E1 and the third internal electrode E3 in the first varistor region A1, a surge current flows. Also, in the second varistor region A2, when a surge voltage is applied between the second internal electrode E2 and the fourth internal electrode E4, a surge current flows.

[0018] The multilayer varistor 1 is disposed and used in the vicinity of a communication IC that communicates, for example, by a two-wire differential voltage transmission method. The communication IC is connected to the lands of two signal lines and the land of the ground line. Here, the first internal electrode E1 and the second internal electrode E2 are electrically connected to each of the lands of the two signal lines. Also, the third internal electrode E and the fourth internal electrode E4 are electrically connected to the land of the ground line. placed and used. The communication IC C is connected to the lands of two signal lines and the land of the ground line. Here, the first internal electrode E1 and the second internal electrode E2 are electrically connected to each of the lands of the two signal lines. Also, the third internal electrode E 3 and the fourth internal electrode E4 are electrically connected to the land of the ground line.

[0019] According to the above embodiment, since a gap is provided between the third internal electrode E3 and the fourth internal electrode E4, the distance between the first internal electrode E1 and the second internal electrode E2 can be increased compared to the case where the functions of the third internal electrode E3 and the fourth internal electrode E4 are realized by a single internal electrode. As a result, the stray capacitance between the first internal electrode E1 and the second internal electrode E2 can be reduced, and the occurrence of crosstalk, in which a signal leaks from the first internal electrode E1 constituting the first varistor region A1 to the second internal electrode E2 constituting the second varistor region A2, can be suppressed.

[0020] (2) Details The stacked varistor 1 of this embodiment will be described in detail below with reference to Figures 1 to 4.

[0021] Figure 1 is a perspective view of the laminated varistor 1, Figure 2 is a cross-sectional view of the laminated varistor 1, Figure 3 is a perspective top view of the laminated varistor 1, and Figure 4 is a perspective bottom view of the laminated varistor 1.

[0022] As described above, the multilayer varistor 1 comprises a sintered body 2 and, for example, four internal electrodes (first internal electrode E1, second internal electrode E2, third internal electrode E3, and fourth internal electrode E4) provided inside the sintered body 2. Note that the number of internal electrodes is not limited to four and can be changed as appropriate. Furthermore, the multilayer varistor 1 comprises a first external electrode G1, a second external electrode G2, and a third external electrode G3 provided on the surface of the sintered body 2. The first internal electrode E1 is electrically connected to the first external electrode G1. The second internal electrode E2 is electrically connected to the second external electrode G2. The third internal electrode E3 and the fourth internal electrode E4 are electrically connected to the third external electrode G3. In other words, the third internal electrode E3 and the fourth internal electrode E4 are electrically connected via the third external electrode G3.

[0023] The sintered body 2 is formed in the shape of a rectangular parallelepiped, for example, with a length of 1.6 mm, a width of 0.8 mm, and a height of 0.8 mm. In Figure 1 and other figures, the outer shape of the sintered body 2 is shown as a rectangular parallelepiped, but the corners of the sintered body 2 may be chamfered as appropriate, and the corners of the sintered body 2 may be rounded.

[0024] In the following explanation, the long side direction (left-right direction) of the sintered body 2 is defined as the "X-axis direction," the depth direction (front-back direction) of the sintered body 2 is defined as the "Y-axis direction," and the thickness direction (up-down direction) of the sintered body 2 is defined as the "Z-axis direction." The X, Y, and Z axes that define these directions are orthogonal to each other. Furthermore, the positive direction of the X-axis is defined as the right side, the positive direction of the Y-axis as the front side, and the positive direction of the Z-axis as the top side. However, these directions are merely examples and are not intended to limit the direction in which the multilayer varistor 1 can be used. Also, the arrows indicating the "X-axis direction," "Y-axis direction," and "Z-axis direction" in the drawings are for illustrative purposes only and do not represent actual directions.

[0025] As shown in Figures 2 to 4, the sintered body 2 has a first end face S11 and a second end face S12 facing each other in the X-axis direction, a first side face S21 and a second side face S22 facing each other in the Y-axis direction, and a first main surface S31 and a second main surface S32 facing each other in the Z-axis direction. In other words, the X-axis direction corresponds to the "first direction" in which the first end face S11 and the second end face S12 face each other. The Y-axis direction corresponds to the "second direction" in which the first side face S21 and the second side face S22 face each other. The Z-axis direction corresponds to the "third direction" in which the first main surface S31 and the second main surface S32 face each other.

[0026] The sintered body 2 is composed of semiconductor ceramic components having nonlinear resistance characteristics. This sintered body 2 may, for example, have ZnO as its main component and may contain at least one of Bi2O3, Co2O3, MnO2, and Sb2O3 as a secondary component, and Pr6O 11 It may also contain at least one of Co2O3, CaCO3, and Cr2O3. The sintered body 2 is formed by sintering ZnO and precipitating other by-components at its grain boundaries. The grain boundary barriers formed between the ZnO particles result in nonlinear resistance characteristics. The sintered body 2 is formed, for example, by stacking five layers LY1 to LY5 (see Figure 2), mainly composed of ZnO, in a third direction and then sintering them. The surface of the sintered body 2 may be covered with a high-resistance layer having greater resistance than the sintered body 2.

[0027] The first external electrode G1, the second external electrode G2, and the third external electrode G3 are provided on the surface of the sintered body 2. As shown in Figure 1, the multilayer varistor 1 of this embodiment is equipped with two third external electrodes G3 (third external electrodes G31 and G32). In other words, the multilayer varistor 1 of this embodiment is a so-called four-terminal type multilayer varistor. Note that the number of third external electrodes G3 is not limited to two; there may be one or three or more.

[0028] The first external electrode G1, the second external electrode G2, and the third external electrodes G31, G32 are formed from a metal such as silver, copper, platinum, or an alloy thereof. Alternatively, the first external electrode G1, the second external electrode G2, and the third external electrodes G31, G32 may consist of a primary electrode formed from a metal such as silver, copper, platinum, or an alloy thereof, and a secondary electrode consisting of a plating layer of nickel or tin formed on the surface of the primary electrode.

[0029] The first external electrode G1 and the second external electrode G2 are formed, for example, by dipping the first end face S11 and the second end face S12 of the sintered body 2 with conductive paste.

[0030] The first external electrode G1 is provided on the entire surface of the first end face S11 and on the left end of each of the first side surface S21, the second side surface S22, the first main surface S31, and the second main surface S32.

[0031] The second external electrode G2 is provided on the entire surface of the second end face S12 and on the right end of each of the first side surface S21, the second side surface S22, the first main surface S31, and the second main surface S32.

[0032] The third external electrodes G31 and G32 are formed, for example, by roller-transferring a conductive paste onto the surface of the sintered body 2.

[0033] The third external electrode G31 is provided at the center of the first side surface S21, at the center of the rear end of the first main surface S31, and at the center of the rear end of the second main surface S32.

[0034] The third external electrode G32 is provided at the center of the second side surface S22, the center of the front end of the first main surface S31, and the center of the front end of the second main surface S32.

[0035] The first internal electrode E1, the second internal electrode E2, the third internal electrode E3, and the fourth internal electrode E4 are provided inside the sintered body 2.

[0036] As described above, the sintered body 2 has five layers LY1 to LY5 (see Figure 2) stacked in the third direction. As shown in Figure 2, the layers LY1 to LY5 are stacked in the order of LY1, LY2, LY3, LY4, and LY5 from top to bottom.

[0037] The first internal electrode E1 is provided, for example, on the upper surface of layer LY2 (hereinafter also referred to as the first laminated surface SF1). The second internal electrode E2 is provided, for example, on the upper surface of layer LY5 (hereinafter also referred to as the second laminated surface SF2). The third internal electrode E3 is provided, for example, on the upper surface of layer LY3 (hereinafter also referred to as the third laminated surface SF3). The fourth internal electrode E4 is provided, for example, on the upper surface of layer LY4 (hereinafter also referred to as the fourth laminated surface SF4). As a result, in the third direction (vertical direction), the first internal electrode E1, the second internal electrode E2, the third internal electrode E3, and the fourth internal electrode E4 are arranged in the order of first internal electrode E1, third internal electrode E3, fourth internal electrode E4, and second internal electrode E2 from the first main surface S31 side, with each being separated from the others. In detail, as shown in Figure 2, the third internal electrode E3 and the fourth internal electrode E4 are arranged along the third direction separated by a first distance D1. The first internal electrode E1 and the third internal electrode E3 are positioned along the third direction, separated by a second distance D2. The second internal electrode E2 and the fourth internal electrode E4 are positioned along the third direction, separated by a third distance D3.

[0038] In this embodiment, it is preferable that the first distance D1 is at least 0.5 times the second distance D2 and the third distance D3, respectively. In this embodiment, the first distance D1 is longer than each of the second distance D2 and the third distance D3. It is even more preferable that the first distance D1 is at least 1.2 times the second distance D2 and the third distance D3, respectively.

[0039] As a result, the distance between the first internal electrode E1 and the second internal electrode E2 becomes longer than the distance between the second and third internal electrodes D2 and D3, which reduces the stray capacitance between the first and second internal electrodes E1 and suppresses the occurrence of crosstalk.

[0040] The first internal electrode E1 is positioned at a distance of a fourth distance D4 along the third direction from the first main surface S31. The fourth distance D4 is longer than the second distance D2.

[0041] As a result, the distance between the first internal electrode E1 and a portion of the second external electrode G2 provided at the right end of the first main surface S31 becomes sufficiently longer compared to the second distance D2. Here, as described above, the second external electrode G2 is electrically connected to the second internal electrode E2. Therefore, the stray capacitance between the first internal electrode E1 and the second internal electrode E2 can be reduced, and the occurrence of crosstalk can be suppressed.

[0042] Furthermore, the second internal electrode E2 is positioned at a distance of a fifth distance D5 along the third direction from the second main surface S32. The fifth distance D5 is longer than the third distance D3.

[0043] As a result, the distance between the second internal electrode E2 and a portion of the first external electrode G1 located at the left end of the second main surface S32 becomes sufficiently longer compared to the third distance D3. Here, as described above, the first external electrode G1 is electrically connected to the first internal electrode E1. Therefore, the stray capacitance between the first internal electrode E1 and the second internal electrode E2 can be reduced, and the occurrence of crosstalk can be suppressed.

[0044] As shown in Figures 3 and 4, the first internal electrode E1 has a first opposing portion F1 and a first leading portion B1. The first leading portion B1 is narrower in the second direction than the first opposing portion F1 and protrudes to the left from the first opposing portion F1 along the first direction. The left end of the first leading portion B1 is electrically connected to the first external electrode G1.

[0045] The second internal electrode E2 has a second opposing portion F2 and a second leading portion B2. The second leading portion B2 is narrower in the second direction than the second opposing portion F2 and protrudes to the right from the second opposing portion F2 along the first direction. The right end of the second leading portion B2 is electrically connected to the second external electrode G2.

[0046] The width of the first opposing portion F1 in the second direction is formed to be equal to, for example, the width of the second opposing portion F2 in the second direction. Also, the width of the first opposing portion F1 in the first direction is formed to be equal to, for example, the width of the second opposing portion F2 in the first direction.

[0047] The third internal electrode E3 has a third opposing portion F3 and, for example, two third lead portions B3. The two third lead portions B3 are narrower in the first direction than the third opposing portion F3 and each protrudes from the third opposing portion F3 in the front-rear direction along the second direction. The third lead portion B3 protruding to the rear is electrically connected to the third external electrode G31, and the third lead portion B3 protruding to the front is electrically connected to the third external electrode G32.

[0048] The fourth internal electrode E4 has a fourth opposing portion F4 and two fourth extension portions B4. The two fourth extension portions B4 are narrower in the first direction than the fourth opposing portion F4 and each protrudes from the fourth opposing portion F4 in the front-rear direction, for example, along the second direction. The fourth extension portion B4 protruding to the rear is electrically connected to the third external electrode G31, and the fourth extension portion B4 protruding to the front is electrically connected to the third external electrode G32. Therefore, the third internal electrode E3 and the fourth internal electrode E4 are electrically connected via the third external electrodes G31 and G32.

[0049] As shown in Figure 3, the first internal electrode E1 and the third internal electrode E3 are arranged such that, when viewed from above, at least a portion of the first internal electrode E1 and at least a portion of the third internal electrode E3 overlap. Specifically, when viewed from above, the third opposing portion F3 of the third internal electrode E3 is larger than the first opposing portion F1 of the first internal electrode E1, and the third opposing portion F3 includes the first opposing portion F1 and a portion of the first lead portion B1. As a result, the first varistor region A1 is formed between the first opposing portion F1 and a portion of the first lead portion B1 and the third opposing portion F3. The first capacitance of the first varistor region A1 is preferably 200 pF or less.

[0050] Furthermore, as shown in Figure 4, the second internal electrode E2 and the fourth internal electrode E4 are arranged such that, when viewed from below, at least a portion of the second internal electrode E2 and at least a portion of the fourth internal electrode E4 overlap. Specifically, when viewed from below, the fourth opposing portion F4 of the fourth internal electrode E4 is larger than the second opposing portion F2 of the second internal electrode E2, and the fourth opposing portion F4 includes the second opposing portion F2 and a portion of the second extraction portion B2. As a result, the second varistor region A2 is formed between the second opposing portion F2 and a portion of the second extraction portion B2 and the fourth opposing portion F4. The second capacitance of the second varistor region A2 is preferably 200 pF or less. Also, the difference between the first capacitance and the second capacitance is preferably 20% or less of the first capacitance. This reduces the influence of the difference between the first capacitance and the second capacitance on the surge absorption characteristics of the multilayer varistor 1.

[0051] Furthermore, the third internal electrode E3 and the fourth internal electrode E4 are arranged such that, when viewed from the third direction, at least a portion of the third internal electrode E3 and at least a portion of the fourth internal electrode E4 overlap. Specifically, the third internal electrode E3 and the fourth internal electrode E4 are formed to have the same shape when viewed from the third direction, and the third internal electrode E3 and the fourth internal electrode E4 overlap in their entire respective regions when viewed from the third direction.

[0052] Therefore, in this embodiment, the first internal electrode E1, the second internal electrode E2, the third internal electrode E3, and the fourth internal electrode E4 are arranged such that, when viewed from a third direction, at least a portion of the first internal electrode E1, at least a portion of the second internal electrode E2, at least a portion of the third internal electrode E3, and at least a portion of the fourth internal electrode E4 overlap.

[0053] As a result, at least a portion of the third internal electrode E3 and at least a portion of the fourth internal electrode E4 shield at least a portion of the first internal electrode E1 from at least a portion of the second internal electrode E2, thereby suppressing the occurrence of crosstalk. Furthermore, this allows for miniaturization of the multilayer varistor 1.

[0054] (3) Variant Modifications of the above embodiment will be described below. However, components common to the above embodiment will be given the same reference numerals, and their descriptions will be omitted as appropriate. Furthermore, each of the modifications described below can be applied in appropriate combination with each of the components described in the above embodiment.

[0055] (3.1) Variation 1 In the multilayer varistor 1A of the modified example 1, as shown in Figures 5 and 6, the first internal electrode E1 and the second internal electrode E2 are arranged so as not to overlap when viewed from the third direction. In detail, Lamination In varistor 1A, the first internal electrode E1 and the second internal electrode E2 are arranged so that they are aligned in the front-to-back direction when viewed from the third direction.

[0056] In the stacked varistor 1A, for example, the third opposing portion F3 of the third internal electrode E3 and the fourth opposing portion F4 of the fourth internal electrode E4 are arranged side by side in the front-to-back direction when viewed from the third direction. In other words, the third opposing portion F3 of the third internal electrode E3 and the fourth opposing portion F4 of the fourth internal electrode E4 are positioned so as not to overlap when viewed from the third direction. Here, the third opposing portion F3 is larger than the first opposing portion F1, as in the above embodiment, and the third opposing portion F3 includes the first opposing portion F1 and a part of the first lead portion B1. Also, when viewed from below, the fourth opposing portion F4 is larger than the second opposing portion F2, as in the above embodiment, and the fourth opposing portion F4 includes the second opposing portion F2 and a part of the second lead portion B2.

[0057] As a result, the distance between the first internal electrode E1 and the second internal electrode E2 can be made longer compared to the above embodiment, thereby reducing the stray capacitance between the first internal electrode E1 and the second internal electrode E2 and suppressing the occurrence of crosstalk.

[0058] The first internal electrode E1 and the second internal electrode E2 may be arranged so as to be aligned left to right when viewed from the third direction.

[0059] (3.2) Variation 2 In the modified example 2, the stacked varistor 1B is configured such that the width of the first lead portion B1 in the second direction is equal to the width of the first opposing portion F1 in the second direction, as shown in Figure 7. Furthermore, the width of the second lead portion B2 in the second direction is equal to the width of the second opposing portion F2 in the second direction.

[0060] This improves the connection stability between the first lead-out section B1 and the first external electrode G1, and between the second lead-out section B2 and the second external electrode G2.

[0061] (3.3) Modification example 3 As shown in Figure 8, the laminated varistor 1C of the modified example 3 includes a first internal electrode E1, a second internal electrode E2, a third internal electrode E3, and a fourth internal electrode E4 inside the sintered body 2. The laminated varistor 1C further includes a fifth internal electrode E5 and a sixth internal electrode E6.

[0062] The fifth internal electrode E5 is positioned between the first internal electrode E1 and the first main surface S31.

[0063] The fifth internal electrode E5 is electrically connected to the third internal electrode E3. Specifically, the fifth internal electrode E5 is electrically connected to the third external electrode G3. In other words, the fifth internal electrode E5 is electrically connected to the third internal electrode E3 via the third external electrode G3.

[0064] The sixth internal electrode E6 is positioned between the second internal electrode E2 and the second main surface S32.

[0065] The sixth internal electrode E6 is electrically connected to the fourth internal electrode E4. Specifically, the sixth internal electrode E6 is electrically connected to the third external electrode G3. In other words, the sixth internal electrode E6 is electrically connected to the fourth internal electrode E4 via the third external electrode G3.

[0066] The fifth internal electrode E5 is formed, for example, to cover the first opposing portion F1 of the first internal electrode E1. This allows the fifth internal electrode E5 to shield the first opposing portion F1 from the second external electrode G2 provided at the right end of the first main surface S31, thereby suppressing the occurrence of crosstalk. Furthermore, since a varistor region is also formed between the first opposing portion F1 and the fifth internal electrode E5, the surge current withstand capability of the multilayer varistor 1C can be increased.

[0067] The sixth internal electrode E6 is formed, for example, to cover the second opposing portion F2 of the second internal electrode E2. This allows the sixth internal electrode E6 to shield the second opposing portion F2 from the first external electrode G1 provided at the left end of the second main surface S32, thereby suppressing the occurrence of crosstalk. Furthermore, since a varistor region is also formed between the second opposing portion F2 and the sixth internal electrode E6, the surge current withstand capability of the multilayer varistor 1C can be increased.

[0068] (3.4) Modification 4 As shown in Figure 9, the laminated varistor 1D of the modified example 4 includes, for example, two first internal electrodes E1 (E11, E12), for example, two second internal electrodes E2 (E21, E22), for example, three third internal electrodes E3 (E31, E32, E33), and for example, three fourth internal electrodes E4 (E41, E42, E43) inside the sintered body 2.

[0069] These internal electrodes are arranged in the following order from the first main surface S31 side: third internal electrode E31, first internal electrode E11, third internal electrode E32, first internal electrode E12, third internal electrode E33, fourth internal electrode E41, second internal electrode E21, fourth internal electrode E42, second internal electrode E22, and fourth internal electrode E43.

[0070] The first internal electrodes E11 and E12 are electrically connected to the first external electrode G1.

[0071] The second internal electrodes E21 and E22 are electrically connected to the second external electrode G2.

[0072] The third internal electrodes E31, E32, and E33 are electrically connected to the third external electrode G3.

[0073] The fourth internal electrodes E41, E42, and E43 are electrically connected to the third external electrode G3.

[0074] The third internal electrode E31 is formed, for example, to cover the first opposing portion F11 of the first internal electrode E11. This allows the third internal electrode E31 to shield the first opposing portion F11 from the second external electrode G2 provided at the right end of the first main surface S31, thereby suppressing the occurrence of crosstalk. Furthermore, since a varistor region is also formed between the first opposing portion F11 and the third internal electrode E31, the surge current withstand capability of the multilayer varistor 1D can be increased.

[0075] The fourth internal electrode E43 is formed to cover, for example, the second opposing portion F22 of the second internal electrode E22. This allows the fourth internal electrode E43 to shield the second opposing portion F22 from the first external electrode G1 provided at the left end of the second main surface S32, thereby suppressing the occurrence of crosstalk. Furthermore, a varistor region is formed between the second opposing portion F22 and the fourth internal electrode E43, which increases the surge current withstand capability of the multilayer varistor 1D.

[0076] (3.5) Modification 5 The multilayer varistor 1E of Modification 5 is a so-called 8-terminal multilayer varistor, as shown in Figures 10 to 12.

[0077] In the stacked varistor 1E, the first external electrode G1E (G11E) and the second external electrode G2E (G21E) are arranged in the first direction in the center of the first side surface S21. Also on the first side surface S21, the third external electrode G3E (G31E) is provided to the left of the first external electrode G11E, and the third external electrode G3E (G32E) is provided to the right of the second external electrode G21E. In other words, in the first direction, the third external electrode G31E, the first external electrode G11E, the second external electrode G21E, and the third external electrode G32E are arranged in this order.

[0078] Similarly, the first external electrode G1E (G12E) and the second external electrode G2E (G22E) are arranged side by side in the first direction in the center of the second side surface S22. Also, on the second side surface S22, the third external electrode G3E (G33E) is provided to the left of the first external electrode G12E, and the third external electrode G3E (G34E) is provided to the right of the second external electrode G22E. In other words, in the first direction, the third external electrode G33E, the first external electrode G12E, the second external electrode G22E, and the third external electrode G34E are arranged in this order.

[0079] In the laminated varistor 1E, as shown in Figure 10, the first internal electrode E1E, the third internal electrode E3E, the fourth internal electrode E4E, and the second internal electrode E2E are arranged inside the sintered body 2 in this order, separated from each other, starting from the first main surface S31 side. The third internal electrode E3E and the fourth internal electrode E4E are separated by a first distance D1E along the third direction. The first internal electrode E1E and the third internal electrode E3E are separated by a second distance D2E along the third direction. The second internal electrode E2E and the fourth internal electrode E4E are separated by a third distance D3E along the third direction. The first distance D1E is longer than both the second distance D2E and the third distance D3E.

[0080] The first internal electrode E1E is positioned at a distance of a fourth distance D4E along the third direction from the first main surface S31. The fourth distance D4E is longer than the second distance D2E.

[0081] Furthermore, the second internal electrode E2E is positioned at a distance of a fifth distance D5E along the third direction from the second main surface S32. The fifth distance D5E is longer than the third distance D3E.

[0082] The first internal electrode E1E has a first opposing portion F1E and two first lead portions B1E. In the first direction, the first lead portions B1E are narrower than the first opposing portion F1E. The two first lead portions B1E protrude forward and backward from the first opposing portion F1E, respectively. The first lead portion B1E protruding to the rear is electrically connected to the first external electrode G11E, and the first lead portion B1E protruding to the front is electrically connected to the first external electrode G12E.

[0083] The second internal electrode E2E has a second opposing portion F2E and two second lead portions B2E. In the first direction, the second lead portions B2E are narrower than the second opposing portion F2E. The two second lead portions B2E protrude forward and backward from the second opposing portion F2E, respectively. The second lead portion B2E protruding backward is electrically connected to the second external electrode G21E, and the second lead portion B2E protruding forward is electrically connected to the second external electrode G22E.

[0084] The third internal electrode E3E includes a third opposing portion F3E, a first connecting portion J31, a first protruding portion T31, a second connecting portion J32, and a second protruding portion T32.

[0085] The first connecting portion J31 connects the third external electrode G31E and the third external electrode G33E. The first protruding portion T31 is narrower than the third opposing portion F3E in the second direction and protrudes to the left from the third opposing portion F3E, connecting to the first connecting portion J31.

[0086] The second connecting portion J32 connects the third external electrode G32E and the third external electrode G34E. The second protruding portion T32 is narrower than the third opposing portion F3E in the second direction and protrudes to the right from the third opposing portion F3E, connecting to the second connecting portion J32.

[0087] The fourth internal electrode E4E has a fourth opposing portion F4E, a first connecting portion J41, a first protruding portion T41, a second connecting portion J42, and a second protruding portion T42.

[0088] The first connecting portion J41 connects the third external electrode G31E and the third external electrode G33E. The first protruding portion T41 is narrower than the fourth opposing portion F4E in the second direction and protrudes to the left from the fourth opposing portion F4E and connects to the first connecting portion J41.

[0089] The second connecting portion J42 connects the third external electrode G32E and the third external electrode G34E. The second protruding portion T42 is narrower than the fourth opposing portion F4E in the second direction and protrudes to the right from the fourth opposing portion F4E, connecting to the second connecting portion J42.

[0090] As shown in Figure 11, when viewed from above, the third opposing portion F3E is larger than the first opposing portion F1E, and the third opposing portion F3E includes the first opposing portion F1E and a part of the first extension portion B1E.

[0091] Furthermore, as shown in Figure 12, when viewed from below, the fourth opposing section F4E is larger than the second opposing section F2E, and the fourth opposing section F4E includes the second opposing section F2E and a portion of the second extension section B2E.

[0092] The third internal electrode E3E and the fourth internal electrode E4E are formed to have the same shape when viewed from, for example, a third direction, and the third internal electrode E3E and the fourth internal electrode E4E overlap in their respective entire regions when viewed from a third direction.

[0093] As a result, at least a portion of the third internal electrode E3E and at least a portion of the fourth internal electrode E4E shield at least a portion of the first internal electrode E1E from at least a portion of the second internal electrode E2E, thereby suppressing the occurrence of crosstalk, which is the leakage of signals from the first internal electrode E1E to the second internal electrode E2E.

[0094] (4) Summary As described above, the laminated varistor (1) according to the first embodiment comprises a sintered body (2) and a first internal electrode (E1), a second internal electrode (E2), a third internal electrode (E3), and a fourth internal electrode (E4) provided inside the sintered body (2). The sintered body (2) has a first end face (S11) and a second end face (S12) that face each other in a first direction, a first side surface (S21) and a second side surface (S22) that face each other in a second direction intersecting the first direction, and a first main surface (S31) and a second main surface (S32) that face each other in a third direction intersecting the first and second directions. The first internal electrode (E1), second internal electrode (E2), third internal electrode (E3), and fourth internal electrode (E4) are arranged in the order of first internal electrode (E1), third internal electrode (E3), fourth internal electrode (E4), and second internal electrode (E2) from the first main surface (S31) side. The third internal electrode (E3) and the fourth internal electrode (E4) are electrically connected. When viewed from a third direction, at least a portion of the first internal electrode (E1) and at least a portion of the third internal electrode (E3) overlap. When viewed from a third direction, at least a portion of the second internal electrode (E2) and at least a portion of the fourth internal electrode (E4) overlap.

[0095] According to this embodiment, the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk, where a signal leaks from the first internal electrode (E1) to the second internal electrode (E2), can be suppressed.

[0096] In the stacked varistor (1) according to the second embodiment, as in the first embodiment, when viewed from the third direction, at least a portion of the third internal electrode (E3) and at least a portion of the fourth internal electrode (E4) overlap.

[0097] According to this embodiment, at least a portion of the third internal electrode (E3) and at least a portion of the fourth internal electrode (E4) shield at least a portion of the first internal electrode (E1) from at least a portion of the second internal electrode (E2), thereby suppressing the occurrence of crosstalk.

[0098] In the stacked varistor (1) according to the third embodiment, as in the first embodiment, when viewed from a third direction, at least a portion of the first internal electrode (E1), at least a portion of the second internal electrode (E2), at least a portion of the third internal electrode (E3), and at least a portion of the fourth internal electrode (E4) overlap.

[0099] According to this embodiment, at least a portion of the third internal electrode (E3) and at least a portion of the fourth internal electrode (E4) shield at least a portion of the first internal electrode (E1) from at least a portion of the second internal electrode (E2), thereby suppressing the occurrence of crosstalk. Furthermore, according to this embodiment, the multilayer varistor (1) can be miniaturized.

[0100] In the stacked varistor (1) according to the fourth embodiment, in any of the first to third embodiments, the first distance (D1) between the third internal electrode (E3) and the fourth internal electrode (E4) along the third direction is longer than the second distance (D2) between the first internal electrode (E1) and the third internal electrode (E3) along the third direction, and the third distance (D3) between the second internal electrode (E2) and the fourth internal electrode (E4) along the third direction.

[0101] According to this embodiment, the distance between the first internal electrode (E1) and the second internal electrode (E2) is longer than the distance between the second (D2) and the third (D3), so that the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk can be suppressed.

[0102] In the stacked varistor (1) according to the fifth embodiment, in any of the first to third embodiments, the first distance (D1) between the third internal electrode (E3) and the fourth internal electrode (E4) along the third direction is 0.5 times or more the second distance (D2) between the first internal electrode (E1) and the third internal electrode (E3) along the third direction, and the third distance (D3) between the second internal electrode (E2) and the fourth internal electrode (E4) along the third direction.

[0103] According to this embodiment, the distance between the first internal electrode (E1) and the second internal electrode (E2) is longer than the distance between the second (D2) and the third (D3), so that the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk can be suppressed.

[0104] In the stacked varistor (1) according to the sixth embodiment, in any of the first to third embodiments, the first distance (D1) between the third internal electrode (E3) and the fourth internal electrode (E4) along the third direction is 1.2 times or more the second distance (D2) between the first internal electrode (E1) and the third internal electrode (E3) along the third direction, and the third distance (D3) between the second internal electrode (E2) and the fourth internal electrode (E4) along the third direction.

[0105] According to this embodiment, the distance between the first internal electrode (E1) and the second internal electrode (E2) is longer than the distance between the second (D2) and the third (D3), so that the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk can be suppressed.

[0106] In the stacked varistor (1) according to the seventh embodiment, in any of the first to sixth embodiments, the fourth distance (D4) between the first main surface (S31) along the third direction and the first internal electrode (E1) is longer than the second distance (D2) between the first internal electrode (E1) and the third internal electrode (E3) along the third direction. The fifth distance (D5) between the second main surface (S32) along the third direction and the second internal electrode (E2) is longer than the third distance (D3) between the second internal electrode (E2) and the fourth internal electrode (E4) along the third direction.

[0107] According to this embodiment, the distance between the first internal electrode (E1) and a portion of the second external electrode (G2) provided at the right end of the first main surface (S31) is sufficiently longer than the second distance (D2), so that the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk can be suppressed. Also, the distance between the second internal electrode (E2) and a portion of the first external electrode (G1) provided at the left end of the second main surface (S32) is sufficiently longer than the third distance (D3), so that the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk can be suppressed.

[0108] In the eighth embodiment of the multilayer varistor (1), in any of the first to seventh embodiments, a fifth internal electrode (E5) and a sixth internal electrode (E6) are further provided. The fifth internal electrode (E5) is positioned between the first internal electrode (E1) and the first main surface (S31). The sixth internal electrode (E6) is positioned between the second internal electrode (E2) and the second main surface (S32). The fifth internal electrode (E5) is electrically connected to the third internal electrode (E3). The sixth internal electrode (E6) is electrically connected to the fourth internal electrode (E4).

[0109] In this embodiment, the fifth internal electrode (E5) can suppress the occurrence of crosstalk by shielding at least a portion of the first internal electrode (E1) from the second external electrode (G2) provided at the right end of the first main surface (S31). Furthermore, the sixth internal electrode (E6) can suppress the occurrence of crosstalk by shielding at least a portion of the second internal electrode (E2) from the first external electrode (G1) provided at the left end of the second main surface (S32).

[0110] The multilayer varistor (1) according to the ninth embodiment further comprises, in any of the first to eighth embodiments, a first external electrode (G1), a second external electrode (G2), and a third external electrode (G3) provided on the surface of a sintered body (2). The first internal electrode (E1) is electrically connected to the first external electrode (G1). The second internal electrode (E2) is electrically connected to the second external electrode (G2). The third internal electrode (E3) and the fourth internal electrode (E4) are electrically connected to the third external electrode (G3).

[0111] According to this embodiment, the stray capacitance between the first internal electrode (E1) and the second internal electrode (E2) can be reduced, and the occurrence of crosstalk, where a signal leaks from the first internal electrode (E1) to the second internal electrode (E2), can be suppressed.

[0112] In the multilayer varistor (1) according to the tenth embodiment, in any of the first to ninth embodiments, the first capacitance between the first internal electrode (E1) and the third internal electrode (E3), and the second capacitance between the second internal electrode (E2) and the fourth internal electrode (E4), are each 200 pF or less. The difference between the first capacitance and the second capacitance is 20% or less of the first capacitance.

[0113] According to this embodiment, the influence of the difference between the first capacitance and the second capacitance on the surge absorption characteristics of the multilayer varistor (1) can be reduced.

[0114] Furthermore, the second to tenth embodiments are not essential configurations for the stacked varistor (1) and can be omitted as appropriate. [Explanation of symbols]

[0115] 1. Stacked varistor 2 Sintered body D1 1st distance D2 2nd distance D3 3rd distance D4 4th distance D5 5th distance E1 1st internal electrode E2 2nd internal electrode E3 3rd internal electrode E4 Fourth Internal Electrode E5 Fifth Internal Electrode E6 6th Internal Electrode G1 First External Electrode G2 Second External Electrode G3 Third External Electrode S11 First end face S12 Second end face S21 First Side S22 Second Side S31 1st main surface S32 2nd main surface

Claims

1. A sintered body having a first end face and a second end face that face each other in a first direction, a first side surface and a second side surface that face each other in a second direction intersecting the first direction, and a first main surface and a second main surface that face each other in a third direction intersecting the first and second directions, The sintered body comprises a first internal electrode, a second internal electrode, a third internal electrode, and a fourth internal electrode, The first internal electrode, the second internal electrode, the third internal electrode, and the fourth internal electrode are arranged in the order of the first internal electrode, the third internal electrode, the fourth internal electrode, and the second internal electrode from the first main surface side. The third internal electrode and the fourth internal electrode are electrically connected. When viewed from the third direction, at least a portion of the first internal electrode and at least a portion of the third internal electrode overlap. When viewed from the third direction, at least a portion of the second internal electrode and at least a portion of the fourth internal electrode overlap. The first internal electrode has a first opposing portion and a first extraction portion, The first pull-out portion has a narrower width in the second direction than the first opposing portion. The third internal electrode has a third opposing portion and a third extraction portion, The third pull-out portion has a narrower width in the first direction than the third opposing portion. Viewed from the third direction, the third opposing portion is larger than the first opposing portion. Stacked varistor.

2. When viewed from the third direction, at least a portion of the third internal electrode and at least a portion of the fourth internal electrode overlap. The multilayer varistor according to claim 1.

3. When viewed from the third direction, at least a portion of the first internal electrode, at least a portion of the second internal electrode, at least a portion of the third internal electrode, and at least a portion of the fourth internal electrode overlap. The multilayer varistor according to claim 1.

4. The first distance between the third internal electrode and the fourth internal electrode along the third direction is longer than the second distance between the first internal electrode and the third internal electrode along the third direction, and longer than the third distance between the second internal electrode and the fourth internal electrode along the third direction. A multilayer varistor according to any one of claims 1 to 3.

5. The first distance between the third internal electrode and the fourth internal electrode along the third direction is at least 0.5 times the second distance between the first internal electrode and the third internal electrode along the third direction, and the third distance between the second internal electrode and the fourth internal electrode along the third direction. A multilayer varistor according to any one of claims 1 to 3.

6. The first distance between the third internal electrode and the fourth internal electrode along the third direction is at least 1.2 times the second distance between the first internal electrode and the third internal electrode along the third direction, and the third distance between the second internal electrode and the fourth internal electrode along the third direction. A multilayer varistor according to any one of claims 1 to 3.

7. The fourth distance between the first main surface and the first internal electrode along the third direction is longer than the second distance between the first internal electrode and the third internal electrode along the third direction. The fifth distance between the second main surface and the second internal electrode along the third direction is longer than the third distance between the second internal electrode and the fourth internal electrode along the third direction. A multilayer varistor according to any one of claims 1 to 6.

8. A fifth internal electrode is disposed between the first internal electrode and the first main surface, The present invention further comprises a sixth internal electrode disposed between the second internal electrode and the second main surface, The fifth internal electrode is electrically connected to the third internal electrode, The sixth internal electrode is electrically connected to the fourth internal electrode. A multilayer varistor according to any one of claims 1 to 7.

9. The sintered body further comprises a first external electrode, a second external electrode, and a third external electrode provided on its surface, The first internal electrode is electrically connected to the first external electrode, The second internal electrode is electrically connected to the second external electrode, The third internal electrode and the fourth internal electrode are electrically connected to the third external electrode. A multilayer varistor according to any one of claims 1 to 8.

10. The first capacitance between the first internal electrode and the third internal electrode, and the second capacitance between the second internal electrode and the fourth internal electrode, are each 200 pF or less. The difference between the first capacitance and the second capacitance is 20% or less of the first capacitance. A multilayer varistor according to any one of claims 1 to 9.

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