Low-power and real-time mixed-precision 3d-human mesh generation accelerator

The mixed precision accelerator addresses real-time 3D mesh generation challenges by using low-precision inner product and high-precision SIMD engines with data interpolation, achieving efficient and low-power 3D mesh generation on edge devices.

KR102990613B1Active Publication Date: 2026-07-15KOREA ADVANCED INST OF SCI & TECH

Patent Information

Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
KOREA ADVANCED INST OF SCI & TECH
Filing Date
2024-05-07
Publication Date
2026-07-15

AI Technical Summary

Technical Problem

Existing algorithms for generating 3D human meshes using Skinned Multi-Person Linear (SMPL) models face challenges in real-time execution on edge devices due to high latency and power consumption, limiting their application in Augmented Reality (AR) and eXtended Reality (XR).

Method used

A mixed precision accelerator comprising low-precision inner product engines and high-precision SIMD engines, with global memory for result reuse, efficiently processes SMPL algorithms by quantizing weights and utilizing data interpolation methods to reduce power consumption and latency.

Benefits of technology

Enables real-time 3D human mesh generation with low power consumption on edge devices, reducing latency and data movement through mixed precision processing and data interpolation.

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Abstract

A low-power and real-time mixed-precision accelerator structure for 3D-human mesh generation is provided. A mixed-precision accelerator according to one embodiment may include an arithmetic unit comprising a plurality of mixed-precision cores, and a global memory that stores the result of a forward calculation of the arithmetic unit and reuses the stored result for a reverse calculation of the arithmetic unit. Here, each of the plurality of mixed-precision cores may include a low-precision inner product engine that quantizes a first-bit floating-point weight used in a Skinned Multi-Person Linear Model (SMPL) algorithm for 3D-human mesh generation into a second-bit low-precision floating-point weight and performs a matrix multiplication operation using the quantized weight and an input value, and a high-precision SIMD (Single Instruction Multiple Data) engine that processes a high-precision operation using a third-bit high-precision floating-point. Here, the second bit may be smaller than the first bit, and the third bit may be smaller than the first bit and larger than the second bit.
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Description

Technology Field

[0001] Embodiments of the present invention relate to a low-power and real-time mixed-precision accelerator structure for 3D-human mesh generation. Background Technology

[0002] Recently, Skinned Multi-Person Linear Model (SMPL) models have been widely utilized for generating 3D human meshes that accurately reproduce the body's external appearance based on human posture and joint information. This model allows users to freely adjust gender and body type to generate meshes, and contributes to solving the problem where existing algorithms could not accurately represent bending in joint areas. Particularly in the field of Generative Artificial Intelligence (AI), SMPL models are frequently used to rapidly generate joint information of human movements under various input conditions, such as text, noise, and voice, and to create 3D human meshes based on this data. While in the past, individuals had to wear motion capture devices to manually generate joint information, this process has now become much faster. Consequently, the mesh generation stage accounts for the majority of total processing time in most algorithms, becoming a major obstacle to real-time generation. As a result, despite the potential for developing many applications, there is a problem where running these algorithms on various edge devices, such as Augmented Reality (AR) or eXtended Reality (XR), is difficult due to long latency. Furthermore, no computer architecture has been proposed to accelerate SMPL models to date.

[0003] [Prior Art Literature]

[0004] Korean Patent Publication No. 10-2022-0168975 The problem to be solved

[0005] We can provide a mixed precision accelerator that enables low-power and real-time execution of 3D human mesh generation based on SMPL (Skinned Multi-Person Linear Model) models on various edge devices.

[0006] The technical problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0007] The present invention provides a mixed precision accelerator comprising: an arithmetic unit including a plurality of mixed precision cores; and a global memory that stores the result of a forward calculation of the arithmetic unit and reuses the stored result for a reverse calculation of the arithmetic unit, wherein each of the plurality of mixed precision cores includes: a low precision inner product engine that quantizes a first-bit floating-point weight used in a Skinned Multi-Person Linear Model (SMPL) algorithm for 3D-human mesh generation into a second-bit low-precision floating-point weight and performs a matrix multiplication operation using the quantized weight and input value; and a high-precision SIMD (Single Instruction Multiple Data) engine that processes a high-precision operation using a third-bit high-precision floating-point, wherein the second bit is smaller than the first bit and the third bit is smaller than the first bit and larger than the second bit.

[0008] According to one aspect, the first bit floating point may include a 32-bit floating point, the second bit low-precision floating point may include a 12-bit floating point composed of a 1-bit sign bit, a 5-bit exponent bit, and a 6-bit mantissa bit, and the third bit high-precision floating point may include an 18-bit floating point composed of a 1-bit sign bit, a 6-bit exponent bit, and an 11-bit mantissa bit.

[0009] According to another aspect, the high-precision SIMD engine comprises: a floating-point arithmetic unit that processes at least one first operation among addition, subtraction, and multiplication; and a look-up table (LUT) for at least one second operation among division, sine, cosine, square root, and exponential calculation, and the high-precision SIMD engine may be characterized by finding a slope and a bias value stored at an address corresponding to an input value in the look-up table, and performing the at least one second operation using the slope and the bias value.

[0010] According to another aspect, the high-precision SIMD engine may be characterized by further including a range selector that determines an address based on an input value using a 2-to-1 multiplexer and outputs the determined address as a result.

[0011] According to another aspect, the above range selector classifies the input value into one of N ranges. The final address can be obtained through steps, and the above N can be characterized as being a natural number.

[0012] According to another aspect, each of the plurality of mixed precision cores may further include a format conversion unit that processes data conversion between the low precision inner product engine and the high precision SIMD engine.

[0013] According to another aspect, the high-precision SIMD engine may be characterized by calculating the degree of inconsistency between adjacent frames of input values ​​and generating the 3D-human mesh based on data interpolation according to the calculated degree of inconsistency.

[0014] According to another aspect, the high-precision SIMD engine may be characterized by generating a first 3D-human mesh using the SMPL algorithm when the calculated discrepancy exceeds a preset threshold value, and when the calculated discrepancy is less than or equal to the threshold value, generating a second 3D-human mesh for a frame between two frames in which the first 3D-human mesh was generated through data interpolation based on the first 3D-human mesh generated for each of the two frames.

[0015] According to another aspect, the low-precision inner product engine may be characterized by converting input values ​​and weight values ​​into the low-precision floating-point format for matrix multiplication, performing a multiplication operation on the mantissa, and shifting the result of the multiplication operation using the difference in the exponent.

[0016] According to another aspect, the low-precision inner product engine may be characterized by finally deriving the summation result of the mantissa by summing the shift-processed results using a Wallace adder tree.

[0017] A method of operation of an accelerator, wherein the accelerator comprises a computer including a plurality of mixed-precision cores; and a global memory that stores the result of a forward calculation of the computer and reuses the stored result for a reverse calculation of the computer, wherein each of the plurality of mixed-precision cores comprises a low-precision inner product engine; and a high-precision SIMD (Single Instruction Multiple Data) engine, and the method of operation comprises the step of receiving a joint information matrix for generating a 3D-human mesh; the step of quantizing a first-bit floating-point weight used in an SMPL (Skinned Multi-Person Linear Model) algorithm into a second-bit low-precision floating-point weight through the low-precision inner product engine, and performing a matrix multiplication operation using the quantized weight and the input value; and the step of processing a high-precision operation using a third-bit high-precision floating-point through the high-precision SIMD engine, wherein the second bit is smaller than the first bit, and the third bit is smaller than the first bit and larger than the second bit.

[0018] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0019] 3D human mesh generation based on the SMPL (Skinned Multi-Person Linear Model) model can be executed in real-time with low power consumption on various edge devices.

[0020] The effects of the present invention are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description in the claims. Brief explanation of the drawing

[0021] FIG. 1 is a diagram illustrating an example of a low-power and real-time mixed-precision accelerator structure for 3D-human mesh generation in one embodiment of the present invention. FIGS. 2 to 5 are drawings illustrating the overall flow of a process for generating a 3D human mesh of a required frame using joint information and a data interpolation method for real-time 3D human mesh generation in an embodiment of the present invention. FIGS. 6 and 7 are drawings illustrating a low-precision inner product engine and a high-precision SIMD engine in a mixed-precision calculator for implementing a low-power accelerator in an embodiment of the present invention. FIG. 8 is a diagram illustrating a format conversion unit that performs transposition and precision conversion of a matrix having a floating-point data form in an embodiment of the present invention. FIGS. 9 and FIGS. 10 are drawings illustrating a range selector that efficiently calculates the address of a look-up table (LUT) from input data in an embodiment of the present invention. FIG. 11 is a flowchart illustrating an example of the operation method of a mixing precision accelerator according to an embodiment of the present invention. Specific details for implementing the invention

[0022] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. Throughout the specification, the same reference numerals refer to the same components.

[0023] When one component is referred to as being "connected to" or "coupled to" another component, it includes cases where it is directly connected or coupled to the other component, or cases where another component is interposed. Conversely, when one component is referred to as being "directly connected to" or "directly coupled to" another component, it indicates that no other component is interposed. "And / or" includes each of the mentioned items and all combinations of one or more of them.

[0024] The terms used herein are for describing the embodiments and are not intended to limit the invention. In this specification, the singular form includes the plural form unless specifically stated otherwise in the text. As used herein, "comprises" and / or "comprising" do not exclude the presence or addition of one or more other components, steps, actions, and / or elements to the mentioned components, steps, actions, and / or elements.

[0025] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the "first component" mentioned below may be the "second component" within the technical scope of the present invention.

[0026] Unless otherwise defined, all terms used in this specification (including technical and scientific terms) may be used in a meaning commonly understood by those skilled in the art to which the present invention pertains. Additionally, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless explicitly and specifically defined otherwise.

[0027] Embodiments of the present invention relate to a mixed-precision accelerator capable of performing 3D-human mesh generation based on a Skinned Multi-Person Linear Model (SMPL) model in real-time and with low power consumption on various edge devices. This mixed-precision accelerator utilizes joint information in the algorithm to identify similarity between movements and, based on this, distinguishes frames to which interpolation methods and SMPL algorithms are to be applied, thereby drastically reducing the latency of the entire accelerator during 3D-human mesh generation and significantly reducing the amount of data movement to decrease power consumption. Furthermore, the mixed-precision accelerator according to the embodiments of the present invention can improve the power efficiency of the entire accelerator by distinguishing between operations requiring high precision and operations sufficient for low precision. Additionally, the mixed-precision accelerator according to the embodiments of the present invention can minimize unnecessary data movement by utilizing global memory as a cache during the SMPL optimization process and can provide a hardware unit capable of effectively processing the necessary transposition process.

[0028] FIG. 1 is a diagram illustrating an example of a low-power and real-time mixed-precision accelerator structure for 3D-human mesh generation in an embodiment of the present invention. The mixed-precision accelerator (100) according to the present embodiment may be composed of a computer (3D-human mesh generation accelerator (110)) that enables on-chip computation and data storage, and a global memory (120). The global memory (120) may store the results of forward computation for low-power and real-time acceleration and reuse them for reverse computation, and may be configured with an interface that enables transmission and reception between the 3D-human mesh generation accelerator (110) and the global memory (120).

[0029] The 3D-human mesh generation accelerator (110) as a computer uses floating-point operations capable of representing a wide range of numbers and may include a plurality of mixed-precision cores (112) composed of a low-precision inner product engine (113) and a high-precision SIMD (Single Instruction Multiple Data) engine (114). The plurality of mixed-precision cores (112) can reduce the capacity of the weight memory (111) by quantizing an A-bit floating-point number used in the existing SMPL algorithm into a B-bit low-precision floating-point number using the low-precision inner product engine (113), while maintaining accuracy by using a high-precision SIMD engine (114) capable of high-precision operations using a C-bit high-precision floating-point number. Here, A, B, and C are all natural numbers, B can be smaller than A, and C can be smaller than A and larger than B. As a more specific example, the A-bit floating-point number used in the existing SMPL algorithm may be a 32-bit floating-point number. In this case, the B-bit low-precision floating-point number may include a 12-bit floating-point number composed of a 1-bit sign bit, a 5-bit exponent bit, and a 6-bit mantissa bit. Additionally, the C-bit high-precision floating-point number may include an 18-bit floating-point number composed of a 1-bit sign bit, a 6-bit exponent bit, and an 11-bit mantissa bit. However, the number of available bits for the low-precision floating-point number and the high-precision floating-point number is not limited to the examples described above.

[0030] Additionally, a plurality of mixed precision cores (112) may include a Look-Up Table (LUT) for sine, cosine, square root, and exponential calculations.

[0031] As the operation proceeds, the result can be stored in multiple operating memories (116), and the format conversion unit (115) can process data conversion between the low-precision inner product engine (113) and the high-precision SIMD engine (114). This indicates that the structure of the mixed-precision accelerator (100) according to the embodiment of FIG. 1 is designed to effectively process complex calculations for 3D-human mesh generation.

[0032] An SMPL model for generating a 3D human mesh may include a process of optimizing parameters based on joint information and generating a 3D human mesh using these optimized parameters. The optimization process is time-consuming because it requires executing loops multiple times. This process is repeated for every frame, and parallel computation is difficult due to the correlation between adjacent frames. To mitigate these issues, data interpolation methods may be introduced.

[0033] FIGS. 2 to 5 are drawings illustrating the overall flow of a process for generating a 3D human mesh of a required frame using joint information and a data interpolation method for real-time 3D human mesh generation in an embodiment of the present invention.

[0034] FIGS. 2 to 5 illustrate an example of a process for lightweighting the computation of an SMPL algorithm through a data interpolation method for low power consumption and real-time acceleration. The mixed precision accelerator (100) may receive, at the start of the SMPL algorithm under the control of the controller (140), a joint information matrix consisting of 22 three-dimensional coordinates, for example as shown in FIG. 2, as input. Additionally, the mixed precision accelerator (100) may calculate the degree of discrepancy between adjacent frames before executing the algorithm and compare it with a specific threshold value to determine whether the difference between the two frames is significant.

[0035] If the degree of mismatch exceeds a threshold value, the mixing precision accelerator (100) determines that the difference between two adjacent frames is significant and can directly generate a 3D-human mesh using an SMPL algorithm based on the joint information of the frame. On the other hand, if the degree of mismatch is less than or equal to a threshold value, the mixing precision accelerator (100) determines that the difference between the two frames is not significant and can generate the remaining data using a data interpolation method based on the previously calculated data (directly generated 3D-human mesh).

[0036] Given frame numbers from 1 to N, the two adjacent frames to be operated on are frames p and q ( Set to ). At this time, the 3D-human mesh results of frames p and q are respectively , When saying that, between frame p and frame q The data interpolation method for obtaining a 3D-human mesh for dog frames can be expressed as Equation 1 below.

[0037]

[0038] Since this operation includes subtraction, division, multiplication, and addition, it can be processed by a high-precision SIMD engine (114).

[0039] As previously explained, the mixed-precision accelerator (100) is composed of a low-precision inner product engine (113) that performs matrix multiplication operations using quantized weights and input values ​​to reduce memory usage, and a high-precision SIMD engine (114) capable of high-precision operations. The low-precision inner product engine (113) can perform multiplication operations of an input value vector from the instruction memory (130) and a weight matrix using 12-bit floating-point numbers. The high-precision SIMD engine (114) supports basic addition, subtraction, and multiplication through a floating-point arithmetic unit (e.g., a SIMD arithmetic unit), and can process division, sine, cosine, square root, and exponentiation operations through an LUT. At this time, the high-precision SIMD engine (114) finds the address of the LUT corresponding to the input value and uses the gradient (a) and bias (b) values ​​stored at that address. It can perform operations of the form.

[0040] FIGS. 6 and 7 are drawings illustrating a low-precision inner product engine and a high-precision SIMD engine in a mixed-precision calculator for implementing a low-power accelerator in an embodiment of the present invention. FIG. 6 shows an example of the internal configuration of a low-precision inner product engine (113), and FIG. 7 shows an example of the internal configuration of a high-precision SIMD engine (114).

[0041] A mixed-precision accelerator (100) including a low-precision inner product engine (113) and a high-precision SIMD engine (114) can efficiently represent zero and more precise numbers by adopting a denormalized representation method of floating-point numbers. To reduce the complexity of operations between denormalized numbers and normalized numbers when performing operations of the low-precision inner product engine (113), the low-precision inner product engine (113) can decode and process the two numbers in a unified manner. The low-precision inner product engine (113) can convert input values ​​and weight values ​​into the low-precision floating-point format for matrix multiplication operations, perform multiplication operations on the mantissa, and shift the result of the multiplication operation using the difference in the exponent. Subsequently, the low-precision inner product engine (113) can derive the final sum result of the mantissa by summing the shifted results using a Wallace adder tree.

[0042] Since the SMPL algorithm optimizes human mesh-related parameters through various operations, the high-precision SIMD engine (114) must be able to support these various operations. The high-precision SIMD engine (114) basically supports addition, subtraction, and multiplication using an 18-bit floating-point adder and multiplier, and accumulation and aggregation operations can be processed through the adder. The minimum value finding operation can be supported by subtraction operations using the adder, and division and other complex operations can be processed using a LUT considering the overhead of the adder.

[0043] One of the important features of using a mixed arithmetic unit is that data formats must be converted between two arithmetic units: a low-precision inner product engine (113) and a high-precision SIMD engine (114).

[0044] FIG. 8 is a diagram illustrating a format conversion unit that performs transposition and precision conversion of a matrix having a floating-point data form in an embodiment of the present invention. The embodiment of FIG. 8 shows an example of a format conversion unit (115) that integrally supports conversion from low precision to high precision and from high precision to low precision, and also supports transposition operations. The precision conversion process of the precision conversion operator (820) must carefully consider the range of numbers due to the characteristic that the mixed precision accelerator (100) adopts denormalized numbers. When converting from low precision to high precision, there is a possibility that a number originally expressed as a normalized number may be converted into a denormalized number; in this case, the range of the number can be checked and necessary post-processing can be performed. Similar processing is required in the process of converting from high precision to low precision.

[0045] The transposition operation of the transposition operator (810) can be implemented using registers, so that input values ​​are temporarily stored in registers, and then a matrix of the desired size is formed, and when the condition is met, it is output as an output value. This design can flexibly support transposition of matrices of various sizes.

[0046] FIGS. 9 and FIGS. 10 are drawings illustrating a range selector that efficiently calculates the address of a look-up table (LUT) from input data in an embodiment of the present invention.

[0047] FIGS. 9 and FIGS. 10 illustrate the flow (internal operation flowchart of FIG. 9) and circuit diagram (internal circuit diagram of FIG. 10) of a range selector (710) that efficiently derives an appropriate address according to input data (input value) during the computation of an LUT within a high-precision SIMD engine (114). In this process, to determine the optimal number of LUT addresses without compromising accuracy, the range selector (710) can utilize a 2-to-1 multiplexer to determine the address according to the input data and output it as a result. When the range selector (710) classifies the input data into one of N (N is a natural number) possible ranges, a total You can obtain the final address by going through the steps.

[0048] At each stage, the range selector (710) may include a comparator that compares the input data with one of N possible ranges. Floating-point comparators, which are commonly used for comparing floating-point numbers, can cause overhead in terms of area, delay time, and power consumption. To reduce this, a fixed-point comparator can be used to reduce the burden of area and delay time and to implement a low-power consumption circuit.

[0049] FIG. 11 is a flowchart illustrating an example of the operation method of a mixed precision accelerator according to an embodiment of the present invention. The operation method according to the present embodiment can be performed by the mixed precision accelerator (100) described above. Such a mixed precision accelerator (100) may include a computer (3D-human mesh generation accelerator (110)) comprising a plurality of mixed precision cores (112), and a global memory (120) that stores the result of a forward calculation of the computer and reuses the stored result for a reverse calculation of the computer. Additionally, each of the plurality of mixed precision cores (112) may include a low precision inner product engine (113) and a high precision SIMD engine (114).

[0050] In step (1110), the mixed precision accelerator (100) can receive a joint information matrix for generating a 3D-human mesh. An example of a joint information matrix consisting of 22 three-dimensional coordinates was previously described through FIG. 2.

[0051] In step (1120), the mixed precision accelerator (100) can quantize the weight of a first bit floating-point number used in the SMPL algorithm into a second bit low-precision floating-point number weight through the low-precision inner product engine (113), and perform a matrix multiplication operation using the quantized weight and input value. Here, the second bit may be smaller than the first bit. For example, the first bit floating-point number may include a 32-bit floating-point number, and the second bit low-precision floating-point number may include a 12-bit floating-point number composed of a 1-bit sign bit, a 5-bit exponent bit, and a 6-bit mantissa bit. At this time, the low-precision inner product engine (113) can convert the input value and the weight value into the format of the low-precision floating-point number for matrix multiplication, perform a multiplication operation on the mantissa, and shift the result of the multiplication operation using the difference in the exponent. Afterwards, the low-precision inner product engine (113) can derive the final addition result of the mantissa by summing the shifted results using a Wallace adder tree.

[0052] In step (1130), the mixed precision accelerator (100) can process high-precision operations using a third-bit high-precision floating-point number through a high-precision SIMD engine (114). Here, the third bit may be smaller than the first bit and larger than the second bit. For example, the third-bit high-precision floating-point number may include an 18-bit floating-point number consisting of a 1-bit sign bit, 6-bit exponent bits, and 11-bit mantissa bits. The high-precision SIMD engine (114) may include a floating-point arithmetic unit and a look-up table. At this time, the high-precision SIMD engine (114) can process at least one first operation among addition, subtraction, and multiplication through the floating-point arithmetic unit. Additionally, the high-precision SIMD engine (114) can find the slope and bias values ​​stored at the address corresponding to the input value in a look-up table and process at least one second operation among division, sine, cosine, square root, and exponential calculations using the slope and bias values. At this time, the high-precision SIMD engine (114) may further include a range selector (710), and can determine an address according to the input value using a 2-to-1 multiplexer included in the range selector (710) and output the determined address as a result. This range selector (710) is used to classify the input value into one of N ranges. You can obtain the final address by going through the steps.

[0053] According to an embodiment, each of the plurality of mixed precision cores (112) may further include a format conversion unit (115). In this case, the method of operation may further include a step (not shown) in which each of the plurality of mixed precision cores (112) processes data conversion between a low-precision inner product engine (113) and a high-precision SIMD engine (114) through the format conversion unit (115).

[0054] Additionally, the mixed precision accelerator (100) can calculate the degree of inconsistency between adjacent frames of input values ​​through the high precision SIMD engine (114) in step (1130) and generate a 3D-human mesh based on data interpolation according to the calculated degree of inconsistency. For example, if the calculated degree of inconsistency exceeds a preset threshold value, the high precision SIMD engine (114) can generate a first 3D-human mesh using an SMPL algorithm. Additionally, if the calculated degree of inconsistency is less than or equal to the threshold value, the high precision SIMD engine (114) can generate a second 3D-human mesh for the frame between the two frames in which the first 3D-human mesh was generated, through data interpolation based on the first 3D-human mesh generated for each of the two frames.

[0055] As such, the mixed precision accelerator according to the embodiments of the present invention can accelerate the parameter optimization process for efficiently generating 3D-human mesh data using input data such as joint information. In addition, the mixed precision accelerator according to the embodiments of the present invention can increase overall computational efficiency by supporting forward computation during the model parameter optimization process and storing intermediate data generated during the process in global memory to enable reuse in the reverse computation step. Furthermore, the mixed precision accelerator according to the embodiments of the present invention can solve the problems of high power consumption and latency that may occur during the iterative parameter optimization process, and can increase the overall system efficiency by significantly reducing latency through the application of thresholds based on a data interpolation method and minimizing unnecessary data movement.

[0056] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing its technical concept or essential features. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

Claim 1 A mixed-precision accelerator comprising: an arithmetic unit including a plurality of mixed-precision cores; and a global memory that stores the result of a forward calculation of the arithmetic unit and reuses the stored result for a reverse calculation of the arithmetic unit, wherein each of the plurality of mixed-precision cores includes: a low-precision inner product engine that quantizes a first-bit floating-point weight used in an SMPL (Skinned Multi-Person Linear Model) algorithm for generating a 3D-human mesh into a second-bit low-precision floating-point weight and performs a matrix multiplication operation using the quantized weight and an input value; and a high-precision SIMD (Single Instruction Multiple Data) engine that processes a high-precision operation using a third-bit high-precision floating-point, wherein the second bit is smaller than the first bit and the third bit is smaller than the first bit and larger than the second bit, and wherein the high-precision SIMD engine calculates the degree of inconsistency between adjacent frames of an input value and generates the 3D-human mesh based on data interpolation according to the calculated degree of inconsistency. Claim 2 A mixed-precision accelerator according to claim 1, wherein the first bit floating point comprises a 32-bit floating point, the second bit low-precision floating point comprises a 12-bit floating point composed of a 1-bit sign bit, a 5-bit exponent bit, and a 6-bit mantissa bit, and the third bit high-precision floating point comprises an 18-bit floating point composed of a 1-bit sign bit, a 6-bit exponent bit, and an 11-bit mantissa bit. Claim 3 An arithmetic unit comprising a plurality of mixed-precision cores; and a global memory that stores the result of a forward calculation of the arithmetic unit and reuses the stored result for a reverse calculation of the arithmetic unit, wherein each of the plurality of mixed-precision cores comprises: a low-precision inner product engine that quantizes a first-bit floating-point weight used in an SMPL (Skinned Multi-Person Linear Model) algorithm for 3D-human mesh generation into a second-bit low-precision floating-point weight and performs a matrix multiplication operation using the quantized weight and an input value; and a high-precision SIMD (Single Instruction Multiple Data) engine that processes a high-precision operation using a third-bit high-precision floating-point, wherein the second bit is smaller than the first bit, and the third bit is smaller than the first bit and larger than the second bit, and the high-precision SIMD engine comprises a floating-point arithmetic unit that processes at least one first operation among addition, subtraction, and multiplication; A mixed-precision accelerator characterized by including a Look-Up Table (LUT) for at least one second operation among division, sine, cosine, square root, and exponential calculations, wherein the high-precision SIMD engine finds slope and bias values ​​stored at an address corresponding to an input value in the Look-Up Table and performs the at least one second operation using the slope and bias values, and further including a range selector that determines an address according to an input value using a 2-to-1 multiplexer and outputs the determined address as a result. Claim 4 delete Claim 5 In paragraph 3, the range selector classifies the input value into one of N ranges. A mixed precision accelerator characterized by obtaining a final address through steps, wherein N is a natural number. Claim 6 A mixed precision accelerator according to claim 1, wherein each of the plurality of mixed precision cores further comprises a format conversion unit that processes data conversion between the low precision inner product engine and the high precision SIMD engine. Claim 7 delete Claim 8 A mixed precision accelerator according to claim 1, wherein the high-precision SIMD engine generates a first 3D-human mesh using the SMPL algorithm when the calculated discrepancy exceeds a preset threshold value, and when the calculated discrepancy is less than or equal to the threshold value, generates a second 3D-human mesh for a frame between the two frames in which the first 3D-human mesh was generated through data interpolation based on the first 3D-human mesh generated for each of the two frames. Claim 9 An arithmetic unit comprising a plurality of mixed-precision cores; and a global memory that stores the result of a forward calculation of the arithmetic unit and reuses the stored result for a reverse calculation of the arithmetic unit, wherein each of the plurality of mixed-precision cores comprises a low-precision inner product engine that quantizes a first-bit floating-point weight used in an SMPL (Skinned Multi-Person Linear Model) algorithm for 3D-human mesh generation into a second-bit low-precision floating-point weight and performs a matrix multiplication operation using the quantized weight and an input value; A mixed-precision accelerator comprising a high-precision SIMD (Single Instruction Multiple Data) engine that processes high-precision operations using a third high-precision floating-point number, wherein the second bit is smaller than the first bit, the third bit is smaller than the first bit and larger than the second bit, and the low-precision inner product engine converts input values ​​and weight values ​​into the low-precision floating-point format for matrix multiplication operations, performs multiplication operations on the mantissa, and shifts the result of the multiplication operation using the difference in the exponent. Claim 10 A mixed precision accelerator according to claim 9, wherein the low-precision inner product engine derives the final addition result of the mantissa by summing the shift-processed results using a Wallace adder tree. Claim 11 In a method of operation of an accelerator, the accelerator comprises: a computer including a plurality of mixed-precision cores; and a global memory that stores the result of a forward calculation of the computer and reuses the stored result for a reverse calculation of the computer, wherein each of the plurality of mixed-precision cores comprises: a low-precision inner product engine; and a high-precision SIMD (Single Instruction Multiple Data) engine, and the method of operation comprises: a step of receiving a joint information matrix for generating a 3D-human mesh; a step of quantizing a first-bit floating-point weight used in an SMPL (Skinned Multi-Person Linear Model) algorithm into a second-bit low-precision floating-point weight through the low-precision inner product engine, and a step of performing a matrix multiplication operation using the quantized weight and the input value. A method of operation comprising the step of processing a high-precision operation using a third bit of a high-precision floating-point number through the high-precision SIMD engine, wherein the second bit is smaller than the first bit, and the third bit is smaller than the first bit and larger than the second bit, and wherein the step of processing the high-precision operation is characterized by calculating the degree of discrepancy between adjacent frames of the input value through the high-precision SIMD engine, and generating the 3D-human mesh based on data interpolation according to the calculated degree of discrepancy. Claim 12 A method of operation according to claim 11, wherein the first bit floating point comprises a 32-bit floating point, the second bit low-precision floating point comprises a 12-bit floating point composed of a 1-bit sign bit, a 5-bit exponent bit, and a 6-bit mantissa bit, and the third bit high-precision floating point comprises an 18-bit floating point composed of a 1-bit sign bit, a 6-bit exponent bit, and an 11-bit mantissa bit. Claim 13 In a method of operation of an accelerator, the accelerator comprises: a computer including a plurality of mixed-precision cores; and a global memory that stores the result of a forward calculation of the computer and reuses the stored result for a reverse calculation of the computer, wherein each of the plurality of mixed-precision cores comprises: a low-precision inner product engine; and a high-precision SIMD (Single Instruction Multiple Data) engine, and the method of operation comprises: a step of receiving a joint information matrix for generating a 3D-human mesh; a step of quantizing a first-bit floating-point weight used in an SMPL (Skinned Multi-Person Linear Model) algorithm into a second-bit low-precision floating-point weight through the low-precision inner product engine, and a step of performing a matrix multiplication operation using the quantized weight and the input value. A method of operation characterized by comprising the step of processing a high-precision operation using a third-bit high-precision floating-point number through the high-precision SIMD engine, wherein the second bit is smaller than the first bit and the third bit is smaller than the first bit and larger than the second bit, and the high-precision SIMD engine includes a floating-point arithmetic unit; a range selector; and a look-up table (LUT), wherein the step of processing the high-precision operation comprises: processing at least one first operation among addition, subtraction, and multiplication through the floating-point arithmetic unit; determining an address according to an input value using a 2-to-1 multiplexer and outputting the determined address as a result; and finding a slope and a bias value stored at an address corresponding to the input value in the look-up table, and processing at least one second operation among division, sine, cosine, square root, and exponential calculation using the slope and the bias value. Claim 14 A method of operation according to claim 11, wherein each of the plurality of mixed precision cores further comprises a format conversion unit and further comprises the step of processing data conversion between the low precision inner product engine and the high precision SIMD engine through the format conversion unit. Claim 15 delete