Package structure for a semiconductor device

Abstract

What is disclosed is a package structure for a semiconductor device comprising: a substrate layer configured for thermal management and electrical insulation; one or more semiconductor dies on the substrate layer, each semiconductor die comprising: a first power contact configured to connect to a first terminal of the package, a second power contact configured to connect to a second terminal of the package, and a gate contact configured to connect to a gate terminal of the package; an integrated resistor structure disposed within the substrate layer. (Figure 1)