Signal transmission system and method

Abstract

Embodiments of the present application provide a signal transmission system and method. The system comprises: a server motherboard, and a hard disk backplane provided with a target logic device and a set of hard disk slots, wherein the server motherboard is configured to: obtain a VPP lighting signal and an SGPIO lighting signal; and use a preset time division multiplexing mode to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-sharing ordered manner, so as to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device by means of the same lighting cable, wherein the preset time division multiplexing mode is continuously detecting the VPP lighting signal and the SGPIO lighting signal within a time division multiplexing period, performing identification and judgement on the basis of respective waveform characteristics, sampling the continuously sent VPP lighting signal and SGPIO lighting signal, and on the basis of specific flag bits of the signals and a preset specific rule, alternately switching the VPP lighting signal and the SGPIO lighting signal to a time division multiplexing channel.

Description

Signal transmission system and method

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on September 25, 2023, with application number 202311242768.5 and application name “Signal Transmission System and Method,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] The embodiments of the present application relate to the field of computers, and in particular, to a signal transmission system and method. Background Art

[0004] On some servers, business requirements necessitate that the hard drive backplane's drive slots support multiple different drive types. For example, any bay slots can accommodate multiple drives, such as NVMe, SATA, and SAS. For example, installing hard drives on the front panel of a server typically involves splicing together multiple hard drive backplanes with slots supporting multiple drive types.

[0005] There is usually an LED (light-emitting diode) indicator light on the hard disk tray, which is set to intuitively indicate the current status of the hard disk. On a hard disk backplane with hard disk slots that support multiple different types of hard disks, the hard disk controller on the server motherboard can send the current hard disk status information to the hard disk backplane through a specific bus form. The logic device on the hard disk backplane parses the bus signal and lights up the indicator light of the corresponding hard disk according to the parsing result. For example, each hard disk backplane with anybay slots requires a set of PCIE high-speed cables and a corresponding set of VPP low-speed lighting cables, a set of SATA high-speed cables and a corresponding set of SGPIO low-speed lighting cables. The two sets of low-speed lighting cables are set to send the current hard disk status information to light up the corresponding hard disk indicator light. For servers with multiple hard disk backplanes, the number of cables connected to the hard disk backplane is too large, resulting in excessively high material costs.

[0006] It can be seen that the related art has a problem of high signal transmission cost due to the excessive number of cables connected to the hard disk backplane.

[0007] Summary of the Invention

[0008] The embodiments of the present application provide a signal transmission system and method to at least solve the problem in the related art of high signal transmission cost caused by an excessive number of cables connected to a hard disk backplane.

[0009] According to a first aspect of an embodiment of the present application, a signal transmission system is provided, comprising: a server motherboard, a hard disk backplane, wherein the hard disk backplane is provided with a target logic device and a group of hard disk slots, the target logic device is a logic device configured to control the hard disks inserted in a group of hard disk slots, the server motherboard is connected to the hard disk backplane via a cable, wherein the server motherboard is configured to obtain a VPP lighting signal and an SGPIO lighting signal to be transmitted to the target logic device, wherein the VPP lighting signal is a lighting signal corresponding to the NVMe hard disks inserted in a group of hard disk slots, and the SGPIO lighting signal is a lighting signal corresponding to the SATA hard disks inserted in a group of hard disk slots; a preset time division multiplexing method is used to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division orderly manner, so as to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device through the same lighting cable. The lighting signal is transmitted to the target logic device, wherein the preset time division multiplexing mode is to continuously detect the VPP lighting signal and the SGPIO lighting signal within the time division multiplexing period, identify and judge according to their respective waveform characteristics, sample the continuously sent VPP lighting signal and SGPIO lighting signal, and alternately switch the VPP lighting signal and the SGPIO lighting signal to the time division multiplexing channel according to the specific flag bit of the signal and the preset specific rules; the target logic device is configured to receive the VPP lighting signal and the SGPIO lighting signal transmitted by the server motherboard through the lighting cable using the preset time division multiplexing mode, control the display status of the status indicator lights corresponding to the NVMe hard drives inserted in a group of hard drive slots based on the VPP lighting signal, and control the display status of the status indicator lights corresponding to the SATA hard drives inserted in a group of hard drive slots based on the SGPIO lighting signal.

[0010] According to a second aspect of an embodiment of the present application, a signal transmission method is provided, comprising: obtaining a VPP lighting signal and an SGPIO lighting signal of a target logic device to be transmitted to a hard disk backplane, wherein the target logic device is a logic device configured to control hard disks inserted into a group of hard disk slots provided on the hard disk backplane, the VPP lighting signal is a lighting signal corresponding to the NVMe hard disks inserted into the group of hard disk slots, and the SGPIO lighting signal is a lighting signal corresponding to the SATA hard disks inserted into the group of hard disk slots; and using a preset time division multiplexing method to time-share and orderly control the VPP The lighting signal and the SGPIO lighting signal are scheduled and switched to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device through the same lighting cable, wherein the preset time division multiplexing mode is to continuously detect the VPP lighting signal and the SGPIO lighting signal within the time division multiplexing period, identify and judge according to their respective waveform characteristics, sample the continuously sent VPP lighting signal and SGPIO lighting signal, and alternately switch the VPP lighting signal and the SGPIO lighting signal to the time division multiplexing channel according to the specific flag bit of the signal and the preset specific rules.

[0011] Through the embodiments of the present application, for the VPP lighting signal and the SGPIO lighting signal to be transmitted to the hard disk backplane, the VPP lighting signal and the SGPIO lighting signal are scheduled and switched in a time-division multiplexing manner in a time-division multiplexing manner, and the VPP lighting signal and the SGPIO lighting signal are transmitted to the logic device of the hard disk backplane using the same physical cable to control the NVMe hard disk and the SATA hard disk. Compared with the method of using separate physical cables to transmit the VPP lighting signal and the SGPIO lighting signal respectively, the number of cables connected to the hard disk backplane can be reduced. At the same time, the VPP lighting signal and the SGPIO lighting signal are scheduled and switched in a time-division multiplexing manner, which can ensure that the VPP lighting signal and the SGPIO lighting signal are transmitted to the logic device of the hard disk backplane in a timely and accurate manner, thereby achieving the technical effect of reducing the cost of signal transmission and improving the accuracy of signal transmission, thereby solving the problem of high signal transmission cost caused by too many cables connected to the hard disk backplane in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG1 is a hardware structure block diagram of an optional signal transmission system according to an embodiment of the present application;

[0013] FIG2 is a schematic diagram of a cable connection between a server mainboard and a hard disk backplane according to an embodiment of the present application;

[0014] FIG3 is a schematic diagram of another cable connection between a server mainboard and a hard disk backplane according to an embodiment of the present application;

[0015] FIG4 is a schematic diagram of a channel switching logic of a time division multiplexing physical layer according to an embodiment of the present application;

[0016] FIG5 is a schematic diagram of an SGPIO lighting signal according to an embodiment of the present application;

[0017] FIG6 is a schematic diagram of signal transmission logic of a time division multiplexing signal layer according to an embodiment of the present application;

[0018] FIG7 is a schematic diagram of signal sampling of a time-division multiplexing data layer according to an embodiment of the present application;

[0019] FIG8 is a schematic diagram of a VPP lighting code stream according to an embodiment of the present application;

[0020] FIG9 is a schematic flow chart of a signal transmission method according to an embodiment of the present application. DETAILED DESCRIPTION

[0021] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0022] It should be noted that the terms "first", "second", etc. in the description and claims of the embodiments of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0023] According to one aspect of an embodiment of the present application, a signal transmission system is provided, which can be applied to a server or similar computing device. Taking application in a server as an example, as shown in FIG1 , the signal transmission system includes: a server motherboard and a hard disk backplane, wherein the server motherboard and the hard disk backplane are connected by a cable, wherein the hard disk backplane is provided with a target logic device and a set of hard disk slots, wherein the target logic device is a logic device configured to control the hard disks inserted in the set of hard disk slots, and can be a CPLD (Complex Programmable Logic Device).

[0024] The hard disk backplane can be a hard disk backplane located on the front window or rear window of the server. It can be a single hard disk backplane or a hard disk backplane composed of several hard disk backplanes. Each hard disk slot (i.e., hard disk slot) on the hard disk backplane allows one or more types of hard disks to be inserted. Commonly used hard disks in servers can include NVMe (Non Volatile Memory Express, non-volatile memory standard) hard disks, SATA (Serial Advanced Technology Attachment, serial advanced technology attachment) hard disks, SAS (Serial Attached SCSI, serial attached SCSI (Small Computer System Interface, small computer system interface)) hard disks and other types of hard disks. On some servers, in order to meet business needs, hard disk slots that support the insertion of multiple different types of hard disks can be set on the hard disk backplane, for example, hard disk slots that support multiple hard disks such as NVMe / SATA / SAS at the same time. Such hard disk slots are called anybay hard disk slots, abbreviated as anybay slots. Correspondingly, the hard disk backplane can be an anybay hard disk backplane.

[0025] For example, when installing a hard drive on the front window of a server, several hard drive backplanes with anybay slots are usually spliced ​​together, and the server motherboard is connected to the hard drive backplane on the front window of the server through cables to transmit high-speed data signals and low-speed control signals.

[0026] For each type of hard disk, the hard disk information of one or more hard disks of the hard disk type corresponding to each controller can be obtained through different controllers on the server motherboard (for example, NVMe hard disk information and SATA hard disk information), and the corresponding control signal group (for example, VPP lighting signal and SGPIO lighting signal) is generated based on the obtained hard disk information, and the generated control signal groups are sent to the target processing unit (for example, time division multiplexing encoding / decoding unit), which is transmitted to the target logic device through the physical cable between the target processing unit and the hard disk backplane to control at least part of the hard disk on the hard disk backplane, which can be to directly control the hard disk or to control the status indicator light corresponding to the hard disk. The target processing unit can be set on the server motherboard and can be implemented by CPLD, that is, the target processing unit can be a CPLD.

[0027] In this embodiment, a status indicator light corresponding to each hard disk may also be provided on the hard disk backplane, and the status indicator light may be an LED (Light-emitting Diode) indicator light. The server motherboard may transmit a lighting signal to the target logic device to control the display status of the status indicator lights corresponding to at least some of the hard disks on the hard disk backplane. The lighting signal here may include a VPP (Virtual Pin Port) lighting signal and an SGPIO (Serial General Purpose Input / Output) lighting signal, and may also include other types of electric light signals, which are not limited here. For the target processing unit, it may obtain the VPP lighting signal and the SGPIO lighting signal to be transmitted to the target logic device. The VPP lighting signal may be sent to the target processing unit by the first controller, and the SGPIO lighting signal may be sent to the target processing unit by the second controller, as shown in FIG1 .

[0028] Here, the VPP lighting signal is a control signal group corresponding to the NVMe hard drives inserted in a group of hard drive slots, and the SGPIO lighting signal is a control signal group corresponding to the SATA hard drives inserted in a group of hard drive slots. Controlling an NVMe hard drive or a SATA hard drive can be done directly by controlling the hard drive of that type, or by controlling the status indicator lights corresponding to that type of hard drive. Although this embodiment describes the scenario of controlling the status indicator lights, the provided signal transmission system is also applicable to other control scenarios where there is no conflict.

[0029] In this embodiment, on a hard disk backplane having hard disk slots that support the insertion of multiple different types of hard disks, the hard disk controller on the server motherboard can send the status information of the hard disk to the hard disk backplane through a specific bus form. The target logic device (for example, a logic device) on the hard disk backplane parses the bus signal and lights up the status indicator of the corresponding hard disk based on the parsing result to intuitively indicate the current status of the hard disk. The status indicator lights corresponding to the hard disk include an Active light that is set to indicate the presence and activity status of the hard disk, a Fault light and a Locate light that are set to indicate whether the current hard disk has a fault error, and display the status of the hard disk positioning and hard disk reconstruction.

[0030] Taking a hard disk backplane with an Anybay slot (i.e., an Anybay hard disk backplane) as an example, the cable connection between the server motherboard and the hard disk backplane is shown in Figure 2. The CPU (Central Processing Unit) on the server motherboard sends a PCIE (Peripheral Component Interconnect Express) signal and uses a high-speed MCIO connector (mini cooled input / output) to transmit the PCIE signal to the hard disk backplane through a high-speed cable to support the data link of the NVMe hard disk.

[0031] The lighting signal of the NVMe hard disk (i.e., the VPP lighting signal) is sent by the CPU on the server motherboard through the VPP bus, and uses a low-speed connector to transmit the VPP signal to the CPLD on the hard disk backplane through a low-speed cable. The SATA controller on the server motherboard sends a SATA signal, which is led out using a high-speed SLIM (Slimline) connector and connected to the hard disk backplane through a high-speed cable to support the data link of the SATA hard disk. The lighting signal of the SATA hard disk (i.e., the SGPIO lighting signal) is sent by the SATA controller through the SGPIO bus, and is connected to the CPLD on the hard disk backplane through a low-speed cable using a low-speed connector. On the connector of the hard disk backplane with an anybay slot, there are both PCIE high-speed data signals and SATA high-speed data signals (not shown in Figure 2). The CPLD on the hard disk backplane can determine whether the hard disk type of the currently inserted hard disk is an NVMe hard disk or a SATA hard disk, parse the corresponding VPP lighting signal or SGPIO lighting signal, use the parsed information to map to the corresponding lighting signal, and light up the corresponding indicator light.

[0032] However, each hard drive backplane requires multiple cables to connect to the server motherboard and is configured to transmit high-speed data signals and low-speed control signals. For example, each anybay hard drive backplane requires a set of PCIE high-speed cables and a corresponding set of VPP low-speed lighting cables, a set of SATA high-speed cables and a corresponding set of SGPIO low-speed lighting cables. As a result, the server needs to support too many cables connecting the hard drive backplanes of the anybay slots with the motherboard, which increases the difficulty of design, installation, and maintenance, and causes a sharp increase in material costs.

[0033] For example, a server with 16 2.5-inch hard drives on the front panel typically uses four 4-port hard drive backplanes, making the cabling to the backplanes quite complex. If a backplane is also installed on the rear panel, the cabling between the server and the backplane becomes even more complex. Overly complex cabling is difficult to install, increases maintenance challenges, and leads to excessively high material costs.

[0034] In order to at least partially solve the problem of overly complex cables between the server host and the hard disk backplane mentioned above, for the VPP lighting signal and SGPIO lighting signal to be transmitted to the hard disk backplane, time-division multiplexing can be used to schedule and switch the VPP lighting signal and SGPIO lighting signal in a timely and orderly manner, and the VPP lighting signal and SGPIO lighting signal can be transmitted to the logic device of the hard disk backplane using the same physical cable, thereby controlling the NVMe hard disk and SATA hard disk. Compared with the method of using separate physical cables to transmit the VPP lighting signal and SGPIO lighting signal respectively, the number of cables connected to the hard disk backplane can be reduced. At the same time, scheduling and switching the VPP lighting signal and SGPIO lighting signal in a timely and orderly manner can ensure that the VPP lighting signal and SGPIO lighting signal are transmitted to the logic device of the hard disk backplane in a timely and accurate manner. While ensuring the reliability of signal transmission, it reduces the difficulty of cable design, installation and operation and maintenance, thereby reducing the cost of the server.

[0035] Here, time-division multiplexing refers to dividing the total transmission time within the same physical channel into several time segments, with each signal occupying a different portion of the time segment. At a given moment, only one signal is present on the physical channel. Each time segment is called a time slot, and different time slots do not overlap, allowing different signals to be transmitted within different time slots. Simply put, multiple tasks are divided into multiple time segments, and then the different time segments of each task are used interchangeably to enable multiple tasks to run simultaneously, thereby achieving the goal of transmitting multiple signals using a single channel. Scheduling and switching the VPP and SGPIO on-time signals in a time-division multiplexing manner using a preset time-division multiplexing method means: within the time-division multiplexing cycle, continuously detecting the VPP and SGPIO on-time signals, identifying and judging them based on their respective waveform characteristics, sampling the continuously transmitted VPP and SGPIO on-time signals, and alternatingly switching the VPP and SGPIO on-time signals to the time-division multiplexing channel based on specific signal flags and preset specific rules. The preset specific rules here indicate the scheduling order of the VPP and SGPIO on-time signals.

[0036] It should be noted that, although in some embodiments of the present application, a server having a hard disk backplane (e.g., an Anybay hard disk backplane) with hard disk slots supporting multiple different types of hard disks is used as an example to explain the signal transmission system in the present embodiment, this does not limit the signal transmission system in the present embodiment and the server to which it is applied, and it can also be applied to other servers or similar devices. The control signal group for controlling a certain type of hard disk may include one or more types of control signals, and the control signals in the same control signal group may jointly control one or more types of hard disks.

[0037] Optionally, the physical cables between the server motherboard and the hard disk backplane may include high-speed cables and low-speed cables. Considering that the high-speed cable configured to transmit high-speed data signals is a necessary path for data communication between the server motherboard and the hard disk backplane, and cannot be reduced or the cost of reduction is high, the same physical cable for transmitting the VPP lighting signal and the SGPIO lighting signal may be a low-speed cable.

[0038] For example, for the physical cables between the server motherboard and the hard disk backplane shown in Figure 2, the PCIE high-speed cable and the SATA high-speed cable are necessary pathways for data communication between the server motherboard and the hard disk backplane and cannot be reduced. However, due to the particularity of the anybay hard disk backplane, in actual application, each anybay slot may be inserted with different types of hard disks, and it is very likely that NVMe hard disks and SATA hard disks will coexist, and the status of each hard disk needs to be displayed and updated in real time. Therefore, the logic on the hard disk backplane needs to receive the VPP signal and the SGPIO signal (i.e., the VPP lighting signal and the SGPIO lighting signal) at the same time and interpret and process them. Therefore, the VPP lighting cable and the SGPIO lighting cable can be reduced.

[0039] Here, although different protocols are used to send the hard disk status to light up the hard disk, there are still some similarities between the VPP bus and the SGPIO bus. For example, the basic bus forms of the two are relatively similar, both containing a clock signal and a data signal, supplemented by their own different status signals. The VPP bus is based on the SMBUS bus (System Management Bus), and the status signal is Alert (alarm signal); in addition to the clock signal and data signal, the SGPIO bus has an SLOAD signal (status signal) to indicate the starting state of a group of VPP signal transmissions. In addition, the range of clock frequencies supported by the two buses is also approximately the same, and there is an overlapping frequency range. These basic conditions make it possible to reuse VPP signals and SGPIO signals.

[0040] If VPP and SGPIO signals share the same physical cable, the cable must be capable of transmitting both signals simultaneously, or alternately at the fastest possible frequency. If, within a specific time period, the CPLD on the hard drive backplane receives both VPP and SGPIO signals at a frequency (or number of times) greater than the frequency (or number of times) required to update the hard drive status, it can sample, receive, and process the signals losslessly, enabling simultaneous illumination of different types of hard drives.

[0041] For example, for servers supporting anybay hard drive backplanes, since the hard drive backplane needs to support both NVME and SATA hard drives, the lighting cables for NVME and SATA hard drives can be combined into a single time-division multiplexing signal band to reduce the number of lighting signals. The VPP lighting signal and SGPIO lighting signal can then be sent simultaneously in the time-division multiplexing signal band through time-division multiplexing. Using a unique scheduling mechanism, the VPP and SGPIO buses are sampled, switched, and transmitted simultaneously, without the need for additional software adaptation in the host controller. This approach greatly reduces the difficulty of design, installation, and operation and maintenance, and effectively reduces the material cost of the server.

[0042] As shown in Figure 3, the PCIE high-speed cable and SATA high-speed cable are respectively led out from their respective controllers and connected to the hard disk backplane through high-speed cables. However, the VPP lighting cable of the NVMe hard disk and the SGPIO lighting cable of the SATA hard disk are not directly led out after being led out from their respective controllers. Instead, they are connected to the time-division multiplexing encoding / decoding processing unit (or time-division multiplexing encoding / decoding unit, that is, the target processing unit) on the motherboard. The processing unit leads out an independent low-speed cable to the hard disk backplane as a time-division multiplexing hard disk channel. As a result, the two independent cables of VPP and SGPIO are replaced by a time-division multiplexing hard disk channel low-speed cable (which can be a lighting cable), and the number of cables and signals are reduced to half of the original number. Compared with before, each server can reduce the use of at least 4 or even more low-speed cables depending on different models.

[0043] Through this method, VPP lighting signals and SGPIO lighting signals are sent in a time-division multiplexed channel using time-division multiplexing. A unique scheduling mechanism is used to sample, switch, and transmit VPP and SGPIO signals. No additional software adaptation is required for the host controller, effectively reducing the number of cables within the server. For example, a server that commonly supports front-mounted 16*2.5-inch drives often has four hard drive backplanes, so a single server can reduce four cables. If the server has rear-mounted hard drives, even more additional cables can be eliminated.

[0044] At the same time, reducing the number of physical cables significantly simplifies design, installation, and maintenance, effectively lowering the server's material costs. From a design perspective, reducing the number of cables reduces the design burden; from a production perspective, reducing cables reduces assembly difficulty, which in turn improves production efficiency; from an O&M perspective, reducing overall system complexity facilitates equipment maintenance. More importantly, reducing the number of cables effectively reduces the cost of each server, with an estimated 2% reduction in overall cost per server after optimization. In actual applications, since server production often numbers in the tens of thousands, this can lead to significant cost savings.

[0045] The above-mentioned signal transmission system solves the problem of high signal transmission cost due to excessive number of cables connected to the hard disk backplane in the related art, thereby reducing the cost of signal transmission.

[0046] In one exemplary embodiment, a target processing unit, i.e., a processing unit that performs time-division multiplexing encoding / decoding, may be provided in the server motherboard. Similar to the aforementioned embodiment, the target processing unit may be configured to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division multiplexing manner in a time-division sequential manner based on the signal states and signal characteristics of the VPP lighting signal and the SGPIO lighting signal during signal transmission. That is, the target processing unit schedules and switches the VPP lighting signal and the SGPIO lighting signal in a time-division multiplexing manner in a time-division sequential manner based on the signal states and signal characteristics of the VPP lighting signal and the SGPIO lighting signal during signal transmission. The signal states of the VPP lighting signal and the SGPIO lighting signal during signal transmission may be the states of the VPP lighting signal and the SGPIO lighting signal during signal transmission (e.g., whether there is a signal), and the signal characteristics of the VPP lighting signal and the SGPIO lighting signal during signal transmission may be specific signal values ​​or specific signal changes of the VPP lighting signal and the SGPIO lighting signal during signal transmission.

[0047] The VPP lighting signal and the SGPIO lighting signal may include multiple control signals, which may include but are not limited to at least one of the following: a clock signal, a data signal, and a status signal. The VPP lighting signal includes a first clock signal, a first data signal, and an alarm signal (a status signal in the VPP lighting signal). The first data signal can be used to indicate the hard disk status of the NVMe hard disk corresponding to the VPP lighting signal, and the alarm signal can be used to indicate alarm information. The SGPIO lighting signal includes a second clock signal, a second data signal, and a status signal. The second data signal can be used to indicate the hard disk status of the SATA hard disk corresponding to the SGPIO lighting signal, and the status signal can be used to indicate the starting state of the SGPIO lighting signal.

[0048] When time division multiplexing is performed, the first data signal and the second data signal are both transmitted to the target processing unit through their respective data links, and after being processed by the target processing unit, they are multiplexed into a mixed data channel in the time division multiplexing channel. The first clock signal and the second clock signal are both transmitted to the target processing unit through their respective clock links, and after being processed by the target processing unit, they are multiplexed into a mixed clock channel in the time division multiplexing channel. The alarm signal and the status signal are both transmitted to the target processing unit through their respective status links, and after being processed by the target processing unit, they are multiplexed into a mixed status channel in the time division multiplexing channel. The target processing unit transmits the processed data signal, clock signal, status signal or alarm signal to the target logic device through the time division multiplexing channel. Here, the time division multiplexing channel can be a physical cable (for example, a low-speed cable) leading out of the target processing unit.

[0049] Through this embodiment, the VPP lighting signal and the SGPIO lighting signal are transmitted in a time division multiplexing manner through the time division multiplexing encoding and decoding unit, so that the purpose of simultaneously transmitting the two lighting signals using the same physical channel can be achieved.

[0050] In an exemplary embodiment, according to the internal processing state of the signal, the target processing unit (i.e., the time division multiplexing codec unit) can be divided into at least one of the following three layers: a physical layer, a channel layer, and a data layer. Each layer implements different functions of time division multiplexing codec, and after integration and unification, a full stack of the time division multiplexing codec module is formed. Taking the division into three layers as an example, the order of the three layers can be: the first layer (bottom layer) is the physical layer, the second layer (middle layer) is the channel layer, and the third layer (top layer) is the data layer.

[0051] For example, as shown in FIG3 , the time-division multiplexing codec unit may include: a physical layer, a channel layer, and a data layer. The physical layer may form a physical channel for transmitting the VPP bus signal and the SGPIO bus signal and perform switching actions. The channel layer may determine the timing of channel switching according to the channel switching conditions and the channel switching mechanism (i.e., by detecting the flag bits in the VPP signal and the SGPIO signal and determining the timing of channel switching according to specific rules). The data layer may calculate the sampling rates of the VPP data and the SGPIO data. The above three layers may constitute the full stack of the time-division multiplexing codec unit.

[0052] The physical layer can be the physical channel paths that implement different signal buses, for example, the physical channel paths that implement the VPP bus and the SGPIO bus. This can be used to form a time-division multiplexing channel and switch the VPP lighting signal and the SGPIO lighting signal transmitted in the time-division multiplexing channel. The physical layer of the target processing unit can be provided with a switching module, which is a software module configured to perform signal switching. It should be noted that the physical layer only performs the switching action; the channel switching conditions and switching mechanism are implemented by the channel layer.

[0053] Correspondingly, the switching module is configured to switch the VPP lighting signal and the SGPIO lighting signal in a time division multiplexing manner through the physical layer switching module of the target processing unit and transmit them to the target logic device through the time division multiplexing channel.

[0054] At the physical layer, the switching module can use time division multiplexing to switch the VPP lighting signal and the SGPIO lighting signal, so as to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device in a time-division multiplexing channel in an orderly manner.

[0055] For example, the structure of the physical layer is shown in Figure 4. The basic structure of the physical layer is similar to that of an analog switch. The VPP bus includes three signal lines: VPP_SCLK (i.e., the first clock signal), VPP_SDA (i.e., the first data signal), and VPP_ALERT (i.e., the alert signal). The SGPIO bus includes three signal lines: SGPIO_SCLK (i.e., the second clock signal), SGPIO_SLOAD (i.e., the status signal), and SGPIO_SDOUT (i.e., the second data signal). The VPP and SGPIO bus signals are both connected to one end of the physical layer as inputs. The time-division multiplexing channel includes three signals: MIX_CLK (i.e., the mixed clock channel), MIX_DATA (i.e., the mixed data channel), and MIX_MISC (i.e., the mixed status channel), located at the other end of the physical layer as outputs. The physical layer can switch channels, transmitting VPP or SGPIO signals to the time-division multiplexing channel. The corresponding relationship between each signal is shown in the numerical sequence in Figure 4.

[0056] Through this embodiment, the VPP lighting signal and the SGPIO lighting signal are switched by the switching module in the physical layer of the time-division multiplexing codec, so as to transmit the VPP lighting signal and the SGPIO lighting signal to the logic device on the hard disk backplane. The VPP lighting signal and the SGPIO lighting signal can be transmitted in an orderly manner, so as to achieve the purpose of simultaneously transmitting the two lighting signals using the same physical channel, thereby improving the efficiency of signal transmission.

[0057] The target processing unit's channel layer can be configured to implement VPP and SGPIO channel detection and switching mechanisms. Accordingly, the target processing unit's channel layer is configured to detect, identify, and parse the information contained in the VPP and SGPIO on-time signals. The channel layer then uses a preset time-division multiplexing method to switch between the VPP and SGPIO on-time signals within their respective time intervals, alternating between the time-division multiplexing channels and transmitting a set of separate signal streams each time.

[0058] In this embodiment, the channel layer of the target processing unit can detect, identify, and parse the information contained in the VPP lighting signal and the SGPIO lighting signal, and adopt preset rules through the channel layer to switch the VPP lighting signal and the SGPIO lighting signal in a preset time-division multiplexing manner. The VPP lighting signal and the SGPIO lighting signal are alternately used in their respective time intervals, and each time a set of respective signal code streams are transmitted. The preset rules here can be preset switching rules for the VPP lighting signal and the SGPIO lighting signal, that is, when the preset conditions are met, the VPP lighting signal or the SGPIO lighting signal is switched so that the VPP lighting signal and the SGPIO lighting signal alternately use the time-division multiplexing channel in their respective time intervals. Each switching will transmit a set of corresponding signal code streams of the VPP lighting signal or the SGPIO lighting signal.

[0059] Here, the information contained in the VPP lighting signal and the SGPIO lighting signal may be information contained in the clock signal, data signal or status signal (or alarm signal) of the VPP lighting signal and the SGPIO lighting signal. The detection, identification and analysis here may be the detection, identification and analysis of specific information contained in the VPP lighting signal and the SGPIO lighting signal. For example, by detecting the information contained in the VPP lighting signal and the SGPIO lighting signal, identifying a specific flag bit therein, and by parsing the specific flag bit, determining whether to switch the VPP lighting signal and the SGPIO lighting signal.

[0060] Through this embodiment, the timing of switching between the VPP lighting signal and the SGPIO lighting signal is determined by the channel layer, and the VPP lighting signal and the SGPIO lighting signal can be transmitted alternately using the time division multiplexing channel in different time intervals, which can improve the efficiency of signal transmission.

[0061] In an exemplary embodiment, in order to implement a preset time division multiplexing method for switching the VPP lighting signal and the SGPIO lighting signal within their respective time intervals and alternately use time division multiplexing channels, the channel layer is further configured to perform the following steps:

[0062] S1, first perform the following first channel conduction operation: conduct the VPP lighting signal to the time division multiplexing channel through the physical layer switching module to send the VPP lighting signal to the hard disk backplane. During this period, the SGPIO lighting signal is shielded.

[0063] In the initial state, the VPP lighting signal can be first connected to the time division multiplexing channel to be sent to the hard disk backplane. In order to ensure that only the VPP lighting signal is transmitted in the time division multiplexing channel at the same time, the SGPIO lighting signal is shielded during this period.

[0064] The channel layer detects and switches between VPP and SGPIO on-time signals in four steps. In the first step, in the initial state, the VPP bus is switched to the time-division multiplexing signal band, transmitting the VPP signal to the hard drive backplane. During VPP signal transmission, any changes in the SGPIO signal are ignored and unprocessed. The current signal transmitted in the channel is the VPP signal.

[0065] When performing the first channel conduction operation, it is possible to detect whether the VPP lighting signal has been sent. The completion of the VPP lighting signal can be determined based on the state of the code stream of the first data signal of the VPP lighting signal. Optionally, the above channel layer is further configured to:

[0066] After first performing the following first channel turn-on operation, detecting the signal level of the first data signal in each first clock cycle, wherein the first clock cycle is a clock cycle of the first clock signal;

[0067] When it is detected that the signal levels of the first data signal in M ​​consecutive first clock cycles are all the first preset levels, it is determined that the VPP lighting signal is sent completely, where M is a positive integer greater than or equal to 1.

[0068] After performing the first channel turn-on operation, the signal level of the first data signal in each first clock cycle (i.e., the clock cycle of the first clock signal) can be detected. If the signal level of the first data signal in M ​​consecutive first clock cycles is detected to be a first preset level, it can be determined that the VPP lighting signal has been sent. Here, the first preset level can be a preset level state, such as a high level, and M is a positive integer greater than or equal to 1.

[0069] According to this embodiment, whether the VPP lighting signal has been sent is determined by detecting the state of the VPP lighting signal, thereby improving the accuracy of signal transmission.

[0070] S2, after detecting that the VPP lighting signal has been sent, cut off the path from the VPP lighting signal to the time division multiplexing channel, detect the code stream of the status signal in the SGPIO lighting signal, and when the code stream is detected to be in a specific state, perform the following second channel conduction operation: switch the control signal group connected to the time division multiplexing channel to the SGPIO lighting signal through the physical layer switching module, so as to send the SGPIO lighting signal within one data cycle to the hard disk backplane.

[0071] After detecting that the VPP lighting signal has been sent, the path from the VPP lighting signal to the time-division multiplexing channel can be cut off. Cutting off the path from the VPP lighting signal to the time-division multiplexing channel can be achieved by stopping the VPP lighting signal from being conducted to the time-division multiplexing channel. By stopping the channel corresponding to the control signal from being conducted to the time-division multiplexing channel, the path from the control signal group to the time-division multiplexing channel is cut off, which can improve the reliability of cutting off the path from the control signal group to the time-division multiplexing channel.

[0072] After detecting that the VPP lighting signal has been sent, the code stream of the status signal in the SGPIO lighting signal can also be detected. If a specific state of the code stream of the status signal in the SGPIO lighting signal is detected, the second channel conduction operation can be performed to send the SGPIO lighting signal within one data cycle to the hard disk backplane: the control signal group conducted to the time division multiplexing channel is switched to the SGPIO lighting signal through the physical layer switching module.

[0073] The specific state of the code stream of the status signal in the SGPIO lighting signal may be the state of the signal level of the status signal in the SGPIO lighting signal. Optionally, the channel layer is further configured to:

[0074] Before performing the following second channel turn-on operation, detecting a signal level of a status signal in the SGPIO lighting signal in each second clock cycle, wherein the second clock cycle is a clock cycle of the second clock signal;

[0075] When it is detected that the signal level of the status signal in N consecutive second clock cycles is the second preset level, it is determined that the code stream of the status signal is in a specific state, where N is a positive integer greater than or equal to 1, and the status signal is used to indicate the starting position of the second data signal in one data cycle.

[0076] Before executing the second channel-on operation, the signal level of the status signal in the SGPIO lighting signal at each clock cycle (i.e., the clock cycle of the second clock signal) can be detected, and whether to execute the second channel-on operation can be determined based on the status signal. Here, the status signal can be used to indicate the starting position of the second control signal within a data cycle, that is, to indicate the starting position of sending the SGPIO lighting signal within the transmission cycle of the SGPIO lighting signal.

[0077] When it is detected that the signal level of the status signal in N consecutive second clock cycles is the second preset level, it can be determined that the code stream of the status signal is in a specific state. The second preset level can be a preset level state, for example, a low level, and N is a positive integer greater than or equal to 1.

[0078] According to this embodiment, by detecting the status signal to determine whether to send the SGPIO lighting signal and the time to send the SGPIO lighting signal, the efficiency of signal transmission can be improved.

[0079] Here, by detecting the specific state of the code stream of the status signal in the SGPIO lighting signal, it can be determined whether the SGPIO lighting signal in a data cycle has been sent. If it is detected that the status signal in the SGPIO lighting signal is a specific code stream, it can be determined that the SGPIO lighting signal in a data cycle has been sent. The data transmitted after the SGPIO lighting signal is the complete data in a data cycle. At this time, switching the SGPIO lighting signal to the time division multiplexing channel can ensure the integrity of the signal transmission and avoid data transmission errors caused by directly switching the SGPIO lighting signal.

[0080] For example, as shown in Figure 5, the SGPIO signal continuously transmits a code stream containing the current status of all SATA hard drives. Among them, the rising edge of SLOAD (status signal) represents the start of a new set of hard drive lighting information. At the next clock after the rising edge of SLOAD, Sdata (data line number) starts data transmission. Sdata transmits the lighting information of at least four hard drives.

[0081] For the second step, after detecting that the VPP signal has been transmitted, the path from VPP to the time-division multiplexing signal band is cut off. The way to detect that the VPP signal has been transmitted can be: through the level change detection of the VPP waveform. When there is no signal transmission, due to the presence of pull-up, the signal will always remain at a high level without changing. At the same time, the state of the SLoad signal in the current SGPIO signal can be detected. If the current state of the SLOAD signal is 0, the operation is not performed temporarily. According to the SGPIO protocol, if the state of the SLOAD signal is 0, the current SLOAD state is either sending L0-L3 or waiting at a low level for SDOUT to be sent. In both cases, there is data on SDOUT being output by the SATA controller. Direct switching at this time will cause data errors.

[0082] To address this issue, before disconnecting VPP from the time-division multiplexing signal band, the module can first detect the status of the SLoad signal's bitstream within the current SGPIO signal. If SLOAD is 0 for five consecutive cycles, indicating that SLOAD has completed sending L0-L3 and is waiting for SDOUT to complete sending data, the module will then switch the SLOAD and SCLK signals to the time-division multiplexing signal band. This SLOAD switching allows the module to send the rising edge of SLOAD to the destination hard drive backplane before the next SGPIO waveform is sent.

[0083] Optionally, to ensure complete transmission of the SGPIO on-signal, the SGPIO on-signal within a data cycle begins transmission in the next clock cycle of the second clock signal following the rising edge of the status signal. That is, within a data cycle, after detecting the rising edge of the status signal, transmission of the SGPIO on-signal begins in the next clock cycle. Since the server motherboard resends the SGPIO on-signal in the next clock cycle of the second clock cycle after detecting the rising edge of the status signal, transmitting the SGPIO on-signal to the hard drive backplane at this time ensures complete transmission of the SGPIO on-signal.

[0084] For example, the SDOUT signal is switched only when a rising edge of SLOAD is detected. That is, the SLOAD and SCLK signals are switched to the time-division multiplexing signal band. This is because SDOUT will transmit a set of lighting information from the beginning in the clock cycle following the rising edge of SLOAD. Switching SLOAD in advance ensures the integrity of the next set of lighting information and prevents data loss. As shown in Figure 5, a drive source (drive) consists of three bits, corresponding to a hard drive lighting signal. The first time Sload may be reasserted is when the status information is reset. The current signal transmitted in the channel is the SGPIO signal.

[0085] S3, by detecting that the status signal in the SGPIO lighting signal is a specific code stream, it is determined that after the SGPIO lighting signal in the current data cycle has been sent, the path of the SGPIO lighting signal to the time division multiplexing channel is cut off, and the time division multiplexing channel is in a disabled state. At this time, no signal is currently transmitted in the time division multiplexing channel.

[0086] If the status signal in the SGPIO lighting signal is detected as a specific code stream, it can be determined that the SGPIO lighting signal in the current data cycle has been sent. At this time, it is necessary to determine whether the control signal group needs to be switched. To this end, the path from the SGPIO lighting signal to the time-division multiplexing channel can be cut off first, and the time-division multiplexing channel can be placed in a disabled state. In the disabled state, no signal is transmitted in the time-division multiplexing channel.

[0087] For example, in the second step, the SGPIO has completed all time-division multiplexing channel switching and is transmitting SGPIO data normally. In the third step, after completing one cycle of data transmission and preparing to transmit the next SGPIO data stream, the SLOAD signal generates another rising edge. Upon detecting this rising edge, all signals from the SGPIO bus to the time-division multiplexing signal band are disconnected. This ensures that only one set of SGPIO signals is transmitted during the entire channel switching cycle. The channel is currently not transmitting any signals and is in a disabled state, awaiting detection.

[0088] S4 , performing signal detection on the first clock signal within a preset time, and determining whether to perform a first channel conducting operation or a second channel conducting operation based on a signal detection result of the first clock signal.

[0089] After disconnecting the SGPIO lighting signal from the time-division multiplexing channel, a signal detection can be performed on the first clock signal within a preset time. Based on the signal detection result of the first clock signal, it can be determined whether the subsequent transmission is a VPP lighting signal or an SGPIO lighting signal, thereby determining whether to perform the aforementioned first channel conduction operation or second channel conduction operation. Here, the preset time can be a pre-set waiting time, such as 100ms, or other time, which is not limited in this embodiment.

[0090] Optionally, the channel layer is further configured to implement the following steps to determine whether to perform the first channel turn-on operation or the second channel turn-on operation based on the signal detection result of the first clock signal:

[0091] When the signal detection result of the first clock signal indicates that the first clock signal changes within a preset time, determining to perform a first channel conduction operation;

[0092] When the signal detection result of the first clock signal indicates that the first clock signal has not changed within a preset time, it is determined to perform the second channel turning-on operation.

[0093] In this embodiment, if the signal detection result of the first clock signal indicates that the first clock signal has changed within a preset time, the change may be due to a change in the hard disk status of the first type of hard disk, and a first channel conduction operation may be performed to transmit a VPP lighting signal to update the status of the status indicator corresponding to the first type of hard disk. If the signal detection result of the first data signal indicates that the first data signal has not changed within the preset time, it can be determined that the hard disk status of the first type of hard disk has not changed, and a second channel conduction operation may be performed to transmit an SGPIO lighting signal.

[0094] For example, in step 4, after the SGPIO is disconnected, a 100ms wait timer begins. The VPP signal waveform is continuously monitored over 100ms, and the channel's current VPP or SGPIO signal is determined based on the detection result. If a VPP CLK signal change is detected during this period, the process jumps to step 1, switching the channel to VPP and transmitting the next set of VPP signals. If no VPP signal is detected during this period, the process jumps to step 2, switching the channel to SGPIO according to the rules in step 2, and transmitting the next set of SGPIO data.

[0095] The aforementioned steps S1 to S4 are repeated in a cycle, and the VPP lighting signal and the SGPIO lighting signal can be alternately transmitted to the time division multiplexing channel.

[0096] Through this embodiment, the VPP lighting signal and the SGPIO lighting signal are alternately transmitted using the same physical cable in a time division multiplexing manner, thereby achieving efficient signal transmission and improving signal transmission efficiency.

[0097] Regarding the channel layer, the signal transmission method in this embodiment is explained below with reference to an optional example. In this optional example, the first data signal is the data signal in the VPP lighting signal, the first clock signal is the clock signal (VPP_CLK) in the VPP lighting signal, the second control signal is the data signal (SDOUT) in the SGPIO lighting signal, the second clock signal is the clock signal in the SGPIO lighting signal, and the status signal is the status signal (SLOAD) in the SGPIO lighting signal.

[0098] This optional example provides a solution for displaying multiple types of hard drive status signals based on single-channel time-division multiplexing. This solution uses the channel layer to detect and switch between the VPP channel and the SGPIO channel, alternating between VPP and SGPIO signals in the time-division multiplexing channel. This reduces the number of cables connected to the hard drive backplane. As shown in Figure 6, the signal transmission method in this optional example may include the following steps:

[0099] Step 1: In the initial state, the VPP bus is first connected to the time-division multiplexing channel to transmit the VPP signal to the hard drive backplane. During the transmission of the VPP signal, no matter how the SGPIO signal changes, it will be ignored and not processed. The signal transmitted in the time-division multiplexing channel is only the VPP signal.

[0100] Step 2: Detect changes in the VPP signal. In the absence of signal transmission, the VPP signal will remain high due to the presence of a pull-up resistor (the pull-up resistor can provide part of the drive current to the load to help the driver drive a high level). If the VPP signal is detected to be high for several clock cycles, it is determined that the VPP signal has been sent.

[0101] When it is detected that the VPP signal has been sent, the state of the SLoad signal in the current SGPIO signal is detected. If the state of the current SLOAD signal is 0, no operation is performed temporarily.

[0102] When SLOAD is detected to be 0 for five consecutive cycles, the SLOAD signal and the SCLK signal are switched to the time-division multiplexing channel. At this time, SLOAD has sent L0-L3 and SDOUT is sending data. Switching SLOAD to the time-division multiplexing signal band can ensure that the rising edge of SLOAD can be sent to the hard disk backplane in advance before the next SGPIO waveform is sent. When the rising edge of SLOAD is detected, the SDOUT signal is switched to the time-division multiplexing channel. In the above process, only the SGPIO signal is transmitted in the time-division multiplexing channel.

[0103] In step 3, after the SGPIO signal switches to the time-division multiplexing channel, SGPIO data can be transmitted normally. After completing a cycle of data transmission, the next SGPIO code stream may be transmitted. At this time, the SLOAD signal will generate a rising edge. When this rising edge is detected, all signals from the SGPIO bus to the time-division multiplexing signal band can be cut off, so that only one set of SGPIO signals is transmitted during the entire channel switching cycle. During the SGPIO signal transmission process, no other signals are transmitted in the channel, and it is in a disabled state, waiting for the SGPIO signal transmission to complete.

[0104] In step X, after the SGPIO signal is cut off, a 100ms wait is started. The VPP or SGPIO signal is transmitted in the time-division multiplexing channel according to the detection result. The waveform of the VPP signal is continuously detected within 100ms. If a signal change of VPP_CLK is detected during 100ms, the process jumps to step 1, switches the VPP channel to the time-division multiplexing channel, and transmits the next set of VPP signals. If there is no VPP signal within 100ms, the process jumps to step 2, switches the SGPIO channel according to the rules of step 2, and transmits the next set of SGPIO data.

[0105] Through this optional example, by detecting the flag bits of the VPP signal and the SGPIO signal and switching them according to specific rules, the VPP signal and the SGPIO signal alternately use the same physical channel within their respective time intervals, each transmitting a set of their own signal code streams, thereby achieving time division multiplexing and minimizing cables.

[0106] The data layer can be configured to calculate and set the sampling rate of the data in the VPP lighting signal and the SGPIO lighting signal, and the sampling rate of the data in the VPP lighting signal and the SGPIO lighting signal can be calculated based on the code stream characteristics of the VPP lighting signal and the SGPIO lighting signal. Optionally, in order to implement the scheduling and switching of the VPP lighting signal and the SGPIO lighting signal in a time-division multiplexing manner in a predetermined time-division multiplexing manner, the above-mentioned data layer is configured as follows:

[0107] According to the code stream characteristics of the VPP lighting signal and the SGPIO lighting signal, the switching period and switching frequency of the time division multiplexing channel are adapted to meet the sampling rate requirements of the original data of the VPP lighting signal and the SGPIO lighting signal;

[0108] Through the data layer of the target processing unit, under the current preset time setting, data sampling is performed on the VPP lighting signal and SGPIO lighting signal switched in time division multiplexing manner at a sampling rate of 10 times per second, and the obtained sampled data is transmitted to the target logic device through the time division multiplexing channel.

[0109] At the data layer, a time-division multiplexing channel switch can be prepared within the entire time-division multiplexing mechanism, with a preset time as a detection cycle. Within the current preset time, the data layer can sample the VPP lighting signal and SGPIO lighting signal switched using time-division multiplexing at a preset sampling rate per second, and transmit the sampled data to the target logic device via the time-division multiplexing channel. The preset number of times can be 10, or any other number that meets the requirements of the VPP lighting signal and SGPIO lighting signal.

[0110] Optionally, the switching period and frequency of the time-division multiplexing channel can be adapted based on the bitstream characteristics of the VPP and SGPIO lighting signals. This adaptation is to meet the sampling rate requirements of the raw data of the VPP and SGPIO lighting signals. The result of this adaptation can be setting the aforementioned current preset time, for example, to 100ms.

[0111] For example, according to the SFF-8485 SGPIO specification, each SGPIO bitstream must contain at least four hard drive information packets, and each packet can contain three bits. Therefore, each SGPIO bitstream requires at least 12 bits of data. According to the specification, the frequency distribution of the SGPIO clock signal is within the range of 32kHz-100kHz (KiloHertz). Taking the highest frequency of 100kHz as an example, 83,333 sets of SGPIO data can be transmitted within 1s (second). Each set of data takes 12us (microsecond). Therefore, the sampled data is large enough to meet the sampling requirements of time-division multiplexing.

[0112] According to the hard drive indicator light display specification, the maximum frequency for displaying current hard drive status changes is only 4 Hz (Hertz). Since the waveform can transmit up to 83,333 sets of SGPIO data in 1 second, and the final display on the indicator only needs to be greater than 4 Hz, the SGPIO data is sampled and transmitted in time periods within 1 second. As long as there are at least 4 sets of SGPIO data transmitted within 1 second, the indicator will display a normal status. Even if all 83,333 sets of data are sampled, the LED will not display so much information.

[0113] For VPP, a commonly used clock frequency is 100kHz. The information corresponding to each VPP address occupies a total of 16 bits. Each set of VPP data contains information for up to 16 drivers. Therefore, each set of VPP data contains a maximum of 16*16=256 bits of information. At a frequency of 100kHz, a maximum of 3906 sets of VPP data streams can be contained in 1 second. The transmission time of each VPP stream is 250us. For the same reason as SGPIO, the VPP lighting display specification also follows SFF-8489 (Specification for Serial GPIO, a serial general-purpose input and output bus technology standard), and similarly, the lighting only requires a maximum of 4Hz.

[0114] Furthermore, for status switching, since the indicator light is used to observe the hard disk status, the delay in the indicator light display change when the hard disk status changes will not affect the observation. For the SGPIO indicator light function, it is sufficient and will not affect its lighting function.

[0115] Therefore, within the entire time-division multiplexing mechanism, a 100ms detection cycle can be used to prepare for a time-division multiplexing channel switch. As shown in Figure 7, a VPP stream takes 0.25ms, while an SGPIO stream takes 12us, which is negligible compared to 100ms. Therefore, within 1s, 10 VPP streams and 10 SGPIO streams can be sent, and the sampling rate meets the lighting requirements.

[0116] The above sampling rate setting and calculation can be interpreted as follows: the frequency of the information stream update must be greater than the frequency required by the hard drive status indicator. For example, assuming a sampling rate of 0.2 times / second, the SGPIO stream is sampled once every 5 seconds. During this period, the hard drive indicator status will be inaccurate. Even if the hard drive status changes, it will not be updated to the hard drive indicator in a timely manner, and will take 5 seconds to be updated.

[0117] The sampling rate is currently set to 10 times per second. Any change in the current hard drive status will be reflected to the hard drive indicator 0.1 seconds later. However, the hard drive indicator flashes at a frequency of only 4 Hz, meaning it flashes once every 0.25 seconds. The sampling rate refresh rate is far greater than the flashing frequency required by hard drive lighting specifications, so it has no impact on the hard drive status indication.

[0118] After time-division multiplexing encoding and decoding, the VPP and SGPIO signals are each transmitted 10 times within 1 second. This means that the remote hard drive backplane will receive the VPP and SGPIO signals 10 times within 1 second, fully satisfying the hard drive status indicator function. For the host and hard drive backplane, the sampling rate of 10 times / s means that VPP and SGPIO are transmitted and transmitted simultaneously, and they are unaware of the time-division multiplexing switching mechanism and channel sharing.

[0119] Through this embodiment, according to the code stream characteristics of the VPP lighting signal and the SGPIO lighting signal, the switching period and switching frequency of the time-division multiplexing channel are adapted within a preset time, and data sampling is performed through the channel layer. This can meet the sampling rate requirements of the original data of the VPP lighting signal and the SGPIO lighting signal, so that the target logic device on the target backplane can simultaneously parse the VPP signal and the SGPIO signal through the time-division multiplexing channel without causing data omission.

[0120] In one exemplary embodiment, both the VPP on-signal and the SGPIO on-signal contain drive status information. The activity bit corresponding to the drive's active status, the fault bit corresponding to the drive's fault status, and the location bit corresponding to the drive's location status are obtained by parsing the drive status information. For example, each drive's on-signal information may contain three bits: Odn.0, Odn.1, and Odn.2, representing the current drive status.

[0121] Different combinations of the active bit, the fault bit, and the locating bit indicate different hard disk states. Specifically, when the combination of the bit values ​​of the active bit, the fault bit, and the locating bit is a first value, the hard disk state indication information indicates that the corresponding hard disk is in an active state; when the combination of the bit values ​​of the active bit, the fault bit, and the locating bit is a second value, the hard disk state indication information indicates that the corresponding hard disk is not in an active state; when the combination of the bit values ​​of the active bit, the fault bit, and the locating bit is a third value, the hard disk state indication information indicates that the corresponding hard disk is not in any of the hard disk fault state, the hard disk locating state, and the hard disk rebuilding state; when the combination of the bit values ​​of the active bit, the fault bit, and the locating bit is a fourth value, the hard disk state indication information indicates that the corresponding hard disk is in a hard disk fault state; when the combination of the bit values ​​of the active bit, the fault bit, and the locating bit is a fifth value, the hard disk state indication information indicates that the corresponding hard disk is in a hard disk locating state; and when the combination of the bit values ​​of the active bit, the fault bit, and the locating bit is a sixth value, the hard disk state indication information indicates that the corresponding hard disk is in a hard disk rebuilding state.

[0122] Here, the first value to the sixth value can be a fixed value or a combination of multiple values, that is, the combination of the bit values ​​on the active bit, fault bit and positioning bit indicating the same hard disk status of the hard disk can be one or more, which is not limited in this embodiment.

[0123] For example, the corresponding relationship between different combinations of Odn.0, Odn.1 and Odn.2 and the states they represent is shown in Table 1.

[0124] Table 1

[0125] As shown in Table 1, when the combination of Odn.0, Odn.1, and Odn.2 is 1XX (X can be any value), it indicates that the hard disk is in the active state (Activity); when the combination of Odn.0, Odn.1, and Odn.2 is 0XX, it indicates that the hard disk is in the inactive state (No Activity); when the combination of Odn.0, Odn.1, and Odn.2 is X00, it indicates that the hard disk is not in any of the hard disk failure state, hard disk locating state, and hard disk rebuilding state (that is, No Fail, Locate, or Rebuild); when the combination of Odn.0, Odn.1, and Odn.2 is X01, it indicates that the hard disk is in the hard disk failure state; when the combination of Odn.0, Odn.1, and Odn.2 is X10, it indicates that the hard disk is in the hard disk locating state; and when the combination of Odn.0, Odn.1, and Odn.2 is X11, it indicates that the hard disk is in the hard disk rebuilding state.

[0126] Through this embodiment, different hard disk states are indicated according to different combinations of the active bit, the fault bit, and the positioning bit, which can improve the flexibility and accuracy of hard disk state determination and thus improve the reliability of lighting.

[0127] In an exemplary embodiment, for the lighting signal transmitted by the server mainboard in a preset time division multiplexing manner, the target logic device is further configured to:

[0128] receiving a target lighting signal, wherein the target lighting signal is any one of a VPP lighting signal and an SGPIO lighting signal, and the target lighting signal is a lighting signal of a target status indicator light corresponding to a target hard disk inserted into a target hard disk slot in a group of hard disk slots;

[0129] Extracting target status indication information corresponding to the target hard disk from the target lighting signal, wherein the target status indication information is used to indicate the hard disk status of the target hard disk;

[0130] According to the hard disk status indicated by the target status indication information and the in-place status of the target hard disk, the display status of the target status indicator light is controlled.

[0131] On the target logic device side, it can receive a target lighting signal sent by the server motherboard. The target lighting signal here can be either a VPP lighting signal or an SGPIO lighting signal. Correspondingly, the target lighting signal is the lighting signal of the target status indicator corresponding to the target hard drive inserted in the target hard drive slot in a group of hard drive slots. Here, the target hard drive is an NVMe drive or a SATA drive, and the target hard drive slot is the slot into which the target hard drive is inserted.

[0132] In response to the received target lighting signal, the target logic device can extract the target status indication information corresponding to the target hard disk from the target lighting signal. The target status indication information is used to indicate the hard disk status of the target hard disk, and control the display status of the target status indicator light according to the hard disk status indicated by the target status indication information combined with the in-place status of the target hard disk.

[0133] For example, after analyzing the current hard disk status, the logic device on the hard disk backplane can light up the corresponding LED in the lighting mode defined by the SFF-8489 specification.

[0134] In this embodiment, the hard disk status and in-place status can be obtained based on the SFF-8489 IBPI status decoding, and the hard disk in-place status can be sent to the hard disk backplane via a separate hardware signal. Optionally, the target logic device is further configured as:

[0135] Before controlling the display state of the target status indicator according to the hard disk status indicated by the target status indication information and the in-place status of the target hard disk, receiving a status indication signal corresponding to the target hard disk via a physical cable different from a lighting cable for transmitting a VPP lighting signal and an SGPIO lighting signal, wherein the status indication signal is used to indicate the in-place status of the target hard disk;

[0136] In response to the received status indication signal, the in-place status indicated by the in-place status indication information in the status indication signal is used to determine the in-place status of the target hard disk.

[0137] In this embodiment, the status indication signal for indicating the in-place status of the target hard disk can be transmitted through a physical cable different from the physical cable for transmitting the VPP lighting signal and the SGPIO lighting signal, that is, the physical cable for transmitting the status indication signal can be a physical cable other than the time division multiplexing channel.

[0138] After receiving the status indication signal, the target logic device can determine the target hard disk's in-place status based on the in-place status indicated by the in-place status indication information in the status indication signal, i.e., determine whether the target hard disk is in-place or out-of-place, and determine the target hard disk's hard disk status based on the in-place status of the target hard disk. Transmitting the hard disk's in-place status via a physical cable, distinct from a time-division multiplexing channel, can improve the reliability and timeliness of in-place status transmission.

[0139] Through this embodiment, by receiving the target lighting signal of the hard disk, extracting the status indication information of the corresponding hard disk, and lighting the corresponding indicator light based on the hard disk status indicated by the status indication information and the in-place status of the hard disk, the accuracy of lighting can be improved.

[0140] In one exemplary embodiment, a specific hard drive may have two indicator lights: one indicating the hard drive's presence and activity (e.g., the Activity LED), and the other indicating the hard drive's fault, error, location, and rebuild status (e.g., the Status LED). The target status indicator lights may include a first indicator light indicating the target hard drive's presence and activity, and a second indicator light indicating the target hard drive's fault, error, location, and rebuild status.

[0141] Correspondingly, the target logic device is also set to:

[0142] When the target hard disk is not in place, controlling the first indicator light to be in an off state;

[0143] When the target hard disk is in place and not in an active state, controlling the first indicator light to be on;

[0144] When the target hard disk is in place and active, controlling the first indicator light to flash at a first frequency;

[0145] When the target hard disk is in a hard disk positioning state, controlling the first indicator light to be in a flashing state at a first frequency, and controlling the second indicator light to be in a flashing state at the first frequency;

[0146] When the target hard disk is in a hard disk failure state, controlling the second indicator light to be in an on state;

[0147] When the target hard disk is in a hard disk rebuilding state, the second indicator light is controlled to be in a flashing state of flashing at a second frequency.

[0148] The first and second indicators can be turned on or off, flash at different frequencies, or in other display modes to indicate different hard drive states. According to the SFF-8489 hard drive indicator light specification, the indicator can have several states depending on the hard drive status, such as loc flashing at 4Hz, fail:on permanently lit, and rebuilt flashing at 1Hz. Table 2 shows the correspondence between hard drive states and indicator lights.

[0149] Table 2

[0150] As shown in Table 2, when the hard drive is not in place, the Activity LED is off and the Status LED is in any state; when the hard drive is in place and inactive, the Activity LED is on and the Status LED is in any state; when the hard drive is in place and active, the Activity LED flashes at 4 Hz and the Status LED is in any state; when the hard drive is in the locate state, both the Activity LED and the Status LED flash at 4 Hz; when the hard drive is in the hard drive failure state, the Activity LED is in any state and the Status LED is on; when the hard drive is in the hard drive rebuilding state, the Activity LED is in any state and the Status LED flashes at 1 Hz.

[0151] According to this embodiment, different combinations of two indicator lights are used to indicate different hard disk states, which can improve the flexibility of hard disk state display and the reliability of lighting.

[0152] In an exemplary embodiment, the server motherboard includes a central controller (i.e., the aforementioned first controller), and the VPP lighting signal can be generated by the central controller. Correspondingly, the central controller is configured to:

[0153] Detecting the hard disk status of each NVMe hard disk in a group of NVMe hard disks inserted in a group of hard disk slots;

[0154] When a target NVMe hard disk has an updated hard disk status in a group of NVMe hard disks, a VPP lighting signal is generated according to the hard disk status of the target NVMe hard disk.

[0155] When the central controller of the server motherboard detects that a group of NVMe hard drives (which may include one or more NVMe hard drives) are inserted into a group of hard drive slots, it can detect the hard drive status of each NVMe hard drive. If it is detected that there is an NVMe hard drive with an updated hard drive status, that is, the target NVMe hard drive, it can generate a VPP lighting signal for indicating the hard drive status of the target NVMe hard drive according to the hard drive status of the target NVMe hard drive.

[0156] Optionally, the method of generating a VPP lighting signal according to the hard disk status of the target NVMe hard disk can be: when there is a target NVMe hard disk whose hard disk status is updated in a group of NVMe hard disks, a VPP lighting signal is generated according to the hard disk status of the target NVMe hard disk, wherein the VPP lighting signal carries the target address information of the target NVMe hard disk and the target lighting information of the status indicator light corresponding to the target NVMe hard disk, and each first bit of the multiple first bits in the target lighting information corresponds to a hard disk status parameter.

[0157] Here, the central controller can generate a VPP lighting signal according to the hard disk status of the target NVMe hard disk, and the VPP lighting signal is used to indicate the updated hard disk status of the target NVMe hard disk. The VPP lighting signal can carry the target address information of the target NVMe hard disk (the address information of the NVMe hard disk on the hard disk backplane, that is, the address information of the hard disk slot corresponding to the target NVMe hard disk on the hard disk backplane), and the target lighting information of the status indicator light corresponding to the target NVMe hard disk. The target lighting information can include multiple first bits, each of which can correspond to a hard disk status parameter, that is, each first bit indicates a hard disk status parameter. Combined with the hard disk status parameter corresponding to each first bit in the target lighting information, the hard disk status of the target NVMe hard disk can be determined. In this way, the accuracy of signal transmission can be improved.

[0158] Optionally, in order to generate a VPP lighting signal, the central controller is also configured to generate a first sub-VPP lighting signal carrying the target address information based on the address information of the target NVMe hard disk, and generate a second sub-VPP lighting signal carrying the target lighting information based on the hard disk status of the target NVMe hard disk, wherein the first sub-VPP lighting signal includes fixed bits and hard disk address bits, the fixed bits include a first number of bits, and the hard disk address bits include a second number of bits.

[0159] The VPP lighting signal may include a first sub-VPP lighting signal and a second sub-VPP lighting signal, wherein the first sub-VPP lighting signal carries the target address information, and the second sub-VPP lighting signal carries the target lighting information. According to the address information of the target NVMe hard disk, the first sub-VPP lighting signal may be generated, and according to the hard disk status of the target NVMe hard disk, the second sub-VPP lighting signal may be generated. The first sub-VPP lighting signal may include a fixed bit and a hard disk address bit, the fixed bit may include a first number of bits, the bit value of the fixed bit may be a preset fixed value, and the hard disk address bit may include a second number of bits, which may be used to indicate the address information of the target NVMe hard disk.

[0160] Through the above method, the address information of the VPP lighting signal is generated according to the address information of the NVMe hard disk, and the status information of the VPP lighting signal is generated according to the status information of the NVMe hard disk, so as to obtain the VPP lighting signal, which can improve the reliability of lighting.

[0161] For example, for NVME hard drives, the VPP bus transmits a lighting code stream in the form of SMBUS, which is a standard format for I2C (Inter-Integrated Circuit, a two-wire serial bus) addressing access. As shown in Figure 8, the host sends information in I2C format, first sending 8-bit address information (including read and write bits) to enable the hard drive backplane logic to identify whether it is the current hard drive; then it sends an 8-bit lighting code stream, and the hard drive backplane logic identifies the fault, locate, and act bits. The hard drive backplane analyzes the current hard drive status according to the definition in the SFF-8489 specification and controls the LED flashing, indicating the hard drive status through the LED flashing frequency.

[0162] For VPP illumination, the host only sends a VPP signal when the hard drive status changes or an operation is performed. If the hard drive status does not update, the host will idle the VPP bus. Due to the unique VPP illumination mechanism, when the CPLD receives the signal, it interprets the VPP information and illuminates the hard drive. Because the host's VPP transmission is sporadic and unpredictable, it does not send the VPP signal continuously. Therefore, the illumination logic maintains the current interpretation status and continuously illuminates the hard drive. It will not update the hard drive illumination to the latest status until the host sends the next VPP message, refreshing the current hard drive status.

[0163] Through this embodiment, by detecting the hard disk status of each NVMe hard disk and generating a lighting signal for the status indicator light corresponding to the NVMe hard disk only when the hard disk status of the NVMe hard disk changes, the amount of lighting information required to be transmitted can be reduced, and the rationality of data transmission resource utilization can be improved.

[0164] In an exemplary embodiment, the server motherboard further includes a SATA controller (i.e., the aforementioned second controller), and the SGPIO lighting signal may be generated by the SATA controller. Correspondingly, the SATA controller is configured to:

[0165] Detecting the hard disk status of each SATA hard disk in a group of SATA hard disks inserted into a group of hard disk slots;

[0166] Generates an SGPIO lighting signal based on the hard disk status of each SATA hard disk.

[0167] The SATA controller can detect whether a SATA hard drive is inserted into a group of hard drive slots set on the hard drive backplane. When a SATA hard drive is inserted into a group of hard drive slots, the SATA controller on the server motherboard can detect the hard drive status of each SATA hard drive inserted in the group of hard drive slots and generate an SGPIO lighting signal for sequentially indicating the status of each SATA hard drive based on the hard drive status of the target SATA hard drive. Here, the SGPIO lighting signal is a lighting signal of the status indicator light corresponding to each SATA hard drive, which is used to sequentially indicate the hard drive status of each SATA hard drive.

[0168] Optionally, the SATA controller is further configured to continuously poll and send data streams, and each set of data streams sent by the SATA controller includes lighting information of the status indicator lights corresponding to each SATA hard disk.

[0169] In this embodiment, the SATA controller can continuously poll and send data streams. Specifically, the SATA controller sends a set of data streams corresponding to each SATA hard drive. Each set of data streams sent by the SATA controller includes the lighting information for the status indicator corresponding to each SATA hard drive. This approach enables continuous transmission of SGPIO lighting signals, improving signal transmission reliability.

[0170] For example, for SGPIO, the host will continuously poll and send data streams. Each set of data streams stores all the hard drive lighting information and is continuously polled and sent repeatedly. There is no waiting period or sleep time between each set of streams. The lighting logic mapped to the hard drive backplane will detect the rising edge of SLOAD. Once the rising edge is detected, it will parse the SGPIO information and turn on the hard drive. The lighting logic on the hard drive backplane does not save the lighting status of the current parsing; it parses and turns on the hard drive immediately. If the host does not send the next set of lighting information, the lighting logic will not send any lighting information to the LED within the next time period.

[0171] According to this embodiment, by detecting the hard disk status of each SATA hard disk and generating a lighting signal for the status indicator light corresponding to the SATA hard disk, the lighting accuracy can be improved.

[0172] It should be noted that the examples and application scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the contents disclosed in the above embodiments. It should be noted that the above modules, as part of the device, can run in the hardware environment shown in Figure 1 and can be implemented by software or hardware, wherein the hardware environment includes a network environment.

[0173] According to another aspect of the embodiments of the present application, a signal transmission method applied to the above-mentioned signal transmission system is also provided. The system architecture of the signal transmission system is similar to that in the above-mentioned embodiments and is not described in detail here. Optionally, as shown in FIG9 , FIG9 is a flow chart of a signal transmission method according to an embodiment of the present application. As shown in FIG9 , the flow chart includes the following steps:

[0174] Step S902: Obtain a VPP lighting signal and an SGPIO lighting signal of a target logic device to be transmitted to a target hard disk backplane, wherein the target logic device is a logic device configured to control hard disks inserted into a group of hard disk slots provided on the target hard disk backplane, the VPP lighting signal is a lighting signal corresponding to the NVMe hard disks inserted into the group of hard disk slots, and the SGPIO lighting signal is a lighting signal corresponding to the SATA hard disks inserted into the group of hard disk slots;

[0175] Step S904: Schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division and orderly manner using a preset time-division multiplexing method, so as to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device through the same lighting cable. The preset time-division multiplexing method is to continuously detect the VPP lighting signal and the SGPIO lighting signal within the time-division multiplexing period, identify and judge them based on their respective waveform characteristics, sample the continuously sent VPP lighting signal and SGPIO lighting signal, and alternately switch the VPP lighting signal and the SGPIO lighting signal to the time-division multiplexing channel according to specific signal flags and preset specific rules.

[0176] The above-mentioned signal transmission method solves the problem of high signal transmission cost caused by excessive number of cables connected to the hard disk backplane in the related art, thereby reducing the signal transmission cost.

[0177] In an exemplary embodiment, the processing unit configured to perform time division multiplexing encoding / decoding is a target processing unit, wherein the target processing unit is configured to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division multiplexing manner in an orderly manner according to the signal status and signal characteristics of the VPP lighting signal and the SGPIO lighting signal during signal transmission. The VPP lighting signal includes a first clock signal, a first data signal and an alarm signal, and the SGPIO lighting signal includes a second clock signal, a second data signal and a status signal. The first data signal and the second data signal are both transmitted through their respective data links. The first clock signal and the second clock signal are both transmitted to the target processing unit through their respective clock links, and after being processed by the target processing unit, they are multiplexed into a mixed clock channel in the time division multiplexing channel. The alarm signal and the status signal are both transmitted to the target processing unit through their respective status links, and after being processed by the target processing unit, they are multiplexed into a mixed status channel in the time division multiplexing channel. The target processing unit transmits the processed data signal, clock signal, status signal or alarm signal to the target logic device through the time division multiplexing channel.

[0178] In an exemplary embodiment, a preset time division multiplexing method is used to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division orderly manner, including:

[0179] The switching module of the physical layer of the target processing unit uses a time division multiplexing method to switch the VPP lighting signal and the SGPIO lighting signal and transmit them to the target logic device through a time division multiplexing channel.

[0180] In an exemplary embodiment, a preset time division multiplexing method is used to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division orderly manner, including:

[0181] The information contained in the VPP lighting signal and the SGPIO lighting signal is detected, identified and parsed through the channel layer of the target processing unit. The VPP lighting signal and the SGPIO lighting signal are switched in a preset time division multiplexing manner through the channel layer within their respective time intervals, and the time division multiplexing channel is alternately used to transmit a set of respective signal code streams each time.

[0182] In an exemplary embodiment, the VPP lighting signal and the SGPIO lighting signal are switched in a preset time division multiplexing manner by the channel layer within their respective time intervals, and the time division multiplexing channels are alternately used, including:

[0183] First, the following first channel conduction operation is performed: the VPP lighting signal is conducted to the time division multiplexing channel through the physical layer switching module to send the VPP lighting signal to the target hard disk backplane. During this period, the SGPIO lighting signal is shielded.

[0184] After detecting that the VPP lighting signal has been sent, the path from the VPP lighting signal to the time-division multiplexing channel is cut off, and the code stream of the status signal in the SGPIO lighting signal is detected. When the code stream is detected to be in a specific state, the following second channel conduction operation is performed: the control signal group connected to the time-division multiplexing channel is switched to the SGPIO lighting signal through the physical layer switching module, so that the SGPIO lighting signal within one data cycle is sent to the target hard disk backplane;

[0185] When the status signal in the SGPIO lighting signal is detected as a specific code stream, it is determined that the SGPIO lighting signal in the current data cycle has been sent, and the path of the SGPIO lighting signal to the time division multiplexing channel is cut off. The time division multiplexing channel is in a disabled state, and no signal is currently transmitted in the time division multiplexing channel.

[0186] Performing signal detection on the first clock signal within a preset time, and determining whether to perform a first channel conduction operation or a second channel conduction operation based on a signal detection result of the first clock signal;

[0187] The process repeats itself in this way, and the VPP lighting signal and the SGPIO lighting signal are transmitted alternately to the time division multiplexing channel.

[0188] In an exemplary embodiment, after first performing the following first channel turn-on operation, the method further includes:

[0189] detecting a signal level of the first data signal in each first clock cycle, wherein the first clock cycle is a clock cycle of the first clock signal;

[0190] When it is detected that the signal levels of the first data signal in M ​​consecutive first clock cycles are all the first preset levels, it is determined that the VPP lighting signal is sent completely, where M is a positive integer greater than or equal to 1.

[0191] In an exemplary embodiment, after first performing the following first channel turn-on operation, the method further includes:

[0192] After detecting that the VPP lighting signal has been sent, the VPP lighting signal is stopped from being conducted to the time division multiplexing channel.

[0193] In an exemplary embodiment, before performing the following second channel turn-on operation, the method further includes:

[0194] Detecting a signal level of a status signal in the SGPIO lighting signal in each second clock cycle, wherein the second clock cycle is a clock cycle of the second clock signal;

[0195] When it is detected that the signal level of the status signal in N consecutive second clock cycles is the second preset level, it is determined that the code stream of the status signal is in a specific state, where N is a positive integer greater than or equal to 1, and the status signal is used to indicate the starting position of the second data signal in one data cycle.

[0196] In an exemplary embodiment, the SGPIO lighting signal within one data cycle starts to be transmitted in the next clock cycle of the second clock signal after the rising edge of the status signal.

[0197] In an exemplary embodiment, determining whether to perform a first channel turn-on operation or a second channel turn-on operation based on a signal detection result of a first clock signal includes:

[0198] When the signal detection result of the first clock signal indicates that the first clock signal changes within a preset time, determining to perform a first channel conduction operation;

[0199] When the signal detection result of the first clock signal indicates that the first clock signal has not changed within a preset time, it is determined to perform the second channel turning-on operation.

[0200] In an exemplary embodiment, a preset time division multiplexing method is used to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division orderly manner, including:

[0201] According to the code stream characteristics of the VPP lighting signal and the SGPIO lighting signal, the switching period and switching frequency of the time division multiplexing channel are adapted to meet the sampling rate requirements of the original data of the VPP lighting signal and the SGPIO lighting signal;

[0202] Through the data layer of the target processing unit, under the current preset time setting, data sampling is performed on the VPP lighting signal and SGPIO lighting signal switched in time division multiplexing manner at a sampling rate of 10 times per second, and the obtained sampled data is transmitted to the target logic device through the time division multiplexing channel.

[0203] In an exemplary embodiment, both the VPP lighting signal and the SGPIO lighting signal include hard disk status indication information. The activity bit corresponding to the activity status of the corresponding hard disk, the fault bit corresponding to the fault error of the corresponding hard disk, and the positioning bit corresponding to the positioning status of the corresponding hard disk are obtained by parsing the hard disk status indication information, wherein:

[0204] When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a first value, the hard disk status indication information is used to indicate that the corresponding hard disk is in an active state;

[0205] When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a second value, the hard disk status indication information is used to indicate that the corresponding hard disk is not in an active state;

[0206] When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a third value, the hard disk status indication information is used to indicate that the corresponding hard disk is not in any of the hard disk fault state, the hard disk positioning state, and the hard disk rebuilding state;

[0207] When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a fourth value, the hard disk status indication information is used to indicate that the corresponding hard disk is in a hard disk fault state;

[0208] When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a fifth value, the hard disk status indication information is used to indicate that the corresponding hard disk is in the positioning hard disk state;

[0209] When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a sixth value, the hard disk status indication information is used to indicate that the corresponding hard disk is in a hard disk rebuilding state.

[0210] In an exemplary embodiment, after scheduling and switching the VPP lighting signal and the SGPIO lighting signal in a time-division and orderly manner using a preset time division multiplexing method, the method further includes:

[0211] receiving, by a target logic device, a target lighting signal, wherein the target lighting signal is any one of a VPP lighting signal and an SGPIO lighting signal, and the target lighting signal is a lighting signal of a target status indicator light corresponding to a target hard disk inserted into a target hard disk slot in a group of hard disk slots;

[0212] Extracting target status indication information corresponding to the target hard disk from the target lighting signal, wherein the target status indication information is used to indicate the hard disk status of the target hard disk;

[0213] According to the hard disk status indicated by the target status indication information and the in-place status of the target hard disk, the display status of the target status indicator light is controlled.

[0214] In an exemplary embodiment, the target status indicator light includes: a first indicator light corresponding to the in-place and active status of the target hard disk, and a second indicator light corresponding to the fault error, location, and rebuild status of the target hard disk;

[0215] According to the hard disk status indicated by the target status indication information and the in-place status of the target hard disk, the display status of the target status indicator is controlled, including:

[0216] When the target hard disk is not in place, controlling the first indicator light to be in an off state;

[0217] When the target hard disk is in place and not in an active state, controlling the first indicator light to be on;

[0218] When the target hard disk is in place and active, controlling the first indicator light to flash at a first frequency;

[0219] When the target hard disk is in a hard disk positioning state, controlling the first indicator light to be in a flashing state at a first frequency, and controlling the second indicator light to be in a flashing state at the first frequency;

[0220] When the target hard disk is in a hard disk failure state, controlling the second indicator light to be in an on state;

[0221] When the target hard disk is in a hard disk rebuilding state, the second indicator light is controlled to be in a flashing state of flashing at a second frequency.

[0222] In an exemplary embodiment, before controlling the display state of the target status indicator light according to the hard disk status indicated by the target status indication information and the in-place status of the target hard disk, the method further includes:

[0223] receiving a status indication signal corresponding to the target hard disk through a physical cable different from a lighting cable for transmitting a VPP lighting signal and an SGPIO lighting signal, wherein the status indication signal is used to indicate an in-place status of the target hard disk;

[0224] In response to the received status indication signal, the in-place status indicated by the in-place status indication information in the status indication signal is used to determine the in-place status of the target hard disk.

[0225] In an exemplary embodiment, before obtaining the virtual pin interface VPP lighting signal and the serial general purpose input and output SGPIO lighting signal of the target logic device to be transmitted to the target hard disk backplane, the method further includes:

[0226] Detecting the hard disk status of each NVMe hard disk in a group of NVMe hard disks inserted into a group of hard disk slots through a central controller of a server motherboard;

[0227] In the case where there is a target NVMe hard disk whose hard disk status is updated in a group of NVMe hard disks, a VPP lighting signal is generated according to the hard disk status of the target NVMe hard disk, wherein the VPP lighting signal is used to indicate the updated hard disk status of the target NVMe hard disk, and the VPP lighting signal carries target address information of the target NVMe hard disk and target lighting information of the status indicator light corresponding to the target NVMe hard disk, and each first bit of the multiple first bits in the target lighting information corresponds to a hard disk status parameter.

[0228] In an exemplary embodiment, when a target NVMe hard disk has an updated hard disk status in a group of NVMe hard disks, generating a VPP lighting signal according to the hard disk status of the target NVMe hard disk includes:

[0229] In the case that there is a target NVMe hard disk whose hard disk status is updated in a group of NVMe hard disks, a first sub-VPP lighting signal carrying the target address information is generated according to the address information of the target NVMe hard disk, and a second sub-VPP lighting signal carrying the target lighting information is generated according to the hard disk status of the target NVMe hard disk, wherein the first sub-VPP lighting signal includes fixed bits and hard disk address bits, the fixed bits include a first number of bits, and the hard disk address bits include a second number of bits.

[0230] In an exemplary embodiment, before obtaining the virtual pin interface VPP lighting signal and the serial general purpose input and output SGPIO lighting signal of the target logic device to be transmitted to the target hard disk backplane, the method further includes:

[0231] Detecting the hard disk status of each SATA hard disk in a group of SATA hard disks inserted into a group of hard disk slots through a SATA controller of a server motherboard;

[0232] According to the hard disk status of each SATA hard disk, an SGPIO lighting signal is generated, wherein the SGPIO lighting signal is a lighting signal of the status indicator light corresponding to each SATA hard disk, and the SGPIO lighting signal is used to indicate the hard disk status of each SATA hard disk in turn.

[0233] In an exemplary embodiment, after generating the SGPIO lighting signal according to the hard disk status of each SATA hard disk, the method further includes:

[0234] The data code stream is continuously polled and sent through the SATA controller, wherein each set of data code streams sent by the SATA controller includes lighting information of the status indicator lights corresponding to each SATA hard disk.

[0235] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are optional embodiments, and the actions and modules involved are not necessarily required by this application.

[0236] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the embodiment of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a non-volatile readable storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the method of each embodiment of the present application.

[0237] According to another aspect of the embodiments of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above method embodiments.

[0238] For optional examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementations, and this embodiment will not be described in detail here.

[0239] Obviously, those skilled in the art should understand that the various modules or steps of the above-mentioned embodiments of the present application can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented using program codes executable by the computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the embodiments of the present application are not limited to any specific combination of hardware and software.

[0240] The above are merely optional embodiments of the present application and are not intended to limit the embodiments of the present application. For those skilled in the art, the embodiments of the present application may be modified and varied in various ways. Any modifications, equivalent replacements, improvements, etc. made within the principles of the embodiments of the present application shall be included in the scope of protection of the embodiments of the present application.

Claims

1. A signal transmission system, characterized in that: include: A server motherboard, a hard disk backplane, wherein the hard disk backplane is provided with a target logic device and a group of hard disk slots, the target logic device is a logic device configured to control the hard disks inserted into the group of hard disk slots, the server motherboard is connected to the hard disk backplane via a cable, wherein: The server motherboard is configured to obtain a virtual pin interface VPP lighting signal and a serial general purpose input and output SGPIO lighting signal to be transmitted to the target logic device, wherein the VPP lighting signal is a lighting signal corresponding to a non-volatile memory standard NVMe hard disk inserted in the set of hard disk slots, and the SGPIO lighting signal is a lighting signal corresponding to a serial advanced technology attachment SATA hard disk inserted in the set of hard disk slots; and the VPP lighting signal and the SGPIO lighting signal are scheduled and switched in a time-division and orderly manner by using a preset time division multiplexing method. , so as to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device through the same lighting cable, wherein the preset time division multiplexing mode is to continuously detect the VPP lighting signal and the SGPIO lighting signal within the time division multiplexing period, identify and judge according to their respective waveform characteristics, sample the continuously sent VPP lighting signal and the SGPIO lighting signal, and switch the VPP lighting signal and the SGPIO lighting signal alternately to the time division multiplexing channel according to the specific flag bit of the signal and the preset specific rules; The target logic device is configured to receive the VPP lighting signal and the SGPIO lighting signal transmitted by the server mainboard through the lighting cable in the preset time division multiplexing manner, and control the display status of the status indicator light corresponding to the NVMe hard disk inserted in the group of hard disk slots based on the VPP lighting signal, and control the display status of the status indicator light corresponding to the SATA hard disk inserted in the group of hard disk slots based on the SGPIO lighting signal.

2. The signal transmission system according to claim 1, characterized in that: In the server mainboard, the processing unit configured to perform time division multiplexing encoding / decoding is a target processing unit, wherein the target processing unit is configured to schedule and switch the VPP lighting signal and the SGPIO lighting signal in a time-division and orderly manner according to the signal states and signal characteristics of the VPP lighting signal and the SGPIO lighting signal during signal transmission, using the preset time division multiplexing method, the VPP lighting signal includes a first clock signal, a first data signal and an alarm signal, the SGPIO lighting signal includes a second clock signal, a second data signal and a status signal, and the first data signal and the second data signal are transmitted to the target through their respective data links. The target processing unit is a clock signal processing unit, and after being processed by the target processing unit, it is multiplexed into a mixed data channel in the time division multiplexing channel. The first clock signal and the second clock signal are both transmitted to the target processing unit through their respective clock links, and after being processed by the target processing unit, they are multiplexed into a mixed clock channel in the time division multiplexing channel. The alarm signal and the status signal are both transmitted to the target processing unit through their respective status links, and after being processed by the target processing unit, they are multiplexed into a mixed status channel in the time division multiplexing channel. The target processing unit transmits the processed data signal, clock signal, status signal or alarm signal to the target logic device through the time division multiplexing channel.

3. The signal transmission system according to claim 2, characterized in that: The physical layer switching module of the target processing unit, wherein: The switching module is configured to switch the VPP lighting signal and the SGPIO lighting signal in a time division multiplexing manner through a switching module of a physical layer of the target processing unit and transmit them to the target logic device through the time division multiplexing channel.

4. The signal transmission system according to claim 3, characterized in that: The target processing unit also includes a channel layer, wherein: The channel layer of the target processing unit is configured to detect, identify and parse the information contained in the VPP lighting signal and the SGPIO lighting signal, and to switch the VPP lighting signal and the SGPIO lighting signal in their respective time intervals by adopting the preset time division multiplexing method through the channel layer, and to alternately use the time division multiplexing channel to transmit a set of respective signal code streams each time.

5. The signal transmission system according to claim 4, characterized in that: The channel layer is further configured to perform the following steps: First, the following first channel conduction operation is performed: the VPP lighting signal is conducted to the time division multiplexing channel through the switching module of the physical layer, so as to send the VPP lighting signal to the hard disk backplane, and during this period, the SGPIO lighting signal is shielded; After detecting that the VPP lighting signal has been sent, the path from the VPP lighting signal to the time division multiplexing channel is cut off, and the code stream of the status signal in the SGPIO lighting signal is detected. When the code stream is detected to be in a specific state, the following second channel conduction operation is performed: The control signal group conducted to the time division multiplexing channel is switched to the SGPIO lighting signal through the switching module of the physical layer, so as to send the SGPIO lighting signal within a data cycle to the hard disk backplane; When the state signal in the SGPIO lighting signal is detected as a specific code stream, after determining that the SGPIO lighting signal in the current data cycle has been sent, the path from the SGPIO lighting signal to the time division multiplexing channel is cut off, and the time division multiplexing channel is in a disabled state, and no signal is currently transmitted in the time division multiplexing channel; Performing signal detection on the first clock signal within a preset time, and determining to perform the first channel conducting operation or the second channel conducting operation based on the signal detection result of the first clock signal; The process repeats itself in this way, and the VPP lighting signal and the SGPIO lighting signal are transmitted alternately to the time division multiplexing channel.

6. The signal transmission system according to claim 5, characterized in that: The channel layer is further configured to detect the signal level of the first data signal in each first clock cycle after first performing the following first channel conduction operation, wherein the first clock cycle is the clock cycle of the first clock signal; when it is detected that the signal level of the first data signal in M ​​consecutive first clock cycles is the first preset level, it is determined that the VPP lighting signal has been sent, wherein M is a positive integer greater than or equal to 1.

7. The signal transmission system according to claim 5, characterized in that: The channel layer is further configured to stop conducting the VPP lighting signal to the time division multiplexing channel when it is detected that the VPP lighting signal has been sent after the first channel conduction operation is performed.

8. The signal transmission system according to claim 5, characterized in that: The channel layer is further configured to detect the signal level of the status signal in the SGPIO lighting signal in each second clock cycle before performing the following second channel conduction operation, wherein the second clock cycle is the clock cycle of the second clock signal; when it is detected that the signal level of the status signal in N consecutive second clock cycles is the second preset level, determine that the code stream of the status signal is in the specific state, wherein N is a positive integer greater than or equal to 1, and the status signal is used to indicate the starting position of the second data signal in a data cycle.

9. The signal transmission system according to claim 8, characterized in that: The SGPIO lighting signal in one data cycle starts to be transmitted in the next clock cycle of the second clock signal after the rising edge of the status signal.

10. The signal transmission system according to claim 5, characterized in that: The channel layer is also configured to implement the following steps to determine whether to perform the first channel on-operation or the second channel on-operation based on the signal detection result of the first clock signal: when the signal detection result of the first clock signal is used to indicate that the first clock signal has changed within the preset time, determine to perform the first channel on-operation; when the signal detection result of the first clock signal is used to indicate that the first clock signal has not changed within the preset time, determine to perform the second channel on-operation.

11. The signal transmission system according to claim 5, characterized in that: The target processing unit also includes a data layer, wherein: The data layer is configured to adapt the switching period and switching frequency of the time division multiplexing channel according to the code stream characteristics of the VPP lighting signal and the SGPIO lighting signal to meet the sampling rate requirements of the original data of the VPP lighting signal and the SGPIO lighting signal; through the data layer of the target processing unit, under the current preset time setting, data sampling is performed on the VPP lighting signal and the SGPIO lighting signal switched in a time division multiplexing manner at a sampling rate of 10 times per second, and the obtained sampled data is transmitted to the target logic device through the time division multiplexing channel.

12. The signal transmission system according to claim 2, characterized in that: The VPP lighting signal and the SGPIO lighting signal both contain hard disk status indication information, and the activity bit corresponding to the activity status of the corresponding hard disk, the fault bit corresponding to the fault error of the corresponding hard disk, and the positioning bit corresponding to the positioning status of the corresponding hard disk are obtained by parsing the hard disk status indication information, wherein: When the combination of the bit values ​​of the active bit, the fault bit and the positioning bit is a first value, the hard disk status indication information is used to indicate that the corresponding hard disk is in an active state; When the combination of the bit values ​​of the active bit, the fault bit and the positioning bit is a second value, the hard disk status indication information is used to indicate that the corresponding hard disk is not in an active state; When the combination of the bit values ​​of the active bit, the fault bit and the positioning bit is a third value, the hard disk status indication information is used to indicate that the corresponding hard disk is not in any of the hard disk fault state, the hard disk positioning state and the hard disk reconstruction state; When the combination of the bit values ​​of the active bit, the fault bit and the positioning bit is a fourth value, the hard disk status indication information is used to indicate that the corresponding hard disk is in a hard disk fault state; When the combination of the bit values ​​of the active bit, the fault bit and the positioning bit is a fifth value, the hard disk status indication information is used to indicate that the corresponding hard disk is in a positioning hard disk state; When the combination of the bit values ​​of the active bit, the fault bit, and the positioning bit is a sixth value, the hard disk status indication information is used to indicate that the corresponding hard disk is in a hard disk reconstruction state.

13. The signal transmission system according to any one of claims 1 to 12, characterized in that: The target logic device is further configured to receive a target lighting signal, wherein the target lighting signal is any one of the VPP lighting signal and the SGPIO lighting signal, and the target lighting signal is a lighting signal of a target status indicator light corresponding to a target hard disk inserted into a target hard disk slot in the group of hard disk slots; extracting target status indication information corresponding to the target hard disk from the target lighting signal, wherein the target status indication information is used to indicate the hard disk status of the target hard disk; and controlling the display status of the target status indicator light according to the hard disk status indicated by the target status indication information in combination with the in-place status of the target hard disk.

14. The signal transmission system according to claim 13, characterized in that: The target status indicator light comprises: a first indicator light corresponding to the in-place and active status of the target hard disk, and a second indicator light corresponding to the fault error reporting, positioning and rebuilding status of the target hard disk; The step of controlling the display state of the target status indicator light according to the hard disk state indicated by the target status indication information and the in-place state of the target hard disk comprises: When the target hard disk is not in place, controlling the first indicator light to be turned off; When the target hard disk is in place and not in an active state, controlling the first indicator light to be turned on; When the target hard disk is in an in-place state and in an active state, controlling the first indicator light to be in a flashing state at a first frequency; When the target hard disk is in a hard disk positioning state, controlling the first indicator light to be in a flashing state of flashing at the first frequency, and controlling the second indicator light to be in a flashing state of flashing at the first frequency; When the target hard disk is in a hard disk failure state, controlling the second indicator light to be in an on state; When the target hard disk is in a hard disk rebuilding state, the second indicator light is controlled to be in a flashing state of flashing at a second frequency.

15. The signal transmission system according to claim 14, characterized in that: The target logic device is also configured to receive a status indication signal corresponding to the target hard disk through a physical cable different from the lighting cable that transmits the VPP lighting signal and the SGPIO lighting signal, wherein the status indication signal is used to indicate the in-place status of the target hard disk; in response to the received status indication signal, the in-place status indicated by the in-place status indication information in the status indication signal is used to determine the in-place status of the target hard disk.

16. The signal transmission system according to claim 1, characterized in that: The server motherboard comprises: The central controller is configured to detect the hard disk status of each NVMe hard disk in a group of NVMe hard disks inserted in the group of hard disk slots; when there is a target NVMe hard disk whose hard disk status is updated in the group of NVMe hard disks, the VPP lighting signal is generated according to the hard disk status of the target NVMe hard disk, wherein the VPP lighting signal is used to indicate the updated hard disk status of the target NVMe hard disk, and the VPP lighting signal carries the target address information of the target NVMe hard disk and the target lighting information of the status indicator light corresponding to the target NVMe hard disk, and each of the multiple first bits in the target lighting information corresponds to a hard disk status parameter.

17. The signal transmission system according to claim 16, characterized in that: The central controller is further configured to generate, when there is a target NVMe hard disk whose hard disk status is updated in the group of NVMe hard disks, a first sub-VPP lighting signal carrying the target address information according to the address information of the target NVMe hard disk, and generate a second sub-VPP lighting signal carrying the target lighting information according to the hard disk status of the target NVMe hard disk, wherein the first sub-VPP lighting signal includes fixed bits and hard disk address bits, the fixed bits include a first number of bits, and the hard disk address bits include a second number of bits.

18. The signal transmission system according to claim 1, characterized in that: The server motherboard also includes: The SATA controller is configured to detect the hard disk status of each SATA hard disk in a group of SATA hard disks inserted into the group of hard disk slots; and generate the SGPIO lighting signal according to the hard disk status of each SATA hard disk, wherein the SGPIO lighting signal is a lighting signal of a status indicator light corresponding to each SATA hard disk, and the SGPIO lighting signal is used to indicate the hard disk status of each SATA hard disk in turn.

19. The signal transmission system according to claim 18, characterized in that: The SATA controller is further configured to continuously poll and send data code streams, wherein each set of data code streams sent by the SATA controller includes lighting information of the status indicator lights corresponding to each SATA hard disk.

20. A signal transmission method, characterized in that: include: Obtain a virtual pin interface VPP lighting signal and a serial general purpose input and output SGPIO lighting signal of a target logic device to be transmitted to a hard disk backplane, wherein the target logic device is a logic device configured to control hard disks inserted into a group of hard disk slots provided on the hard disk backplane, the VPP lighting signal is a lighting signal corresponding to a non-volatile memory standard NVMe hard disk inserted into the group of hard disk slots, and the SGPIO lighting signal is a lighting signal corresponding to a serial advanced technology attachment SATA hard disk inserted into the group of hard disk slots; The VPP lighting signal and the SGPIO lighting signal are scheduled and switched in a time-division and orderly manner using a preset time-division multiplexing method, so as to transmit the VPP lighting signal and the SGPIO lighting signal to the target logic device through the same lighting cable, wherein the preset time-division multiplexing method is to continuously detect the VPP lighting signal and the SGPIO lighting signal within the time-division multiplexing period, identify and judge according to their respective waveform characteristics, sample the continuously sent VPP lighting signal and the SGPIO lighting signal, and alternately switch the VPP lighting signal and the SGPIO lighting signal to the time-division multiplexing channel according to the specific flag bit of the signal and the preset specific rules.

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