Memory fault detection method, system and apparatus, medium and server

Abstract

The present application relates to the field of server security. Disclosed are a memory fault detection method, system and apparatus, a nonvolatile readable storage medium and a server, which are used for solving the problem of relatively low reliability in memory fault detection and early warning. The method comprises: monitoring the operating state of a memory, so as to acquire error information of the memory; on the basis of the error information, determining the number of correctable errors occurring in the memory; when the number of the correctable errors reaches a preset triggering number, counting target detection parameters on the basis of the error information; and on the basis of the target detection parameters, determining a fault detection result of the memory. Therefore, the present application uses the number of correctable errors only as a trigger condition, and, after the trigger condition is triggered, will further calculate the target detection parameters on the basis of the error information, so as to perform in-depth analysis and understanding on the relationship between the number of correctable errors occurring in of memories and faults, rather than only considering the total number of correctable errors, thus improving the reliability and accuracy of fault analysis.

Description

Memory fault detection method, system, device, medium and server

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on October 17, 2023, with application number 202311338966.1, and entitled “A Memory Fault Detection Method, System, Device, Medium and Server,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present application relates to the field of server security, and in particular to a memory fault detection method, system, device, non-volatile readable storage medium and server. Background Art

[0004] Server memory failure early warning technology is critical to ensuring stable server operations. A memory failure can cause server performance degradation or even crashes, resulting in significant losses for users and businesses. By monitoring and analyzing the operating status of server memory, this technology aims to proactively identify potential failure risks and take timely action to avoid or mitigate their impact.

[0005] Specifically, early warning technology mainly covers memory fault monitoring. By setting monitoring points, the operating status of the memory is monitored in real time, including indicators such as fault conditions, the number of CEs (corrected errors) and UCEs (uncorrected errors). Current monitoring solutions usually only determine whether to issue a fault warning based on the comparison results of the total number of CEs and the threshold. This solution may not fully reflect the situation of memory failures. For example, when the cumulative number of CEs reaches the threshold over a long period of time, it does not mean that the memory will definitely fail, so a fault warning may not be necessary. Therefore, it is necessary to conduct an in-depth analysis and understanding of the relationship between the number of memory CEs and failures to improve the reliability and accuracy of fault analysis.

[0006] Summary of the Invention

[0007] The purpose of this application is to provide a memory fault detection method, system, device, non-volatile readable storage medium and server, which only uses the number of correctable errors as a trigger condition. After this trigger condition is triggered, the target detection parameters will be further calculated based on the error information to conduct an in-depth analysis and understanding of the relationship between the number of correctable errors occurring in the memory and the fault, and not just consider the total number of correctable errors, thereby improving the reliability and accuracy of fault analysis.

[0008] To solve the above technical problems, the present application provides a memory fault detection method, comprising:

[0009] Monitor the operating status of the memory and obtain memory error information;

[0010] Determine the number of correctable errors that occurred in the memory based on the error information;

[0011] When the number of correctable errors reaches a preset trigger number, target detection parameters are determined based on the error information;

[0012] The memory fault detection result is determined according to the target detection parameter, and whether a fault warning is issued is determined according to the fault detection result.

[0013] In one embodiment, monitoring the operating status of the memory and obtaining memory error information includes:

[0014] Monitors the operating status of the memory and determines the error type when a memory error occurs, including hard errors and soft errors.

[0015] In one embodiment, when a memory error occurs, the method further includes:

[0016] A memory unit where an error occurs is determined, and address information of the memory unit where the error occurs is obtained.

[0017] In one embodiment, determining target detection parameters based on error information includes:

[0018] Determine the hard fault unit based on the number of hard errors and the address information of the memory unit;

[0019] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0020] The fault detection result of the memory is determined according to the number of hard fault units, and whether to issue a fault warning is determined according to the fault detection result.

[0021] In one embodiment, determining target detection parameters based on error information includes:

[0022] Determine the soft fault unit according to the number of soft errors and the address information of the memory unit;

[0023] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0024] The fault detection result of the memory is determined according to the number of soft fault units, and whether to issue a fault warning is determined according to the fault detection result.

[0025] In one embodiment, determining a fault detection result of a memory according to a target detection parameter, and determining whether to issue a fault warning according to the fault detection result, includes:

[0026] The fault detection result of the memory is comprehensively determined according to the number of hard fault units and the number of soft fault units, and whether to perform a fault warning is determined according to the fault detection result.

[0027] In one embodiment, comprehensively determining a memory fault detection result based on the number of hard fault units and the number of soft fault units, and determining whether to issue a fault warning based on the fault detection result, includes:

[0028] Calculating a first ratio of the number of hard faulty cells to the number of total faulty cells, where the number of total faulty cells is the sum of the number of hard faulty cells and the number of soft faulty cells;

[0029] determining whether the first ratio reaches a first threshold;

[0030] If the first ratio reaches a first threshold, it is determined that there is a risk of failure in the memory, and a failure warning is issued.

[0031] In one embodiment, a plurality of memory cells are arranged in an array structure; determining target detection parameters based on error information includes:

[0032] Determine the number of memory cells in each row where errors occur according to address information of the memory cells where errors occur;

[0033] Determining a row in which the number of memory cells having errors exceeds a first preset number as a faulty row;

[0034] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0035] The fault detection result of the memory is determined according to the number of faulty rows, and whether a fault warning is issued is determined according to the fault detection result.

[0036] In one embodiment, determining a memory fault detection result based on the number of faulty rows, and determining whether to issue a fault warning based on the fault detection result, includes:

[0037] Determining whether the number of faulty rows reaches a second threshold;

[0038] If the number of faulty rows reaches a second threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0039] In one embodiment, a plurality of memory cells are arranged in an array structure; determining target detection parameters based on error information includes:

[0040] Determine the number of memory cells in each column where errors occur according to address information of the memory cells where errors occur;

[0041] determining a column in which the number of memory cells having errors exceeds a second preset number as a faulty column;

[0042] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0043] The fault detection result of the memory is determined according to the number of fault columns, and whether to issue a fault warning is determined according to the fault detection result.

[0044] In one embodiment, determining a fault detection result of a memory according to the number of fault columns, and determining whether to issue a fault warning according to the fault detection result, includes:

[0045] determining whether the number of fault columns reaches a third threshold;

[0046] If the number of fault columns reaches a third threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0047] In one embodiment, the array structure of the memory unit is divided into a plurality of regions; and determining the target detection parameter according to the error information includes:

[0048] Determine the number of memory cells in each area where errors occur based on address information of the memory cells in which errors occur;

[0049] determining a region where the number of memory cells having errors exceeds a third preset number as a fault region;

[0050] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0051] The fault detection result of the memory is determined according to the number of fault areas, and whether to issue a fault warning is determined according to the fault detection result.

[0052] In one embodiment, determining a fault detection result of a memory according to the number of fault areas, and determining whether to issue a fault warning according to the fault detection result, includes:

[0053] determining whether the number of fault areas reaches a fourth threshold;

[0054] If the number of fault areas reaches a fourth threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0055] In one embodiment, after determining to perform a fault warning, the method further includes:

[0056] Generates fault logs and controls memory restart or power-off or switching to backup memory.

[0057] In one embodiment, determining target detection parameters based on error information includes:

[0058] Determine the frequency of correctable errors based on the error information;

[0059] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0060] Determine whether there is a frequency sudden increase point according to the frequency, and the frequency change rate of the frequency sudden increase point is greater than the change rate threshold;

[0061] If there is a sudden frequency increase, it is determined that there is a risk of memory failure and a failure warning is issued.

[0062] In one embodiment, determining a frequency of correctable errors according to the error information includes:

[0063] Obtain the number of correctable errors that occur in the memory within a plurality of consecutive first time periods;

[0064] Determine whether there is a frequency surge point based on the frequency, including:

[0065] Determine whether a difference between the number of correctable errors that occur in the memory in the current first time period and the number of correctable errors that occur in the memory in the previous first time period is greater than a number threshold;

[0066] If the difference between the number of correctable errors occurring in the memory in the current first time period and the number of correctable errors occurring in the memory in the previous first time period is greater than the number threshold, it is determined that a frequency sudden increase point exists in the current first time period.

[0067] In one embodiment, determining a frequency of correctable errors according to the error information includes:

[0068] Obtaining a second time period in which the number of consecutive correctable errors reaches a preset trigger number;

[0069] Determine whether there is a frequency surge point based on the frequency, including:

[0070] Determining whether a difference between the current second time period and the previous second time period is greater than a time threshold;

[0071] If the difference between the current second time period and the previous second time period is greater than the time threshold, it is determined that there is a mutation point in the current second time period.

[0072] In one embodiment, determining whether a frequency sudden increase point exists according to the frequency includes:

[0073] The significance level is calculated according to the preset formula:

[0074] Among them, t k is the second time period corresponding to the frequency mutation point, t j is the jth second time period, n is the number of all second time periods obtained, sgn(·) is the sign function, U k，n is the statistic corresponding to the kth second time period, U k-1，n is the statistic corresponding to the k-1th second time period, P k is the significance level, exp(·) is the exponential function;

[0075] When the significance level is not greater than the confidence level, it is determined that there is a frequency mutation point; otherwise, it is determined that there is no frequency mutation point.

[0076] To solve the above technical problems, the present application also provides a memory fault detection system, comprising:

[0077] A monitoring unit is used to monitor the operating status of the memory and obtain memory error information;

[0078] a number determination unit, configured to determine the number of correctable errors that occur in the memory according to the error information;

[0079] a parameter determination unit, configured to determine target detection parameters based on error information when the number of correctable errors reaches a preset trigger number;

[0080] The fault warning unit is used to determine the fault detection result of the memory according to the target detection parameter, and determine whether to perform a fault warning according to the fault detection result.

[0081] To solve the above technical problems, the present application further provides a memory fault detection device, comprising:

[0082] Memory for storing computer programs;

[0083] A processor is configured to implement the steps of any one of the above memory fault detection methods when storing a computer program.

[0084] To solve the above technical problems, the present application also provides a computer non-volatile readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the memory fault detection method as described above are implemented.

[0085] To solve the above technical problems, the present application also provides a server, including the memory fault detection device as described above.

[0086] The present application provides a memory fault detection method, system, device, non-volatile readable storage medium and server, which relates to the field of server security and is used to solve the problem of low reliability of memory fault detection and early warning. This solution obtains memory error information by monitoring the operating status of the memory, and determines the number of correctable errors that occur in the memory based on the error information; when the number of correctable errors reaches a preset trigger number, the target detection parameters are counted based on the error information, and the memory fault detection result is determined based on the target detection parameters. It can be seen that the present application only uses the number of correctable errors as a trigger condition. After this trigger condition is triggered, the target detection parameters will be further calculated based on the error information to conduct an in-depth analysis and understanding of the relationship between the number of correctable errors that occur in the memory and the fault, and not just consider the total number of correctable errors, thereby improving the reliability and accuracy of fault analysis. BRIEF DESCRIPTION OF THE DRAWINGS

[0087] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0088] FIG1 is a flow chart of a memory fault detection method provided by the present application;

[0089] FIG2 is a schematic diagram of a faulty line provided by the present application;

[0090] FIG3 is a schematic diagram of a fault column provided by the present application;

[0091] FIG4 is a schematic diagram of a fault area provided by the present application;

[0092] FIG5 is a schematic diagram of a method for counting the time when a preset trigger number is reached each time provided by the present application;

[0093] FIG6 is a schematic diagram of a memory fault detection system provided by the present application;

[0094] FIG7 is a schematic diagram of a memory fault detection device provided by the present application;

[0095] FIG8 is a schematic diagram of a computer non-volatile readable storage medium provided by the present application;

[0096] FIG9 is a structural block diagram of a server provided in this application. DETAILED DESCRIPTION

[0097] The core of this application is to provide a memory fault detection method, system, device, non-volatile readable storage medium and server, which only uses the number of correctable errors as a trigger condition. After this trigger condition is triggered, the target detection parameters will be further calculated based on the error information to conduct an in-depth analysis and understanding of the relationship between the number of correctable errors in the memory and the fault, and not just consider the total number of correctable errors, thereby improving the reliability and accuracy of fault analysis.

[0098] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0099] To solve the above technical problems, the present application provides a memory fault detection method, as shown in FIG1 , comprising:

[0100] S11: monitor the operating status of the memory and obtain memory error information;

[0101] This step is to monitor the operating status of the memory and obtain the error information of the memory. Specifically, the memory fault detection method monitors the operating status of the memory in real time by setting monitoring points, and these monitoring points can collect the error information of the memory. The error information may include indicators such as the fault conditions that occurred in the memory, the number of correctable errors (CE), and the number of uncorrectable errors (UCE). By monitoring these indicators, we can fully understand the status of the memory and possible fault conditions, and provide the necessary data support for subsequent fault analysis. The purpose of this step is to obtain the error information of the memory for subsequent fault warning analysis and detection result determination.

[0102] S12: determining the number of correctable errors that occur in the memory according to the error information;

[0103] In this step, the number of correctable memory errors is determined based on the error information. During the monitoring process, when a memory error is detected, the system records the error information and performs analysis based on this information. Specifically, the system identifies and calculates the number of correctable errors. Correctable errors are a type of error that occurs in memory and can be automatically corrected by the system without significantly impacting normal system operation.

[0104] By analyzing the error information, the system can accurately determine the number of correctable errors that occurred in the memory. Compared to considering only the total number, the method in this application can more accurately reflect the memory failure condition by meticulously calculating and recording the number of occurrences of each error. This can improve the accuracy of fault analysis and avoid the drawback of determining whether to issue a warning based solely on the total number of errors. After this step is completed, the target detection parameters will be further calculated based on the error information to more deeply analyze and understand the relationship between the number of correctable errors and memory failures, thereby improving the reliability of fault detection and warning.

[0105] S13: When the number of correctable errors reaches a preset trigger number, determining target detection parameters based on the error information;

[0106] When the cumulative number of correctable errors reaches a preset trigger count, or threshold, the system performs further fault detection to further analyze and understand the relationship between the number of correctable errors and memory failures. This error information is then used to calculate target detection parameters, improving the reliability and accuracy of fault analysis.

[0107] That is, during the monitoring process, when the number of correctable errors reaches the preset trigger condition, the system will analyze the error information and calculate the target detection parameters. Target detection parameters are used, following the number of correctable errors, to more deeply analyze and understand the relationship between memory failures and the number of correctable errors. Specifically, based on the error information, the system will conduct a more detailed analysis of the memory operating status, identify potential failure factors, and calculate target detection parameters. Target detection parameters are derived through further analysis of the error information and can include error type, error frequency, error pattern, etc. Target detection parameters can include a variety of indicators, such as the total amount of memory CE, total amount of UCE, failure rate, etc. These indicators can help the system further analyze and determine whether there is a serious fault in the memory, thereby determining whether timely fault detection and early warning are required.

[0108] By using the number of correctable errors as a trigger condition and making it an important part of the memory fault detection process, the error information is further analyzed in this step, so that the memory fault condition can be analyzed and judged more accurately, and the reliability and accuracy of the fault analysis can be improved.

[0109] S14: determining a fault detection result of the memory according to the target detection parameter, and determining whether to issue a fault warning according to the fault detection result.

[0110] In the above process, target detection parameters have been calculated based on the error information. In this step, these parameters are used to further analyze and determine whether the memory is faulty. Based on the target detection parameters, the system will evaluate the memory fault condition. These parameters may include error type, error frequency, error pattern, and failure rate. The system can determine whether the memory is faulty by comparing it with a preset threshold or reference value.

[0111] Based on the analysis of the target detection parameters, the system will determine the memory's fault detection results. If the results indicate a memory fault or a risk of failure, the system will trigger a fault warning, sending an alert or notifying relevant personnel for action. Conversely, if the results indicate no fault, the system will not issue a fault warning, as no additional repair or replacement is required.

[0112] In summary, this embodiment can improve the reliability and accuracy of memory fault analysis, and can comprehensively consider more indicators and factors, rather than being limited to the total number of correctable errors, so as to more comprehensively judge the health status of the memory and take appropriate preventive or maintenance measures.

[0113] As shown in Figure 9, it should be noted that the memory detection method in the present application can be but is not limited to being applied to the baseboard management controller (BMC) in the server. The BMC obtains memory error information through the integrated management controller (IMC) in the central processing unit, and performs fault detection based on the obtained error information to determine whether to issue a fault warning.

[0114] In one embodiment, monitoring the operating status of the memory and obtaining memory error information includes:

[0115] Monitors the operating status of the memory and determines the error type when a memory error occurs, including hard errors and soft errors.

[0116] In this embodiment, in the memory fault detection method, while monitoring the operating status of the memory, the error type must also be determined, including hard errors and soft errors. This is a specific implementation of step S11. While monitoring the operating status of the memory, the system obtains memory error information in real time. When a memory error occurs, the system determines the error type based on the error information, i.e., hard error or soft error. A hard error refers to physical damage to the memory chip or circuit board, such as a burned-out chip or a disconnected wire. In contrast, soft errors are typically caused by electronic signal interference or operational errors, such as bit flips or voltage noise.

[0117] Determining the error type is crucial for subsequent fault analysis and troubleshooting. For example, a hard error might require replacing the memory chip or circuit board to resolve the issue, while a soft error might require adjusting parameters like memory voltage or timing.

[0118] By monitoring the memory operating status and obtaining error information, the system can accurately determine whether the memory has a hard error or a soft error, and take appropriate measures based on the error type to improve the reliability and stability of the memory.

[0119] In one embodiment, when a memory error occurs, the method further includes:

[0120] A memory unit where an error occurs is determined, and address information of the memory unit where the error occurs is obtained.

[0121] In this embodiment, when monitoring the operating status of the memory, when an error occurs in the memory, in addition to determining the error type, it is also possible to determine which specific memory unit has an error and obtain the address information of the memory unit. When implementing this method, the operating status of the memory can be obtained by monitoring the memory regularly or in real time. When an error is detected, it is possible to further determine which memory unit has an error. Specifically, the memory unit in which the error occurs can be determined by recording the memory address information when the error occurs, and obtaining the address information of the memory unit. In this way, the specific memory unit that caused the error can be accurately located, which is helpful for subsequent error correction or fault warning processing of the memory unit.

[0122] Such a function of determining and obtaining memory unit address information can be used to improve the accuracy and effectiveness of memory fault detection, facilitate timely processing of memory errors, and prevent faults from spreading and affecting the normal operation of the system.

[0123] In one embodiment, determining target detection parameters based on error information includes:

[0124] Determine the hard fault unit based on the number of hard errors and the address information of the memory unit;

[0125] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0126] The fault detection result of the memory is determined according to the number of hard fault units, and whether to issue a fault warning is determined according to the fault detection result.

[0127] In one embodiment, a process involves determining target detection parameters based on error information, determining memory fault detection results based on the target detection parameters, and further determining whether to issue a fault warning. In a specific implementation, once an error occurs, the system identifies the hard-faulted memory unit based on the number of hard errors and the address information of the memory unit where the error occurred. By counting the number of hard errors and recording the address information of the memory unit where the error occurred, it is possible to determine which memory units have hard faults. Based on the target detection parameters, the system can further analyze the memory fault condition and determine the memory fault detection results based on predefined rules. For example, if the number of hard-faulted units exceeds a preset threshold, the system may determine that the entire memory is faulty. Based on the fault detection results, the system can determine whether to issue a fault warning. If the system determines that a memory fault exists, the warning mechanism can trigger appropriate actions, such as sending an alert to notify the administrator or taking emergency repair measures to prevent the fault from causing more serious impact on other systems.

[0128] This embodiment implements a process for determining target detection parameters based on error information, determining memory fault detection results, and issuing fault warnings. Through this process, the system can monitor the memory status in real time and respond quickly when a fault occurs, ensuring system reliability and stability.

[0129] In one embodiment, determining target detection parameters based on error information includes:

[0130] Determine the soft fault unit according to the number of soft errors and the address information of the memory unit;

[0131] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0132] The fault detection result of the memory is determined according to the number of soft fault units, and whether to issue a fault warning is determined according to the fault detection result.

[0133] This embodiment describes a process of determining target detection parameters according to error information in a memory fault detection method, including determining soft fault units and determining the number of soft fault units.

[0134] In one embodiment, when a soft error occurs in memory, the system counts the number of soft errors and records the address information of the memory unit where the error occurred. By counting the number of soft errors and recording the address information of the memory unit where the error occurred, it is possible to determine which memory units have soft faults. Based on the number of soft errors and the address information of the memory unit, the system can determine the soft fault unit. A soft fault unit is a memory unit that has experienced a soft error during operation.

[0135] Based on the target detection parameters, the system can further analyze the memory fault condition and determine the memory fault detection result based on the set rules. For example, if the number of soft fault units exceeds a preset threshold, the system may determine that the entire memory is faulty.

[0136] Based on the fault detection results, the system can decide whether to issue a fault warning. If the system determines that there is a memory fault, the warning mechanism can trigger appropriate actions, promptly notifying the administrator or taking corrective measures to prevent the fault from causing more serious impact on other systems.

[0137] This embodiment implements a process for determining target detection parameters based on error information, determining memory fault detection results, and issuing fault warnings, particularly for handling soft errors. Through this process, the system can promptly detect and respond to soft faults in memory, improving system reliability and stability.

[0138] In one embodiment, determining a fault detection result of a memory according to a target detection parameter, and determining whether to issue a fault warning according to the fault detection result, includes:

[0139] The fault detection result of the memory is comprehensively determined according to the number of hard fault units and the number of soft fault units, and whether to perform a fault warning is determined according to the fault detection result.

[0140] In this embodiment, a method is proposed for determining a fault detection result of a memory according to a target detection parameter, and determining whether to perform a fault warning according to the fault detection result.

[0141] First, this method comprehensively determines the memory fault detection results based on the number of hard fault cells and soft fault cells. Hard fault cells refer to memory cells that have experienced hard errors, while soft fault cells refer to memory cells that have experienced soft errors. By counting the number of hard and soft fault cells, the memory fault condition can be assessed.

[0142] The memory fault detection result is determined based on the number of hard fault cells and soft fault cells. Different fault severity levels can be set based on the number of fault cells. For example, if the number of hard fault cells and soft fault cells is both 0, the memory can be determined to be functioning normally. If the number of hard fault cells and soft fault cells exceeds a certain threshold, the memory is determined to be faulty.

[0143] The decision to issue a fault warning is based on the fault detection results. Different warning levels or measures can be set based on the severity of the fault. For example, if a hard fault exists in the memory, more stringent warning measures are required, such as immediately notifying the system administrator for troubleshooting or replacing the memory. If only a soft fault exists in the memory, the warning process can be delayed or other less severe repair measures can be taken.

[0144] This embodiment can comprehensively consider hard faults and soft faults, thereby more accurately evaluating the fault condition of the memory and setting corresponding warning levels or measures according to the degree of the fault, thereby improving the detection and warning effects of memory faults and reducing the impact on system operation.

[0145] In one embodiment, comprehensively determining a memory fault detection result based on the number of hard fault units and the number of soft fault units, and determining whether to issue a fault warning based on the fault detection result, includes:

[0146] Calculating a first ratio of the number of hard faulty cells to the number of total faulty cells, where the number of total faulty cells is the sum of the number of hard faulty cells and the number of soft faulty cells;

[0147] determining whether the first ratio reaches a first threshold;

[0148] If the first ratio reaches a first threshold, it is determined that there is a risk of failure in the memory, and a failure warning is issued.

[0149] Analysis of extensive CE and UCE data reveals that UCEs are typically dominated by hard errors, and hard errors are more common than soft errors just before a memory failure. Statistics show that hard errors account for approximately 60% of all CEs before a UCE, while hard-failed cells account for less than 10% of all failed cells. However, the proportion of hard-failed and hard-errored cells increases significantly in the period immediately before a memory UCE. Therefore, the ratio of soft-failed to hard-failed cells is crucial information for warning of memory failures.

[0150] Therefore, this embodiment provides an implementation scheme for a memory fault detection method. This method first determines the number of hard fault cells and soft fault cells by monitoring the operating status of the memory and obtaining error information. Then, a first ratio of the number of hard fault cells to the total number of fault cells is calculated. The total number of fault cells is the sum of the number of hard fault cells and the number of soft fault cells. Next, a determination is made as to whether the first ratio reaches a first threshold. If the first ratio reaches the first threshold, a determination is made that a memory fault risk exists, and a fault warning is issued.

[0151] This solution aims to provide comprehensive memory fault detection results by comprehensively evaluating faulty memory cells and issuing early warnings based on these results. By calculating the ratio of hard fault cells to total faulty cells, the overall memory fault status can be determined. If the first ratio reaches a first threshold, the proportion of hard faults exceeds the preset threshold, indicating that the memory is at risk of failure and requiring a fault warning.

[0152] The advantage of this embodiment is that it comprehensively considers both hard and soft faults and makes judgments by calculating ratios, improving the accuracy and comprehensiveness of memory fault detection. Furthermore, fault warnings based on fault detection results allow for timely action to prevent serious impacts to the system caused by memory faults.

[0153] As shown in FIG2 , in one embodiment, a plurality of memory cells are arranged in an array structure; determining target detection parameters based on error information includes:

[0154] Determine the number of memory cells in each row where errors occur according to address information of the memory cells where errors occur;

[0155] Determining a row in which the number of memory cells having errors exceeds a first preset number as a faulty row;

[0156] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0157] The fault detection result of the memory is determined according to the number of faulty rows, and whether a fault warning is issued is determined according to the fault detection result.

[0158] In this embodiment, a plurality of memory cells are arranged in an array structure. The method of this embodiment includes the following steps: first, determining a target detection parameter based on the error information. Among them, based on the address information of the memory cell where the error occurs, the number of memory cells in each row where the error occurs is determined. Next, the row where the number of memory cells where the error occurs exceeds a first preset number is determined as a faulty row. This means that when the number of memory cells in a row where the error occurs exceeds a preset threshold, the row will be determined as a faulty row. Then, the fault detection result of the memory is determined based on the target detection parameter. This means that based on the number of faulty rows, the fault condition of the memory can be determined. For example, when the number of faulty rows exceeds a certain number, it can be determined that the entire memory has a fault. Finally, it is determined whether to perform a fault warning based on the fault detection result. If it is determined that the memory has a fault, corresponding warning measures can be taken, such as sending an alarm message or notifying maintenance personnel to repair it.

[0159] The method in this embodiment can effectively detect memory faults, and by setting appropriate target detection parameters and fault warning strategies, it can discover memory faults in advance and take measures to repair them, thereby improving the reliability and stability of the system.

[0160] In one embodiment, determining a memory fault detection result based on the number of faulty rows, and determining whether to issue a fault warning based on the fault detection result, includes:

[0161] Determining whether the number of faulty rows reaches a second threshold;

[0162] If the number of faulty rows reaches a second threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0163] This embodiment provides a detailed description and explanation of a scenario in the aforementioned embodiment. This embodiment proposes a method for determining memory fault detection results based on the number of faulty rows, and determining whether to issue a fault warning based on the fault detection results. First, it is necessary to determine whether the number of faulty rows reaches a second threshold. This second threshold can be a pre-set threshold used to determine whether the memory is at risk of failure.

[0164] If the number of faulty rows reaches a second threshold, the memory is considered at risk of failure. In this case, a fault warning is required, sending an alert or notification to relevant personnel or systems for further processing and repair. Fault warnings can be implemented in various ways, such as sending emails, text messages, or triggering system alarms.

[0165] This embodiment allows for early detection of memory failures and timely implementation of measures to address them, thereby preventing their further spread and impact. Furthermore, by setting thresholds to determine failure risk, adjustments can be made flexibly based on actual conditions, allowing the fault detection system to adapt to changes in different situations. In summary, this embodiment describes a method for fault detection and early warning based on the number of faulty rows, which can effectively improve the efficiency of memory fault detection and repair, and enhance system stability and reliability.

[0166] As shown in FIG3 , in one embodiment, a plurality of memory cells are arranged in an array structure; determining target detection parameters based on error information includes:

[0167] Determine the number of memory cells in each column where errors occur according to address information of the memory cells where errors occur;

[0168] determining a column in which the number of memory cells having errors exceeds a second preset number as a faulty column;

[0169] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0170] The fault detection result of the memory is determined according to the number of fault columns, and whether to issue a fault warning is determined according to the fault detection result.

[0171] This embodiment describes the specific operation steps in an embodiment. First, in this embodiment, there are multiple memory units arranged in an array structure. Then, target detection parameters are determined based on the error information.

[0172] Specifically, based on the address information of the memory cells where errors occur, the number of memory cells in each column where errors occur can be determined. This means that in an array structure, the fault condition of the memory can be judged by determining the number of errors in each column. Furthermore, a column in which the number of memory cells where errors occur exceeds a second preset number is determined to be a fault column. This second preset number can be set according to specific needs and is used to determine the fault condition of the memory column. Finally, this embodiment determines the fault detection result of the memory based on the target detection parameter, and determines whether to perform a fault warning based on the fault detection result. For example, the number of fault columns can be used to determine the fault detection result of the memory, and whether to perform a fault warning can be determined based on whether the number of fault columns reaches a third threshold.

[0173] In summary, this embodiment provides a memory fault detection method based on an array structure, which determines the memory fault condition by determining the number of erroneous memory cells and the number of faulty columns, and issues a fault warning based on the specific situation.

[0174] In one embodiment, determining a fault detection result of a memory according to the number of fault columns, and determining whether to issue a fault warning according to the fault detection result, includes:

[0175] determining whether the number of fault columns reaches a third threshold;

[0176] If the number of fault columns reaches a third threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0177] In this embodiment, the fault detection result of the memory is determined based on the number of fault columns (i.e., the column where the memory unit where the error occurs is located), and whether to issue a fault warning is determined based on the fault detection result. The specific steps are: statistics and counting are performed based on the number of fault columns that have been determined. If the number of fault columns reaches a pre-set third threshold, that is, a certain specific condition is met, a subsequent determination will be made. If the number of fault columns reaches the third threshold, that is, there are a large number of fault columns in the memory, which means that there is a high risk of memory failure. If it is determined that there is a risk of memory failure, a series of measures can be taken, such as issuing an alarm, sending a notification, etc. to remind relevant personnel so that necessary measures can be taken in a timely manner to prevent or repair memory failures.

[0178] In summary, this embodiment describes how to use the number of fault columns to determine memory fault detection results, determine whether the memory is at risk of failure based on whether the fault detection result meets a third threshold, and issue a corresponding fault warning. This technical solution can help improve the precision and accuracy of memory fault detection, as well as timely discover and address memory faults, thereby enhancing system reliability and stability.

[0179] As shown in FIG4 , in one embodiment, the array structure of the memory cells is divided into a plurality of regions; determining the target detection parameter according to the error information includes:

[0180] Determine the number of memory cells in each area where errors occur based on address information of the memory cells in which errors occur;

[0181] determining a region where the number of memory cells having errors exceeds a third preset number as a fault region;

[0182] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0183] The fault detection result of the memory is determined according to the number of fault areas, and whether to issue a fault warning is determined according to the fault detection result.

[0184] In this embodiment, the memory unit is divided into multiple areas, and each area contains multiple memory units. Based on the address information of the memory unit where the error occurs, the number of memory units where the error occurs in each area can be determined. The area where the number of memory units where the error occurs exceeds the third preset number is determined as the fault area (by obtaining the address information of the memory unit where the error occurs, the number of memory units where the error occurs in each area can be calculated. This can help determine the fault area of ​​the memory. If the number of memory units where the error occurs exceeds the third preset number, that is, reaches the threshold of the fault area, then this area is determined as the fault area). The fault detection result of the memory is determined based on the number of fault areas. It is determined whether to perform a fault warning based on the fault detection result. That is, the fault detection result of the memory can be determined based on the number of fault areas. For example, if the number of fault areas reaches the fourth threshold, it can be determined that there is a fault risk in the memory and a fault warning is performed.

[0185] In summary, this embodiment provides a specific implementation method for detecting and warning memory failures by dividing memory cells and determining fault areas. This method can effectively monitor and identify memory fault areas, allowing timely implementation of appropriate fault handling measures.

[0186] In one embodiment, determining a fault detection result of a memory according to the number of fault areas, and determining whether to issue a fault warning according to the fault detection result, includes:

[0187] determining whether the number of fault areas reaches a fourth threshold;

[0188] If the number of faulty areas reaches a fourth threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0189] In this embodiment, the number of memory cells experiencing errors in each region is first determined based on the error information. The system then determines whether the number of faulty regions has reached a preset fourth threshold. If so, the system determines that the memory is at risk of failure and issues a fault warning. If the number of faulty regions has reached the preset fourth threshold, the system determines that the entire memory is at risk of failure. In this case, the system triggers the fault warning mechanism, promptly notifying the administrator or implementing other remedial measures to prevent the failure from causing more serious impact on other systems.

[0190] Through the above steps, the memory fault detection method can accurately detect and promptly respond to memory faults. When the number of faulty areas reaches a preset fourth threshold, the system determines that there is a risk of memory failure and initiates a fault warning, helping administrators take timely measures to ensure system reliability and stability.

[0191] In one embodiment, after determining to perform a fault warning, the method further includes:

[0192] Generates fault logs and controls memory restart or power-off or switching to backup memory.

[0193] This embodiment describes further actions after a fault warning is performed. Specifically, this embodiment includes the following steps: once the memory fault detection result triggers a fault warning, the system will generate a fault log. The fault log may contain detailed information about the fault, such as the fault type, the time when the fault occurred, etc. By generating a fault log, the system can record the occurrence of memory faults and related information to facilitate subsequent analysis and processing. For faulty memory, the system can perform corresponding control operations based on the specific situation. These operations include restarting the memory, turning off the memory power, or switching the system to the backup memory. Through these control operations, the system can restore the normal operation of the memory as much as possible and ensure the stability and reliability of the system.

[0194] This embodiment further improves the memory fault detection method by introducing fault log generation and memory control. Fault log generation provides an important basis for fault analysis and resolution, while memory control operations help the system quickly respond to memory faults and take appropriate measures to ensure normal system operation. These measures improve the efficiency of system maintenance and fault resolution while minimizing the negative impact of memory faults on system operation.

[0195] In one embodiment, determining target detection parameters based on error information includes:

[0196] Determine the frequency of correctable errors based on the error information;

[0197] Determine the memory fault detection result based on the target detection parameters, and determine whether to issue a fault warning based on the fault detection result, including:

[0198] Determine whether there is a frequency sudden increase point according to the frequency, and the frequency change rate of the frequency sudden increase point is greater than the change rate threshold;

[0199] If there is a sudden frequency increase, it is determined that there is a risk of memory failure and a failure warning is issued.

[0200] Considering that correctable memory errors typically occur in large numbers in most servers in modern data centers shortly before a memory failure occurs, memory failure alerts can be implemented by monitoring changes in the number of memory CEs within a unit time window. This involves setting a time period and periodically counting the number of CEs, for example, every hour or half an hour to check for sudden changes. However, in practice, the accuracy of the time window for periodic memory failure prediction alerts is significantly affected by the time window size. If the time window is set too large, the frequency of failure predictions will be low, resulting in inaccurate memory failure warnings. If the time window is set too small, effective early warnings will not be provided. Memory CEs typically occur in large numbers shortly before a memory failure occurs, indicating a sudden increase in the error frequency.

[0201] Therefore, this embodiment provides a specific implementation of a memory fault detection method, the specific steps of which include: (1) monitoring the operating status of the memory and obtaining the error information of the memory: by monitoring the operating status of the memory, the system can obtain the error information occurring in the memory in real time. Such error information may include the number of memory check errors (CE), the location of CE, etc. (2) determining the frequency of correctable errors based on the error information: based on the error information obtained, the system will count the number of correctable errors occurring in the memory and calculate the frequency of error occurrence. The frequency here refers to the number of errors occurring within a certain time period. (3) determining whether there is a frequency spike point based on the frequency: the system will determine whether there is a frequency spike point based on the frequency of error occurrence. The frequency spike point refers to the rate of change of the error occurrence frequency being greater than the set rate of change threshold. If the error occurrence frequency increases significantly in a short period of time, that is, exceeds the preset threshold, then it can be determined that there is a frequency spike point. (4) determining whether to issue a fault warning based on the frequency spike point: if there is a frequency spike point, the system will determine that there is a fault risk in the memory and trigger the fault warning mechanism. The system can send an alarm to notify the administrator or other relevant personnel so that timely measures can be taken to repair the fault or perform other necessary operations.

[0202] Through the above steps, the memory fault detection method can determine target detection parameters based on error information, including the frequency of correctable errors. Based on these target detection parameters, the system can then determine the memory fault detection results and, based on the results, decide whether to issue a fault warning. For example, if the error frequency suddenly increases and exceeds a preset threshold, the system will determine that there is a risk of memory failure and issue a timely fault warning to ensure system stability and reliability.

[0203] In one embodiment, determining a frequency of correctable errors according to the error information includes:

[0204] Obtain the number of correctable errors that occur in the memory within multiple consecutive first time periods;

[0205] Determine whether there is a frequency surge point based on the frequency, including:

[0206] Determine whether a difference between the number of correctable errors that occur in the memory in the current first time period and the number of correctable errors that occur in the memory in the previous first time period is greater than a number threshold;

[0207] If the difference between the number of correctable errors that occur in the memory in the current first time period and the number of correctable errors that occur in the memory in the previous first time period is greater than the number threshold, it is determined that a frequency sudden increase point exists.

[0208] This embodiment describes a method for determining the frequency of correctable errors in memory based on error information. The method includes the following steps: when monitoring the operating status of the memory, the number of correctable errors in the memory can be recorded, and these numbers can be grouped by time period. This step refers to obtaining the number of memory errors in multiple consecutive time periods. The number of correctable errors in the memory in the current first time period is then compared with the number of correctable errors in the memory in the previous first time period. If the difference between the two is greater than a preset number threshold, that is, the difference is greater than the number threshold, it is determined that there is a frequency surge point. Based on the determination result, it can be concluded that the frequency of correctable errors in the memory suddenly increased in the current first time period, and there is a risk of failure.

[0209] Through the above steps, the frequency of correctable memory errors can be determined based on the error information, and whether there are any frequency spikes, thereby determining whether the memory is at risk of failure. Based on the fault detection results, appropriate fault warning measures can be implemented. This method can improve the accuracy and efficiency of memory fault detection, helping to promptly discover and resolve memory problems.

[0210] As shown in FIG5 , t1 is the first second time period, t2 is the second second time period, t3 is the third second time period, and t k is the kth second time period, t k+1 is the k+1th second time period, where t k+1 There is a sudden increase in frequency.

[0211] In one embodiment, determining a frequency of correctable errors according to the error information includes:

[0212] Obtaining a second time period in which the number of consecutive correctable errors reaches a preset trigger number;

[0213] Determine whether there is a frequency surge point based on the frequency, including:

[0214] Determining whether a difference between the current second time period and the previous second time period is greater than a time threshold;

[0215] If the difference between the current second time period and the previous second time period is greater than the time threshold, it is determined that there is a mutation point in the current second time period.

[0216] This embodiment describes another implementation method for determining the frequency of correctable memory errors based on error information. First, in this embodiment, a second time period is determined during which the number of consecutive correctable errors reaches a preset triggering number. This second time period can be a fixed period, such as one minute or one hour, or a dynamically adjustable period, flexibly set based on actual circumstances. Then, based on the number of correctable errors occurring within the second time period, a determination is made as to whether there is a frequency spike. A frequency spike is a point in the second time period where the frequency of correctable errors suddenly and significantly increases. To determine whether a frequency spike exists, the difference between the current second time period and the previous second time period is compared. If the difference exceeds a time threshold, a spike is determined to exist within the current second time period. If a frequency spike exists, a memory failure risk is determined, and a fault warning is issued. This fault warning can include a variety of measures, such as sending an alarm to notify relevant personnel and recording fault information for subsequent analysis and processing.

[0217] In summary, this embodiment further refines the steps and judgment method for determining the frequency of correctable errors based on error information, provides a specific operational process for implementing memory fault detection, and can promptly warn of situations where there is a risk of failure, helping to improve the efficiency of discovering and handling memory faults.

[0218] In one embodiment, determining whether a frequency sudden increase point exists according to the frequency includes:

[0219] The significance level is calculated according to the preset formula:

[0220] Among them, t k is the second time period corresponding to the frequency mutation point, t j is the jth second time period, n is the number of all second time periods obtained, sgn(·) is the sign function, U k，n is the statistic corresponding to the kth second time period, U k-1，n is the statistic corresponding to the k-1th second time period, P k is the significance level, exp(·) is the exponential function;

[0221] When the significance level is not greater than the confidence level, it is determined that there is a frequency mutation point; otherwise, it is determined that there is no frequency mutation point.

[0222] This embodiment uses a non-parametric test method (the formula for this method is shown above), such as the Pettitt mutation test, to test whether there is a mutation point in the time period it takes for the number of CEs in memory to reach the preset trigger count, and to determine whether the mutation is significant. The Pettitt mutation test assumes that H0: there is no mutation in the time it takes for the number of CEs in memory to reach the preset trigger count for the kth time; and assumes that H1: there is a mutation in the time it takes for the number of CEs in memory to reach the first threshold for the kth time.

[0223] To solve the above technical problems, the present application further provides a memory fault detection system, as shown in FIG6 , comprising:

[0224] A monitoring unit 61 is used to monitor the operating status of the memory and obtain error information of the memory;

[0225] A number determination unit 62 is used to determine the number of correctable errors that occur in the memory according to the error information;

[0226] A parameter determination unit 63 is configured to determine target detection parameters based on error information when the number of correctable errors reaches a preset trigger number;

[0227] The fault warning unit 64 is used to determine the fault detection result of the memory according to the target detection parameter, and determine whether to perform a fault warning according to the fault detection result.

[0228] In one embodiment, the monitoring unit 61 is specifically configured to monitor the operating status of the memory and determine the error type when an error occurs in the memory. The error types include hard errors and soft errors.

[0229] In one embodiment, when a memory error occurs, the method further includes:

[0230] The address acquisition unit is used to determine the memory unit where the error occurs and obtain the address information of the memory unit where the error occurs.

[0231] In one embodiment, the parameter determination unit 63 is specifically configured to determine a hard fault unit based on the number of hard errors and address information of the memory unit when the number of correctable errors reaches a preset trigger number;

[0232] The fault warning unit 64 is specifically configured to determine a fault detection result of the memory according to the number of hard fault units, and determine whether to perform a fault warning according to the fault detection result.

[0233] In one embodiment, the parameter determination unit 63 is specifically configured to determine a soft fault unit based on the number of soft errors and address information of the memory unit when the number of correctable errors reaches a preset trigger number;

[0234] The fault warning unit 64 is specifically configured to determine a fault detection result of the memory according to the number of soft fault units, and determine whether to perform a fault warning according to the fault detection result.

[0235] In one embodiment, the fault warning unit 64 is specifically configured to comprehensively determine a memory fault detection result based on the number of hard fault units and the number of soft fault units, and determine whether to perform a fault warning based on the fault detection result.

[0236] In one embodiment, the fault warning unit 64 is specifically used to calculate a first ratio of the number of hard fault units to the total number of fault units, where the total number of fault units is the sum of the number of hard fault units and the number of soft fault units; determine whether the first ratio reaches a first threshold; if the first ratio reaches the first threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

[0237] In one embodiment, the plurality of memory cells are arranged in an array structure; the parameter determination unit 63 is specifically configured to determine the number of memory cells in each row where errors occur based on address information of the memory cells where errors occur when the number of correctable errors reaches a preset trigger number; and determine a row where the number of memory cells in which errors occur exceeds a first preset number as a faulty row;

[0238] The fault warning unit 64 is specifically configured to determine a fault detection result of the memory according to the number of faulty rows, and determine whether to perform a fault warning according to the fault detection result.

[0239] In one embodiment, the fault warning unit 64 is specifically configured to determine whether the number of faulty rows reaches a second threshold; if the number of faulty rows reaches the second threshold, it is determined that there is a fault risk in the memory and a fault warning is issued.

[0240] In one embodiment, a plurality of memory cells are arranged in an array structure; the parameter determination unit 63 is specifically configured to determine the number of memory cells in each column that have errors based on address information of the memory cells in which the errors occur when the number of correctable errors reaches a preset trigger number; and determine a column in which the number of memory cells in which the errors occur exceeds a second preset number as a faulty column;

[0241] The fault warning unit 64 is specifically configured to determine a fault detection result of the memory according to the number of fault columns, and determine whether to perform a fault warning according to the fault detection result.

[0242] In one embodiment, the fault warning unit 64 is specifically configured to determine whether the number of fault columns reaches a third threshold; if the number of fault columns reaches the third threshold, it is determined that there is a fault risk in the memory and a fault warning is issued.

[0243] In one embodiment, the array structure of the memory cells is divided into a plurality of regions; the parameter determination unit 63 is specifically configured to determine the number of memory cells in each region where errors have occurred based on the address information of the memory cells in which the errors have occurred when the number of correctable errors reaches a preset trigger number; and determine a region where the number of memory cells in which errors have occurred exceeds a third preset number as a fault region;

[0244] The fault warning unit 64 is specifically configured to determine a fault detection result of the memory according to the number of fault areas, and determine whether to perform a fault warning according to the fault detection result.

[0245] In one embodiment, the fault warning unit 64 is specifically configured to determine whether the number of fault areas reaches a fourth threshold; if the number of fault areas reaches the fourth threshold, it is determined that there is a fault risk in the memory and a fault warning is issued.

[0246] In one embodiment, after determining to perform a fault warning, the method further includes:

[0247] The log unit is used to generate fault logs and control memory restart or power off or switch to backup memory.

[0248] In one embodiment, the parameter determination unit 63 includes:

[0249] a frequency determination unit, configured to determine a frequency of correctable errors according to the error information;

[0250] The fault warning unit 64 is specifically used to determine whether there is a frequency sudden increase point based on the frequency, and the frequency change rate of the frequency sudden increase point is greater than the change rate threshold; if there is a frequency sudden increase point, it is determined that there is a fault risk in the memory and a fault warning is issued.

[0251] In one embodiment, the frequency determination unit is specifically configured to obtain the number of correctable errors that occur in the memory within a plurality of consecutive first time periods;

[0252] The fault warning unit 64 is specifically used to determine whether the difference between the number of correctable errors that occur in the memory in the current first time period and the number of correctable errors that occur in the memory in the previous first time period is greater than the number threshold; if the difference between the number of correctable errors that occur in the memory in the current first time period and the number of correctable errors that occur in the memory in the previous first time period is greater than the number threshold, it is determined that there is a frequency surge point in the current first time period, and a fault warning is issued.

[0253] In one embodiment, the frequency determination unit is specifically configured to obtain a second time period in which the number of consecutive correctable errors reaches a preset trigger number;

[0254] The fault warning unit 64 is specifically used to determine whether the difference between the current second time period and the previous second time period is greater than a time threshold; if the difference between the current second time period and the previous second time period is greater than the time threshold, it is determined that there is a mutation point in the current second time period.

[0255] In one embodiment, determining whether a frequency sudden increase point exists according to the frequency includes:

[0256] The significance level is calculated according to the preset formula:

[0257] Among them, t k is the second time period corresponding to the frequency mutation point, t j is the jth second time period, n is the number of all second time periods obtained, sgn(·) is the sign function, U k，n is the statistic corresponding to the kth second time period, U k-1，n is the statistic corresponding to the k-1th second time period, P k is the significance level, exp(·) is the exponential function;

[0258] When the significance level is not greater than the confidence level, it is determined that there is a frequency mutation point; otherwise, it is determined that there is no frequency mutation point.

[0259] For an introduction to the memory fault detection system, please refer to the above embodiments, which will not be described in detail in this application.

[0260] To solve the above technical problems, the present application further provides a memory fault detection device, as shown in FIG7 , comprising:

[0261] Memory 71, for storing computer programs;

[0262] The processor 72 is configured to implement any of the steps of the memory fault detection method described above when storing a computer program.

[0263] For an introduction to the memory fault detection device, please refer to the above embodiments, which will not be described in detail in this application.

[0264] To solve the above technical problems, the present application also provides a computer non-volatile readable storage medium 82. As shown in FIG8 , the computer non-volatile readable storage medium 82 stores a computer program 81. When the computer program 81 is executed by the processor, the steps of the memory fault detection method described above are implemented.

[0265] For the introduction of the computer non-volatile readable storage medium 82, please refer to the above embodiment, and this application will not go into details here.

[0266] To solve the above technical problems, the present application further provides a server, including the memory fault detection device as described above. For an introduction to the server, please refer to the above embodiment, and the present application will not elaborate on it here.

[0267] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0268] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A memory fault detection method, characterized in that: include: Monitor the running status of the memory and obtain error information of the memory; Determine the number of correctable errors that occur in the memory according to the error information; When the number of correctable errors reaches a preset trigger number, determining a target detection parameter according to the error information; A fault detection result of the memory is determined according to the target detection parameter, and whether to perform a fault warning is determined according to the fault detection result.

2. The memory fault detection method according to claim 1, characterized in that: Monitoring the operating state of the memory and obtaining error information of the memory includes: The operating state of the memory is monitored, and when an error occurs in the memory, an error type is determined, wherein the error type includes a hard error and a soft error.

3. The memory fault detection method according to claim 2, characterized in that: When an error occurs in the memory, the method further includes: A memory unit where an error occurs is determined, and address information of the memory unit where the error occurs is obtained.

4. The memory fault detection method according to claim 3, characterized in that: Determining target detection parameters according to the error information includes: Determining a hard fault unit according to the number of occurrences of the hard error and address information of the memory unit; Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: A fault detection result of the memory is determined according to the number of the hard fault units, and whether to perform a fault warning is determined according to the fault detection result.

5. The memory fault detection method according to claim 4, characterized in that: Determining target detection parameters according to the error information includes: Determining a soft fault unit according to the number of occurrences of the soft error and the address information of the memory unit; Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: A fault detection result of the memory is determined according to the number of the soft fault units, and whether to perform a fault warning is determined according to the fault detection result.

6. The memory fault detection method according to claim 5, characterized in that: Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: A fault detection result of the memory is comprehensively determined according to the number of the hard fault units and the number of the soft fault units, and whether to perform a fault warning is determined according to the fault detection result.

7. The memory fault detection method according to claim 6, characterized in that: Comprehensively determining a fault detection result of the memory according to the number of the hard fault units and the number of the soft fault units, and determining whether to perform a fault warning according to the fault detection result, including: Calculating a first ratio of the number of hard fault units to the number of total fault units, the total number of fault units being the sum of the number of hard fault units and the number of soft fault units; determining whether the first ratio reaches a first threshold; If the first ratio reaches the first threshold, it is determined that there is a failure risk in the memory, and a failure warning is issued.

8. The memory fault detection method according to claim 3, characterized in that: The plurality of memory units are arranged in an array structure; and target detection parameters are determined according to the error information, including: Determine the number of memory cells in each row where errors occur according to address information of memory cells where errors occur; Determine a row in which the number of memory cells having errors exceeds a first preset number as a faulty row; Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: A fault detection result of the memory is determined according to the number of the faulty rows, and whether to perform a fault warning is determined according to the fault detection result.

9. The memory fault detection method according to claim 8, characterized in that: Determining a fault detection result of the memory according to the number of the faulty rows, and determining whether to perform a fault warning according to the fault detection result, includes: Determining whether the number of the faulty rows reaches a second threshold; If the number of the faulty rows reaches the second threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

10. The memory fault detection method according to claim 3, characterized in that: The plurality of memory units are arranged in an array structure; and target detection parameters are determined according to the error information, including: Determine the number of memory cells in each column where errors occur according to address information of memory cells where errors occur; Determine a column in which the number of memory cells having errors exceeds a second preset number as a faulty column; Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: A fault detection result of the memory is determined according to the number of the fault columns, and whether to perform a fault warning is determined according to the fault detection result.

11. The memory fault detection method according to claim 10, characterized in that: Determining a fault detection result of the memory according to the number of the fault columns, and determining whether to perform a fault warning according to the fault detection result, including: Determining whether the number of the fault columns reaches a third threshold; If the number of the fault columns reaches the third threshold, it is determined that the memory has a fault risk, and a fault warning is issued.

12. The memory fault detection method according to claim 3, characterized in that: The array structure of the memory unit is divided into a plurality of regions; Determining target detection parameters according to the error information includes: Determine the number of memory cells in each region where errors occur according to address information of memory cells in which errors occur; Determine a region where the number of memory cells having errors exceeds a third preset number as a fault region; Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: A fault detection result of the memory is determined according to the number of the fault areas, and whether to perform a fault warning is determined according to the fault detection result.

13. The memory fault detection method according to claim 12, characterized in that: Determining a fault detection result of the memory according to the number of the fault areas, and determining whether to perform a fault warning according to the fault detection result, including: Determining whether the number of the fault areas reaches a fourth threshold; If the number of the fault areas reaches the fourth threshold, it is determined that there is a fault risk in the memory, and a fault warning is issued.

14. The memory fault detection method according to claim 1, characterized in that: After determining to issue a fault warning, it also includes: Generate a fault log, and control the memory to restart or power off or switch to a spare memory.

15. The memory fault detection method according to any one of claims 1 to 14, characterized in that: Determining target detection parameters according to the error information includes: determining a frequency of occurrence of the correctable error based on the error information; Determining a fault detection result of the memory according to the target detection parameter, and determining whether to perform a fault warning according to the fault detection result, including: Determine whether there is a frequency sudden increase point according to the frequency, and the frequency change rate of the frequency sudden increase point is greater than the change rate threshold; If the frequency sudden increase point exists, it is determined that the memory has a failure risk and a failure warning is issued.

16. The memory fault detection method according to claim 15, characterized in that: Determining a frequency of occurrence of the correctable error according to the error information includes: Obtaining the number of correctable errors that occur in the memory within a plurality of consecutive first time periods; Determining whether there is a frequency sudden increase point according to the frequency includes: Determine whether a difference between the number of correctable errors that occur in the memory in the current first time period and the number of correctable errors that occur in the memory in the previous first time period is greater than a number threshold; If the difference between the number of correctable errors occurring in the memory in the current first time period and the number of correctable errors occurring in the memory in the previous first time period is greater than the number threshold, it is determined that the frequency sudden increase point exists in the current first time period.

17. The memory fault detection method according to claim 15, characterized in that: Determining a frequency of occurrence of the correctable error according to the error information includes: Acquire a second time period in which the number of consecutive correctable errors reaches a preset trigger number; Determining whether there is a frequency sudden increase point according to the frequency includes: Determine whether the difference between the current second time period and the previous second time period is greater than a time threshold; If the difference between the current second time period and the previous second time period is greater than the time threshold, it is determined that there is a mutation point in the current second time period.

18. The memory fault detection method according to claim 17, characterized in that: Determining whether there is a frequency sudden increase point according to the frequency includes: The significance level is calculated according to a preset formula, which is: Among them, t k is the second time period corresponding to the frequency mutation point, t j is the jth second time period, n is the number of all second time periods obtained, sgn(·) is the sign function, U k，n is the statistic corresponding to the kth second time period, U k-1，n is the statistic corresponding to the k-1th second time period, P k is the significance level, exp(·) is the exponential function; When the significance level is not greater than the confidence level, it is determined that the frequency mutation point exists; otherwise, it is determined that the frequency mutation point does not exist.

19. A memory fault detection system, characterized in that: include: A monitoring unit, used to monitor the operating status of the memory and obtain error information of the memory; a number determination unit, used to determine the number of correctable errors that occur in the memory according to the error information; A parameter determination unit, configured to determine a target detection parameter according to the error information when the number of correctable errors reaches a preset trigger number; A fault warning unit is used to determine a fault detection result of the memory according to the target detection parameter, and determine whether to perform a fault warning according to the fault detection result.

20. A memory fault detection device, characterized in that: include: Memory for storing computer programs; A processor, used to implement the steps of the memory fault detection method as described in any one of claims 1-18 when storing a computer program.

21. A computer non-volatile readable storage medium, characterized in that: The computer non-volatile readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the memory fault detection method according to any one of claims 1 to 18 are implemented.

22. A server, characterized in that: Includes the memory fault detection device as described in claim 20.

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