Circuit board

The circuit board design addresses deformation issues by incorporating a thicker peripheral region, enhancing mechanical stability and reducing manufacturing defects.

WO2025089179A1PCT designated stage expired Publication Date: 2025-05-01KYOCERA CORP
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Patent Information

Application Number
PCT/JP2024/037075
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-27
Filing Date
2024-10-17
Publication Date
2025-05-01

AI Technical Summary

Technical Problem

Circuit boards are prone to deformation when their surface area increases, leading to manufacturing defects during processes like plating and mounting.

Method used

A circuit board design featuring an insulating substrate with a thicker peripheral region compared to the central region, which reduces the likelihood of deformation and enhances mechanical stability.

Benefits of technology

The design effectively minimizes deformation during manufacturing processes and reduces variations in plating film thickness, improving the overall reliability and performance of the circuit board.

✦ Generated by Eureka AI based on patent content.

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Abstract

A circuit board according to the present disclosure has an insulating base and a conductor. The insulating base has a central region and a peripheral region. The central region is located at the central portion of the main surface of the insulating base. The peripheral region includes an outer edge portion of the insulating base, and is located around the central region. The conductor is disposed in the central region of the main surface of the insulating base as a pad group in which a plurality of pads are arranged lengthwise and crosswise. The insulating base has a thickened portion in which the thickness of the peripheral region is greater than the thickness of the central region.
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Description

circuit board

[0001] The present disclosure relates to circuit boards.

[0002] 2. Description of the Related Art A wiring board has been proposed in which wiring is arranged between layers of a plurality of ceramic base materials.

[0003] International Publication No. 2005 / 067359

[0004] A circuit board according to one embodiment of the present disclosure has an insulating base and a conductor. The insulating base has a central region and a peripheral region. The central region is located in the center of the main surface of the insulating base. The peripheral region includes the outer edge of the insulating base and is located around the central region. The conductor is arranged in the central region of the main surface of the insulating base as a pad group in which multiple pads are arranged vertically and horizontally. The insulating base has a thickened portion in which the peripheral region is thicker than the central region.

[0005] FIG. 1 is a perspective view of a circuit board shown as an example of an embodiment. FIG. 2A is an enlarged side view of portion A shown in FIG. 1 , showing a case where a thickened portion is provided on one side. FIG. 2B is an enlarged side view of portion A shown in FIG. 1 , showing a case where a thickened portion is provided on both sides. FIG. 3 is a schematic view showing an example of a method for making a thin flat plate less likely to deform. FIG. 4 is a schematic cross-sectional view showing the direction of pressure applied to the circuit board when the circuit board is gripped by a gripping portion. FIG. 5 is a perspective view of a circuit board shown as an example of another aspect of the embodiment. FIG. 6 is an enlarged view of portion B shown in FIG. 5. FIG. 7 is a schematic cross-sectional view showing another aspect of gripping the circuit board by a gripping portion. FIG. 8 is a perspective view of a circuit board shown as an example of another aspect of the embodiment. FIG. 9 is an enlarged view of portion C shown in FIG. 8. FIG. 10 is a perspective view of a circuit board shown as an example of another aspect of the embodiment. FIG. 11 is an enlarged view of portion D shown in FIG. 10. FIG. 12 is a perspective view of a circuit board shown as an example of another aspect of the embodiment. FIG. 13 is an enlarged view of portion E shown in FIG. 12. Fig. 14 is a perspective view of a circuit board shown as an example of another aspect of the embodiment, and Fig. 15 is an enlarged view of part F shown in Fig. 14.

[0006] Circuit boards according to embodiments will be described below with reference to Figures 1 to 15. Note that one aspect of the present disclosure is not limited to the specific embodiments described below. One aspect of the present disclosure may include various aspects as long as they are within the spirit or scope of the general inventive concept defined by the appended claims.

[0007] In recent years, as the size of semiconductor elements mounted on the boards has increased, the size of circuit boards has also become larger.

[0008] However, circuit boards are prone to deformation as the area of ​​their main surfaces increases. For example, in manufacturing processes, the circuit board may be held from both ends in the planar direction or the peripheral edge of the circuit board may be cantilevered. When the size of the circuit board increases, defects such as deformation are more likely to occur in such manufacturing processes.

[0009] The present disclosure provides a circuit board that can reduce the occurrence of defects such as deformation during the manufacturing process.

[0010] Fig. 1 is a perspective view of a circuit board shown as an example of an embodiment. Fig. 2A and Fig. 2B are enlarged views of part A shown in Fig. 1, Fig. 2A being a side view when a thickened portion is provided on one side, and Fig. 2B being a side view when a thickened portion is provided on both sides. Fig. 2A and Fig. 2B show examples of two different structures, which are shown because they can be obtained by changing some of the conditions when fabricating the circuit board shown in Fig. 1. For ease of understanding, Fig. 1 shows a three-dimensional Cartesian coordinate system in which the thickness direction of the insulating base is the Z-axis direction.

[0011] (Circuit Board) As shown in FIG. 1, the circuit board 1 has an insulating base 10 and a conductor 20 .

[0012] (Insulating Base) The insulating base 10 has a central region 11 and a peripheral region 12 .

[0013] (Central Region) The central region 11 is located in the center of the main surface 10a of the insulating base 10. In the embodiment, the central region 11 is a region surrounding a group of pads, which is an example of a conductor 20. In Fig. 1, the central region 11 is shown as a region surrounded by a dashed line. In Fig. 1, the area of ​​the central region 11 is larger than the area of ​​the group of pads, but in the present disclosure, this is not dependent on the area occupied by the group of pads, which is an example of a conductor 20.

[0014] The central region 11 may be, for example, a one-square region located at the center of each of the X-axis and Y-axis directions when nine virtual regions are imagined by dividing the main surface 10a of the insulating base 10 equally in each of the X-axis and Y-axis directions. Alternatively, for example, when 36 virtual regions are imagined by dividing the main surface 10a of the insulating base 10 equally in each of the X-axis and Y-axis directions, the central region 11 may be a 16-square region located at the center of each of the X-axis and Y-axis directions. Alternatively, for example, the central region 11 may range in area from the central one square of nine virtual regions obtained by equally dividing the main surface 10a of the insulating base 10 equally in each of the X-axis and Y-axis directions to the 16-square region located at the center of 36 virtual regions.

[0015] (Peripheral Region) The peripheral region 12 is a portion surrounding the central region 11. In other words, the peripheral region 12 is a portion of the main surface 10a of the insulating base 10 excluding the central region 11.

[0016] (Outer Edge Portion) In the circuit board 1 according to the embodiment, the peripheral region 12 includes the outer edge portion 10b of the insulating base 10. The outer edge portion 10b refers to the portion formed by the main surface 10a of the insulating base 10 and the side surface 10c that intersects with the main surface 10a. In other words, the outer edge portion 10b refers to the portion where the main surface 10a and the side surface 10c of the insulating base 10 butt against each other. The outer edge portion 10b includes the outer edge of the insulating base 10.

[0017] The circuit board 1 according to the embodiment has a thickened portion 15 in the peripheral region 12 of the insulating base 10 that is thicker than the central region 11. Such a circuit board 1 is less likely to deform even when it is made larger.

[0018] (Conductor) In the circuit board 1 according to the embodiment, the conductor 20 is represented by a pad group as an example. In Fig. 1, the conductor 20 (pad group) is arranged in the central region 11 of the main surface 10a of the insulating base 10. In Fig. 1, the conductor 20 (pad group) is in the form of a plurality of pads arranged vertically and horizontally. The pads are arranged on the main surface 10a of the insulating base 10 at predetermined intervals.

[0019] (Thickened portion) In the circuit board 1 according to the embodiment, the insulating base 10 has a thickened portion 15 in the peripheral region 12 that is thicker than the central region 11. In other words, the insulating base 10 has a thicker thickness in the peripheral region 12 than in the central region 11. That is, the thickness of the peripheral region 12 of the insulating base 10 is thicker than the thickness of the central region 11.

[0020] The shape of the insulating base can be expressed in yet another way. As shown in Figures 2A and 2B, the insulating base 10 constituting the circuit board 1 according to the embodiment can also be said to have a configuration having a constant thickness portion 13 and an increased thickness portion 15.

[0021] The insulating base 10 may be a laminate of a constant thickness portion 13 and an increased thickness portion 15. That is, the insulating base 10 may have a structure in which the increased thickness portion 15 is stacked on the constant thickness portion 13. Here, the constant thickness portion 13 and the increased thickness portion 15 are used to explain the shape of the insulating base 10, but it is preferable that the constant thickness portion 13 and the increased thickness portion 15 are an integral body. An integral body means that they are joined together as an integral body.

[0022] When the insulating base 10 is made of ceramic, the constant thickness portion 13 and the increased thickness portion 15 are in a state of being an integrated sintered ceramic body. When the constant thickness portion 13 and the increased thickness portion 15 are in a state of being an integrated sintered ceramic body, it is not necessary for the entire surface between the constant thickness portion 13 and the increased thickness portion 15 to be integrated, and it is sufficient if there is a portion that is partially sintered integrally.

[0023] (Explanation of strengthening of flat plate) Fig. 3 is a schematic diagram showing an example of a method for making a thin flat plate less likely to deform. Fig. 3 shows a state in which a frame plate 32 is overlapped on a thin flat plate 31.

[0024] When the thickness of the flat plate 31 is thin, the flat plate 31 is prone to bending. On the other hand, when the frame plate 32 is placed on the flat plate 31 and the thickness of the peripheral portion of the flat plate 31 is increased, the flat plate 31 is less prone to bending than when the frame plate 32 is not placed on top. A structure in which the frame plate 32 is placed on top of the flat plate 31 is called a "frame-shaped laminate." A frame-shaped laminate is less likely to deform than the flat plate 31, even when it is placed upright. The circuit board 1 according to the embodiment has properties similar to those of the "frame-shaped laminate" shown in FIG. 3.

[0025] (Plating Process) In the circuit board 1, a plating film is usually formed on the conductors 20. When plating the circuit board 1, both ends of the circuit board 1 in the planar direction may be gripped by gripping portions provided on a conveying device for the plating process. Alternatively, if the conveying device is equipped with only one gripping portion, that one gripping portion will grip a portion of the peripheral edge of the circuit board 1 in a cantilevered manner.

[0026] The circuit board 1 obtained after firing has a metal film formed on its surface by co-firing to become the conductor 20. The type of metal film can be one selected from the group consisting of copper, tungsten, molybdenum, and a composite metal of copper and tungsten.

[0027] The circuit board 1 obtained after firing is then sent to the plating process. The plating process involves multiple cycles of washing with water, treatment with acidic chemicals, treatment with alkaline chemicals, treatment with an organic solvent such as alcohol, and plating. Multiple metals are used in the plating process. These metals include platinum (Pt), nickel (Ni), copper (Cu), tin (Sn), solder (Pb-Sn), and gold (Au).

[0028] When plating multiple metals onto the circuit board 1 obtained after firing, the plating process involves washing with water, treatment with an acidic chemical, treatment with an alkaline chemical, and treatment with an organic solvent such as alcohol, as described above, each time each metal is plated.

[0029] The circuit board 1 obtained after firing is forced to go through a large number of steps like this. Even just in the plating step, the number of times the circuit board is gripped by the gripping parts of the conveying device is too many to count.

[0030] If the circuit board 1 is deformed during the plating process, there is a high possibility that the thickness of the plating film will vary due to convection (stagnation) of the plating solution, and that there will be areas where the plating film is difficult to form. For this reason, it is necessary to maintain flatness of the circuit boards transported during the plating process.

[0031] There are two plating methods: electrolytic plating and electroless plating. In the case of electrolytic plating, the state (finish) of the plating film depends on the current density applied to the conductor formed on the circuit board 1, so even if the circuit board 1 is deformed, there is little chance of a large difference in the state of the plating film being formed or the distribution of its thickness.

[0032] In contrast, in the case of electroless plating, the condition (quality of the plating) of the plating film depends largely on the convection conditions of the plating solution around the object to be plated, the circuit board 1. In other words, the thickness or gloss of the plating film formed is easily affected by the movement of the plating solution around the object to be plated, the circuit board 1. When electroless plating is used to plate the circuit board 1, the orientation of the circuit board 1 in the plating solution is also likely to affect the quality of the plating film.

[0033] When a plating film is formed on the conductor 20 formed on the circuit board 1, stress is likely to occur between the plating film and the underlying conductor, depending on the rate at which steps and kinks are formed in the plating film. The stress generated between the conductor 20 and the plating film is also likely to affect the insulating base 10 on which the conductor 20 is formed.

[0034] The insulating base 10 may be deformed by stress generated between the conductor 20 and the plating film. The stress generated in the circuit board 1 after plating depends on the thickness of the plating film. If the circuit board 1 is bent or deformed during plating, the thickness of the plating film is likely to differ between recessed and flat portions. If the circuit board 1 to be plated is deformed before the plating process, the thickness of the plating film is likely to differ greatly depending on the location on the surface of the circuit board 1.

[0035] The circuit board 1 according to the embodiment has a large area of ​​the main surface 10 a, and is therefore less likely to deform during the manufacturing process even when it is large and thin. The circuit board 1 according to the embodiment can reduce variations in the thickness of the plating film.

[0036] (Impact on Mounting Process) Another manufacturing process using the circuit board 1 is a mounting process of electric elements. The mounting process of electric elements is a process of fixing electric elements to the mounting portion of the circuit board 1 where the pad group is located.

[0037] A reflow furnace is typically used in the process of mounting electrical components. When a reflow furnace is used in the process of mounting electrical components, the circuit board 1 is placed on a conveyor attached to the reflow furnace and transported through the furnace. At this time, the entire circuit board 1 is heated by the reflow furnace.

[0038] The insulating base 10 and the conductor 20 of the circuit board 1 usually have different thermal expansion coefficients. The insulating base 10 and the conductor 20 also have different Young's moduli. The circuit board 1 also usually has different material properties, such as the thermal expansion coefficient and Young's modulus, from the electrical elements mounted on the circuit board 1.

[0039] When the circuit board 1 is heated in a reflow furnace, the circuit board 1 is prone to deformation due to the difference in physical properties between the electrical elements and the circuit board 1. The larger the area and thinner the circuit board 1, the more likely the circuit board 1 is to be deformed in this way.

[0040] According to the circuit board 1 of the embodiment, deformation of the circuit board can be suppressed even in a mounting process using a reflow oven, etc. In other words, according to the circuit board 1 of the embodiment, the amount of deformation of the circuit board 1 can be reduced in a mounting process using a reflow oven, etc.

[0041] (Area / Thickness) In the circuit board 1 according to the embodiment, when the main surface 10a is rectangular, the side length L is preferably 80 mm or more and 120 mm or less. The thickness t of the circuit board 1 according to the embodiment is preferably 0.25 mm or more and 2.5 mm or less. The ratio L / t, obtained by dividing the side length L by the thickness t, is preferably 48 or more and 320 or less. Here, the ratio 48 is the value obtained by dividing the side length 120 mm by the thickness 2.5 mm. Furthermore, the ratio 320 is the value obtained by dividing the side length 80 mm by the thickness 0.25 mm. The side length of 80 mm or more is a length that takes into account the width and pitch of the wiring layer that can accommodate the number of input / output terminals of the electrical element, and the area available for fan-out. When the main surface 10a is rectangular, the maximum side length of 120 mm or less is set as a size that can currently be manufactured using plating and mounting processes equipped with automatic conveyors.

[0042] (Material of insulating base) The material for forming the insulating base is preferably a ceramic containing, as a main component, one selected from the group consisting of alumina, mullite, alumina zirconia, silicon nitride, and aluminum nitride. Alumina, mullite, alumina zirconia, silicon nitride, and aluminum nitride may hereinafter be referred to as high-temperature fired materials.

[0043] The insulating substrate 10 may be a glass ceramic. Here, the glass ceramic may be any of a composite of a glass phase and ceramic particles, a composite of a glass phase and a crystalline phase formed by the crystallization of a portion of the glass phase, a form in which ceramic particles exist in the glass phase, and a form in which a glass phase exists at the grain boundaries between ceramic particles. The insulating substrate 10 is preferably, for example, a ceramic composition that can be co-fired with copper, as described below. Hereinafter, glass ceramics may be referred to as low-temperature fired materials.

[0044] (Conductor Material) The material for forming the conductor 20 is preferably a metal containing one selected from the group consisting of tungsten, molybdenum, a composite material of tungsten and copper, copper, and silver as the main component.

[0045] (Combination of insulating base material and conductor material) When a high-temperature sintered material is used for the insulating base 10, it is preferable to use one selected from the group consisting of tungsten, molybdenum, copper, and a composite material of tungsten and copper for the material of the conductor 20. When a low-temperature sintered material is used for the insulating base 10, it is preferable to use copper or silver for the material of the conductor 20.

[0046] FIG. 4 is a schematic cross-sectional view showing the direction of pressure applied to the circuit board 1 when the circuit board 1 is gripped by the gripping portion 2. As shown in FIG.

[0047] In the insulating base 10 constituting the circuit board 1 according to the embodiment, the portion of the peripheral region 12 that is thicker than the central region 11 is designated as an increased thickness portion 15, and the remaining portion of the constant thickness from the central region 11 to the peripheral region 12 is designated as a constant thickness portion 13. Preferably, the increased thickness portion 15 is provided on both sides of the constant thickness portion 13. In other words, as shown in FIG. 2B , the insulating base 10 is shaped such that the increased thickness portion 15 is disposed on both sides of the constant thickness portion 13. Here, the "constant thickness portion" refers to a portion where the average value of thicknesses at multiple locations in the central region 11 of the insulating base 10 is taken as a reference thickness, and the constant thickness portion 13 is 5% or less of the reference thickness. In this circuit board 1, the constant thickness portion 13 is defined as a portion where the average value of thicknesses at multiple locations in the central region 11 of the insulating base 10 is taken as a reference thickness, and the constant thickness portion 13 is 5% or less of the reference thickness.

[0048] If the insulating base 10 constituting the circuit board 1 has a shape in which the thickened portions 15 are provided on both sides of the constant thickness portion 13, the circuit board 1 becomes even less susceptible to deformation. In this case, it is preferable that the thickened portions 15 located on both sides of the constant thickness portion 13 have a shape that is symmetrical on both sides of the constant thickness portion 13.

[0049] When the shapes of the increased thickness portions 15 located on both sides of the constant thickness portion 13 are symmetrical on both sides of the constant thickness portion 13, the position of the center in the thickness direction of the insulating base 10 does not change within the plane of the insulating base 10. Because the position of the center in the thickness direction of the insulating base 10 does not change within the plane of the insulating base 10, the circuit board 1 is less likely to bend, for example, even when gripping portions 2 provided on a conveying device in a plating process grip both ends of the circuit board 1 in the planar direction. This is because, as shown in Figure 4, because the position of the center in the thickness direction of the insulating base 10 does not change within the plane of the insulating base 10, even if pressure (or load) is applied by the gripping portions 2 from both ends of the circuit board 1 in the planar direction, the directions in which the pressure (or load) is applied from both ends are exactly opposite to each other.

[0050] Furthermore, in this circuit board 1, it is preferable that the thickness of the thickened portions 15 is equal at the same position on both sides of the constant thickness portion 13 from the central region 11 to the peripheral region 12. If the thickness of the thickened portions 15 is equal at the same position on both sides of the constant thickness portion 13 from the central region 11 to the peripheral region 12, the rigidity of the insulating base 10 of the circuit board 1 will be more balanced at the same position on both sides of the constant thickness portion 13 from the central region 11 to the peripheral region 12, making the circuit board 1 even less likely to bend.

[0051] In the circuit board 1 according to the embodiment, the thickness of the thickened portion 15 may gradually increase from the central region 11 to the periphery. An example of the shape of the circuit board 1 is the shape shown in FIG. 2B .

[0052] When the insulating base 10 constituting the circuit board 1 is divided into the constant thickness portion 13 and the thickened portion 15 as described above, and the thickness of the thickened portion 15 gradually increases from the central region 11 toward the periphery, the insulating base 10 does not have any portions where two surfaces are oriented in intersecting or perpendicular directions, such as concave or convex shapes, and therefore localized stress concentration can be avoided even when the circuit board 1 is gripped by the gripping portion 2. The circuit board 1 becomes even less likely to bend.

[0053] Fig. 5 is a perspective view of a circuit board 1 shown as an example of another aspect of the embodiment. Fig. 6 is an enlarged view of part B shown in Fig. 5. In Fig. 6, for convenience of explanation, the ridge line 10d of the insulating base 10 before chamfering is shown by a dashed line.

[0054] In the circuit board 1, the insulating base 10 has, at its outer edge 10b, a side surface 10c that intersects with the main surface 10a, and the outer edge 10b preferably has a chamfered inclined surface (hereinafter referred to as the "inclined surface 10e") at the ridge 10d where the main surface 10a and the side surface 10c meet.

[0055] When the ridge portion 10d of the insulating base 10 is chamfered to form an inclined surface between the main surface 10a and the side surface 10c of the insulating base 10, defects such as chips are less likely to occur on the ridge portion 10d of the insulating base 10.

[0056] Fig. 7 is a schematic cross-sectional view showing another manner in which the circuit board 1 is gripped by the gripping portion 2. Fig. 7 shows the scissor-shaped gripping portion 2 gripping the circuit board 1 from both sides.

[0057] If the angle between the main surface 10a and the side surface 10c of the insulating base 10 is a right angle or an angle close to a right angle, as shown in Figure 6, when the gripping portion 2 grips the vicinity of the outer edge portion 10b of the insulating base 10, the corner portion of the outer edge portion 10b is likely to chip.

[0058] In the case where the insulating base 10 constituting the circuit board 1 has a structure in which the inclined surface 10e is formed on the outer edge 10b, the outer edge 10b of the insulating base 10 is less likely to chip even if the gripping portion 2 has a scissor shape. In other words, if the outer edge 10b of the insulating base 10 has a structure in which the inclined surface 10e is formed, the probability of chipping occurring on the outer edge 10b of the insulating base 10 can be reduced even when the circuit board 1 is gripped by the scissor-shaped gripping portion 2.

[0059] The inclined surface 10e of the circuit board 1 may be formed so as to circumferentially surround the outer edge portion 10b of the insulating base 10. In other words, the insulating base 10 may have the inclined surface 10e, with the ridge portion 10d chamfered, circumferentially around the outer edge portion 10b of the insulating base 10. With this configuration, the probability of chipping occurring in the outer edge portion 10b of the insulating base 10 can be reduced regardless of the direction from which the circuit board 1 is gripped by the scissors-shaped gripping portion 2.

[0060] Fig. 8 is a perspective view of a circuit board 1 shown as an example of another aspect of the embodiment. Fig. 9 is an enlarged view of part C shown in Fig. 8. Note that Fig. 9 shows only five insulating layers, and the portion between the fourth and fifth layers in the Z direction from the positive to negative direction is omitted by a dashed line, but it goes without saying that multiple insulating layers are also arranged in the dashed line portion.

[0061] In the circuit board 1, the insulating base 10 may have a structure including a plurality of insulating layers 101. Of the plurality of insulating layers 101, it is preferable that the thickness of the insulating layer 101a near the main surface 10a of the insulating base 10 increases from the central region 11 to the peripheral region 12.

[0062] 1 can be obtained even in an embodiment in which insulating base 10 is a laminate of a plurality of insulating layers 101. That is, circuit board 1 shown in Figures 8 and 9 also has thickened portion 15 in peripheral region 12 of insulating base 10 that is thicker than central region 11, and therefore circuit board 1 is less likely to deform even when it is large.

[0063] The insulating layer 101a that becomes thicker from the central region 11 to the peripheral region 12 of the insulating base 10 may be a plurality of insulating layers 101 including the outermost insulating layer 101a that constitutes the main surface 10a of the insulating base 10. In this case, the plurality of insulating layers 101 from the outermost insulating layer 101a of the insulating base 10 toward the inner layer side may have a shape that similarly becomes thicker from the central region to the peripheral region.

[0064] Among the insulating layers 101 that increase in thickness from the central region 11 to the peripheral region 12 of the insulating base 10, the insulating layer 101 with the largest difference in thickness between the central region 11 and the peripheral region 12 may be the insulating layer 101a located on the outermost layer of the insulating base 10.

[0065] The difference in thickness between the central region 11 and the peripheral region 12 of each insulating layer 101 may decrease in the direction from the outermost layer toward the inner layer of the insulating base 10. The difference in thickness between the central region 11 and the peripheral region 12 of each insulating layer 101 may gradually decrease in the direction from the outermost layer toward the inner layer of the insulating base 10. The tendency for the difference in thickness between the central region 11 and the peripheral region 12 of each insulating layer 101 to gradually decrease in the direction from the outermost layer toward the inner layer of the insulating base 10 may be present only on one side of the insulating base 10, or may extend to both sides of the insulating base 10.

[0066] In other words, the insulating base 10 may have a state in which the difference in thickness between the central region 11 and the peripheral region 12 of each insulating layer 101 on both sides thereof gradually decreases in the direction from the outermost layer toward the inner layer of the insulating base 10. The insulating layer 101 that becomes thicker from the central region 11 to the peripheral region 12 of the insulating base 10 may be only the surface insulating layer 101 that constitutes the main surface 10a of the insulating base 10.

[0067] Fig. 10 is a perspective view of a circuit board 1 shown as an example of another aspect of the embodiment, and Fig. 11 is an enlarged view of a portion D shown in Fig. 10 .

[0068] When the insulating base 10 is seen through a plan view, the circuit board 1 may have a glass layer 102 between insulating layers 101 that correspond to the peripheral region 12 of the insulating base 10. In this case, the circuit board 1 also has a thickened portion 15 in the peripheral region 12 of the insulating base 10 that is thicker than the central region 11, so that the circuit board 1 is less likely to deform even when it is large.

[0069] 10 and 11 , among the multiple insulating layers 101 that form the insulating base 10, a glass layer 102 is interposed in the peripheral region 12 between two insulating layers 101, forming a thickened portion 15 equal to the thickness of the glass layer 102. In FIG. 11 , the thickened portion 15 is the portion above the imaginary dashed line that crosses the uppermost insulating layer 101 a.

[0070] 11 shows a configuration in which a glass layer 102 is sandwiched between two insulating layers 101, but other materials may be used instead of the glass layer 102. The other materials may be materials that have the same main components as the insulating layer 101 but different additive components or compositions. The glass layer 102 and other materials should preferably be materials that can be co-fired with the insulating layer 101, which is the base material.

[0071] The proportion of the number of glass layers 102 to the total number of insulating layers 101 is preferably 10% to 90%. The thickness of the glass layer 102 interposed between the insulating layers 101 does not have to be constant within each layer. The thickness of the glass layer 102 interposed between the insulating layers 101 may be gradually thinner from the outer edge of the insulating base 10 toward the central region 11, as shown in FIG. 11 . When the glass layer 102 is interposed between three or more insulating layers 101, the area of ​​the glass layer 102 should be constant. In this case, the area of ​​the glass layer 102 should be determined from the shape of the insulating base 10 when viewed from above. Specifically, it may be determined by a non-destructive method using X-ray analysis. Alternatively, the insulating base 10 or the circuit board 1 may be polished from the outermost layer side to expose the glass layer 102. When performing these analyses, it is preferable to determine the shape of the glass layer 102 as well as its area.

[0072] Fig. 12 is a perspective view of a circuit board 1 shown as an example of another aspect of the embodiment. Fig. 13 is an enlarged view of part E shown in Fig. 12. Part E shown in Fig. 13 corresponds to a cross section that partially identifies the interior of the circuit board 1.

[0073] In the circuit board 1, the conductor 20 may be disposed as a wiring layer between the two insulating layers 101. That is, the circuit board 1 may include the conductor 20 as a wiring layer in addition to the conductor 20 as the pad group shown in Fig. 12. When the surface of the wiring layer (conductor 20) on the central region 11 side of the glass layer 102 is defined as a first end face and the surface of the wiring layer on the outer edge side is defined as a second end face, the glass layer 102 and the wiring layer (conductor 20) are preferably disposed such that the first end face and the second end face face each other.

[0074] 12 and 13 also has thickened portions 15 in peripheral regions 12 of insulating base 10 that are thicker than central region 11, making circuit board 1 less likely to deform even when increased in size. Furthermore, according to circuit board 1 shown in Figures 12 and 13, wiring layers (conductors 20) are disposed in constant thickness portions 13 that are thinner in insulating base 10, and insertion of the wiring layers strengthens constant thickness portions 13.

[0075] The wiring layer may be a thin wire type that allows fanning out of the wiring layer between the insulating layers 101 as the conductor 20, or may be one selected from the group consisting of a ground in a stripline structure, a ground in a microstripline structure, and a solid power supply layer.

[0076] 12 and 13, the wiring layer (conductor 20) is disposed in a central region 11 of the insulating base 10, and the glass layer 102 is disposed in a peripheral region 12 outside the wiring layer. In other words, on the insulating layer 101, the wiring layer (conductor 20) is preferably disposed in a region inside the glass layer 102.

[0077] It is preferable that the thickness t1 of the glass layer 102 on the side surface 10c of the insulating substrate 10 is greater than the thickness t2 of the end portion on the central region 11 side.

[0078] When the glass layer 102 and the wiring layer (conductor 20) are in contact with each other on the insulating layer 101, the thickness t3 of the wiring layer is preferably equal to the thickness t2 of the end portion of the glass layer 102 on the central region 11 side. When the glass layer 102 and the wiring layer (conductor 20) are in contact with each other on the insulating layer 101, the thickness t3 of the wiring layer is preferably equal to the thickness t2 of the end portion of the glass layer 102 on the central region 11 side.

[0079] When the glass layer 102 and the wiring layer (conductor 20) are in contact with each other on the insulating layer 101, it is preferable that the wiring layer have a portion with an equal thickness over the entire width from the outer edge of the glass layer 102 to the central region 11. When the maximum and minimum thicknesses of the glass layer 102 and the wiring layer are determined, it is preferable that the minimum thickness of the glass layer 102 be greater than the maximum thickness of the wiring layer.

[0080] Fig. 14 is a perspective view of a circuit board 1 shown as an example of another aspect of the embodiment. Fig. 15 is an enlarged view of part F shown in Fig. 14. Part F shown in Fig. 15 corresponds to a cross section that partially identifies the inside of the circuit board 1.

[0081] The circuit board 1 shown in Figures 14 and 15 has a plurality of via conductors 103a to 103c in the insulating layer 101 that constitutes the insulating base 10. That is, the circuit board 1 may include conductors 20 as the via conductors 103a to 103c in addition to the conductors 20 as the pad group shown in Figure 14. Hereinafter, when there is no need to distinguish between the plurality of via conductors 103a to 103c, they may be collectively referred to as via conductors 103. The conductors 20 are arranged to penetrate the insulating layer 101a as a via conductor group in which the plurality of via conductors 103 are distributed in one insulating layer 101 (here, insulating layer 101a).

[0082] The via conductor group (conductor 20) has a plurality of via conductors 103 extending from the central region 11 to the peripheral region 12 of the insulating base 10 and having a length that increases in the thickness direction of the insulating layer 101a.

[0083] According to the circuit board 1 shown in Figures 14 and 15, even if the thickness of the insulating layer 101 changes, the via conductors 103 remain filled, so there are no defects in the insulating layer 101 caused by voids, and the mechanical strength of the insulating layer 101 having the thickened portion 15 can be maintained.

[0084] Furthermore, because the length of the via conductors 103 is structured to follow the changes in the thickness of the insulating layer 101, there are no portions in the insulating layer 101 where the via conductors 103 are locally shortened. There are no gaps between the surface of the insulating layer 101 and the end faces of the via conductors 103. There are no structural defects in the insulating layer 101 between the surface of the insulating layer 101 and the end faces of the via conductors 103. In the circuit board 1 shown in Figures 14 and 15, the insulating base 10 has a shape in which the peripheral region 12 has a thickened portion 15 that is thicker than the central region 11. The via conductors 103 that penetrate the thickened portion 15 in the thickness direction have a length that follows the changes in the thickness of the thickened portion 15. The via conductors 103 are long enough to reach both sides of one insulating layer 101 (here, insulating layer 101a).

[0085] The multiple via conductors 103 provided in one insulating layer 101 (here, insulating layer 101a) have a length that reaches both sides of insulating layer 101a, even if the thickness of insulating layer 101a varies.

[0086] In one insulating layer 101 (here, insulating layer 101a), the via conductors 103 may have lengths that increase from the central region 11 to the peripheral region 12 of the insulating layer 101a.

[0087] According to the circuit board 1 shown in Figures 14 and 15, the multiple via conductors 103 provided in one insulating layer 101 (here, insulating layer 101a) have lengths in the insulating layer 101a that correspond to changes in the thickness of that insulating layer 101a, so that even if the thickness of the insulating layer 101a changes, the deterioration in electrical characteristics caused by the via conductors 103 can be reduced.

[0088] 15 shows a configuration in which the via conductors 103 are inclined with respect to the surface of the insulating base 10. Specifically, when an axis parallel to the stacking direction of the insulating base 10 is taken as a reference axis, the via conductors 103 have a plurality of inclined via conductors 103a, 103b that are oriented in an inclined direction with respect to the reference axis from the central region 11 to the peripheral region 12 of the insulating base 10. The inclined angle (θ) of the plurality of inclined via conductors 103a, 103b increases from the central region 11 toward the peripheral region 12.

[0089] In the case of the circuit board 1 shown in Figures 14 and 15, the orientation of the via conductors 103 in the insulating layer 101a becomes closer to the direction along the surface of the insulating layer 101a from the peripheral region 12 toward the outer edge portion 10b than in the central region 11. The orientation of the via conductors 103 becomes closer to the direction of the plane of the wiring layer formed between the two insulating layers 101. This configuration can strengthen the circuit board 1. In particular, it becomes possible to strengthen the peripheral region 12 of the circuit board 1.

[0090] In addition, in the circuit board 1 shown in FIGS. 14 and 15 , the thickness of the insulating layer 101 increases from the central region 11 toward the peripheral region 12 and outer edge portion 10 b. When a wiring layer (conductor 20 shown in FIG. 13 ) and via conductors 103 are provided on the insulating base 10, the thickness of the insulating layer 101 increases from the central region 11 toward the peripheral region 12 and outer edge portion 10 b, thereby reducing the electrostatic capacitance (C) in this region. For example, pads for ball grid arrays (BGAs) (hereinafter referred to as BGA pads) connected to the via conductors 103 are provided on the surface of the circuit board 1. The circuit board 1 shown in FIGS. 14 and 15 reduces the electrostatic capacitance (C) of the BGA pads, improving electrical characteristics. Furthermore, transmission characteristics are improved when high-frequency alternating current flows through the circuit board 1.

[0091] Glass ceramics were used as the material for the insulating layer. A copper-based conductor paste was used as the material for the conductor. A glass paste was prepared as the material for the glass layer. A green sheet containing glass ceramic raw material powder was produced. The green sheet was cut from the original roll (400 mm x 400 mm) after molding to a size of 200 mm x 200 mm. The thickness of the green sheet was 50 μm. The glass ceramic raw material powder was a mixed powder of borosilicate alkaline earth oxide glass and silica particles. Specifically, a mixed powder was used in which 50 parts by mass of silica particles were added to 100 parts by mass of borosilicate alkaline earth oxide glass. A butyral-based organic resin was used as the organic vehicle for the green sheet.

[0092] The conductor paste used was a mixture of copper powder and alkaline earth borosilicate glass powder. A cellulose-based organic resin was used as the organic vehicle. The solid content was 100 parts by mass of copper powder and 30 parts by mass of alkaline earth borosilicate glass powder.

[0093] Next, a glass paste for forming a glass layer was prepared. A cellulose-based organic resin was used as the organic vehicle. A borosilicate alkaline earth oxide glass powder was also used as the glass powder for the glass paste. In this case, the viscoelasticity of the glass paste was adjusted. Specifically, the glass paste was prepared to have thixotropy by adjusting the amount of organic vehicle (binder, plasticizer, solvent) added.

[0094] Next, the prepared green sheet was placed in a stainless steel frame and framed. Next, a conductor pattern was formed on one surface of the framed green sheet using a conductor paste by a printing method. The conductor pattern was a solid shape in the center of the green sheet. Next, a glass pattern was formed around this conductor pattern by a printing method using glass paste. The conductor pattern was formed so that its area would be approximately 90 mm x 90 mm after firing. The glass pattern was formed so that its width would be approximately 10 mm after firing.

[0095] In this way, a pattern sheet was produced on which a conductor pattern and a glass pattern were formed. By using a thixotropic glass paste, the shape of the glass pattern was maintained on the surface of the green sheet before firing. On the conductor pattern side, the end face of the glass pattern was in contact with the end face of the conductor pattern. The end face of the glass pattern opposite the conductor pattern was open.

[0096] (Samples 1 to 5: Figure 13 with thickened portion) Next, four plain green sheets were stacked. One of the above patterned sheets was placed on top of that, and then another plain green sheet was placed on top of that, and a laminate pressure treatment was performed to create a temporary laminate. The pressure was 30 MPa, the temperature was 100°C, and the pressing time was 10 minutes.

[0097] Next, the temporary laminate was cut to prepare a laminate before firing. When preparing a laminate from the temporary laminate, the outer portion of the glass pattern was cut away so that the conductive pattern area was located in the center and a portion of the glass pattern was adjacently arranged around the periphery of the conductive pattern.

[0098] The laminate was then fired to produce a sample for use as a circuit board. The firing was carried out under conditions where the laminate was degreased in a moist nitrogen atmosphere, then in a dry nitrogen atmosphere at a maximum temperature of 900°C for 2 hours. The resulting circuit board had a side length of approximately 100 mm and a thickness of approximately 0.4 mm. The laminate was fired while sandwiched between non-shrinkage green sheets. The non-shrinkage green sheets were green sheets prepared by adding an organic vehicle to alumina powder.

[0099] (Samples 6 to 10: with chamfers, Figure 6) Furthermore, samples (Samples 6 to 10) with chamfers on the outer edge of the insulating base were prepared using the same process as Samples 1 to 5, except that the laminate prepared by the above process was polished as shown in Figure 6. A polishing machine was used to polish the laminate. In all of Samples 1 to 10, the peripheral region of the circuit board was thicker than the central region.

[0100] This is believed to be due to the following reasons: The sintering start temperature of the glass powder forming the glass pattern is lower than that of the glass ceramic material used in the insulating layer. Between the two layers of glass ceramic green sheets that make up the insulating layer, the sintering of the glass pattern begins before the sintering of the two layers of glass ceramic green sheets, thereby reducing the surface energy. The glass pattern undergoes a spheroidizing process, and the glass pattern formed between the two green sheets becomes thicker than its raw state. At this time, the side of the glass pattern that is in contact with the conductor pattern is less likely to spheroidize because bonding with the conductor pattern takes precedence. The side of the glass pattern that is not in contact with the conductor pattern is open and therefore more likely to spheroidize. As a result, the glass pattern becomes thicker on the side closer to the side of the insulating substrate than on the conductor pattern side.

[0101] The thickness of the glass pattern is added to the original thickness of the top insulating layer, resulting in a shape in which the thickness increases from the central region to the peripheral region of the insulating base. At this time, part of the glass pattern is sintered and integrated with the green sheet.

[0102] It was confirmed that the ridges of the circuit boards of Samples 6 to 10 were chamfered.

[0103] (Samples 11 to 15: Figure 15 with via conductors) Circuit boards with via conductors were also produced. The circuit boards with via conductors were produced by laminating a via pattern sheet with via conductors formed on a plain green sheet instead of the plain green sheet placed on the top surface of the laminate in the production of Samples 1 to 5 (Samples 11 to 15). The via patterns formed on the via pattern sheet were positioned within a 10 mm width from the side surface to the inside when the laminate was viewed in plan. Part of the via pattern was positioned to overlap the glass pattern. Part of the via pattern was positioned to overlap the conductor pattern.

[0104] Although the circuit board fabricated above has a configuration in which only one of the ten insulating layers has a glass layer, the disclosed circuit board is not limited to this. The circuit board may have multiple insulating layers each having a glass layer. In this case, the glass layer formed on each insulating layer may have different widths and thicknesses from layer to layer as long as the mechanical properties (strength) and electrical properties (transmission properties) of the circuit board are not impaired.

[0105] Comparative Examples: Furthermore, laminates were produced as comparative examples (Samples 16 to 20) by a method in which the glass pattern forming step was omitted from the process used to produce Samples 1 to 5.

[0106] Among the circuit boards obtained after firing, those obtained from laminates on which a glass pattern had been formed were found to have thicker peripheral regions than central regions (Samples 1 to 15). Samples 1 to 15 had thickened portions. On the other hand, the circuit boards obtained from laminates produced without the glass pattern formation step (Samples 16 to 20) had a substantially flat shape from the central region to the peripheral region.

[0107] For samples 1 to 15, the maximum thickness of the peripheral region was 1.2 times the minimum thickness of the central region. For samples 16 to 20, the thickness of the peripheral region was 0.98 to 1.0 times the thickness of the central region. The central region of samples 16 to 20 was the location where the conductor was present. The peripheral region of samples 16 to 20 was the region outside the region where the conductor was present. For samples 16 to 20, the thickness of the peripheral region and the thickness of the central region refer to average thicknesses.

[0108] In all of Samples 11 to 15, in which a via pattern was formed, the via conductors formed in the circuit board were in the state shown in Fig. 15, and had a structure inclined in the direction from the central region to the peripheral region of the circuit board. This is thought to be because, in the green sheet on which the via pattern was formed, the via pattern portion in the green sheet and the glass pattern portion located in the layer below it were in a position where they overlapped, and the glass pattern, which had a lower sintering start temperature than the green sheet, made it easier for the via pattern portion in the green sheet to melt.

[0109] (Evaluation: Plating process) Next, these samples were put into a nickel plating process. Samples 1 to 15 had a smaller degree of deformation (degree of bending) when held by the gripping portion of the conveying device in the plating process as shown in Figure 7 than Samples 16 to 20.

[0110] The average thickness of the peripheral region of the sample was determined by measuring one side of the fabricated circuit board. The average thickness of the peripheral region of the sample was determined by dividing one side of the circuit board into five equal parts, measuring the thicknesses near the outer edges using a micrometer, and averaging the measured values. The average thickness of the central region of the sample was determined by measuring the thicknesses at the center point of the fabricated circuit board and at positions (four locations) 1 cm away from the center point in the diagonal direction of the circuit board using a micrometer, and averaging the measured values.

[0111] The deformation of the sample during the nickel plating process was determined by stopping the conveying device midway, placing a ruler between both ends of the circuit board, and measuring the amount of displacement from the straight part of the ruler.

[0112] Some samples 1 to 5 had chipping at the outer edge. The circuit boards of samples 6 to 10 had no chipping defects even after being gripped by the gripping portion of the conveying device in the plating process. The thickness of the top insulating layer of samples 11 to 15 gradually increased from the central region to the peripheral region. The inclination angle of the via conductors formed in the top insulating layer of samples 11 to 15 gradually increased from the central region to the peripheral region. The length of the via conductors formed in the top insulating layer of samples 11 to 15 gradually increased from the central region to the peripheral region. The via conductors formed in the top insulating layer of samples 11 to 15 reached both surfaces of the top insulating layer. The inclination angle and length of the via conductors were measured by polishing the circuit board and examining the exposed cross section using a digital microscope.

[0113] (Effect of increasing the thickness of the peripheral region on electrical characteristics) In samples 11 to 15, the formed via conductors have good electrical connection with the wiring layers or via conductors provided in other insulating layers that are stacked, and since the thickness of the peripheral region in the top insulating layer is greater than the thickness of the central region, the electrostatic capacitance of the peripheral region can be reduced.

[0114] For example, if the circuit board has BGA pads, the thickness of the circuit board increases from the center to the periphery, reducing the capacitance (C) of the BGA pads and improving electrical characteristics. This results in a circuit board with minimal change in resonance frequency in the planar direction of the insulating layer.

[0115] This is thought to be because, even if the length of the via conductors increases from the central region to the peripheral region of the circuit board, the thickness of the insulating layer also increases, so the increase in inductive reactance is offset by the decrease in capacitive reactance. In other words, the disclosed circuit board is resistant to deformation even when it is large and thin, and also exhibits small changes in resonant frequency.

[0116] The above describes a circuit board using glass ceramics as the insulating layer material and copper as the conductor material, but the disclosed circuit board can also be applied to a circuit board using alumina ceramics as the insulating layer material and a composite metal of copper and tungsten as the conductor material.

[0117] The present technology may also be configured as follows. (1) A circuit board including an insulating base and a conductor, wherein the insulating base has a central region and a peripheral region, wherein the central region is located in a central portion of a main surface of the insulating base, and the peripheral region includes an outer edge of the insulating base and is located around the central region, the conductor is arranged in the central region of the main surface of the insulating base as a pad group having a plurality of pads arranged lengthwise and widthwise, and the insulating base has a thickness in the peripheral region that is greater than that of the central region. (2) The circuit board described in (1), wherein, in the insulating base, a portion of the peripheral region where the thickness is greater than that of the central region is defined as an increased thickness portion, and other portions of the insulating base that are uniform in thickness from the central region to the peripheral region are defined as constant thickness portions, and the increased thickness portions are provided on both sides of the constant thickness portion. (3) The circuit board described in (2), wherein the increased thickness portions gradually increase in thickness from the central region to the periphery. (4) The circuit board according to (1) or (2), wherein the insulating base has, at the outer edge, a side surface that intersects with the main surface, and the outer edge has an inclined surface formed by chamfering a ridge where the main surface and the side surface meet. (5) The circuit board according to any one of (1) to (4), wherein the insulating base has a plurality of insulating layers, and among the plurality of insulating layers, thicknesses of insulating layers closer to the main surface of the insulating base increase from the central region to the peripheral region. (6) The circuit board according to (5), wherein, when the insulating base is seen through a plane, glass layers are formed between the insulating layers in the peripheral region of the insulating base. (7) The circuit board according to (6), wherein the proportion of the number of glass layers is 10% to 90% of the total number of insulating layers. (8) The circuit board according to (6) or (7), wherein the conductor is disposed as a wiring layer between the two insulating layers, and when the surface of the glass layer facing the central region is defined as a first end face and the surface of the wiring layer facing the outer edge portion is defined as a second end face, the glass layer and the wiring layer are disposed such that the first end face and the second end face face each other.(9) The circuit board according to (5), wherein the conductors are arranged as a via conductor group in which a plurality of via conductors are distributed in one insulating layer and are arranged to penetrate the insulating layer, and the via conductor group includes a plurality of via conductors whose length in the thickness direction of the insulating layer increases from the central region to the peripheral region of the insulating base. (10) The circuit board according to (9), wherein the thickness of the single insulating layer increases from the central region to the peripheral region of the insulating base, and the via conductors whose length increases from the central region to the peripheral region of the insulating base. (11) The circuit board according to (9) or (10), wherein, when an axis parallel to the stacking direction of the insulating base is taken as a reference axis, the plurality of via conductors include a plurality of inclined via conductors oriented in a direction inclined with respect to the reference axis from the central region to the peripheral region of the insulating base, and the inclination angle of the inclined via conductor located in the central region among the plurality of inclined via conductors located in the peripheral region is larger than the inclination angle of the inclined via conductor located in the central region.

[0118] The disclosed embodiments should be considered in all respects as illustrative and not restrictive. Indeed, the above-described embodiments may be embodied in various forms. Furthermore, the above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

[0119] REFERENCE SIGNS LIST 1 Circuit board 10 Insulating base 10a Main surface 10b Outer edge portion 10c Side surface 10d Ridge line portion 10e Inclined surface 11 Central region 12 Peripheral region 13 Constant thickness portion 15 Thickened portion 20 Conductor 101 Insulating layer 102 Glass layer

Claims

1. A circuit board comprising an insulating base and a conductor, the insulating base having a central region and a peripheral region, the central region being located in the center of a main surface of the insulating base, the peripheral region including the outer edge of the insulating base and being located around the central region, the conductor being arranged in the central region of the main surface of the insulating base as a pad group having a plurality of pads arranged vertically and horizontally, and the insulating base having a thicker peripheral region than the central region.

2. The circuit board according to claim 1, wherein, in said insulating base, a portion of said peripheral region where the thickness is thicker than that of said central region is defined as an increased thickness portion, and other portions of said insulating base that have the same thickness from said central region to said peripheral region are defined as constant thickness portions, said increased thickness portions being provided on both sides of said constant thickness portion.

3. The circuit board according to claim 2, wherein the thickness of said thickened portion gradually increases from said central region to said peripheral region.

4. The circuit board according to claim 1 or 2, wherein the insulating base has, at the outer edge, a side surface that intersects with the main surface, and the outer edge has an inclined surface formed by chamfering a ridge where the main surface and the side surface meet.

5. The circuit board according to any one of claims 1 to 4, wherein the insulating base has a plurality of insulating layers, and among the plurality of insulating layers, the thickness of an insulating layer close to the main surface of the insulating base increases from the central region to the peripheral region.

6. The circuit board according to claim 5, further comprising a glass layer between said insulating layers which corresponds to said peripheral region of said insulating base when said insulating base is seen through a plane view.

7. The circuit board according to claim 6, wherein the number of said glass layers is 10% or more and 90% or less of the total number of said insulating layers.

8. The circuit board according to claim 6 or 7, wherein the conductor is disposed as a wiring layer between two of the insulating layers, and when a face of the glass layer facing the central region is defined as a first end face and a face of the wiring layer facing the outer edge is defined as a second end face, the glass layer and the wiring layer are disposed such that the first end face and the second end face face each other.

9. The circuit board described in claim 5, wherein the conductor is arranged as a via conductor group in which a plurality of via conductors are distributed in a single insulating layer, so as to penetrate the insulating layer, and the via conductor group has a plurality of via conductors whose length in the thickness direction of the insulating layer increases from the central region to the peripheral region of the insulating base.

10. The circuit board described in claim 9, wherein the thickness of the insulating layer increases from the central region to the peripheral region of the insulating base, and the length of the via conductor increases from the central region to the peripheral region of the insulating base.

11. A circuit board as described in claim 9 or 10, wherein, when an axis parallel to the stacking direction of the insulating base is used as a reference axis, the multiple via conductors have multiple inclined via conductors that are oriented in an inclined direction from the central region to the peripheral region of the insulating base with respect to the reference axis, and the inclination angle of the inclined via conductor located on the peripheral region side among the multiple inclined via conductors is larger than the inclination angle of the inclined via conductor located on the central region side.

Citation Information

Patent Citations

  • Integrated circuit device

    JP1985009192A

  • Wiring board

    JP2015222740A

  • Semiconductor package substrate, semiconductor package, and manufacturing method thereof

    JP2017224672A