Solar cell and photovoltaic module

Abstract

The present disclosure is applicable to the technical field of solar power generation. Provided are a solar cell and a photovoltaic module. The solar cell comprises a silicon substrate, wherein the rear surface of the silicon substrate is provided with a first texture structure; and a side face of the silicon substrate is provided with a second texture structure, both the first texture structure and the second texture structure presenting a frustum-like microstructure morphology, the first texture structure comprising several first micro-polygonal frustums, the second texture structure comprising several second micro-polygonal frustums, and the size of each first micro-polygonal frustum being smaller than the size of each second micro-polygonal frustum. By means of the above arrangement, texturing is first performed on the front, back and side faces of the silicon substrate to generate the first texture structure, and then etching is performed again on the basis of the first texture structure on the side face of the silicon substrate to generate the second texture structure, so as to etch away an emitter layer material and a doped polysilicon layer material that have permeated and spread to the side face of the silicon substrate, thereby preventing a short circuit from being caused by an emitter layer and a doped polysilicon layer on the back face coming into contact on the side face of the silicon substrate.

Description

Solar cell and photovoltaic module

[0001] Cross-reference to Related Applications

[0002] The present disclosure claims priority to the Chinese patent application No. 202410777292.3, filed on June 14, 2024, and entitled “Solar cell and photovoltaic system”, the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure belongs to the technical field of solar power generation, and particularly relates to a solar cell and a photovoltaic module. BACKGROUND

[0004] In the production and preparation process of a solar cell, a texturing process is involved to make a rough surface on the surface of the cell sheet. On the one hand, the rough surface uses light trapping effect to increase the absorption of sunlight by the silicon sheet, reduce the reflectivity, on the other hand, it increases the surface area of the silicon sheet, thereby increasing the PN junction area and improving the short-circuit current, ultimately improving the light-to-electricity conversion efficiency of the cell.

[0005] After the texturing process, the cell sheet still needs to further deposit film layers such as tunneling layer, emitter layer and back surface field on the front surface and / or back surface of the cell sheet. However, the emitter layer and the back surface field and other film layers may contact the side surface of the cell sheet when deposited, causing short circuit of the cell sheet. SUMMARY

[0006] The present disclosure provides a solar cell to solve the problem of short circuit risk of the existing solar cell.

[0007] The present disclosure is implemented as follows: a solar cell includes:

[0008] a silicon substrate, a first texture structure is arranged on the back surface of the silicon substrate, and a second texture structure is arranged on the side surface of the silicon substrate;

[0009] The first texture structure and the second texture structure both present a table-shaped microstructure morphology, the first texture structure includes a plurality of first micro multi-edge table bodies, and the second texture structure includes a plurality of second micro multi-edge table bodies, the size of the first micro multi-edge table body is smaller than the size of the second micro multi-edge table body.

[0010] In some embodiments, the first micro multi-edge table body and the second micro multi-edge table body both have a top surface, and the size of the first micro multi-edge table body and the size of the second micro multi-edge table body are any one of the length of the corresponding top surface, the width of the top surface, the length of the butt joint line of the top surface, and the diameter of the top surface.

[0011] In some embodiments, the first micro-polygon has a size greater than or equal to 4 microns and less than 10 microns.

[0012] In some embodiments, the second micro-polygon has a size greater than or equal to 10 microns and less than or equal to 20 microns.

[0013] In some embodiments, the top surface of the first micro-polygon and the top surface of the second micro-polygon are any one of a rhombus, a square, a trapezoid, and a circle.

[0014] In some embodiments, the solar cell further comprises a first anti-reflective film, a first passivation film, a first conductive type region, a second conductive type region, and a second passivation film.

[0015] The first conductive type region, the first passivation film, and the first anti-reflective film are sequentially arranged on the front surface of the silicon substrate, and the second conductive type region and the second passivation film are sequentially arranged on the back surface of the silicon substrate.

[0016] In some embodiments, the solar cell further comprises a first tunneling layer arranged between the first conductive type region and the silicon substrate.

[0017] In some embodiments, the solar cell further comprises a second tunneling layer arranged between the second conductive type region and the silicon substrate.

[0018] In some embodiments, the solar cell further comprises a first doped layer arranged between the silicon substrate and the first tunneling layer.

[0019] In some embodiments, the solar cell further comprises a second doped layer arranged between the silicon substrate and the second tunneling layer.

[0020] In some embodiments, the solar cell further comprises a first electrode connected to the first conductive type region and a second electrode connected to the second conductive type region.

[0021] In a second aspect, the present disclosure further provides a photovoltaic module comprising the solar cell as described above.

[0022] The beneficial effect of the present disclosure is that the solar cell of the present disclosure comprises a silicon substrate, wherein the rear surface of the silicon substrate is provided with a first texture structure, the side surface of the silicon substrate is provided with a second texture structure, the first texture structure and the second texture structure both exhibit a table-shaped microstructure morphology, the first texture structure comprises a plurality of first micro multi-edge table bodies, the second texture structure comprises a plurality of second micro multi-edge table bodies, and the size of the first micro multi-edge table body is smaller than the size of the second micro multi-edge table body. Through the above arrangement, in the process of manufacturing the solar cell, the first texture structure is first etched on the front surface, the rear surface and the side surface of the silicon substrate to generate the first texture structure, and then other film layers are further deposited, for example, an emitter layer is deposited on the front surface of the silicon substrate, or a tunneling layer and a doped polysilicon layer are deposited on the rear surface of the silicon substrate, and then the second texture structure is etched again on the basis of the first texture structure of the side surface of the silicon substrate to etch away the emitter layer material and the doped polysilicon layer material that penetrate to the side surface of the silicon substrate, thereby preventing the emitter layer and the doped polysilicon layer on the rear surface from contacting the side surface of the silicon substrate to cause short circuit. BRIEF DESCRIPTION OF DRAWINGS

[0023] FIG. 1 is a structural schematic diagram of one embodiment of the solar cell provided by the present disclosure;

[0024] FIG. 2 is a schematic diagram of the first texture structure of one embodiment of the solar cell provided by the present disclosure;

[0025] FIG. 3 is a schematic diagram of the second texture structure of one embodiment of the solar cell provided by the present disclosure;

[0026] FIG. 4 is a structural schematic diagram of another embodiment of the solar cell provided by the present disclosure. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical scheme and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in combination with the drawings and embodiments. The examples of the embodiments are shown in the drawings, wherein the same or similar reference signs represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the present disclosure, and cannot be understood as a limitation on the present disclosure. In addition, it should be understood that the specific embodiments described herein are only used to explain the present disclosure and cannot be used to limit the present disclosure.

[0028] In the description of the present disclosure, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0029] In addition, the terms "first", "second", etc. are used herein only to describe different instances, and do not imply or suggest relative importance or a number of the indicated technical features. Thus, the features defined with "first", "second" can explicitly or implicitly include one or more features. In the description of the present disclosure, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified and limited.

[0030] In the description of the present disclosure, it should be noted that, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connection" should be understood broadly, for example, can be fixed connection, can be detachable connection, or integrally connected; can be mechanical connection, can be electrical connection or can communicate with each other; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0031] In the present disclosure, unless otherwise explicitly specified and limited, the "upper" or "lower" of the first feature to the second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the "upper", "above" and "on" of the first feature to the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The "lower", "below" and "under" of the first feature to the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.

[0032] The following disclosure provides many different embodiments or examples for implementing different structures of the present disclosure. In order to simplify the disclosure of the present disclosure, the components and arrangements of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present disclosure. In addition, the present disclosure can repeatedly refer to numbers and / or letters in different examples, and such repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or arrangements discussed. In addition, the present disclosure provides various specific examples of processes and materials, but those skilled in the art can realize the application of other processes and / or the use of other materials.

[0033] The solar cell of the present disclosure comprises a silicon substrate, wherein a rear surface of the silicon substrate is provided with a first texture structure, and a side surface of the silicon substrate is provided with a second texture structure, both the first texture structure and the second texture structure exhibit a mesa microstructure morphology, the first texture structure comprises a plurality of first micro multi-edge mesa bodies, the second texture structure comprises a plurality of second micro multi-edge mesa bodies, and the size of the first micro multi-edge mesa body is smaller than the size of the second micro multi-edge mesa body. Through the above arrangement, in the process of manufacturing the solar cell, the first texture structure is first etched on the front surface, the rear surface and the side surface of the silicon substrate to generate, and then other film layers are further deposited, for example, an emitter layer is deposited on the front surface of the silicon substrate, or a tunneling layer and a doped polysilicon layer are deposited on the rear surface of the silicon substrate, and then the second texture structure is etched again on the basis of the first texture structure of the side surface of the silicon substrate to etch away the emitter layer material and the doped polysilicon layer material that penetrate to the side surface of the silicon substrate, thereby preventing the emitter layer and the doped polysilicon layer on the rear surface from contacting the side surface of the silicon substrate to cause short circuit.

[0034] Embodiment one

[0035] As shown in FIGS. 1-4, one embodiment of the present disclosure provides a solar cell, comprising:

[0036] a silicon substrate 100, wherein a rear surface of the silicon substrate 100 is provided with a first texture structure 110, and a side surface of the silicon substrate 100 is provided with a second texture structure 120;

[0037] Both the first texture structure 110 and the second texture structure 120 exhibit a mesa microstructure morphology, the first texture structure 110 comprises a plurality of first micro multi-edge mesa bodies, the second texture structure 120 comprises a plurality of second micro multi-edge mesa bodies, and the size of the first micro multi-edge mesa body is smaller than the size of the second micro multi-edge mesa body.

[0038] In implementation, the solar cell provided by the present disclosure is a cell with opposite polarity film layers arranged on the front surface and the rear surface of the silicon substrate 100. For example, a PERC (Passivated Emitter and Rear Cell) cell, which comprises, from top to bottom, a front metal electrode, a front anti-reflection film, an emitter region, the silicon substrate 100, a back surface field, a back anti-reflection film and a back metal electrode, wherein the emitter region and the back surface field are respectively located on the front surface and the rear surface of the silicon substrate 100, the front metal electrode is connected with the emitter region, the front metal electrode is the positive electrode, the back metal electrode is connected with the back surface field, and the back metal electrode is the negative electrode.

[0039] It should be noted that the PERC cell can further comprise other film layer structures, such as a passivation layer, which is not described herein.

[0040] In a conventional solar cell manufacturing process, the back surface of a silicon substrate 100 is subjected to texturing to form a first texture structure 110, and then an LPCVD (Low Pressure Chemical Vapor Deposition) device is used to form an emitter region and a back surface field on the front surface and the back surface of the silicon substrate 100. Of course, the emitter region and the back surface field can also be formed by other means, such as a PVD (Physical Vapor Deposition) device, without limitation. The emitter region and the back surface field formed can be connected on the side surface of the silicon substrate 100, which is the surface between the front surface and the back surface of the silicon substrate 100, as shown in FIG. 1, and the side surfaces of the silicon substrate 100 are 103 and 104, respectively.

[0041] When the back surface of the silicon substrate 100 is subjected to texturing to form the first texture structure 110, the first texture structure 110 is also formed on the side surface of the silicon substrate 100, and the first texture structure 110 is a mesa-shaped microstructure, as shown in FIG. 2. The first texture structure 110 includes a plurality of first micro-polygonal mesas, which are non-pyramidal structures, such as conical mesas, approximately conical mesas, tetrahedrons, approximately tetrahedrons, pentahedrons, or approximately pentahedrons, without limitation.

[0042] Optionally, the texturing includes but is not limited to chemical etching, laser etching, mechanical methods, plasma etching, and the like, without limitation.

[0043] The first texture structure 110 on the back surface of the silicon substrate 100 allows the metal paste to be better filled in the microstructure when screen printing the metal paste to form an electrode, thereby obtaining better electrode contact, effectively reducing the series resistance of the cell, and improving the fill factor.

[0044] After the emitter region and the back surface field are formed, the side surface of the silicon substrate 100 is subjected to secondary etching, i.e., the first texture structure 110 on the side surface of the silicon substrate 100 is etched again to form a second texture structure 120, which includes a plurality of second micro-polygonal mesas, as shown in FIG. 3. The etching method is the same as that described above for etching the first texture structure 110, and is not repeated here.

[0045] Since the second micro-polygonal mesas are formed by secondary etching on the basis of the first micro-polygonal mesas, i.e., the second micro-polygonal mesas are further etched on the basis of the first micro-polygonal mesas, the size of the second micro-polygonal mesas is greater than that of the first micro-polygonal mesas.

[0046] The multi-sided mesa has a top surface, for example, the top surface of the first micro multi-sided mesa and the top surface of the second micro multi-sided mesa can be any one of a rhombus, a square, a trapezoid, and a circle.

[0047] The size of the multi-sided mesa can be any one of a length of the top surface, a width of the top surface, a length of a butt line of the top surface, and a diameter of the top surface. In other embodiments, the size of the multi-sided mesa can also be any one of a length, a width, a diagonal line length, and a bottom diameter of the bottom of the multi-sided mesa, without limitation. It should be noted that the size of the top surface of the first micro multi-sided mesa and the top surface of the second micro multi-sided mesa are of the same kind, for example, the length of the butt line of the top surface of the first micro multi-sided mesa is less than the length of the butt line of the top surface of the second micro multi-sided mesa.

[0048] Optionally, the size of the first micro multi-sided mesa is greater than or equal to 4 microns, and the size of the first micro multi-sided mesa is less than 10 microns, the size of the second micro multi-sided mesa is greater than or equal to 10 microns, and the size of the second micro multi-sided mesa is less than or equal to 20 microns. For example, the first micro multi-sided mesa is a first triangular pyramid mesa, and the second micro multi-sided mesa is a second triangular pyramid mesa. The triangular pyramid mesa includes a top surface and three side surfaces. The size of the top surface of the first triangular pyramid mesa is a, and the size of the top surface of the second triangular pyramid mesa is b, wherein 4 microns ≤ a < 10 microns, and 10 microns ≤ b ≤ 20 microns. For example, the length of the side of the top surface of the first triangular pyramid mesa can be 4 microns, 5 microns, 6 microns, 7 microns, 8 microns, or 9 microns, and the length of the side of the top surface of the second triangular pyramid mesa can be 10 microns, 12 microns, 13 microns, 15 microns, 19 microns, or 20 microns, without limitation.

[0049] In some embodiments, the size of the multi-sided mesa can also be the vertical distance from the top surface to the bottom of the multi-sided mesa, that is, the size of the multi-sided mesa refers to the height of the multi-sided mesa, which is not described in detail.

[0050] It can be understood that due to the anisotropy of the crystal direction of the back surface silicon crystal, the number of micro multi-sided mesas formed on the back surface cannot be exhausted. The size of the micro multi-sided mesa referred to in the present disclosure can be the average value of the size data of the top surface of the micro multi-sided mesa randomly selected in a certain area, which is used to represent the texture characteristics of the micro multi-sided mesa.

[0051] The solar cell of the present disclosure comprises a silicon substrate 100, wherein a back surface of the silicon substrate 100 is provided with a first textured structure 110, and a side surface of the silicon substrate 100 is provided with a second textured structure 120, both the first textured structure 110 and the second textured structure 120 exhibit a table-like microstructure morphology, the first textured structure 110 comprises a plurality of first micro multi-edge table bodies, the second textured structure 120 comprises a plurality of second micro multi-edge table bodies, and the size of the first micro multi-edge table body is smaller than the size of the second micro multi-edge table body. Through the above arrangement, in the process of manufacturing the solar cell, the first textured structure 110 is first generated by texturing the front surface, the back surface and the side surface of the silicon substrate 100, and then other film layers are further deposited, for example, an emitter layer is deposited on the front surface of the silicon substrate 100, or a tunneling layer and a doped polysilicon layer are deposited on the back surface of the silicon substrate 100, and then the second textured structure 120 is etched again on the basis of the first textured structure 110 of the side surface of the silicon substrate 100, so as to etch away the emitter layer material and the doped polysilicon layer material that penetrate to the side surface of the silicon substrate 100, thereby preventing the emitter layer and the doped polysilicon layer on the back surface from contacting the side surface of the silicon substrate 100 to cause short circuit.

[0052] In some optional embodiments, the solar cell further comprises a first anti-reflection film 200, a first passivation film 300, a first conductive type region 400, a second conductive type region 500 and a second passivation film 600.

[0053] The first conductive type region 400, the first passivation film 300 and the first anti-reflection film 200 are sequentially arranged on the front surface of the silicon substrate 100, and the second conductive type region 500 and the second passivation film 600 are sequentially arranged on the back surface of the silicon substrate 100.

[0054] In implementation, the front surface and the back surface of the silicon substrate 100 are the front surface and the back surface of the silicon substrate 100 respectively, and exemplarily, taking the front surface of the silicon substrate 100 upward as an example, the first conductive type region 400, the first passivation film 300 and the first anti-reflection film 200 are sequentially arranged from bottom to top on the front surface of the silicon substrate 100, and the second conductive type region 500 and the second passivation film 600 are sequentially arranged from top to bottom on the back surface of the silicon substrate 100.

[0055] Optionally, the first conductive type region 400 and the second conductive type region 500 can comprise an emitter region and a back surface field region, wherein the emitter region refers to the part of the solar cell that extracts electrons, and the emitter region is usually considered as the "positive electrode" of the solar cell. Similarly, the back surface field region is generally an aluminum back surface field in the solar cell, and the main functions of the back surface field region include reflecting long waves, reducing light transmission, back surface heavy doping, passivation and impurity gettering, increasing minority carrier lifetime and improving open circuit voltage, and the back surface field region is usually considered as the "negative electrode" of the solar cell, which will not be described herein.

[0056] In some embodiments, one of the first conductive type region 400 and the second conductive type region 500 is an emitter region, and the other is a back surface field region. In embodiments of the present disclosure, terms such as first or second are used only to distinguish elements, and embodiments of the present disclosure are not limited thereto.

[0057] In some possible embodiments, the silicon substrate 100 can include a base region including a relatively low doping concentration of a dopant of a first conductive type. The base region can be composed of a crystalline semiconductor including the dopant of the first conductive type. For example, the base region can include a single crystal or polycrystalline semiconductor (e.g., single crystal silicon or polycrystalline silicon) including the dopant of the first conductive type. Alternatively, the base region can be composed of a single crystal semiconductor (e.g., a single crystal semiconductor wafer, more specifically, a semiconductor silicon wafer) including the dopant of the first conductive type. Thus, when the base region is composed of a single crystal silicon, the solar cell constitutes a single crystal silicon solar cell. Thus, the solar cell including a single crystal semiconductor is based on the base region or the silicon substrate 100, which has few defects due to excellent crystallinity, and thus exhibits excellent electrical properties.

[0058] Illustratively, the dopant of the first conductive type is an n-type or p-type dopant. For example, the dopant of the first conductive type can be an n-type impurity such as a Group V element (including phosphorus (P), arsenic (As), bismuth (Bi), antimony (Sb), etc.). Alternatively, the dopant of the first conductive type can be a p-type impurity such as a Group III element (including boron (B), aluminum (Al), gallium (Ga), indium (In), etc.).

[0059] Similarly, the base region can include an n-type impurity as the dopant of the first conductive type, and the emitter region forming a pn junction with the base region is p-type. When light is emitted to the pn junction, electrons generated by the photoelectric effect move toward the back surface of the silicon substrate 100 and are collected by a corresponding electrode, and holes move toward the front surface of the silicon substrate 100 and are then collected by a corresponding electrode, thereby generating electrical energy. The holes having a low moving speed move toward the front surface of the silicon substrate 100, thereby improving photoelectric conversion efficiency, but embodiments of the present disclosure are not limited thereto, and in other embodiments of the present disclosure, for example, the base region and the back surface field region can be designed to be p-type, and the emitter region can be designed to be n-type, without limitation.

[0060] In some embodiments, the silicon substrate 100 can include only the base region, and not include an additional doped region. That is, in a conventional solar cell, a doped region having a different conductive type from the silicon substrate 100 or a doped region having the same conductive type as the silicon substrate 100 and a relatively high doping concentration, etc. are formed on the silicon substrate 100.

[0061] As described above, the silicon substrate 100 is composed of only a base region, and does not include an additional doped region. For example, the difference between the lowest doped concentration and the highest doped concentration in the silicon substrate 100 is less than or equal to 10%, such as 9%, 8%, or 6%, without limitation.

[0062] The first passivation film 300 and the second passivation film 600 are passivation films, which are used to improve the photoelectric conversion efficiency and stability of the solar cell, reduce surface damage and oxidation reactions of the solar cell, and prolong the service life of the solar cell.

[0063] In some possible embodiments, the passivation film includes titanium dioxide, aluminum oxide, and diiron trioxide, without limitation. Preferably, the first passivation film 300 and / or the second passivation film 600 can use aluminum oxide to ensure light absorption.

[0064] The first antireflection film 200 is an antireflection film. Optionally, the first antireflection film 200 can be composed of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, without limitation.

[0065] In some possible embodiments, the solar cell provided by the present disclosure further includes a second antireflection film 700, which is arranged on the side of the second passivation film 600 away from the second conductive type region 500. The second antireflection film 700 can be composed of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, without limitation.

[0066] The antireflection film, also known as the anti-reflection film, is used to reduce or eliminate the reflected light of optical surfaces such as lenses, prisms, and plane mirrors, thereby increasing the light transmission of these components and reducing or eliminating the stray light of the system.

[0067] In some embodiments, the solar cell provided by the present disclosure further includes a first tunneling layer 810, which is arranged between the first conductive type region 400 and the silicon substrate 100.

[0068] In implementation, when a photon enters the solar cell, it will excite the electrons located on one side and push them to the tunneling layer. In the tunneling layer, the electrons will pass through the forbidden band through the tunneling effect to reach the other side. These electrons can generate current or voltage, thereby converting light energy into electrical energy. The tunneling effect improves the efficiency of electron transmission by reducing the height of the energy barrier that the electrons cross, thereby improving the efficiency of the solar cell. That is, the role of the tunneling layer is to improve the transmission efficiency of charges, that is, to increase the efficiency of the solar cell.

[0069] The first tunneling layer 810 is formed on the front surface of the silicon substrate 100. The first tunneling layer 810 passivates the surface of the silicon substrate 100, which has many recombination sites, and facilitates the migration of charge carriers through the tunneling effect.

[0070] Optionally, the first tunneling layer 810 can include a material that provides passivation and tunneling effect, such as oxide, nitride, semiconductor, conductive polymer, and the like. For example, the first tunneling layer 810 can include silicon oxide, silicon nitride, silicon oxynitride, intrinsic amorphous silicon, intrinsic polycrystalline silicon, and the like, without limitation.

[0071] In some embodiments, the solar cell provided by the present disclosure further includes a second tunneling layer 820, which is disposed between the second conductivity type region 500 and the silicon substrate 100. The second tunneling layer 820 can refer to the first tunneling layer 810, and will not be described herein.

[0072] In some embodiments, the solar cell provided by the present disclosure further includes a first doping layer, which is disposed between the silicon substrate 100 and the first tunneling layer 810.

[0073] In practice, the first doping layer refers to a thin layer of dopant (such as boron, phosphorus, etc.) formed on the solar cell by sputtering or chemical deposition method, so as to increase the thickness of the effective layer in the subsequent epitaxial growth process to improve the efficiency of the cell.

[0074] In some embodiments, the solar cell provided by the present disclosure further includes a second doping layer, which is disposed between the silicon substrate 100 and the second tunneling layer 820. The second doping layer can be doped with the first doping layer described above, and will not be described herein.

[0075] It should be noted that the first doping layer and the second doping layer have the same doping polarity on the same surface, for example, the first doping layer has the same doping type as the first conductivity type region 400, and the second doping layer has the same doping type as the second conductivity type region 500, and will not be described herein.

[0076] In some embodiments, the solar cell provided by the present disclosure further includes a first electrode 910 and a second electrode 920, the first electrode 910 is connected with the first conductivity type region 400, and the second electrode 920 is connected with the second conductivity type region 500.

[0077] In implementation, the first passivation film 300 and the first anti-reflection film 200 are both provided with openings, the first electrode 910 is electrically connected to the first conductive type region 400 via the openings formed by the first passivation film 300 and the first anti-reflection film 200, that is, the first electrode 910 is connected to the first conductive type region 400 after passing through the first anti-reflection film 200 and the first passivation film 300. Similarly, the second passivation film 600 and the second anti-reflection film 700 are both provided with openings, the second electrode 920 is electrically connected to the second conductive type region 500 via the openings formed by the second passivation film 600 and the second anti-reflection film 700, that is, the second electrode 920 is connected to the second conductive type region 500 after passing through the second anti-reflection film 700 and the second passivation film 600. The first electrode 910 and the second electrode 920 can be formed of various conductive materials (for example, copper or silver, etc.) and various shapes (for example, strips, pieces or other shapes), without limitation.

[0078] Embodiment Two

[0079] In some optional embodiments, the present disclosure also provides a photovoltaic module comprising the solar cell as described above.

[0080] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the photovoltaic module described above can refer to the corresponding structure and implementation principle in the aforementioned embodiment one, which will not be described here.

[0081] The solar cell of the present disclosure comprises a silicon substrate 100, wherein the back surface of the silicon substrate 100 is provided with a first textured structure 110, the side surface of the silicon substrate 100 is provided with a second textured structure 120, the first textured structure 110 and the second textured structure 120 both exhibit a table-like microstructure morphology, the first textured structure 110 comprises a plurality of first micro multi-sided table bodies, the second textured structure 120 comprises a plurality of second micro multi-sided table bodies, and the size of the first micro multi-sided table body is smaller than the size of the second micro multi-sided table body. Through the above arrangement, in the process of manufacturing the solar cell, the first textured structure 110 is first generated by texturing the front surface, the back surface and the side surface of the silicon substrate 100, and then other film layers are further deposited, for example, an emitter layer is deposited on the front surface of the silicon substrate 100, or a tunneling layer and a doped polysilicon layer are deposited on the back surface of the silicon substrate 100, and then the second textured structure 120 is generated again by etching on the basis of the first textured structure 110 of the side surface of the silicon substrate 100, so as to etch away the emitter layer material and the doped polysilicon layer material that penetrate to the side surface of the silicon substrate 100, preventing the emitter layer and the doped polysilicon layer on the back surface from contacting at the side surface of the silicon substrate 100 to cause short circuit.

[0082] The above merely preferred embodiments of the present disclosure and are not intended to limit the present disclosure. Therefore, any modification, equivalent replacement and improvement made without departing from the spirit and principle of the present disclosure shall fall within the protection scope of the present disclosure.

Claims

1. A solar cell, comprising: a silicon substrate, a back surface of the silicon substrate being provided with a first texture structure, a side surface of the silicon substrate being provided with a second texture structure; the first texture structure and the second texture structure both exhibit mesa-like microstructure topography, the first texture structure comprises a plurality of first micro multi-sided mesas, the second texture structure comprises a plurality of second micro multi-sided mesas, a size of the first micro multi-sided mesas is smaller than a size of the second micro multi-sided mesas.

2. The solar cell of claim 1, wherein, the first micro multi-sided mesas and the second micro multi-sided mesas both have a top surface, the size of the first micro multi-sided mesas and the size of the second micro multi-sided mesas are any one of a length of the corresponding top surface, a width of the corresponding top surface, a length of a butt line of the corresponding top surface, and a diameter of the corresponding top surface.

3. The solar cell of any of claims 1 to 2, wherein, the size of the first micro multi-sided mesas is greater than or equal to 4 microns, and the size of the first micro multi-sided mesas is less than 10 microns.

4. The solar cell of claim 3, wherein, the size of the second micro multi-sided mesas is greater than or equal to 10 microns, and the size of the second micro multi-sided mesas is less than or equal to 20 microns.

5. The solar cell of claim 1, wherein, the top surface of the first micro multi-sided mesas and the top surface of the second micro multi-sided mesas are any one of a rhombus, a square, a trapezoid, and a circle.

6. The solar cell of claim 1, wherein, the solar cell further comprises a first anti-reflection film, a first passivation film, a first conductivity type region, a second conductivity type region, and a second passivation film; the first conductivity type region, the first passivation film, and the first anti-reflection film are sequentially arranged on a front surface of the silicon substrate, the second conductivity type region and the second passivation film are sequentially arranged on a back surface of the silicon substrate.

7. The solar cell of claim 6, wherein, the solar cell further comprises a first tunneling layer, the first tunneling layer is arranged between the first conductivity type region and the silicon substrate.

8. The solar cell of claim 6 or 7, wherein, the solar cell further comprises a second tunneling layer, the second tunneling layer is arranged between the second conductivity type region and the silicon substrate.

9. The solar cell of claim 7, wherein, the solar cell further comprises a first doping layer, the first doping layer is arranged between the silicon substrate and the first tunneling layer.

10. The solar cell of claim 8, wherein, the solar cell further comprises a second doping layer, the second doping layer is arranged between the silicon substrate and the second tunneling layer.

11. The solar cell of any one of claims 6 to 10, wherein, the solar cell further comprises a first electrode and a second electrode, the first electrode is connected with the first conductivity type region, the second electrode is connected with the second conductivity type region. 12.A photovoltaic module, comprising the solar cell according to any one of claims 1 to 11.

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