Driver circuit for driving input power transistor in charge pump, and high-voltage charge pump and electronic device

By using an NMOS transistor as the input power transistor in a high-voltage charge pump, and combining it with an adjustable reference voltage and current limiting control, the problems of non-adjustable output voltage and large area of ​​the high-voltage charge pump are solved, achieving a high-efficiency and compact design of the charge pump.

WO2026056091A1PCT designated stage Publication Date: 2026-03-19SUZHOU LINK-IC CO LTD
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Patent Information

Application Number
PCT/CN2024/132037
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-09-13
Filing Date
2024-11-14
Publication Date
2026-03-19

AI Technical Summary

Technical Problem

Existing high-voltage charge pumps have non-adjustable output voltages and large areas, making them difficult to use in smaller applications.

Method used

Using NMOS transistors as input power transistors, the input voltage is directly received through a combination of high-side source follower NMOS transistors, low-side source follower NMOS transistors, and pull-down NMOS transistors in the drive circuit. The output voltage is adjusted by an adjustable reference voltage. Combined with a floating voltage generation module and a current limiting control module, conduction losses and area are reduced.

Benefits of technology

It achieves adjustable output voltage of high-voltage charge pump while reducing the area and conduction loss of charge pump, making it suitable for applications with smaller size.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided in the present invention is a driver circuit for driving an input power transistor in a charge pump. The input power transistor of the charge pump is an NMOS transistor, which reduces the conduction loss, a source electrode of the input power transistor receives an input voltage, and a drain electrode of the input power transistor is coupled to a first end of a flying capacitor; a gate electrode of a high-side source-follower NMOS transistor of the driver circuit receives an adjustable reference voltage, a drain electrode of the high-side source-follower NMOS transistor is coupled to an output end of the charge pump, and a source electrode of the high-side source-follower NMOS transistor is coupled to a drain electrode of a low-side source-follower NMOS transistor; a source electrode of the low-side source-follower NMOS transistor is coupled to a drain electrode of a pull-down NMOS transistor, and a gate electrode of the low-side source-follower NMOS transistor is coupled to a gate electrode of the pull-down NMOS transistor; and the gate electrode of the pull-down NMOS transistor also receives an input power transistor control signal by means of a driver, a source electrode of the pull-down NMOS transistor is coupled to the first end of the flying capacitor, and the drain electrode of the pull-down NMOS transistor is also coupled to a gate electrode of the input power transistor. The present invention changes the output voltage of the charge pump by means of adjusting the voltage value of the adjustable reference voltage; and the driver circuit of the present invention directly receives the input voltage, thereby reducing the area of the charge pump.
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Description

Driving circuit for driving input power tube in charge pump, high-voltage charge pump and electronic device TECHNICAL FIELD

[0001] The present application relates to the field of power electronics, and in particular to a driving circuit for driving an input power tube in a charge pump, a high-voltage charge pump and an electronic device. BACKGROUND

[0002] A charge pump is a switched-capacitor voltage converter that uses a capacitor as an energy storage element. The MOSFET switch inside the charge pump is periodically turned on and off under the control of a clock signal, so that the output capacitor is always switched between charging and discharging, and outputs a fixed output voltage value.

[0003] The output voltage of a high-voltage charge pump is higher than the input voltage value. However, the input power tube of the current high-voltage charge pump cannot directly receive the input voltage, and needs to use an additional voltage modulation device to receive the input voltage and generate a stable reference voltage required by the input end of the charge pump. The high-voltage charge pump then uses the stable reference voltage to output the output voltage. Since the voltage modulation device is relatively large in size, it is generally placed outside the chip of the charge pump, making it difficult for the current high-voltage charge pump to be used in applications with small size.

[0004] Therefore, how to ensure that the output voltage of the high-voltage charge pump is adjustable while reducing the area of the charge pump has become a technical problem that needs to be solved in the industry.

[0005] SUMMARY

[0006] The present application provides a driving circuit for driving an input power tube in a charge pump, a high-voltage charge pump and an electronic device, which solves the technical problem of how to ensure that the output voltage of the high-voltage charge pump is adjustable while reducing the area of the charge pump.

[0007] According to a first aspect of the present application, an embodiment of the present application provides a driving circuit for driving an input power tube in a charge pump, the input power tube being an NMOS tube, a source of the input power tube receiving an input voltage, and a drain of the input power tube being coupled to a first end of a flying capacitor;

[0008] The driving circuit comprises a high-end source follower NMOS tube, a low-end source follower NMOS tube and a pull-down NMOS tube.

[0009] The gate of the high-end source following NMOS tube receives an adjustable reference voltage, the drain of the high-end source following NMOS tube is coupled to the output terminal of the charge pump, the source of the high-end source following NMOS tube is coupled to the drain of the low-end source following NMOS tube, the source of the low-end source following NMOS tube is coupled to the drain of the pull-down NMOS tube, the gate of the low-end source following NMOS tube is coupled to the gate of the pull-down NMOS tube, the gate of the pull-down NMOS tube further receives an input power tube control signal through the driver, and the source of the pull-down NMOS tube is coupled to the first terminal of the flying capacitor, and the drain of the pull-down NMOS tube is further coupled to the gate of the input power tube.

[0010] Optionally, the voltage value of the high level of the input power tube control signal output by the driver is equal to the voltage value of the floating voltage, and the voltage value of the low level of the input power tube control signal output by the driver is equal to the voltage value of the flying capacitor.

[0011] Optionally, the driving circuit further comprises a floating voltage generating module.

[0012] The first terminal of the floating voltage generating module is coupled to the output terminal of the charge pump, the second terminal of the floating voltage generating module is coupled to the first terminal of the flying capacitor, and the output terminal of the floating voltage generating module is coupled to the power supply terminal of the driver, and the ground terminal of the driver is coupled to the first terminal of the flying capacitor.

[0013] The floating voltage generating module is configured to output a floating voltage to the power supply terminal of the driver, the voltage value of the floating voltage is higher than the voltage value of the flying capacitor, and the difference between the voltage value of the floating voltage and the voltage value of the flying capacitor is a set value.

[0014] Optionally, the floating voltage generating module comprises a Zener diode and a first NMOS tube.

[0015] The anode of the Zener diode is coupled to the first terminal of the flying capacitor, and the cathode of the Zener diode is coupled to the output terminal of the charge pump and the gate of the first NMOS tube respectively.

[0016] The drain of the first NMOS tube is coupled to the output terminal of the charge pump, and the source of the first NMOS tube is coupled to the power supply terminal of the driver.

[0017] Optionally, a short-circuit protection module is further included, and the short-circuit protection module comprises a first resistor and a first diode.

[0018] The first terminal of the first resistor receives the adjustable reference voltage, the second terminal of the first resistor is coupled to the gate of the high-end source following NMOS tube and the cathode of the first diode respectively, and the anode of the first diode is coupled to the source of the high-end source following NMOS tube.

[0019] Optionally, the input power tube control module further comprises a current limiting control module, a first end of the current limiting control module is coupled to a gate of the input power tube, and a second end of the current limiting control module is coupled to a first end of the flying capacitor.

[0020] Optionally, the current limiting control module comprises N current limiting branches, a current limiting NMOS tube and a switch control unit in parallel.

[0021] A first end of each current limiting branch is coupled to a source of the low-end source follower NMOS tube, a second end of each current limiting branch is respectively coupled to a drain of the pull-down NMOS tube and a drain of the current limiting NMOS tube, a source of the current limiting NMOS tube is coupled to the first end of the flying capacitor, a gate of the current limiting NMOS tube is coupled to the drain of the current limiting NMOS tube, and the switch control unit is respectively coupled to a control end of each current limiting branch to control on-off of each current limiting branch.

[0022] Optionally, each current limiting branch comprises a current limiting switch and a current limiting resistor connected in sequence, and the switch control unit is respectively coupled to a control end of each current limiting switch.

[0023] According to a second aspect of the present application, the embodiment of the present application provides a high-voltage charge pump, comprising: an input power tube control module of a driving circuit and an input power tube according to any one of the first aspect of the present application.

[0024] Optionally, the high-voltage charge pump further comprises: a transmission NMOS tube, an output PMOS tube, a ground NMOS tube, a flying capacitor, an output capacitor and a total control module.

[0025] A drain of the input power tube receives an input voltage, a source of the input power tube is respectively coupled to a first end of the flying capacitor and a drain of the ground NMOS tube, a gate of the input power tube is coupled to an output end of an input gate control module, an input end of the input power tube control module is coupled to a first end of the total control module, and a gate of the ground NMOS tube is coupled to a second end of the total control module through a ground gate control module, and a source of the ground NMOS tube is grounded.

[0026] A source of the output PMOS tube is coupled to a first end of the output capacitor, a drain of the output PMOS tube is respectively coupled to a drain of the transmission NMOS tube and a second end of the flying capacitor, and a gate of the output PMOS tube is coupled to a third end of the total control module through an output gate control module.

[0027] A source of the transmission NMOS tube receives the input voltage, and the source of the transmission NMOS tube is further coupled to a second end of the output capacitor, a gate of the transmission NMOS tube is coupled to a fourth end of the total control module through a transmission gate control module, and the first end of the output capacitor is used to output an output voltage.

[0028] The total control module is configured to control the on-off of the input power transistor, the transmission NMOS transistor, the output PMOS transistor and the ground NMOS transistor, so that the voltage value of the output voltage is a target voltage value.

[0029] Optionally, the high-voltage charge pump further comprises:

[0030] A flying voltage detection module, a first end of which is coupled to a first end of the flying capacitor, and a second end of which is coupled to a fifth end of the total control module, the flying voltage detection module being configured to detect a voltage value of the flying capacitor;

[0031] An output voltage detection module, a first end of which receives an input voltage, a second end of which is coupled to a first end of the output capacitor, and a third end of which is coupled to a sixth end of the total control module, the output voltage detection module being configured to detect a voltage value of the output voltage;

[0032] The total control module is further configured to:

[0033] determine whether the charge pump is in a normal working state based on the voltage value of the output voltage and / or the voltage value of the flying capacitor, wherein:

[0034] only when the voltage value of the flying capacitor remains within a first set voltage range and the voltage value of the output voltage is higher than a second set voltage value, the charge pump is determined to be in the normal working state.

[0035] According to a third aspect of the present application, an embodiment of the present application provides an electronic device, comprising the high-voltage charge pump according to any one of the second aspect of the present application.

[0036] Compared with the prior art, the technical scheme of the embodiment of the present application has the following beneficial effects:

[0037] The input power tube of the charge pump is an NMOS tube in the driving circuit for driving the input power tube in the charge pump, the conduction loss is reduced, the source of the input power tube receives an input voltage, and the drain of the input power tube is coupled to the first end of the flying capacitor; the gate of the high-end source follower NMOS tube receives an adjustable reference voltage, the drain of the high-end source follower NMOS tube is coupled to the output end of the charge pump, the source of the high-end source follower NMOS tube is coupled to the drain of the low-end source follower NMOS tube, the source of the low-end source follower NMOS tube is coupled to the drain of the pull-down NMOS tube, the gate of the low-end source follower NMOS tube is coupled to the gate of the pull-down NMOS tube, the gate of the pull-down NMOS tube also receives an input power tube control signal through the driver, the source of the pull-down NMOS tube is coupled to the first end of the flying capacitor, and the drain of the pull-down NMOS tube is also coupled to the gate of the input power tube, the output voltage of the charge pump is changed by adjusting the voltage value of the adjustable reference voltage, and the driving circuit directly receives the input voltage, so that the area of the charge pump is reduced.

[0038] In the high-voltage charge pump and the electronic device, the driving circuit for driving the input power tube in the charge pump is applied, so that the output voltage of the high-voltage charge pump can be changed by adjusting the voltage value of the adjustable reference voltage, and the driving circuit directly receives the input voltage, so that the area of the high-voltage charge pump is small. BRIEF DESCRIPTION OF DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0040] Fig. 1 is a structural schematic diagram of a high-voltage charge pump in the prior art;

[0041] Fig. 2 is a structural schematic diagram of a driving circuit for driving an input power tube in a charge pump in an embodiment of the present application;

[0042] Fig. 3 is a structural schematic diagram of a driving circuit in another embodiment of the present application;

[0043] Fig. 4 is a structural schematic diagram of a floating voltage generation module in an embodiment of the present application;

[0044] Fig. 5 is a structural schematic diagram of a driving circuit in still another embodiment of the present application;

[0045] Fig. 6 is a structural schematic diagram of a current limiting control module in an embodiment of the present application;

[0046] Fig. 7 is a structural schematic diagram of a high-voltage charge pump in an embodiment of the present application;

[0047] BRIEF DESCRIPTION OF DRAWINGS

[0048] CNH-IN, input power transistor;

[0049] CNH_REF SFH, high-side source follower NMOS transistor;

[0050] CNH_REF SF L, low-side source follower NMOS transistor;

[0051] CNH_REF PD, pull-down NMOS transistor;

[0052] VCNH G, gate control signal;

[0053] 21, floating voltage generation module;

[0054] 201, driver;

[0055] Z1, Zener diode;

[0056] M1, first NMOS transistor;

[0057] 22, short-circuit protection module;

[0058] R1, first resistor;

[0059] D1, first diode;

[0060] 23, current-limiting control module;

[0061] CNHS, current-limiting NMOS transistor;

[0062] 231, switch control unit;

[0063] CPL, pass NMOS transistor;

[0064] CPH, output PMOS transistor;

[0065] CNL, ground NMOS transistor;

[0066] C_FLY, flying capacitor;

[0067] CL, output capacitor;

[0068] 30, overall control module;

[0069] 31, input gate control module;

[0070] 32, ground gate control module;

[0071] 33, output gate control module;

[0072] 34, pass gate control module;

[0073] 35 - flying voltage detection module;

[0074] 36 - output voltage detection module. DETAILED DESCRIPTION

[0075] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work belong to the scope of protection of the present application.

[0076] The terms "first", "second", "third", "fourth" and the like (if any) in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0077] The technical solutions of the present application will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in some embodiments.

[0078] As described in the background, how to ensure that the output voltage of the high-voltage charge pump is adjustable, and to reduce the area of the charge pump, has become a technical problem that needs to be solved in the industry at present. The following will be described in detail in conjunction with the drawings.

[0079] Please refer to FIG. 1, which shows a high-voltage charge pump in the prior art, including:

[0080] Input PMOS tube Q1, transmission NMOS tube Q2, output PMOS tube Q3, ground NMOS tube Q4, flying capacitor C_FLY, output capacitor CL and total control module 10;

[0081] The source of the input PMOS tube Q1 receives a stable reference voltage VREF_BUF, and the drain thereof is respectively coupled to the first end of the flying capacitor C_FLY and the drain of the ground NMOS tube Q4. The gate of the input PMOS tube Q1 is coupled to the first end of the total control module 10 through the input gate control module 11.

[0082] The gate of the ground NMOS tube Q4 is coupled to the second end of the total control module 10 through the ground gate control module 12, and the source thereof is grounded,

[0083] The source of the output PMOS tube Q3 is coupled to the first end of the output capacitor CL, the drain thereof is coupled to the drain of the transmission NMOS tube Q2 and the second end of the flying capacitor C_FLY respectively, the gate of the output PMOS tube Q3 is coupled to the third end of the total control module 10 through the output gate control module 13,

[0084] The source of the transmission NMOS tube Q2 receives the input voltage VIN, and the source thereof is also coupled to the second end of the output capacitor CL, the gate of the transmission NMOS tube Q2 is coupled to the fourth end of the total control module 10 through the transmission gate control module, and the first end of the output capacitor CL is used for outputting the output voltage VCP;

[0085] The total control module 10 is used for controlling the on-off of the input PMOS tube Q1, the transmission NMOS tube Q2, the output PMOS tube Q3 and the ground NMOS tube Q4, so that the voltage value of the output voltage VCP is a set voltage value.

[0086] Since the input power tube (input PMOS tube Q1) of the high-voltage charge pump in the prior art usually adopts a PMOS tube, the conduction loss of the power tube is also relatively large.

[0087] Furthermore, the stable reference voltage VREF_BUF is generated by the voltage modulation device 15 in the example of FIG. 1, which includes a comparator 151, a first power tube MLDO and a decoupling capacitor DECAP_C1.

[0088] The first end of the first power tube MLDO receives an input voltage VIN, the second end thereof is coupled to the first end of the decoupling capacitor DECAP_C1 and the non-inverting input terminal of the comparator 151 respectively, the second end of the decoupling capacitor DECAP_C1 is grounded, the inverting input terminal of the comparator 151 receives a first reference voltage VREF1, the output terminal thereof is coupled to the control terminal of the first power tube MLDO, and the second end of the first power tube MLDO is also used for outputting the stable reference voltage VREF_BUF.

[0089] Among them, the first power tube MLDO is a PMOS tube.

[0090] In practical applications, the decoupling capacitor DECAP_C1 needs a large capacitance value, and has a large area, and thus in some application scenarios, the decoupling capacitor DECAP_C1 cannot be additionally added in the circuit, and the area of the first power tube MLDO is also large, so that the area required by the voltage modulation device 15 as a whole is large.

[0091] It can be seen that the high-voltage charge pump of the prior art has the problems of large area and high conduction loss.

[0092] Therefore, the present application provides a driving circuit for driving an input power tube in a charge pump, the input power tube of the charge pump is an NMOS tube, the conduction loss is reduced, and the source of the input power tube receives an input voltage, and the drain thereof is coupled to a first end of a flying capacitor; the gate of a high-side source follower NMOS tube of the driving circuit receives an adjustable reference voltage, the drain thereof is coupled to an output end of the charge pump, the source thereof is coupled to the drain of a low-side source follower NMOS tube, the source of the low-side source follower NMOS tube is coupled to the drain of a pull-down NMOS tube, the gate of the low-side source follower NMOS tube is coupled to the gate of the pull-down NMOS tube, the gate of the pull-down NMOS tube also receives an input power tube control signal through a driver, the source of the pull-down NMOS tube is coupled to the first end of the flying capacitor, and the drain of the pull-down NMOS tube is also coupled to the gate of the input power tube, the present application changes the output voltage of the charge pump by adjusting the voltage value of the adjustable reference voltage, and the driving circuit of the present application directly receives the input voltage, thereby reducing the area of the charge pump.

[0093] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0094] Please refer to FIG. 2, the present application embodiment provides a driving circuit for driving an input power tube in a charge pump, the input power tube CNH is an NMOS tube, the source of the input power tube CNH receives an input voltage VIN, and the drain thereof is coupled to a first end CNFLY of a flying capacitor (the flying capacitor is not shown in FIG. 2);

[0095] The driving circuit comprises a high-side source follower NMOS tube CNH_REFSFH, a low-side source follower NMOS tube CNH_REFSFL, and a pull-down NMOS tube CNH_REFPD;

[0096] The gate of the high-end source following NMOS transistor CNH_REFSFH receives an adjustable reference voltage VREF, the drain of the high-end source following NMOS transistor CNH_REFSFH is coupled to the output terminal VCP of the charge pump, the source of the high-end source following NMOS transistor CNH_REFSFH is coupled to the drain of the low-end source following NMOS transistor CNH_REFSFL, the source of the low-end source following NMOS transistor CNH_REFSFL is coupled to the drain of the pull-down NMOS transistor CNH_REFPD, the gate of the low-end source following NMOS transistor CNH_REFSFL is coupled to the gate of the pull-down NMOS transistor CNH_REFPD, the gate of the pull-down NMOS transistor CNH_REFPD further receives an input power transistor control signal CONTROL1 through the driver 201, the source of the pull-down NMOS transistor CNH_REFPD is coupled to the first end CNFLY of the flying capacitor, and the drain of the pull-down NMOS transistor CNH_REFPD is further coupled to the gate of the input power transistor CNH.

[0097] In the example of FIG. 2, a node between the source of the low-end source following NMOS transistor CNH_REFSFL and the drain of the pull-down NMOS transistor CNH_REFPD is used to output a gate control signal VCNHG to the gate of the input power transistor CNH.

[0098] It can be seen that the present application not only uses an NMOS transistor as the input power transistor CNH of the charge pump to reduce the conduction loss, but also changes the output voltage VCP of the charge pump by adjusting the voltage value of the adjustable reference voltage VREF, and the driving circuit of the present application directly receives an input voltage VIN to reduce the area of the charge pump.

[0099] In a preferred embodiment, the voltage value of the high level of the input power transistor CNH control signal output by the driver 201 is equal to the voltage value of the floating voltage, and the voltage value of the low level of the input power transistor CNH control signal output by the driver 201 is equal to the voltage value of the flying capacitor.

[0100] Therefore, the driver 201 of the present application can ensure the stability of the on-off control of the input power transistor CNH.

[0101] In this case, referring to FIG. 3, the driving circuit further comprises a floating voltage generation module 21;

[0102] The first end of the floating voltage generation module 21 is coupled to the output terminal VCP of the charge pump, the second end of the floating voltage generation module 21 is coupled to the first end CNFLY of the flying capacitor, and the output terminal of the floating voltage generation module 21 is coupled to the power supply terminal of the driver 201, and the ground terminal of the driver 201 is coupled to the first end CNFLY of the flying capacitor.

[0103] The floating voltage generation module 21 is configured to output a floating voltage VCNFLT to a power supply end of the driver 201, where the floating voltage VCNFLT has a voltage value higher than that of the flying capacitor, and the difference between the voltage value of the floating voltage VCNFLT and that of the flying capacitor is a set value.

[0104] In one specific embodiment, referring to FIG. 4, the floating voltage generation module 21 includes a Zener diode Z1 and a first NMOS transistor M1.

[0105] The anode of the Zener diode Z1 is coupled to the first end CNFLY of the flying capacitor, and the cathode of the Zener diode Z1 is coupled to the output end VCP of the charge pump and the gate of the first NMOS transistor M1, respectively.

[0106] The drain of the first NMOS transistor M1 is coupled to the output end VCP of the charge pump, and the source of the first NMOS transistor M1 is coupled to the power supply end of the driver 201.

[0107] It should be understood that the present application does not limit the specific circuit structure of the floating voltage generation module 21, and any circuit capable of generating a floating voltage VCNFLT is within the protection scope of the present application.

[0108] To prevent the flying capacitor in the charge pump from being short-circuited and thus causing damage to the driving circuit, in one embodiment, referring to FIG. 5, the driving circuit further includes a short-circuit protection module 22, where the short-circuit protection module 22 includes a first resistor R1 and a first diode D1.

[0109] The first end of the first resistor R1 receives the adjustable reference voltage VREF, the second end of the first resistor R1 is coupled to the gate of the high-side source follower NMOS transistor CNH_REFSFH and the cathode of the first diode D1, respectively, and the anode of the first diode D1 is coupled to the source of the high-side source follower NMOS transistor CNH_REFSFH.

[0110] Of course, in another protection mode, the current value flowing through the input power transistor CNH can also be limited, specifically, referring to FIG. 5, the driving circuit further includes a current limiting control module 23, where the first end of the current limiting control module 23 is coupled to the gate of the input power transistor CNH, and the second end of the current limiting control module 23 is coupled to the first end CNFLY of the flying capacitor.

[0111] In one specific embodiment, referring to FIG. 6, the current limiting control module 23 includes N current limiting branches in parallel, a current limiting NMOS transistor CNHS, and a switch control unit 231.

[0112] The first end of each current-limiting branch is coupled to the source of the low-end source follower NMOS tube CNH_REFSFL, the second end of each current-limiting branch is respectively coupled to the drain of the pull-down NMOS tube CNH_REFPD and the drain of the current-limiting NMOS tube CNHS, the source of the current-limiting NMOS tube CNHS is coupled to the first end CNFLY of the flying capacitor, the gate of the current-limiting NMOS tube CNHS is coupled to the drain of the current-limiting NMOS tube CNHS, and the switch control unit 231 is coupled to the control end of each current-limiting branch to control the on-off of each current-limiting branch.

[0113] In the example of FIG. 6, each current-limiting branch includes a current-limiting switch (S1-SN) and a current-limiting resistor (RL1-RLN) connected in sequence, and the switch control unit 231 is coupled to the control end of each current-limiting switch.

[0114] Of course, the present application does not limit the specific implementation of the current-limiting module, and any circuit that can limit the current flowing through the input power tube CNH is within the protection scope of the present application.

[0115] In summary, in the driving circuit of the charge pump of the present application, the input power tube CNH is set as an NMOS tube to reduce the conduction loss, and the source of the input power tube CNH receives the input voltage VIN, and the drain thereof is coupled to the first end CNFLY of the flying capacitor; the gate of the high-end source follower NMOS tube CNH_REFSFH of the driving circuit receives the adjustable reference voltage VREF, the drain thereof is coupled to the output end of the charge pump, the source thereof is coupled to the drain of the low-end source follower NMOS tube CNH_REFSFL, the source of the low-end source follower NMOS tube CNH_REFSFL is coupled to the drain of the pull-down NMOS tube CNH_REFPD, the gate of the low-end source follower NMOS tube CNH_REFSFL is coupled to the gate of the pull-down NMOS tube CNH_REFPD, the gate of the pull-down NMOS tube CNH_REFPD also receives the input power tube CNH control signal through the driver 201, the source of the pull-down NMOS tube CNH_REFPD is coupled to the first end CNFLY of the flying capacitor, and the drain of the pull-down NMOS tube CNH_REFPD is also coupled to the gate of the input power tube CNH; the present application changes the output voltage VCP of the charge pump by adjusting the voltage value of the adjustable reference voltage VREF, and the driving circuit of the present application directly receives the input voltage VIN, thereby reducing the area of the charge pump.

[0116] In addition, the present application also provides a high-voltage charge pump, as shown in FIG. 7, which comprises the input power tube control module and the input power tube CNH of the driving circuit of any one of the above.

[0117] In one embodiment, referring to FIG. 7, the high-voltage charge pump further comprises a transmission NMOS tube CPL, an output PMOS tube CPH, a ground NMOS tube CNL, a flying capacitor C_FLY, an output capacitor CL, and a total control module 30;

[0118] The drain of the input power tube CNH receives an input voltage VIN, the source of the input power tube CNH is coupled to the first end CNFLY of the flying capacitor C_FLY and the drain of the ground NMOS tube CNL, respectively, the gate of the input power tube CNH is coupled to the output end of an input gate control module 31, the input end of the input power tube control module 31 is coupled to the first end of the total control module 30, the gate of the ground NMOS tube CNL is coupled to the second end of the total control module 30 through a ground gate control module 32, and the source of the ground NMOS tube CNL is grounded,

[0119] The source of the output PMOS tube CPH is coupled to the first end of the output capacitor CL, the drain of the output PMOS tube CPH is coupled to the drain of the transmission NMOS tube CPL and the second end CPFLY of the flying capacitor C_FLY, respectively, and the gate of the output PMOS tube CPH is coupled to the third end of the total control module 30 through an output gate control module 33.

[0120] The source of the transmission NMOS tube CPL receives the input voltage VIN, and the source of the transmission NMOS tube CPL is also coupled to the second end of the output capacitor CL, the gate of the transmission NMOS tube CPL is coupled to the fourth end of the total control module 30 through a transmission gate control module 34, and the first end of the output capacitor CL is used to output the output voltage VCP.

[0121] The total control module 30 is used to control the on-off of the input power tube CNH, the transmission NMOS tube CPL, the output PMOS tube CPH, and the ground NMOS tube CNL, so that the voltage value of the output voltage VCP is a target voltage value.

[0122] It can be seen that, by applying the technical scheme, the drive circuit for driving the input power tube CNH in the charge pump, the output voltage VCP of the high-voltage charge pump can be changed by adjusting the voltage value of the adjustable reference voltage VREF, the drive circuit of the high-voltage charge pump directly receives the input voltage VIN, and the area of the high-voltage charge pump is small.

[0123] In actual work, in one embodiment, referring to FIG. 7, the high-voltage charge pump further comprises:

[0124] a flying capacitor voltage detection module 35, a first end of which is coupled to a first end CNFLY of the flying capacitor C_FLY, and a second end of which is coupled to a fifth end of the total control module 30, the flying capacitor voltage detection module 35 being configured to detect a voltage value of the flying capacitor C_FLY;

[0125] an output voltage detection module 36, a first end of which receives the input voltage VIN, a second end of which is coupled to a first end of the output capacitor CL, and a third end of which is coupled to a sixth end of the total control module 30, the output voltage detection module 36 being configured to detect a voltage value of the output voltage VCP;

[0126] The total control module 30 is further configured to:

[0127] determine whether the charge pump is in a normal working state based on the voltage value of the output voltage VCP and / or the voltage value of the flying capacitor C_FLY, wherein:

[0128] only when the voltage value of the flying capacitor C_FLY remains within a first set voltage range and the voltage value of the output voltage VCP is higher than a second set voltage value, the charge pump is determined to be in the normal working state.

[0129] In addition, the embodiment of the present application further provides an electronic device comprising the high-voltage charge pump of any one of the above. As an example, the electronic device can be a power device, and of course, the present application is not limited thereto, and can also be other devices requiring a high-voltage adjustable voltage continuous switch type charge pump power supply.

[0130] In summary, the embodiment of the present application sets the input power tube of the charge pump as an NMOS tube, thereby reducing the conduction loss, and the source of the input power tube receives the input voltage, and the drain thereof is coupled to the first end of the flying capacitor. The gate of the high-side source follower NMOS tube receives the adjustable reference voltage, the drain thereof is coupled to the output end of the charge pump, the source thereof is coupled to the drain of the low-side source follower NMOS tube, the source of the low-side source follower NMOS tube is coupled to the drain of the pull-down NMOS tube, the gate of the low-side source follower NMOS tube is coupled to the gate of the pull-down NMOS tube, the gate of the pull-down NMOS tube further receives the input power tube control signal through the driver, the source of the pull-down NMOS tube is coupled to the first end of the flying capacitor, and the drain of the pull-down NMOS tube is further coupled to the gate of the input power tube. The present application changes the output voltage of the charge pump by adjusting the voltage value of the adjustable reference voltage, and the driving circuit of the present application directly receives the input voltage, thereby reducing the area of the charge pump.

[0131] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, and therefore, the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. A drive circuit for driving an input power transistor in a charge pump, characterized by The input power tube is an NMOS tube, a source of the input power tube receives an input voltage, and a drain of the input power tube is coupled to a first end of a flying capacitor; The driving circuit comprises a high-end source follower NMOS tube, a low-end source follower NMOS tube and a pull-down NMOS tube; A gate of the high-end source follower NMOS tube receives an adjustable reference voltage, a drain of the high-end source follower NMOS tube is coupled to an output end of the charge pump, a source of the high-end source follower NMOS tube is coupled to a drain of the low-end source follower NMOS tube, a source of the low-end source follower NMOS tube is coupled to a drain of the pull-down NMOS tube, a gate of the low-end source follower NMOS tube is coupled to a gate of the pull-down NMOS tube, the gate of the pull-down NMOS tube also receives an input power tube control signal through a driver, and a source of the pull-down NMOS tube is coupled to the first end of the flying capacitor, and a drain of the pull-down NMOS tube is also coupled to a gate of the input power tube.

2. The drive circuit of claim 1, wherein, A voltage value of a high level of the input power tube control signal output by the driver is equal to a voltage value of the floating voltage, and a voltage value of a low level of the input power tube control signal output by the driver is equal to a voltage value of the flying capacitor.

3. The drive circuit of claim 2, wherein, The driving circuit further comprises a floating voltage generation module; A first end of the floating voltage generation module is coupled to the output end of the charge pump, a second end of the floating voltage generation module is coupled to the first end of the flying capacitor, and an output end of the floating voltage generation module is coupled to a power supply end of the driver, and a ground end of the driver is coupled to the first end of the flying capacitor; The floating voltage generation module is configured to output a floating voltage to the power supply end of the driver, the floating voltage has a voltage value higher than the voltage value of the flying capacitor, and a difference between the voltage value of the floating voltage and the voltage value of the flying capacitor is a set value.

4. The drive circuit of claim 3, wherein The floating voltage generation module comprises a Zener diode and a first NMOS tube; An anode of the Zener diode is coupled to the first end of the flying capacitor, and a cathode of the Zener diode is coupled to the output end of the charge pump and a gate of the first NMOS tube, respectively; A drain of the first NMOS tube is coupled to the output end of the charge pump, and a source of the first NMOS tube is coupled to the power supply end of the driver.

5. The drive circuit of claim 1, wherein, The short-circuit protection module comprises a first resistor and a first diode; A first end of the first resistor receives the adjustable reference voltage, a second end of the first resistor is coupled to a gate of the high-end source follower NMOS tube and a cathode of the first diode, respectively, and an anode of the first diode is coupled to a source of the high-end source follower NMOS tube.

6. The drive circuit of claim 1, wherein, The current limiting control module comprises N current limiting branches in parallel, a current limiting NMOS tube and a switch control unit; 7. The drive circuit of claim 6, wherein, The current limiting control module comprises N current limiting branches in parallel, a current limiting NMOS tube and a switch control unit; The first end of each current limiting branch is coupled to the source of the low-end source follower NMOS tube, the second end of each current limiting branch is respectively coupled to the drain of the pull-down NMOS tube and the drain of the current limiting NMOS tube, the source of the current limiting NMOS tube is coupled to the first end of the flying capacitor, the gate of the current limiting NMOS tube is coupled to the drain of the current limiting NMOS tube, and the switch control unit is coupled to the control end of each current limiting branch to control the on-off of each current limiting branch.

8. The drive circuit of claim 7, wherein, Each current limiting branch includes a current limiting switch and a current limiting resistor connected in sequence, and the switch control unit is coupled to the control end of each current limiting switch.

9. A high voltage charge pump, characterized by The input power tube control module of the driving circuit and the input power tube according to any one of claims 1-8. The high-voltage charge pump further comprises a transmission NMOS tube, an output PMOS tube, a ground NMOS tube, a flying capacitor, an output capacitor, and a total control module; 10. The high voltage charge pump of claim 9, wherein, The drain of the input power tube receives an input voltage, the source of the input power tube is respectively coupled to the first end of the flying capacitor and the drain of the ground NMOS tube, the gate of the input power tube is coupled to the output end of the input gate control module, the input end of the input power tube control module is coupled to the first end of the total control module, the gate of the ground NMOS tube is coupled to the second end of the total control module through the ground gate control module, and the source of the ground NMOS tube is grounded, The source of the output PMOS tube is coupled to the first end of the output capacitor, the drain of the output PMOS tube is respectively coupled to the drain of the transmission NMOS tube and the second end of the flying capacitor, and the gate of the output PMOS tube is coupled to the third end of the total control module through the output gate control module; The source of the transmission NMOS tube receives the input voltage, and the source of the transmission NMOS tube is also coupled to the second end of the output capacitor, the gate of the transmission NMOS tube is coupled to the fourth end of the total control module through the transmission gate control module, and the first end of the output capacitor is used to output the output voltage; The total control module is used to control the on-off of the input power tube, the transmission NMOS tube, the output PMOS tube, and the ground NMOS tube, so that the voltage value of the output voltage is a target voltage value. The high-voltage charge pump further comprises:

11. The high voltage charge pump of claim 9, wherein, A flying capacitor voltage detection module, a first end of which is coupled to the first end of the flying capacitor, and a second end of which is coupled to the fifth end of the total control module, the flying capacitor voltage detection module being used to detect the voltage value of the flying capacitor; An output voltage detection module, a first end of which receives an input voltage, a second end of which is coupled to the first end of the output capacitor, and a third end of which is coupled to the sixth end of the total control module, the output voltage detection module being used to detect the voltage value of the output voltage; The total control module is further used to: Judge whether the charge pump is in a normal working state based on the voltage value of the output voltage and / or the voltage value of the flying capacitor, wherein: ​ Only when the voltage value of the flying capacitor is kept in a first set voltage range and the voltage value of the output voltage is higher than a second set voltage value, the charge pump is determined as a normal working state.

12. An electronic device, comprising: The high-voltage charge pump of any one of claims 9-11. The high-voltage charge pump of any one of claims 9-11.

Citation Information

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