Measurement-free error correction for fault-tolerant neutral atom quantum computing

Abstract

The present disclosure relates to methods for measurement-free fault-tolerant quantum computing. One method comprises preparing, based on a quantum error correction code, a set of three or more logical qubits in an initial state, wherein each logical qubit comprises a plurality of physical qubits. The method also comprises performing a fault-tolerant logical entangling gate on the three or more logical qubits. The present disclosure further relates to a quantum computing device and a computer program.

Description

June 20, 2025 PlanQC GmbH P177842WO ANE / BMN / WNJMEASUREMENT-FREE ERROR CORRECTION FOR FAULT-TOLERANT NEUTRAL ATOM QUANTUM COMPUTINGFIELD OF INVENTION

[0001] The present disclosure relates to methods and devices for universal and fault-tolerant quantum computation via scalable measurement-free error correction. Possible implementations include quantum computers using atomic particles, such as neutral atoms or ions, as physical qubits. Aspects of the present disclosure may benefit the implementation of large-scale quantum computing, where small errors in the operations carried out by the quantum computer can spoil the results of the quantum computation. Aspects of the present disclosure may allow to overcome such limitations at least partially by correcting such errors at a faster rate than they appear, providing a fault-tolerant quantum computing architecture having a universal set of gates.INTRODUCTION

[0002] The ability to perform high-fidelity quantum gates in a fast and robust manner is a key requirement for building useful quantum computing devices. As is known in the art, the computational advantage provided by quantum computing devices as compared to classical computers may be limited by the fidelity, speed and / or robustness of individual quantum gates. A sequence of an arbitrary number of such gates may implement a quantum algorithm. Such quantum gates generally act on a plurality of qubits of a quantum register. Such quantum registers may be realized, for instance, by trapping, inside a vacuum chamber, neutral atoms (such as rubidium, cesium, strontium or ytterbium atoms, etc.) or other types of atomic particles (molecules, ions, etc.), e.g., in arrays of optical tweezer traps, Paul traps or optical lattices or combinations thereof. Typically, realizing quantum gates for a group of two or more qubits requires interactions between qubits. For example, such interactions may be engineered using Rydberg states of neutral atoms, or using collective motionalstates in the case of ions. The aspects disclosed herein can also be applied to other physical qubit implementations such as superconducting qubits, etc.

[0003] Neutral atom quantum registers provide long coherence times, scalability and reconfigurable geometries for realizing arbitrary interaction connectivity between the physical and / or logical qubits of the quantum register. For example, two-qubit quantum gates involving Rydberg states and van der Waals interactions have been experimentally realized using rubidium atoms (see S. J. Evered et al., High-fidelity parallel entangling gates on a neutral-atom quantum computer, Nature 622, pp. 268-272), achieving up to 99.5% gate fidelity. Such quantum computers are expected to require quantum error correction (QEC), to perform large-scale computations. This is because all quantum devices are affected by small errors during their operation, which propagate across the quantum computation during the execution of the quantum algorithm. Therefore, as the size of the computation is increased, both in time and space, such small errors may accumulate, propagate and certainly spoil the results.

[0004] However, QEC allows to counteract this uncontrolled propagation of errors. By designing the physical system to have some redundancy, one may be able to detect and correct such errors on-the-fly. If such errors can be corrected at a faster rate than they appear, a fault -tolerant quantum computing architecture with a lower effective error rate can be realized. In this regime the quantum computing architecture may be scalable, such that the fault-tolerance is maintained for the desired quantum circuit one wishes to perform at the logical level.

[0005] Traditional approaches to QEC rely heavily on intermediate measurements and classical processing of error syndromes, followed by feedback operations to correct errors. While theoretically sound, these approaches face significant practical challenges: In many quantum computing platforms, particularly those based on neutral atoms or trapped ions, measurements are substantially slower than gate operations, often by a factor of 100-1000. This measurement bottleneck creates a critical limitation for the logical clock rate of the quantum computer.Furthermore, the classical processing required to decode syndrome measurements and determine appropriate corrections introduces additional latency. As quantum computers scale up, this decoding complexity grows, requiring sophisticated (andresource-intensive) classical co-processors and fast interconnects for mitigating latency.

[0006] Several prior approaches have attempted to address these challenges through partial measurement-free techniques or by developing faster measurement protocols. However, these approaches typically sacrifice at least some of the architecture’s fault-tolerance, require a universal gate set that is difficult to implement fault-tolerantly, or still depend on mid-circuit measurements and feed forward operations. Current state-of-the-art experiments have managed to perform a single mid-circuit measurement and feed forward operation (D. Bluvstein et al., “Logical quantum processor based on reconfigurable atom arrays”, Nature 626, 58-65 (2024)) or two (B. W. Reichardt et al., “Logical computation demonstrated with a neutral atom quantum processor”, arxiv: 2411.11822). Such challenges have motivated recent research in measurement-free QEC. A more detailed discussion about the motivation behind measurement-free QEC can be found in S. Veroni et a., “Optimized measurement-free and fault-tolerant quantum error correction for neutral atoms “, Physical Review Research 6, 043253 (2024). Another recent paper (Friederike Butt et al., “Measurement-free, scalable and fault-tolerant universal quantum computing “, arxiv: 2410.13568) introduces different solution to constructing non-Clifford gates by devising a protocol for measurement-free code switching between different QEC codes which support different transversal gates.

[0007] Thus, there remains a need for an essentially measurement-free quantum error correction architecture that can provide both universal computation and scalability to higher code distances while maintaining fault-tolerance throughout all operations.SUMMARY

[0008] The architecture and methods disclosed herein allow to exploit transversal logical gates, possibly involving a permutation of physical qubits, e.g. through shuttling operations. Transversal logical gates may refer to gates where each of a plurality of physical qubits in a logical qubit interact with at most one physical qubit from another logical qubit. Transversal gates maybe efficient in, e.g., neutral-atom platforms, particularly with atom shuttling, since atom patches, possibly correspondingto logical qubits, maybe moved together, e.g. to bring them in (close) proximity to each other. Then each qubit in a plurality of physical qubits which is part of the patch can perform an entangling gate (e.g., CNOT operations) with at most one qubit from a plurality of physical qubits of a different patch, such that the plurality of gates among physical qubits realize a logical gate between logical qubits (c / . Fig.3). In hardware, the movement of individual physical qubits may be enabled by fast optical tweezer movements controlled by acousto-optical deflectors (AODs), where each optical tweezer may trap at most one atom acting as a physical qubit.

[0009] As known in the art, 2D-local QEC codes can only have transversal gates belonging to the Clifford group, which may not be sufficient for universal quantum computation. In 2D geometries one may resort to magic state preparation and injection for non-Clifford gates, but this is a measurement-intensive operation. To overcome such and related shortcomings of prior art solutions, aspects of the present disclosure, inter alia, relate to a code deformation procedure, which may allow to use a transversal construction for, e.g., a logical CCZ gate (i.e. a non-Clifford operation), and / or a fault-tolerant logical C" Z gate (where n denotes the number of qubits involved in the gate), and / or possibly other types of fault -tolerant logical entangling gates. Such a construction maybe applied to architectures using the Bacon-Shor code or similar QEC codes.

[0010] A universal quantum gate set may be combined with concatenation of the measurement-free QEC protocols disclosed herein, e.g., to increase the amount of correctable errors. Concatenation may involve promoting the data qubits of a code to logical qubits of some lower-level code, and doing so recursively. Ancilla qubits (typically used to store the syndrome information for QEC protocols) maybe logical qubits of a lower-level code as well, and the syndrome extraction may be performed by exploiting transversal gates. Measurement-free feedback, however, may require non-Clifford operations, e.g., those comprised by the universal gate set disclosed herein. In practice, however, implementing such non-Clifford operations, e.g., a CCZ operation and / or a CnZ operation,, may require an impracticably high number operations on the physical qubits forming the (concatenated) logical qubits.

[0011] Thus, aspects of the present disclosure may provide for alternative protocols, which do not require a universal gate set for QEC and are applicable to manydifferent QEC codes. Such a protocol maybe achieved by what will be referred to as “disposable Toffoli gadget” herein. The key idea of such a gadget is that syndrome information, i.e. the information related to the errors that have occurred in the quantum register, may not need to be protected against all possible errors, but possibly only against qubit flips. As a consequence, one can unencode the ancilla qubits to a repetition code, which may still protect against qubit flips but not against inconsequential phase flips. One can then perform one or more feedback operations, e.g., via CCX / CCZ gates (i.e. Toffoli-like gates), possibly exploiting some partial transversality between repetition codes and CSS codes (i.e. stabilizer codes with separate X-type andZ-type stabilizers, which are common in most codes, including the Bacon-Shor code).

[0012] Thus, key aspects of the present disclosure may comprise: (i) code deformations for transversal non-Clifford gates e.g., applicable in the Bacon-Shor code and similar QEC codes, and (ii) improved measurement-free concatenation using the disposable Toffoli gadget. The present disclosure, thus, may enable designing quantum computing protocols that are universal and fault-tolerant, i.e. that prevent the uncontrolled propagation of errors without requiring conventional mid-circuit measurements.

[0013] It should be understood that the term "measurement-free" as used throughout this disclosure refers specifically to the absence of intermediate (possibly mid-circuit) measurements during the execution of quantum error correction protocols and logical operations. This architecture still may require measurements at the end of quantum circuits for reading out computational results, which is an essential step in any practical quantum algorithm.

[0014] The present disclosure provides, in a first aspect, a method for fault-tolerant quantum computing, comprising: preparing, based on a quantum error correction code, a set of three or more logical qubits in an initial state, wherein each logical qubit comprises a plurality of physical qubits, and performing a fault-tolerant logical entangling gate on the three or more logical qubits.

[0015] In some embodiments, each of the three or more logical qubits comprises nine or more physical qubits. The physical qubits maybe realized by neutral atoms (such as rubidium, cesium or ytterbium), trapped in a plurality of optical tweezers. Insome implementations, the quantum error correction code may comprise one or more of: a Bacon-Shor code, a CSS code, and a repetition code. The Bacon-Shor code may be particularly well-suited for measurement-free implementations due to, inter alia, the structure of its stabilizers, which may enable key components of the method.

[0016] In some embodiments, performing the fault -tolerant logical entangling gate on the set of three or more logical qubits may comprise performing a fault-tolerant non-Clifford gate, preferably a fault-tolerant logical Controlled-Controlled-Z (CCZ) gate, and / or C" Z gates, on the set of three or more logical qubits. Such a non-Clifford gate, e.g., together with the naturally transversal Hadamard gate of the Bacon-Shor code, may enable universal quantum computation. The realization of such gates, e.g. of the transversal Hadamard gate and / or the the realization of the logical CCZ gate may involve shuttling of the physical qubits. In some embodiments, performing the fault-tolerant logical CCZ gate may comprise performing a measurement-free code deformation protocol (cf. FIG. lb, ic, id and FIG. 3c) on each of the three or more logical qubits to obtain a set of three or more extended logical qubits. Before deformation, the logical qubit may comprise a 3x3-array of physical qubits, while after deformation the logical qubits may comprise an array of 3x9 physical qubits. In order to perform the deformation, additional physical qubits maybe acquired (e.g., through a corresponding movement of a plurality of tweezer traps), followed by a plurality of CNOT operations between the physical qubit of the undeformed logical qubit and the additional acquired qubits.

[0017] In some implementations, performing the fault -tolerant logical CCZ gate may further comprise performing measurement-free single qubit error corrections for each of the three or more extended logical qubits (cf. FIG. 3d), and performing a transversal CCZ gate on the set of three or more extended logical qubits (cf. FIG. 3), preferably using non-local CCZ gates on the physical qubits. The measurement-free single qubit error corrections maybe further decomposed into a plurality of CNOT gates applied to pairs of physical qubits. The non-local CCZ gates on the physical qubits may be applied on triplets of the physical qubits (cf. FIG. 11). In some implementations, performing the fault-tolerant logical entangling gate comprises moving the physical qubits from one part of a quantum register to another one. This movement capability may be particularly well-suited for neutral atom platforms, which can shuttle atoms efficiently by dynamically adjusting the position of tweezer traps(controlled using one or more acousto-optical modulators, AODs) each of which may contain a single atom acting as a physical qubit.

[0018] In some implementations, performing the fault-tolerant logical CCZ gate may further comprise undoing the deformation and, for instance, going back from a logical qubit comprising an array of 3x9 physical qubits to a logical qubit comprising an array of 3x3 physical qubits (cf. FIG.3e). This operation maybe referred to as shrinking. The physical qubits which become obsolete as a consequence of the shrinking operation (since they are not required anymore as part of the logical qubit) may be subject to one or more reset operations (denoted by the boxed R). In some implementation, the shrinking operation may be realized by a plurality of CNOT operations on the 3x9 physical qubits of the logical qubit before shrinking.

[0019] A "reset operation" as used in this disclosure may refer to a quantum operation that deterministically prepares a qubit in a specific known state (typically the |o) state), regardless of its previous state, without extracting or recording any information about that previous state. Unlike a measurement, which collapses the quantum state and produces classical information that must be processed and acted upon, a reset operation is fundamentally different in that it does not generate classical information requiring feedback processing.

[0020] In one embodiment of the present disclosure, the method may comprise preparing a set of three or more concatenated logical qubits, wherein each concatenated logical qubit may comprise a plurality of non-concatenated logical qubits and wherein each non-concatenated logical qubit may comprise a plurality of physical qubits (cf., e.g. FIG. lb). This hierarchical encoding structure with an arbitrary number of levels may provide increased error protection while maintaining the fault-tolerance and the universality of the measurement-free approach. The concatenation technique may enable exponential suppression of errors as additional levels are added, allowing the architecture to keep the logical error rate below the threshold required for reliable execution of increasingly complex quantum circuits. Note that different levels of concatenations maybe realized. A plurality of concatenated logical qubits maybe combined to form a logical qubit of one concatenation level higher, and so on.

[0021] Furthermore, when performing the fault-tolerant logical entangling gate on the set of three or more concatenated logical qubits, the method may compriseperforming measurement-free single qubit error corrections for each of the three or more concatenated logical qubits (cf. FIG. 5A and FIG.5B). Such an error correction may comprise unencoding two or more ancilla logical qubits from a first quantum error correction code to a repetition code, and performing one or more CCZ gates and / or CCNOT gates on two of the unencoded ancilla logical qubits and the concatenated logical qubit. Such an approach may maintain fault-tolerance throughout the error correction process without requiring intermediate measurements, thereby preserving the speed advantage of the measurement-free architecture. By unencoding the ancilla qubits to repetition codes rather than fully decoding them, one may retain sufficient error protection for the critical information.

[0022] In some implementations of the method, performing the fault-tolerant logical CCZ gate may further comprise performing measurement-free gauge fixing on logical qubits (cf. FIG. 3b and FIG. 8). Gauge fixing may ensure that logical qubits are in a specific gauge configuration necessary for implementing certain logical operations, particularly non-Clifford gates. The measurement-free gauge fixing procedure may comprise preparing a logical Bell state in a predetermined gauge (such as the Shor gauge), possibly entangling such a logical Bell state with a logical qubit that requires gauge fixing, and then teleporting the logical qubit to place it in the predetermined gauge without requiring any measurements. Such a gauge fixing step may eliminate the need for syndrome measurements and classical feedback, which would otherwise create a significant bottleneck in quantum platforms where measurements are substantially slower than gate operations. Further, it may ensure that all participating logical qubits are in compatible gauge configurations.

[0023] A further, second aspect of the present disclosure relates to a device for fault-tolerant quantum computing (FIG. 6). The device may comprise a 2D quantum register of neutral atom qubits arranged to support nearest-neighbor and / or next-nearest-neighbor interactions, and a quantum gate radiation system configured to illuminate the 2D quantum register with electromagnetic radiation to perform local single-qubit gates and / or local multi-qubit gates on the neutral atom qubits of the 2D quantum register. The device may further comprise a control system configured to control the quantum gate radiation system to prepare, based on a quantum error correction code, a set of three or more logical qubits in an initial state, wherein each logical qubit comprises a plurality of physical qubits. The control system is furtherconfigured to perform a fault-tolerant logical entangling gate on the three or more logical qubits.

[0024] In a third aspect, the present disclosure related to a method for fault-tolerant quantum computing. The method comprises preparing one or more logical qubits of a concatenation level m in an initial state, wherein each logical qubit of the concatenation level m comprises a plurality of logical qubits of a concatenation level m-1, and performing a measurement-free quantum error correction operation on the one or more logical qubits of a concatenation level m. The quantum error correction operation comprises performing a set of transversal CNOT operations for the plurality of logical qubits of the concatenation level m-i and two or more ancilla logical qubits of the concatenation level m-i, and unencoding the two or more ancilla logical qubits of the concatenation level m-i from a first quantum error correction code to a repetition code. The quantum error correction operation further comprises performing one or more CCZ gates and / or CCNOT gates between the two or more unencoded ancilla logical qubits and the one or more logical qubits of the concatenation level m, and resetting the two or more ancilla logical qubits. For further details hereon see also Enclosure A.

[0025] In a fourth aspect, the present disclosure related to a method for fault-tolerant quantum computing. The method comprises determining a logical error rate required for executing a quantum algorithm, and determining a physical error rate for a quantum computing device adapted to carry out the quantum algorithm. The method further comprises encoding a plurality of concatenated logical qubits of a concatenation level m >= 1, based on the determined logical and physical error rate.

[0026] Further details of the apparatuses and methods described above, and a related computer program are discussed in the following with reference to exemplary implementations illustrated in the drawings. The foregoing paragraphs broadly outline the features and technical advantages of examples in accordance with the present disclosure in order that the detailed description that follows may be better understood. Additional features and advantages will be described hereinafter. The conception and specific examples disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure.Characteristics of the concepts disclosed herein, both their organization and method ofoperation, together with associated advantages, will be better understood from the following description when considered in connection with the accompanying figures. Each of the figures is provided for the purposes of illustration and description, and not as a definition of the limits of the claims.BRIEF DESCRIPTION OF THE DRAWINGS

[0027] FIG. 1 illustrates the stabilizers of the 3x3 Bacon-Shor code according to aspects of the present disclosure as well as the concept of code concatenation and the implementation of a fault -tolerant logical CCZ gate (non-Clifford);

[0028] FIG. 2 illustrates the logical operators of a Bacon-Shor code in the Shor gauge and the relationship between the Bacon-Shor code and the repetition code according to aspects of the present disclosure as well as the concept of unencoding to a repetition code;

[0029] FIG. 3 illustrates components of the protocol for the CCZ gate between three logical qubits encoded by the 3x3 Bacon-Shor code according to aspects of the present disclosure including the concepts of code extension, gauge fixing and measurement-free error correction operations;

[0030] FIG. 4 illustrates a decomposition of the correction step for the 3x3 Bacon-Shor code in terms of two-qubit gates according to aspects of the present disclosure;

[0031] FIG. 5A illustrates a measurement-free fault-tolerant QEC implementation for the concatenated Bacon-Shor code according to aspects of the present disclosure

[0032] FIG. 5B illustrates an alternative measurement-free fault-tolerant QEC implementation for the concatenated Bacon-Shor code according to aspects of the present disclosure;

[0033] FIG. 6 illustrates a quantum computing device according to an exemplary implementation of the present disclosure;[00341 FIG.7 illustrates a method for fault-tolerant quantum computing according to aspects of the present disclosure;

[0035] FIG. 8 illustrates gauge fixing by adapting Steane-type error correction according to aspects of the present disclosure;

[0036] FIG. 9 shows the simulated error rate of the logical CCZ gate as a function of a physical gate error rate according to an exemplary implementation of the present disclosure;

[0037] FIG. 10 shows the logical error rate of the concatenated logical CCZ gate as a function of a physical gate error rate for different concatenation levels according to aspects of the present disclosure;

[0038] FIG. 11 shows the connectivity of the physical qubits required for a transversal CCZ gate between three logical states encoded by 3x9 Bacon-Shor codes, according to an implementation of the present disclosure;

[0039] FIG. 12 illustrates a method for fault-tolerant quantum computing according to aspects of the present disclosure;

[0040] FIG. 13 illustrates a method for fault-tolerant quantum computing according to aspects of the present disclosure.DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

[0041] Various aspects of the present disclosure are described in more detail hereinafter with reference to the accompanying drawings. The present disclosure may, however, be implemented in many different forms and should not be construed as limited to any specific structure or function presented herein. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of the present disclosure is intended to cover any aspect of the present disclosure disclosed herein, whether implemented independently of or combined with any other aspect of the presentdisclosure. For example, an apparatus, a device or a system maybe implemented, or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the present disclosure is intended to cover such a device, apparatus, system or method which is practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the present disclosure set forth herein. Any aspect of the present disclosure disclosed herein maybe implemented by one or more elements of a claim. While specific feature combinations are described in the following with respect to certain aspects of the present disclosure, it is to be understood that not all features of the discussed examples must be present for realizing the technical advantages of the devices, apparatuses, systems, methods and computer programs disclosed herein. Disclosed aspects may be modified by combining certain features of one aspect with one or more features of other aspects. A skilled person will understand that features, steps, components and / or functional elements of one aspect can be combined with compatible features, steps, components and / or functional elements of any other aspect of the present disclosure.

[0042] Several aspects of measurement-free fault-tolerant quantum computing will now be presented with reference to various devices, apparatuses, systems and methods that are described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, algorithms, and / or the like (collectively referred to as “elements”). These elements maybe implemented using hardware, software, or combinations thereof. Whether such elements are implemented as hardware and / or software depends upon the particular application and design constraints imposed on the overall system.Further, the apparatuses and methods disclosed herein can be part of complex quantum technology systems such as neutral atom quantum computers (see, for example, FIG. 6), quantum simulation systems, and quantum metrology systems, such as optical lattice clocks. The skilled person will appreciate that in the following several components of such systems, such as laser sources, imaging and measurement devices, system / experiment control and timing units etc. are not explicitly described.

[0043] FIG. 1 illustrates the stabilizers of the 3x3 Bacon-Shor code for encoding a logical qubit, with the horizontally and vertically elongated shaded areas depicting the support of X-type and Z-type stabilizer operators, respectively. In someimplementations of the invention, a differentx n2Bacon-Shor code may be implemented with different dimensions n and n2. As shown in FIG. la, the 3x3 Bacon-Shor code may be a subsystem code that uses 9 physical qubits arranged in a 3x3 array to encode a single logical qubit. The X-type stabilizers are represented as S* = nj=1„2Xi jXi+1j, which act across rows of the array. The Z-type stabilizers are represented as Sf = ny=1 niZijZ[j+1, which act across columns of the array. Here, i, j is the row and column index, respectively. Such a structure may enable the detection and correction of both bit-flip (X) and phase-flip (Z) errors. The minimal errorcorrecting instance shown may use 9 physical qubits to encode 1 logical qubit with a code distance of 3, possibly allowing it to correct any single-qubit error.

[0044] In some implementations, the logical qubit may be initialized in the Shor gauge, illustrated in FIG. ib. Such a logical qubit may correspond to the case when the eigenvalues of the pairwise gauge operators ZtjZtJ+1are chosen to be +1. In order to achieve fault-tolerant measurement-free quantum computation, the 3x3 logical qubit in the Shor gauge may then be extended to a 3x9 Bacon-Shor code, as shown in FIG. ic. In some implementations, logical CCZ gates between extended logical qubits may then be performed by transversally performing a plurality of CCZ gates between physical qubits (FIG. ic and FIG. id). The plurality of CCZ may be performed with permutations across the columns. In order to return to the original 3x3 Bacon-Shor code (FIG. ib), a shrink operation may be performed.

[0045] In some implementations of the present disclosure, a plurality of 3x3 Bacon Shor codes maybe concatenated as illustrated in FIG. le. In such a case, the data qubits of the concatenated code may be composed of a plurality of logical qubits at a lower level. Such a code concatenation may increase the error tolerance of the quantum error correction and, such that the logical error rate is further suppressed for the same gate error rate.

[0046] FIG. 2 illustrates the logical operators of a Bacon-Shor code in the Shor gauge and the relationship between the Bacon-Shor code and the repetition code according to aspects of the present disclosure. As shown in FIG. 2a, the logical X operator (XL) acts on a single row of the array, while the logical Z operator (ZL) acts on a single column, as indicated by the respective shaded areas. The Bacon-Shor code is asubsystem code, meaning multiple physical states can represent the same logical state, differing only by gauge operators which commute with the stabilizers and logical operators. FIG. 2b shows a bit-flip repetition code formed by pairwise S = ZiZi+1stabilizers along a chain of neutral atoms, which may be essential for the unencoding operations used in the measurement-free protocols according to an implementation of the present disclosure. FIG. 2c illustrates a transversal controlled-controlled-X (CCX) gate between two three-qubit repetition codes and a distance-3 Bacon-Shor code, highlighting the transversality of the operation.

[0047] FIG. 2d and FIG. 2e illustrate the unencoding operations, denoted Azand Ax, respectively, which map a Bacon-Shor code down to a bit-flip or phase-flip repetition code, respectively. These unencoding operations may be used as components for the disposable Toffoli gadget that enables efficient measurement-free error correction in concatenated codes without the need for a universal set of gates.

[0048] FIG. 3 illustrates components of the protocol for implementing A CCZ gate between three 3x3 Bacon-Shor codes, comprising measurement-free gauge fixing, code extension, error correction, code shrinking and reset operations (boxed R) according to aspects of the present disclosure. The components are illustrated as circuit diagrams in which each line may correspond to a row of physical qubits. In particular, Fig. 3a shows the complete measurement-free protocol for implementing a fault-tolerant logical CCZ gate between three 3x3 Bacon-Shor codes.FIG. 3b depicts a measurement-free gauge fixing procedure, which may ensure that each logical qubit is in the Shor gauge. Such a gauge-fixing may be achieved through a teleportation protocol using a logical Bell state prepared in the Shor gauge. The original logical state (marked by the unboxed L for “logical”) may be entangled with the Bell state, and then measurement-free teleportation is performed using CX and CZ gates after unencoding to the repetition code (indicated by the unboxed R for “repetition”).FIG. 3c shows the code extension process, where each 3x3 Bacon-Shor code is extended to a 3x9 configuration by performing consecutive transversal CNOTs from the code (carrying the logical state) to two ancillary registers. FIG. 3d illustrates a circuitfor a measurement-free error-correction step, possibly applied to the ancillary registers shown in FIG. 3a. FIG.3e shows a circuit for the shrinkingoperation, where the extended logical qubits are returned to the original 3x3 configuration through a series of CNOT operations. Since such circuits act independently on each row of physical qubits, phase-flips may not be able propagate to different rows and remain correctable.

[0049] FIG. 4 illustrates the decomposition of the measurement-free correction step for the 3x3 Bacon-Shor code in terms of two-qubit gates. Such a correction step may illustrate how correction operations can be decomposed fault -tolerantly for platforms without native CCZ gates. The figure shows that by copying the control qubits to an auxiliary register | a), a simplified decomposition of the feedback operation may be performed using two-qubit gates. Such a decomposition may rely on certain gates which are more readily available on current quantum computing platforms.

[0050] FIG. 5A illustrates a measurement-free fault-tolerant QEC implementation for the concatenated Bacon-Shor code according to aspects of the present disclosure by showing the corresponding circuit diagrams forand (see also FIG.3d) for a concatenation level m. The circuits comprise subcircuitsand Cz(’n 1)which may correct for X and Z errors, respectively, at different lower concatenation levels. Further, on the right, FIG. 5A illustrates how the ancilla registers at higher layers of concatenation are initialized fault -tolerantly.

[0051] The logical qubit \iL) may undergo error correction through a series of CNOT operations on the qubits encoding the logical qubit and on a plurality of ancilla qubits. The circuit diagram may comprise the "disposable Toffoli gadget", possibly implemented by the operations ™ and ™ (m denoting the concatenation level), which may unencode the ancilla qubits to a repetition code. Such unencoding operations may convert higher-level logical ancilla qubits to repetition codes that maintain protection against relevant error types. The ancilla qubits |0)®3and |+)®3maybe used to extract syndrome information, and their states may be processed through a series of controlled operations in combination with one or more reset operations (boxed R) that enable a measurement-free feedback process. Fig. 5B illustrates an alternative measurement-free fault-tolerant QEC implementation for the concatenated Bacon-Shor codeaccording to aspects of the present disclosure, using four ancillae instead of three as in FIG. 5A.

[0052] FIG. 6 shows a typical implementation of a quantum computer 600 comprising a quantum register 610, e.g. formed by a plurality of trapped particles, a quantum gate laser system 620, a qubit state readout system 630, a trapping laser system 670 and processing and control circuitry 640. The plurality of trapped particles may be trapped using the trapping laser system 670. In some implementations, the quantum computer can be controlled by a (remote) user device 660, possibly via a network 650. In some implementations, the trapping laser system 670 maybe configured to create a plurality of trapped particles and dynamically change their position within the quantum register, including but not limited to shuttling. In some implementations, the quantum gate laser system 620 may cause a controlled quantum state evolution of one or more atomic objects within the quantum register 610. For example, the quantum gate laser system 620 may comprise one or more lasers, which provide one or more laser beams to atomic objects (such as neutral atoms, molecules or ions) in the quantum register 610.

[0053] In some implementations, the qubit state readout system 630 may be configured to collect and / or detect photons generated by qubits (e.g., during reading procedures). The quantum computer 600 may comprise a plurality of optical elements (e.g., lenses, mirrors, waveguides, fiber optics cables, modulators and / or the like) and a plurality of photodetectors. In various embodiments, the photodetectors maybe photodiodes, photomultipliers, charge-coupled device (CCD) sensors, complementary metal oxide semiconductor (CMOS) sensors, Micro-Electro-Mechanical Systems (MEMS) sensors, and / or other photodetectors that are sensitive to light at an expected fluorescence wavelength of the qubits of the quantum computer. In various embodiments, one or more of the detectors and / or one or more of the optical elements may be in electronic communication with the processing and control circuitry 640.

[0054] In some implementations, the user device 660 is configured to allow a user to provide input to the quantum computer 600 and receive, view, and / or the like output from the quantum computer 600. The user device maybe in communicationwith the processing and control circuitry 640 of the quantum computer 600 via one or more wired or wireless networks 650 and / or via direct wired and / or wireless communications. In an example embodiment, the user device 660 may translate, configure, format, and / or the like information / data, quantum computing algorithms and / or circuits, and / or the like into a computing language, executable instructions, command sets, and / or the like that the processing and control circuitry 640 can understand and / or implement.

[0055] In some implementations, the processing and control circuitry 640 may be configured to control, inter alia, the quantum gate laser system 620 and / or the qubit state readout system 630 and / or the trapping laser system 670. For example, the processing and control circuitry 640 may be configured to cause a controlled evolution of quantum states of one or more atomic objects within the quantum register 610 to execute a quantum circuit and / or algorithm. For example, the processing and control circuitry 640 may cause a reading procedure comprising, possibly as part of executing a quantum circuit and / or algorithm. In various embodiments, the atomic objects confined within the quantum register 610 are used as qubits of the quantum computer 600.

[0056] In other words, the present disclosure provides a quantum computing device comprising hard- and software components adapted to carry out the methods and processes disclosed herein, e.g., explained below with reference to Fig. 7, Fig. 12 and Fig. 13, e.g., when the quantum computing device executes a computer program comprising instructions to carry out the steps of such methods disclosed herein.

[0057] FIG. 7 illustrates a method for fault-tolerant quantum computing. Step (710) prepares, based on a quantum error correction code, a set of three or more logical qubits in an initial state, wherein each logical qubit comprises a plurality of physical qubits. Step (720) performs a fault-tolerant logical entangling gate on the three or more logical qubits.

[0058] In some embodiments, each of the three or more logical qubits may comprise nine or more physical qubits. Additionally or alternatively, the quantum errorcorrection code may comprise one or more of: a Bacon-Shor code, a CSS code, and a repetition code. Such configurations may provide enhanced error correction capabilities while maintaining fault-tolerance.

[0059] In certain implementations, performing the fault -tolerant logical entangling gate on the set of three or more logical qubits may comprise performing a fault-tolerant non-Clifford gate. Preferably, this may involve performing a fault-tolerant logical Controlled-Controlled-Z (CCZ) gate on the set of three or more logical qubits. Such non-Clifford operations may be essential for achieving universal quantum computation within the fault -tolerant framework.

[0060] In some embodiments, performing the fault -tolerant logical CCZ gate on the set of three or more logical qubits may comprise several operations. First, a measurement-free code deformation protocol may be performed on each of the three or more logical qubits to obtain a set of three or more extended logical qubits.Additionally, measurement-free single qubit error corrections may be performed for each of the three or more extended logical qubits. Further, a transversal CCZ gate may be performed on the set of three or more extended logical qubits, preferably using nonlocal CCZ gates on the physical qubits. This approach may allow for maintaining faulttolerance while executing non-Clifford operations essential for universal quantum computing.

[0061] In some implementations, performing the fault -tolerant logical entangling gate on the set of three or more logical qubits may comprise moving the physical qubits from one part of a quantum register to another one. Such movement capabilities may be particularly advantageous in platforms supporting dynamic reconfiguration of qubit positions, such as neutral atom quantum computers where atoms can be shuttled between different locations.

[0062] In certain embodiments, performing the fault-tolerant logical CCZ gate on the set of three or more logical qubits may further comprise performing, after the transversal CCZ gate has been performed on the set of three or more extended logical qubits, one or more reset operations on each of the set of three or more extendedlogical qubits. These reset operations may help restore the quantum system to a well-defined state and may assist in maintaining fault -tolerance throughout the computation process.

[0063] In some implementations, performing the transversal CCZ gate on the set of three or more extended logical qubits may comprise performing a plurality of CCZ gates on triplets of physical qubits of the set of three or more extended logical qubits. Preferably, one or more of the plurality of CCZ gates maybe non-local. This approach may leverage the specific connectivity patterns of the physical qubits to efficiently implement the logical operation while maintaining the fault -tolerance properties of the system.

[0064] In certain embodiments, preparing the set of three or more logical qubits in the initial state may comprise preparing a set of three or more concatenated logical qubits. Each concatenated logical qubit may comprise a plurality of non-concatenated logical qubits, and each non-concatenated logical qubit may comprise a plurality of physical qubits. Such hierarchical encoding may provide enhanced error protection and may enable exponential suppression of errors as additional levels of concatenation are employed.

[0065] In some implementations, performing the fault -tolerant logical entangling gate on the set of three or more concatenated logical qubits may comprise performing measurement-free single qubit error corrections for each of the three or more concatenated logical qubits. These error corrections may include unencoding two or more ancilla logical qubits from a first quantum error correction code to a repetition code, and performing one or more CCZ gates and / or CCNOT gates on two of the unencoded ancilla logical qubits and the concatenated logical qubit. Such approaches may maintain fault-tolerance while enabling efficient error correction without intermediate measurements.

[0066] FIG. 8 illustrates a gauge fixing protocol by adapting Steane-type error correction according to aspects of the present disclosure. Such a protocol maybe an alternative approach to gauge fixing that requires fewer qubits when fast resetoperations are available. This protocol is illustrated by a circuit diagram, where each line corresponds to a single physical qubit. Such a circuit may map the X errors of a single row (index i) into a three-qubit cat state, decode it by a redundant extraction of the parities and, if a bit flip occurred, apply a XX gauge operator between the current row and the next one. Such a circuit may be repeated for all rows except for the last one, where remaining bit-flip errors are extracted and then corrected by applying only the first part of the corrections.

[0067] FIG. 9 shows the simulated error rate of the logical CCZ gate as a function of the physical gate error rate according to an exemplary implementation of the present disclosure. The physical gate error may be caused by depolarizing noise. The white-filled markers represent results for a logical input state |+ + +)L, while the grey-filled markers represent results for a logical input state |111⟩L. Bright markers indicate starting in the Shor gauge, and dark markers indicate starting in the anti-Shor gauge. The y-axis shows 1-FCCZ(one minus the fidelity of the logical CCZ gate), representing the logical error rate, while the x-axis shows the physical gate error rate p (possibly corresponding to the probability of an error occurring after each gate). The graph may demonstrate the quadratic scaling of the logical error rate with respect to the physical error rate, confirming the fault-tolerance of the scheme. A "breakeven" line is included to show where the logical error rate would equal the physical error rate. The graph may highlight that gauge fixing starting from the Shor gauge is required for efficient fault-tolerance.

[0068] FIG. 10 shows the logical error rate of the concatenated Bacon-Shor code as a function of the physical gate error rate for different concatenation levels according to aspects of the present disclosure. The graph displays the logical error rate pLon the y-axis versus the physical gate error rate p on the x-axis for the first three layers of concatenation (Ci, C2, and C3). Different markers indicate different numbers of QEC cycles performed (1, 5, and 9 cycles), while solid lines correspond to asymptotic estimates extracted from polynomial fits. The graph may demonstrate that the failure rate of concatenation level CNscales asymptotically as ptw+1where tNis the number of errors that can be corrected at that level. Such a result may suggest that the exponential suppression of errors can be achieved through code concatenation, with higherconcatenation levels (denoted by index m of C) showing progressively steeper slopes. The graph may indicate that below-breakeven logical error rates are achievable with physical error rates essentially below 0.1%.

[0069] FIG. 11 shows the connectivity of the physical qubits required for a transversal CCZ gate between three logical states encoded by 3x9 Bacon-Shor codes, according to an implementation of the present disclosure. The figure illustrates the plurality of physical CCZ gates required to implement a logical CCZ operation between three logical qubitsand each encoded in 3x9 Bacon-Shor codes in the Shor gauge. Such a specific connectivity pattern may enable the transversal implementation of the logical CCZ gate.

[0070] Fig. 12 illustrates a method for fault-tolerant quantum computing. The method comprises preparing (1210) one or more logical qubits of a concatenation level m in an initial state, wherein each logical qubit of the concatenation level m comprises a plurality of logical qubits of a concatenation level m-i, and performing (1220) a measurement-free quantum error correction operation on the one or more logical qubits of a concatenation level m. The quantum error correction operation comprises performing a set of transversal CNOT operations for the plurality of logical qubits of the concatenation level m-i and two or more ancilla logical qubits of the concatenation level m-i, and unencoding the two or more ancilla logical qubits of the concatenation level m-i from a first quantum error correction code to a repetition code. The quantum error correction operation further comprises performing one or more CCZ gates and / or CCNOT gates between the two or more unencoded ancilla logical qubits and the one or more logical qubits of the concatenation level m, and resetting the two or more ancilla logical qubits.

[0071] Fig. 13 illustrates a method for fault-tolerant quantum computing. The method comprises determining (1310) a logical error rate required for executing a quantum algorithm, and determining (1320) a physical error rate for a quantum computing device adapted to carry out the quantum algorithm. The method further comprises encoding (1330) a plurality of concatenated logical qubits of a concatenation level m >= 1, based on the determined logical and physical error rate.

[0072]

[0073] The foregoing disclosure provides illustration and description but is not intended to be exhaustive or to limit the aspects to the precise form disclosed.Modifications and variations may be made in light of the above disclosure or may be acquired from practice of the aspects. As used herein, the term component is intended to be broadly construed as hardware, firmware, or a combination of hardware and software. As used herein, a processor is implemented in hardware, firmware, or a combination of hardware and software.

[0074] It will be apparent that systems and / or methods described herein may be implemented in different forms of hardware, firmware, or a combination of hardware and software. The actual specialized control hardware or software code used to implement these systems and / or methods is not limiting of the aspects. Thus, the operation and behavior of the systems and / or methods were described herein without reference to specific software code— it being understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0075] Even though particular combinations of features are recited in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of various aspects. In fact, many of these features may be combined in ways not specifically recited in the claims and / or disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of various aspects includes each dependent claim in combination with every other claim in the claim set. A phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c or any other ordering of a, b, and c).

[0076] No element, act, or instruction used herein should be construed as critical or essential unless explicitly described as such. Also, as used herein, the articles “a” and “an” are intended to include one or more items, and may be used interchangeablywith “one or more.” Furthermore, as used herein, the terms “set” and “group” are intended to include one or more items (e.g., related items, unrelated items, a combination of related and unrelated items, and / or the like), and may be used interchangeably with “one or more.” Where only one item is intended, the phrase “only one” or similar language is used. Also, as used herein, the terms “has,” “have,” “having,” and / or the like are intended to be open-ended terms.

[0077] As used herein, the phrase “based on” shall not be construed as a reference to a closed set of information, one or more conditions, one or more factors, or the like. In other words, the phrase “based on A” (where “A” may be information, a condition, a factor, or the like) shall be construed as “based at least on A” unless specifically recited differently.

[0078] As used herein, the term “or” is an inclusive “or” unless limiting language is used relative to the alternatives listed. For example, reference to “X being based on A or B” shall be construed as including within its scope X being based on A, X being based on B, and X being based on A and B. In this regard, reference to “X being based on A or B” refers to “at least one of A or B” or “one or more of A or B” due to “or” being inclusive. Similarly, reference to “X being based on A, B, or C” shall be construed as including within its scope X being based on A, X being based on B, X being based on C, X being based on A and B, X being based on A and C, X being based on B and C, and X being based on A, B, and C. In this regard, reference to “X being based on A, B, or C” refers to “at least one of A, B, or C” or “one or more of A, B, or C” due to “or” being inclusive. As an example of limiting language, reference to “X being based on only one of A or B” shall be construed as including within its scope X being based on A as well as X being based on B, but not X being based on A and B.

[0079] Further, process diagrams such as FIG. 7, FIG. 12 or FIG. 13 do not necessarily indicate a particular order or sequence of steps. For example, steps may also be performed in a different order or, if hardware capabilities allow it, simultaneously, without deviating from the scope of the present disclosure.

[0080] Further details of the aspects described above arediscussed below in Enclosure A. As will be apparent to the person skilled in the art,Enclosure A is a scientific publication that is based on and / or makes use of several aspects of the present disclosure. Details and examples provided in Enclosure A are included for ease of understanding and are thus not to be understood to be limiting in any way to what was described above and what is specified in the appended claims. For instance, aspects of the present disclosure discussed above may also be implemented using any type of quantum computing platform (e.g., ions, neutral atoms, superconducting qubits, etc. that are suitable for the QEC protocols and gates disclosed herein). Further, as will also be appreciated by the skilled person, terminology used in Enclosure A might, in some cases, be different from the terminology used above.Further, in Enclosure A the numbering of Figures starts again with Figure 1. So references to figures in Enclosure A only refer to the Figures in / of Enclosure A.Enclosure AWe show that universal quantum computation can be concretely made fault-tolerant without intermediate measurements. To this end, we introduce a measurement-free deformation protocol of the Bacon-Shor code to realize a logical CCZ gate. Combined with a fold-transversal logical Hadamard gate, this enables a universal set of fault-tolerant operations using only transversal gates and qubit permutations. Separately, we demonstrate that certain CSS codes can be concatenated without measurements or having to rely on a universal logical gate set. This is made possible by means of a resource-efficient gadget — termed the ‘disposable Toffoli gadget’ — that realizes the error-correcting feedback. For the purpose of benchmarking the proposed protocols with circuit-level noise, we implement an efficient method to simulate non-Clifford circuits with a small number of Hadamard gates. In particular, we observe a fault-tolerance threshold at a circuit-level depolarizing noise rate of approximately 0.13%. Together, the deformation protocol and the Toffoli gadget outline a blueprint for a fully fault-tolerant architecture without any feed-forward operation, particularly suited to state-of-the-art neutral-atom platforms.I. INTRODUCTION Given the inherently noisy nature of quantum hardware, it is crucial to develop approaches that suppress or limit the impact of errors. One possible pathway is quantum error correction (QEC), which provides a means to detect and correct errors during the execution of quantum algorithms [1, 2]. At the heart of QEC lies the encoding of quantum information into a specific subspace within the broader physical Hilbert space — often achieved through a non-local encoding — allowing the system to be resilient against local errors. This redundancy, while effective, also significantly increases the resource overhead required for implementing QEC, both in terms of time and space. As a result, the choice of the error-correction protocol should be tailored to the specific quantum computing hardware, both to minimize overhead and to best exploit the platform’s characteristics. Despite these complexities, recent experimental breakthroughs have marked remarkFigure 1. (a) The stabilizers of the 3 x 3 Bacon Shor code, able progress in QEC across different architectures, such with red (blue) areas depicting the support of X-type (Z-type) as superconducting qubits [3-11], trapped ions [12-21], stabilizer operators, (b) Any Bacon-Shor code has a gauge nitrogen vacancies in diamonds

[0022] , and neutral-atom freedom. In particular, the pairwise ZCZ, gauges along rows arrays [23-26]. can be chosen to be +1, resulting in a Shor code. We call In traditional QEC approaches, measurements of this the Shor gauge. To perform a logical CCZ, each logical mutually-commuting correlators — known as error synqubit must start from this gauge, and then be extended to dromes — are used to inform a classical decoding algorithm, a 3 x 9 Bacon-Shor code, as shown in (c). The logical CCZ which then determines the corrective actions applied to the is then performed between logical qubits, by a transversal system, either through physical intervention or softwareapplication of physical CCZ gates, with permutations across based tracking of errors [1]. These measurements often the columns, (d) To return to the original 3 x 3 configuration, a shrink move is performed, (e) To increase the tolerance to correspond to stabilizer operators, which commute with errors, concatenation of the same code is performed, where logical operators, such that the logical state remains unthe data qubits of a code are composed of logical qubits at aaffected

[0027] . lower level. In some quantum computing platforms, such as thosebased on neutral atoms or trapped ions, the relatively slow nature of such measurements often hinders the efficiency of giacomo.giudice@planqc.eu this syndrome extraction [17, 18, 23, 28-32]. An alterna-2 tive approach, measurement-free (MF) QEC, has emerged the Bacon-Shor code, which was shown to yield the best as a promising solution [33-39], replacing classical properformance among currently devised MF schemes [37-cessing with a combination of unitary dynamics and a dis39]. In Sec. Ill, we construct a MF procedure to deform sipative element needed to remove the entropy introduced the code and exploit the protocol proposed in Ref.

[0054] by noise. The latter is achieved through reset operations to implement a logical CCZ gate, thus enabling MF unior a continuous supply of fresh ancilla qubits, which has versal quantum computation. We then turn to address recently been demonstrated in neutral-atom platforms [40— the second challenge in Sec. IV. While this code defor42]. In particular, the first fully fault-tolerant (FT) promation allows for a universal logical gates set, we take posal correcting a single error was achieved in Ref.

[0018] , a different approach and implement MF QEC on conby adapting Steane-type error correction techniques

[0043] . catenated codes without the need for a universal gate set. Later, some of the authors of this work showed that by usInspired by Ref.

[0033] , we implement a feedback operaing redundant syndrome information, alternative schemes tion which we dub the disposable Toff li gadget and is can be formulated with a lower overhead in terms of b 3th significantly more efficient than using the aforementioned the number of qubits and gate count

[0039] . logical CCZ construction The essence of this gadget is to The notion of fault tolerance is essential for the design unencode ancilla qubits — storing stabilizer information — of an error- corrected quantum computer. Broadly speakinto a repetition code and then exploiting the (partial) ing, an FT implementation is capable of limiting error transversality between repetition codes and a target code propagation, thus achieving a logical error rate that is from the Calderbank-Steane-Shor (CSS) [60, 61] family. lower than the physical error rate, as long as the latter Finally, in Sec. V we discuss potential advantages of this remains below a certain threshold. This is relevant both measurement-free approach, and how they are particularly for the QEC round (which must not increase the noise suitable for neutral-atom platforms.level during its noisy execution), and for logical operations. Transversal operations are particularly appealing,as they are straightforwardly FT [1]. Transversal operaII. THE BACON-SHOR CODEtions correspond to a single layer of physical gates, eachof which acts on at most one physical qubit of each logical In this section, we introduce the Bacon-Shor code qubit. Therefore, errors can propagate between logical (Sec. II A), we summarize the construction for logical qubits, but remain correctable, since QEC is applied to CCZ used in Ref.

[0054] (Sec. II B), and introduce some each logical qubit block individually. properties relating the Bacon-Shor code and the repetiHowever, it is well known that no QEC code can have tion code (Sec. II C), which we will use throughout this a transversal universal gate set

[0044] , and, in particular, paper.the only transversal gates for two-dimensional codes areunitaries belonging to the Clifford group

[0045] . Severalways have been proposed to get around these no-go results. A. NotationThese include magic state distillation [46-50], code switching between appropriate codes [51-53], using non-local The main properties of a QEC code are typically deconnectivity between Bacon-Shor codes

[0054] , implementscribed by the triplet [n, k, c!], where n is the number of ing pieceable constructions where operations are interphysical qubits, k is the number of logical qubits, and d twined with intermediate error correction

[0055] , or allowing is the code distance, i.e. the minimum number of singlefor a loss of distance in concatenated codes [56-58]. qubit operations required to get from one codeword to The main theoretical challenges for MF QEC are twoanother. Additionally, we define t as the number of tolerfold: («) implementing universal quantum computation able errors — i.e. all errors of weight smaller than or equal at the logical level, and (w) demonstrating scalability to t can be corrected — satisfying t < • beyond small-distance codes. During the completion of In this work, we will be focusing on the Bacon-Shor this work, the authors of Ref.

[0059] demonstrated MF codecode [62, 63]. This code essentially combines an zii-qubit switching between color codes to implement a universal repetition code against Z errors with an n2-qubit repeset of logical gates. Equipped with this universal set, it is tition code against X errors in an ni x ri2 array of data then possible to concatenate the code with itself to reach qubits. Labeling the qubits in this array with (i,j), the higher distances. stabilizers for the [njn2, 1, min(nj, 712)] Bacon-Shor code We tackle the aforementioned challenges with a difare generated fromferent approach. We show («) that a universal gate setis achievable with the Bacon- Shor code, by exploiting S = nXi Xi+itj, S? = n Zi Z^+. (1) transversal operations and a MF code deformation proJ=1 i— 1cedure to realize a transversal CCZ gate; and (w) thata universal gate set is not required to perform MF QEC These are depicted in Fig. 1(a) for the minimal errorcycles at higher levels of concatenation, allowing for an correcting instance [9, 1,3]. This specific instance is the efficient scaling up of the code distance. main focus of this paper, as its MF QEC implementation, This work is organized as follows. In Sec. II, we review proposed in Ref.

[0039] , is particularly simple.prepared fault-tolerantly without additional overhead

[0012] ,We will denote the opposite gauge, in which all A’j.yA’j+i,7have eigenvalue +1, as the ‘anti-Shor’ gauge. In this gauge, the state 0)Land |1)Lhave a similar structure as Eq. (2), this time as a tensor product of cat states along the columns instead of rows. A mixed gauge can be chosen as well, as long as the gauge operators commute. In particular, the rotated surface is a specific gauge choice of the Bacon-Shor code

[0065] .B. Logical CCZ It was shown in Ref.

[0054] that a m x mkBacon-Shor code in the Shor gauge supports a transversal logical C" Z [. up to a qubit permutation. In particular, as shown in Fig. 3, the logical CCZ £ between three 3 x 9 logical qubits isimplemented by a single layer of 27 physical CCZ gates 8 2 Figure 2. (a) The logical operators of a Bacon-Shor code correspond to a single row (XL) or column (ZL). (b) A CCZL= JI CCZ^jy (iffiL773J,7), (iSZ: (3) bit-flip repetition code is formed by pairwise Slf = Z^Z,,. j=0 i=0stabilizers along a chain, (c) A transversal CCX between a three-qubit repetition code and d = 3 Bacon-Shor code. Note where it is assumed that (z, j) indices start from 0 for ease that this gate is only unidirectional, (d)-(e) The unencoding of notation, and ® represents addition modulo 3. operation Az (A v ) maps a Bacon-Shor code down to a bit-flip Since the Hadamard and CCZ gates together define (phase- flip) repetition code. Intuitively, each column (row), a universal gate set, it is then sufficient to demonstrate supporting a separate representation of the relevant logical that these two gates can be performed fault-tolerantly. operator, is mapped to a qubit of the resulting repetition code. As our starting point, we choose the 3 x 3 Bacon-Shor The stabilizers after each layer of gates are depicted. code, since it has a MF QEC implementation

[0039] , as well as a straightforward fold-transversal Hadamard gate. The logical operators are XL = J}. Xtand Z / = However, certain technicalities need to be addressed. The transversal realization of the logical Hadamard gate HLis Zi.j for any value of i or j respectively, as shown only supported on a m x m patch of physical qubits, while in Fig. 2(a). As with all CSS codes, all logical Pauli operthe CCZ / , gate described in Eq. (3) requires a m x m ations are trivially transversal. Additionally, the logical2patch. Furthermore, the latter requires all patches to CNOT can be implemented transversally, by performing a be in the Shor gauge, which is not preserved under the CNOT between pairs of data qubits. Additionally, the logapplication of Il To address these issues, in Sec. Ill ical Hadamard gate is fold-transversal — it corresponds to we will demonstrate a fully MF protocol to implement a a Hadamard gate on all data qubits and a relabeling of the logical CCZ: first, the code is mapped to the Shor gauge, physical qubits, which can be achieved with a reflection by means of a gauge fixing procedure (Fig. 1(b)), then along the diagonal to swap X and Z stabilizers

[0063] . extended to a 3 x 9 code (Fig. 1(c)); now the logical CCZ The Bacon-Shor code is a subsystem code [1, 62], such can be performed using Eq. (3), cf. Fig. 1(d). To return that multiple states encode the same logical codeword. to the original code, we then shrink it down to a 3 x 3 These states are equivalent up to multiplication with code (Fig. 1(b)).gauge operators, which commute with the stabilizers andlogical operators, thus not affecting the logical information.The gauge group is generated by the pairs Xi.jXi+C. Relationship with the repetition code (ZrjZi j+) acting on qubits in the same column (row).In what follows, we will be mainly interested in the ‘Shorgauge’ of the code, where all Z?; gauge operators Before continuing with the logical protocol, we wish have eigenvalue +1. In this gauge, the codewords are to outline some properties connecting CSS codes with equivalent to those of Shor’s code

[0064] . In particular, in repetition codes, which we will exploit later on. The this gauge certain logical states become a tensor product bit-flip (phase-flip) repetition code is defined on n qubits of cat states by pairwise stabilizers = ZiZi+i(Sf1= A; Ai+i), cf.Fig. 2(b), and protects against Al-type (Z-type) errors. l±)lZ)= -^= (|000) ± |lll))®3. (2) The respective logical codewords are |0 / l)^^ = |0 / l)®nv 2 and i)^"1= |±)®n. Generalizing the constructions These states are particularly important, since they can be proposed in Ref.

[0033] , throughout this work we exploit the4Sec. Ill, and in Sec. IV to construct an efficient feedback operation for concatenated codes.III. MEASUREMENT-FREE FAULT- TOLERANT LOGICAL CCZFigure 3. Graphical depiction of the connectivity required for the transversal CCZ L between three logical In this section, we discuss in detail the protocol for a statesL, k — 1, 2, 3, each encoded in the 3 x 9 the Bacon- fault-tolerant CCZ f. schematically illustrated in Fig. 1. Shor codes, in the Shor gauge. Different colors correspond For the distance-3 Bacon-Shor code, this corresponds to to different CCZ gates between rows, and highlight that the the protocol in Fig. 4. We describe in more detail this permutations occur only across columns. protocol in Sec. Ill A and benchmark it under depolarizing noise in Sec. IIIB.fact that unidirectional transversal gates exist betweenrepetition codes and CSS codes. In particular, a logicalCkX (CkZ) gate on a distance- / / code can be controlled A. Circuit designfrom k length-c? bit-flip repetition codes, as illustrated inFig. 2(c) for the Toffoli gate. This gate is transversal, asit is composed of d physical CkX (CkZ) gates targeting To apply Eq. (3), the Shor gauge must be first enforced d qubits supporting the X / (ZR) operator of the code. As on the code. In general, this is necessary in a FT quantum explained in Sec. A, the stabilizer structure is preserved. computation even if we initialized logical states in the Additionally, we introduce a gadget to convert a logical correct gauge, since the H gate exchanges the Shor and codeword to a codeword of the repetition code. We call anti-Shor gauge. Furthermore, the QEC circuit proposed this an unencoding gadget, and can be used when partial in Ref.

[0039] , and later adapted in Sec. IV, corrects evprotection against either bit flips or phase flips is sufficient. ery single-qubit error up to a gauge operator. From a For an arbitrary logical state |t / ;)L= a |0)£+ / 3 |1)L, measurement-free perspective, fixing the gauge is somei2+ | / 3|2= 1, we introduce the unencoding operations what more challenging than correcting single errors, as we must account for both gauge flips as well as possible Ax / z W)L= ® |0)®6, (4) single-qubit errors, so the heuristics developed in Ref.

[0039] are not applicable. To gauge a logical state, we propose two different alternatives: («) a teleportation protocol which converts it to \'P^R ^Z'' = + P \^R ^Z'>■ and (M) Steane-type gauge fixing. Both have similar perNotice that these gadgets are not unitary, since inforformances under depolarizing noise, so we focus on the mation about the gauge choice is removed by the reset former, while the latter is relegated to Sec. B. operations R. The implementation of the unencodinggadgets for the 3 x 3 Bacon-Shor code is illustrated in In the teleportation protocol, the logical state is moved Figs. 2(d) and 2(e), and is similar to the reverse of the to a fresh register, which is initialized in the correct gauge. encoding circuit. The gauge information of the original state is removed by the unencoding gadget. Its MF variant is illustrated66Effectively, the unencoding gadget Kzin Fig. 4(b), and requires two additional logical registers. (Ax) maps the value of each column’s ZR (row’s XR) on Note that it can also correct single bit-flip errors, and has a qubit of the resulting repetition code — thus it is applicathe added benefit of converting potential leakage errors ble to any gauge choice of the Bacon-Shor code, e.g. the into computational errors.rotated surface code. For generic CSS codes, such gadgets To extend a Bacon-Shor code in the Shor gauge from can be implemented, albeit with a larger overhead, by 3 x 3 to 3 x 9, it is sufficient to perform two consecutive repeatedly performing Hadamard tests on different logical transversal CNOTs from the code to a |0)®9, cf. Fig. 4(c). strings of the logical operators, and performing a majority However, this may propagate bit flips that may lead to un- vote, as was proposed in Ref.

[0033] . correctable errors, so to make the procedure FT we intro- By combining the unencoding gadget with the property duce bit- flip corrections CY' along the rows, cf. Fig. 4(d). in Fig. 2(c), we can engineer a FT feedback operation To shrink back a logical state to the 3 x 3 code, it is then without measurements: a logical operation can be condisufficient to perform a series of CNOTs, illustrated in tioned on another logical state, at the price of having to Fig. 4(e). Since the circuits act independently on each unencode the latter to a repetition code. This can still row, phase-flips cannot propagate to different rows and be useful in many situations, such as when the control remain correctable. In principle, such schemes can be state is later discarded. For instance, this will be used generalized to any 3 x 3feBacon-Shor code, to directly later on to perform the gauge fixing procedure detailed in perform transversal CkZ gates

[0054] .Figure 4. (a) Components of the protocol for the CCZ £ gate between 3 x 3 Bacon-Shor codes, (b) Measurement-free gauge fixing by teleportation. A logical Bell state (|00)L+ |ll)L) / / 2 is first prepared in the Shor gauge. Note that, because the 1+)^ is prepared in the Shor gauge, the last logical qubit does not need to be prepared in |0)£. This auxiliary state is then entangled with the logical state, and then MF teleportation using CX and CZ gates is performed, by first unencoding to the repetition code, cf. Sec. II C. (c) The extend gadget deforms a 3 X 3 Bacon-Shor code to its 3 X 9 variant, by exploiting the Shor gauge in the previous step, (d) A measurement-free error-correction round for the repetition code, used to correct for single bit flips on each triplet of each row of the logical states, (e) The extend gadget is reversed by a shrink gadget, bringing the logical state back to a 3 X 3 Bacon- Shor code.B. Numerical results than 100 qubits and hundreds of Toffoli-like gates. To the best of our knowledge, only Ref.

[0068] implements a simiWe benchmark the scheme in Fig. 4 against the lar method, based on hash maps, and with further gate hardware-agnostic depolarizing noise, where after each rearrangements for the optimized simulation of quantum gate, a random Pauli error is applied with probability algorithms. Instead, our state- vector implementation is p. That is, given the set of Pauli strings of length i.e. array-based, which allows us to perform most operations Pt= {I, X, Y, Z}®e, any I- qubit gate is followed by the in place — avoid unnecessary memory allocations — and channel opening up the possibility to exploit vectorized instructions available on most general- purpose processors.g(p) = (i~p)p+ ip 1 (5) To assess the performance of a protocol ideally realizing an operation U at the logical level, we compute the averagelogical fidelity

[0069] , by averaging over all different combinations of Pauli eigenstates St = {|± ), |±Y), |± )}®fConsidering that the circuits contain more than 80 qubits as input states

[0070] . To account for the degeneracy of the and 27 physical CCZ gates, both state vector simulators gauge choice, we expand the overlap between each target as well as Clifford simulators are not suitable. Neverthestate and the resulting state paas a sum over expectation less, the logical states contain very few non-zero amplivalues of logical Pauli stringstudes in the computational basis, so the state vector isextremely sparse. In particular, the worst-case scenario E {a\U^paU\a)L= ^c^ Tr{PLpa), is |±) in the anti-Shor gauge, since it is the eigenstate of 6 independent XX gauge operators and XL, leading to 26+1= 128 non-zero amplitudes. If one simply keeps(6) track of these non-zero entries — much as one would do where t is the number of logical qubits [7 acts on and with “pen and paper” calculation — the simulations can beCaP) = ptj Different Kraus operators are performed with very moderate computational resources. sampled according to Eq. (5), simulating up to 224realFor this task, we develop SparseStates. jl

[0067] a simizations or 210failures per state, whichever comes first. ulation package in Julia which can efficiently simulate The numerical results for the CCZL gate are presented circuits with few branching gates, i.e. gates that create in Fig. 5, for two different gauge choices. However, these superpositions in the computational basis (which are only choices have minimal impact on the results, owing to the H gates in our case). This allows us to compute thousands gauge-fixing procedure (see also Sec. B). The quadratic of circuit samples per second with circuits involving more scaling law of the logical error confirms the fault-tolerancetion, thus achieving exponential suppression of noise. In subsection IV A we introduce code concatenation and how it applies to MF QEC. Then, in Sec. IV B we present an optimized QEC protocol for the concatenated Bacon-Shor code. We do not exploit the deformation procedure developed in Sec. Ill, but rather introduce a gadget to perform MF feedback operations. We call this the disposable Toffoli gadget, since effectively acts as a transversal gate as long as the control qubits do not need to be protected nor preserved, such as the case of ancilla qubits. Numerical benchmark are presented in Sec. IV C.A. Code concatenationFigure 5. Average error rate of the logical CCZ gate under We explore repeated concatenation of the same code, depolarizing noise, computed using Eq. (6). The performance which we denote asis benchmarked for initial states encoded without errors in the Shor (blue) or anti-Shor (red) gauges. Starting from |+ + +)L, (7) we can prepare the non-Clifford resource state \CCZff. Wetherefore show the fidelity (orange) of its preparation using a noisy FT preparation in the Shor gauge, and without any such that the first layer of concatenation is Ci = C. The gauge-fixing. Shaded regions correspond to 99 % confidence concatenation operation o is a way of combining two codes: intervals. the logical qubits of the inner code are used as physical qubits of the outer one, cf. Fig. 1(e). By recursively of the scheme. Additionally, we show the performance applying this operation, we can then construct a TV-layer of preparing the | CCZ / L= CCZ f | + + +)lmagic state, concatenated code.with a noisy FT initialization the Shor gauge, and hence Concatenation is a modular way of increasing the code not requiring any gauge fixing. This state can serve as distance. Indeed, by concatenating TV times a CSS code a non-Clifford resource, and may be useful for alternaof distance d, the resulting distance is = dN[1]. The tive constructions, for instance as the starting point of a number of errors t that we can correct depends on the distillation protocol to obtain better logical fidelities. Indecoding strategy. Since in MF QEC decoding and correcterestingly, the preparation of (7(7Z) exhibits a modest tions are operated by noisy quantum circuits rather than performance penalty, despite the absence of gauge fixing. via classical processing, the complexity of the available This can be attributed to the noisy preparation and the feedback operations is in practice limited. In the simplest inherent asymmetry in the CCZ i protocol. States like decoding strategy each unit operates autonomously, de|+ + +)Lare maximally vulnerable to phase errors, and coding each inner code individually, layer by layer. This most subroutines in the protocol let single phase flips still achieves an exponential suppression, albeit slower, of propagate, even if they do not lead to uncorrectable ererrors at the cost of a polynomial increase in the size of rors. For example, during the shrink step, any phase the error-correction circuit. In a FT protocol adopting error potentially occurring across each row of 9 qubits this strategy, any t faults at the lower level of concatenais transferred to the remaining 3 qubits without being tion are correctable, hence we have the recurrence relation corrected. tN = (t + l)(tw-i + 1) — 1, which yieldsA recent measurement-free code switching protocol wasrecently proposed by Ref.

[0059] , to realize a logical T gate te — (T + 1)N—!■ (8) and achieving a breakeven fidelity of 2.6 x 10~4. Thisfigure is, broadly speaking, comparable to the numerical For a base code correcting a single error (t = 1), we results presented here. Notably, decomposing a CZZ obtain the sequence t = 1, 3, 7, 15,... for the first layers gate requires 6 CX gates and 7 T gates [71, 72]. The of concatenation. This corresponds to an effective distance relative utility of t hese non-Clifford gates depends on the dff = 2f \- + 1, exponentially worse than the best case algorithmic context. < TJV, cf. Table I. Nevertheless, one still has an exponential suppression of errors by increasing tjy, guaranteeing that a threshold exists [73-75]. To understand this, we consider a circuit-level error model, where errors occur at every gate IV. MEASUREMENT-FREE CONCATENATION independently with probability p. Defining the logical failure rate at the TVthlevel of concatenation as pw, with Having demonstrated all the ingredients for FT and MF Po = p, we have pw+i ~ Cp*^1, where C > 1 is a constant, universal computation, in this section we show that the corresponding to the number of combinations of t+1 faults Bacon-Shor code can be scaled up by means of concatenaleading to a logical error. Therefore, if p <th =7 Code [n, k, d] d?st pseudothreshold B. Circuit designCl [9, 1, 3] 3 1 3.64 x 10“3c2[81, 1, 9] 7 3 1.96 x 10“3c3[729, 1, 27] 15 7 1.54 x 10-3The starting point of our concatenation procedure is Table I. Key properties of the first layers of concatenation: the MF error- correcting circuit for the 3 x 3 Bacon-Shor distance d, effective distance deffrelated to the number of code proposed in Ref.

[0039] . For each subcircuit correctable faults t as deS= 2t + 1 and pseudothresholds (C^m)) correcting bit-hips (phase-hips), Z-type (X-type) obtained from numerical simulations with depolarizing noise. stabilizers are extracted to ancilla qubits, as shown in Fig. 6. Additionally, a third stabilizer S3 = S S2 is extracted, to be FT against circuit-level noise. For a more detailed discussion on how to choose the set of then recursively PN+I < PN N, hence the suppression redundant stabilizers and determine the circuit’s design, of the error rate is faster than the circuit growth and a we refer the reader to Ref.

[0039] . When concatenating this threshold is attained. code with itself, we promote both physical qubits as well as ancilla qubits to logical qubits of the lower layer. To achieve the upper bound tjv =, decodingstrategies exist, but require message-passing between different layers

[0076] . To see how layer-by-layer decoding is For the correction, we construct a gadget to to perform not optimal, consider the concatenation of a three-bit the feedback efficiently, exploiting the fact that the phase classical repetition code with itself. This is equivalent to information in the ancilla qubits is unimportant. We a nine-bit repetition code, which can correct up to four unencode the ancilla qubits to a length-dy repetition code errors. However, by decoding each inner code individually, using the unencoding gadgets repeatedly (see Figs. 2(d) we can correct only up to three errors, as two errors in and 2(e)), to exploit the transversality of multi-controlled two subcodes can lead to the wrong logical state. gates described in Sec. II C and shown in Fig. 2(c). We note that the involved physical operations either have One can see layer-by-layer MF correction as a decoding disjoint supports or act on the same column (row). As can trade-off: we trade fault-tolerance for lower latency. The be seen in Fig. 2(a) these columns (rows) are orthogonal latter includes: (1) measurement latency - the time to to the XL (ZL) operator, thus the unencoding protocol perform the quantum measurements; (2) decoding latency Az (Ax) is FT, as each error location can affect at most - the time to communicate the syndromes to the decoder, one qubit of the repetition code. By partially unencoding decode the syndromes, and then apply or track the corthe logical ancilla qubits to a repetition code, we can rections. Feed-forward (FF) decoding uses measurements then perform transversal multi-controlled operations on and classical computation to achieve the ijy upper bound, the logical qubits. This is well-suited to the MF context, but MF decoding can speed up the logical performance since it reduces the overhead for MF feedback operations by allowing the decoding units to operate autonomously. while preserving fault-tolerance — as phase errors on the This addresses both measurement and decoding latenancillas are not transferred to the data qubits, and single cies, at the price of sub-optimal decoding and lower error bit flips result in at most a correctable bit flip on the data tolerance. qubits.Regarding the measurement latency, MF decoding isattractive for several platforms, including trapped ions Finally, when concatenating a desired code, we need and neutral atoms, as it completely side-steps the issue to include the error-correcting rounds for the underlying of having slow measurements, which is one of the main layers, which we call subrounds. To ensure fault-tolerance, bottlenecks in a QEC round [17, 18, 23, 28-32], In Sec. C subrounds can be introduced after every single gate

[0075] . we analyze the threshold measurement time for which MF However, for the Bacon-Shor code we consider, we realize decoding achieves the same fault-tolerance as a standard that in many locations this is not necessary. In particular, FF protocol, in the case of neutral-atom arrays. We we can allow errors on the ancilla qubits to propagate estimate that the measurement latency in current state- onto the logical qubit, as long as they correspond to a of-the-art hardware is a significant bottleneck, such that gauge of the code. For instance, in (Cz), a single phase MF schemes could outpace their conventional counterpart (bit) flip after initialization of the first ancilla would result for small to mid-distance codes (deS< 15). in an error ^1,1^1, 2 ( i, 1 2,1) on the data qubits after The MF protocol avoids the decoding latency as well. the first two layers of CNOTs. If we let these errors The fastest decoders have been shown to operate in realpropagate further however, we would end up potentially time only for small distances [8, 9]. Real-time decoding with correlated errors along rows (columns) which are at larger distances with many logical qubits is extremely aligned with the logical XL ( ) operator, and would challenging, and an active held of research [77-79]. It lead to an uncorrectable error. Therefore, we just need generally requires trading tolerance for speed, too: faster to place a C% (Cz) subround on the ancilla qubits after decoding, such as union-find

[0080] , has lower thresholds. having extracted a Z, Zj+i (X, Xi+i) gauge.Figure 6. Measurement-free fault-tolerant QEC implementation for the concatenated Bacon-Shor code, composed of a and a subcircuit correcting for X and Z errors, respectively, where m is the layer of concatenation. At the lowest layer Cl = c, intermediate error correcting subcircuits C°x / Zand unencoding operations \'X / Zarereplaced by identities. The ancillaregisters at higher layers of concatenation are initialized fault-tolerantly using the circuits on the right, with |0 / +)Lo = |0 / +).C. Performance we need to further delay the feedback operations. To do so, we precompute a table associating each pair of We consider the performance of the circuits presented virtual measurements to a list of future measurements in Sec. IV B under depolarizing noise, defined in Eq. (5). that need to be flipped. For example, for a quantum We consider the first three layers of concatenation, summamemory experiment with the gadget, the final part rized in Table I. The circuits are simulated with stim

[0081] , is replaced as followswhich allows for large system-size simulations by usingthe stabilizer tableau formalism.To convert Toffoli-like gates into a circuit composed solely of Clifford gates, we note that all ancillas are reset after use, such that we can separately sample their values as either 0 or 1. We therefore convert multi-qubit gates using the principle of deferred measurementwhere mi A m2 flip my, m3 A flip mg and mj Amg flip mg. In general, propagations of Pauli corrections are more complicated, but can still be comand including the corresponding noise channels defined puted efficiently, since the circuit is composed entirely by Eq. (5), such that every Toffoli-like gate is followed by of Clifford gates. For this purpose, we use stim’s a three-qubit depolarizing noise channel. FlipSimulator. This approach eliminates entirely all Classical logic in stim is limited to exclusive-or, so, mid-circuit classical logic, enabling the use of the high-in order to benefit from the faster compiled samplers, performance CompiledMeasurementSampler. After sam-and code deformation, we have demonstrated a fault- tolerant protocol for the realization of a logical CCZ gate in the Bacon-Shor code. Together with the code’s fault- tolerant initialization and transversal Hadamard gate, this enables measurement-free, fault-tolerant and universal operations. These ideas of gauge fixing are very powerful, as well-known error-correction concepts such as lattice surgery and code deformation have been recast as a gaugefixing procedure

[0090] . It is likely that in the future such concepts can be exploited in the measurement-free context, to devise more efficient universal logical operations. Second, we propose to concatenate measurement-free implementations of small codes to realize higher-distancecodes and thus achieve protection against an arbitrary number of faults. Remarkably, these concatenated protoFigure 7. Logical error rate per cycle pi versus gate error cols do not require a universal gate set, as we use a gadget rate p, for the first three layers of concatenation. The initial to perform the feedback operation in a hardware-efficient state is prepared without errors, and multiple QEC roundsway. We stress that such constructions are not unique are performed (markers). The solid lines correspond to theasymptotic estimates, extracted from a polynomial fit. to the Bacon-Shor code, but can be adapted to codes of the CSS family as well. In particular, we note that the disposable Toffoli gadget is also compatible with the pling the feedback-free circuits, the measurement outd = 3 rotated surface code, without any modifications. comes are sequentially updated using the precomputed By performing numerical simulations, we find that the table We then simulate noisy cirperformance is competitive and can be considered for cuits stochastically for a variable number of cycles Nc, error-correcting experiments on near-term devices. Furfor all eigenstates of the Pauli matrices, sampling up to thermore, it can be expected that the protocols can be 224realizations or 210failures — whichever occurs first. further tailored to a real hardware device. For example, by exploiting biased noise, the performance of measurement- In Fig. 7, we show the logical error rate per cyclefree protocols can be significantly enhanced

[0039] . FurtherP = 1 — pj / Nc, calculated by averaging over all the more, neutral atoms provide an ideal platform for the eigenstates of the logical Pauli operators, cf. Eq. (6). The implementation of such protocols, as native CCZ opernumerical results indicate that the failure rate of C scales ations have been demonstrated

[0086] . In the case where asymptotically as; / v l 1. within the sampling uncertainsuch operations are not available, the protocols can be ties. This is the expected behavior for a protocol that is adapted without spoiling fault-tolerance. As an example, robust against t faults at the circuit level. From this in Fig. 8, we show that correction operations can always data, we extract an asymptotic threshold pth — 1.3 x 10-3, be decomposed fault-tolerantly, by copying the control and the pseudothresholds in Table I, potentially relevant qubits to an auxiliary register, and performing a simplified for real implementations. Compared to universal condecomposition of the feedback operation. catenated constructions that rely on measurements

[0058] ,we note that our protocol has a comparable asymptotic threshold, despite having the overhead of being Altogether, this architecture requires non-local, but measurement-free. Overall, these results indicate that heavily parallelizable operations. This is an ideal setting such MF error-correcting protocols can achieve below- for neutral-atom platforms, which have demonstrated parbreakeven logical error rates on near-term quantum deallel Clifford operations and parallel shuttling of multiple vices, assuming physical error rates below 0.1 %, generally registers for the realization of transversal entangling operconsidered within reach. In particular, state-of-the-art ations [23, 24]. Furthermore, continuous loading of atoms trapped ion platforms have already demonstrated comprovides a reservoir of fresh qubits, which can emulate parable error rates [82-84] and neutral atom arrays are reset operations in a scalable way [40-42]. Despite a making rapid progress towards this goal [85-89]. potential performance overhead, measurement-free protocols can be a valid alternative to significantly speed up the logical clock rate. In Sec. C, we perform ‘back-of-the envelope’ calculations that suggest that for fault-tolerant V. OUTLOOK experiments in the foreseeable future (d < 15), measurement times would need to significantly decrease to match We have constructed a fully fault-tolerant architecture the clock times of their measurement-free counterpart. for universal and scalable quantum computation that does This further motivates measurement-free error correction not require any measurements. as a viable and scalable pathway towards fault-tolerant First, by performing a measurement-free gauge fixing quantum computation.10 we realize that the only non-trivial propagation are the Szstabilizers of the code overlapping with XL, which get mapped to the stabilizers of the repetition code. By definition, X / commutes with the stabilizers, meaning every overlap with Szstabilizers involves an even number of qubits. But an even product of distinct Z operators can always be absorbed by the stabilizer generators of the repetition code. In the case of a CZ gate, the targets support the ZL operator, and equivalent results are obtained by using the identity CZ = (I ® H)CX(I ' / H). By symmetry these arguments also hold for unidirectional gates on length d phase-flip repetition codes controlled by distance-d CSS codes. We can now extend these result to three-qubit gates as well. Again, using the propagation rules for the Toffoli gate Figure 8. Decomposition of the correction step for the 3 x 3 Bacon-Shor code in Fig. 6 in terms of two-qubit gates. By copying the control qubits in the ancilla register a), we can then use a Toffoli-reset gadget with fewer gates than the full decomposition

[0038] .ACKNOWLEDGMENTS the only non-trivial propagation arises from the Szstabilizers of the code overlapping with XL. The even number We acknowledge inspiring discussions with Gavin Bren- of overlapping qubits results in an even number of CZ nen and Johannes Zeiher. AP acknowledges partial fundoperations between the controlling bit-flip codes, which ing from the Defense Advanced Research Projects Agency reciprocally cancel. Similarly, in the CCZ gate, the non[under the Quantum Benchmarking (QB) program untrivial propagation is due the intersection of Sxstabilizers der award no. HR00112230006 and HR001121S0026 and ZL, which again results in the propagation of an even contracts], and was supported by the QuantERA grant number of CZs, which reciprocally cancel out.EQUIP through the Academy of Finland, decision number In general, the CkX (CkZ) gates controlled on the 352188. The views, opinions and / or findings expressed bit-flip codes only have non-trivial propagation of the Szare those of the author (s) and should not be interpreted (Sx) stabilizers of the code overlapping with XL(Z )- as representing the official views or policies of the DepartThese lead to an even number of Ck~ Z gates between ment of Defense or the U. S. Government. the controlling bit-flip codes, which mutually cancel out, thus preserving the stabilizer structure.Appendix A: Transversality of controlled-gatesbetween repetition codes and CSS codes Appendix B: Steane-type MF gauge fixing In this appendix, we show that a logical CkX (CkZ) As an alternative, we also propose a gauge fixing ingate on a distance-d CSS code can be controlled from k spired by Steane-type MF QEC [38, 43], which both length-d bit-flip repetition codes, without affecting the corrects single-qubit bit-flips and enforces the Shor gauge, stabilizer structure of the logical qubits involved. These using fewer qubits if fast resets are available. consist of d physical CkX (CkZ) gates targeting the d This protocol is illustrated in Fig. 9. The main idea is qubits of the code supporting the XL (Z ) operator. to treat each row one at a time, extracting each ZZ gauge For the CX gate, using the well known propagation operator to detect bit-flips (orange box). For each bit rules flip, we apply a XX gauge operator between the current row (green box) and the next one (purple box). This sets each of the Z-gauges to their +1 eigenvalue, and moves single bit-flip errors to the last row. We can then perform a similar bit-flip correction on the last row to correct for a potentially remaining bit-flip. As with Steane-typeQEC, this scheme avoids the propagation of more than one error.Figure 9. Gauge fixing by adapting Steane-type error correction. This circuit maps the X errors of a single row into a three-qubit cat state, decodes it by a redundant extraction of the parities

[0039] (orange box), and, if a bit flip occurred, applies a XX gauge operator between the current row (green box) and the next one (purple box). This circuit is repeated for all rows except for the last one, where remaining bit-flip errors are extracted and then corrected by applying only the first part of the corrections.teleportation Steane — breakeven Appendix C: Practical considerations In this section, we compare the implementation of the MF protocols and more conventional QEC protocols on a potential neutral-atom platform, from the point of view of logical clock time. In particular, we assume a two- dimensional array of atoms, with parallel shuttling capabilities. Since the concatenation procedure increases the footprint of the logical register, it is important to account for potentially long shuttling times. For measurements,we consider the situation of either reconfigurable arrays Figure 10. Logical error rate of the CCZL gate, employing with a separate readout zone

[0023] , or a static array with the teleportation or the Steane-type gauge-fixing protocols. local imaging of ancillae, enabled for example by shelving This is computed using Eq. (6), for states encoded in either of the data qubits to different atomic levels. For simplicthe Shor (left) or anti-Shor gauge (right). ity, we only consider shuttling and measurement times, since these are typically much more important than the execution time of individual gates [23, 91].With regards to shuttling, its speed is limited by the amount of heating it induces. Two main shuttling trajectories have been designed to address this problem, namely a constant-jerk (CJ) movement

[0091] or an accelThe scheme can be sped up, by extracting ZZ gaugeeration profile based on shortcuts-to-adiabaticity (STA) operators of the top and bottom rows simultaneously, andtechniques

[0092] . If an atom undergoes K movements of then applying the XX gauge operator between said rowdistance D, each, the time taken by each isand, respectively, the one below or above. By repeatingthis process iteratively, between rows progressively closer Atj = (aKO )1, (Cl) to the middle, errors are moved to the middle row. Finally,one round of extraction and correction on the middle row where / = 1 / 4 (1 / 6) for CJ (STA) shuttling, and a is a corrects a potentially remaining bit-flip. constant that depends on the experimental setting and the trajectory. More details can be found at Refs. [91, 92], On the other hand, with regards to mid-circuit measurements A comparison of the two different gauge fixing protocols and feed-forward, current state-of-the-art experiments presented is shown in Fig. 10, and exhibit very similar across various atomic species and qubit encodings have performance. We note that the performance of the teleattained times ranging between 1 ms to 20 ms [23, 29- portation circuit is independent of the initial state’s gauge, 32, 87, 93],while the Steane-type gauge fixing has a marginally lower For the MF QEC protocol, we assume the quasi-parallel error rate when the gauge is correct. extraction of individual stabilizers, since we can devise12Figure 11. (a) Alternative measurement-free and fault- tolerant QEC implementation for the Bacon-Shor code, using four ancillae. The colored operations follow the same convention of Fig. 6, indicating subcircuit error correction and unencoding routines, (b) Shuttling pattern for the first two (left) and last two (right) ancillae. (c) Shuttling schedule for the syndrome extraction, showing which data qubit each ancilla ai interacts with at a certain moment in time, and the direction of the shuttling in between. The order with which ancillae interact with data qubits is important to preserve fault-tolerance

[0039] . The schedule proposed is chosen to maximize the number of parallel operations, while also avoiding the propagation of uncorrectable errors from the ancillae to the data qubits.an alternative MF QEC protocol using four ancilla qubits while in the remaining four the longest movement is diinstead of three, cf. Fig. 11. The advantage of this protocol agonal. Then, K = 6 + 4 X 2A Inserting this result in is that it avoids measuring the stabilizer S3 (cf. Sec. IV B), Eq. (C2) we obtainwhich requires longer-range interactions, by measuring Siand S twice. Compared to Fig. 1(e), it exhibits a slightly T^N)= 5T^-1)+ K (Ka^-^Sx2^f. (C4) lower pseudothreshold, despite having more redundancy.The total time required for a subcircuit CNat N levels Unraveling this recursive relation yieldsof concatenation then can be broken down asjV-1 rp(N) _ rp(N). 1) = K (Ka8x C circ C (C2)2y 5n32(JV-1“n) / n=0. r. TV _ o2Nfwhere is the time required for shuttling in between = K (KaSx2)1— — (C5) logical gates, whereas accounts for the errorcorrecting subcircuits C^-1. For comparing with equivalent feed-forward (FF) imIn this scheme, each ancilla moves at most K = 6 plementations, we use a QEC code that is equivalent times: thrice horizontally and twice diagonally during by the number of correctable errors rather than the the syndrome extraction (cf. Fig. 11(b)), and at most distance, cf. Eq. (8). Thus, we consider a logical qubit once more horizontally for the application of the feedback encoded in a x d register, using some CSS code Toffoli operation — the unencoding gadget can be realized such as the rotated surface code, allowing for local stawith nearest-neighbor gates only. Each horizontal movebilizer extractions without shuttling. We assume that ment, at the IVthconcatenation level, covers a distance by correctly decoding the syndrome information, we can = 8xdN_i, where 6x is the spacing between data correct up to—1) / 2J faults on the data qubits. qubits and dy = 3^. Diagonal movements are longer by In this setting, a QEC cycle is then dominated by the a factor T / 2. We note that the shuttling schedule premeasurement time TM- In particular, for an extraction sented is compatible with the constraints imposed by the of a single type of syndromes, the measurements of the acousto-optical-deflectors (AO Ds) used to steer atoms in stabilizers is generally performed de^ times to be robust neutral-atom hardware [94, 95]. Then, by using Eq. (Cl), against circuit-level noise. Within this measurement time we have we also include the shuttling time to a separate readout zone, if needed, which can be non-negligible

[0023] .9The breakeven measurement time TMfor which theTC£C = j2^ti = K(Ka^N~^6x2y, (C3) MF protocol with shuttling would match the FF implei=l mentation, for the same tolerance tj^, is then where n depends on the parallelization and relative size ofthe moves. There are a total of 10 steps of parallel shutT^(IV) = 2K (Ka8x2y5_ &f 2JV+1_r(C6) tling, covering syndrome extraction — which contributeseight steps as per cf. Fig. 11(c) — and the feedback operwhere the factor 2 arises from the fact that the MF proation. Five steps only include shorter horizontal moves, tocol measures X-type and Z-type stabilizers one after13 the other, whether we assume that they are measured in where m is the mass of the used atom, wtrand L / trare parallel in FF schemes. With an estimate of Sx = 4 pm, the width and the depth of the trap, and recall that and the experimentally demonstrated values [91, 92] f = 1 / 4 (1 / 6) for CJ (STA) shuttling. This implies that by increasing the trapping depth and adopting atomic «STA « 1-4 x 10-11ms6 / / zm2, species lighter than rubidium as an cilia qubits, up to a four-fold reduction in time could be achieved.«CJ ~ 1-3 x 10~7ms4 / / xm2, (C7) With regards to the comparison between MF and FF approaches, we note that, on the one hand, the FF implewe obtain mentation could be improved in principle by not applying d rounds of syndrome extraction for every type of stabilizer, as recent research has shown that for a logical comT^f ~ 0.23 ms, 0.64 ms and 1.6 ms (C8) putation fewer rounds of measurements can be performed and fault-tolerance can still be preserved, at the price of a for N = 1, 2 and 3 with STA shuttling, and roughly more complicated decoding

[0096] . It remains to be seen if twice as much with CJ shuttling. Recalling that current such approaches can be adapted to the measurement-free state-of-the-art experiments have attained a TM that setting as well. On the other hand, for a FF implemenranges between 1ms to 20ms [23, 29-32, 87, 93], then tation of a logical computation it is important to take the MF approach not only avoids the need for mid-circuit into account shuttling times to a separate readout zone, measurements but can shorten the QEC cycle time. if required. For a L x L patch of logical registers, the For the purposes of clarifying the impact of the experimeasurement time then has an additional shuttling time mental design on the performance of the protocol, we note overhead of dL5r. Considering that practically-relevant that the QEC cycle time of the MF protocol is estimated quantum algorithms will require hundreds to thousands to scale as logical qubits

[0097] , future experiments will need to tackle such increasing overhead. Moreover, the complexity of classical decoding increases with the distance of the QEC code, in turn providing additional overhead and latency.UtT[1] B. M. Terhal, Quantum error correction for quantum S. Poletto, M. Bryant, K. Snyder, et al., Demonstratmemories, Rev. Mod. Phys. 87, 307 (2015). ing real-time and low-latency quantum error correction [2] E. T. Campbell, B. M. Terhal, and C. Vuillot, Roads with superconducting qubits (2024), arXiv:2410.05202. towards fault-tolerant universal quantum computation, [9] Google Quantum Al and Collaborators, Quantum erNature 549, 172 (2017). ror correction below the surface code threshold, Nature [3] Google Quantum Al, Exponential suppression of bit or 10.1038 / s41586-024-08449-y (2024).phase errors with cyclic error correction, Nature 595, 383

[0010] Google Quantum Al and Collaborators, Demonstrating (2021). dynamic surface codes (2024), arXiv:2412.14360.[4] S. Krinner, N. Lacroix, A. Remm, A. Di Paolo, E. Genois,

[0011] N. Lacroix, A. Bourassa, F. J. H. Heras, L. M. Zhang, C. Leroux, C. Hellings, S. Lazar, F. Swiadek, J. HerJ. Bausch, A. W. Senior, T. Edlich, N. Shutty, V. Sivak, rmann, G. J. Norris, C. K. Andersen, M. Muller, A. Blais, A. Bengtsson, M. McEwen, O. Higgott, D. Kafri, J. Claes, C. Eichler, and A. Wallraff, Realizing repeated quantum A. Morvan, Z. Chen, A. Zalcman, S. Madhuk, R. Acharya, error correction in a distance-three surface code, Nature L. A. Beni, et al., Scaling and logic in the color 605, 669 (2022). code on a superconducting quantum processor (2024), [5] Y. Zhao, Y. Ye, H.-L. Huang, Y. Zhang, D. Wu, H. Guan, arXiv:2412.14256.Q. Zhu, Z. Wei, T. He, S. Cao, F. Chen, T.-H. Chung,

[0012] L. Egan, D. M. Debroy, C. Noel, A. Risinger, D. Zhu, H. Deng, D. Fan, M. Gong, C. Guo, S. Guo, L. Han, N. Li, D. Biswas, M. Newman, M. Li, K. R. Brown, M. Cetina, S. Li, et al., Realization of an error-correcting surface code and C. Monroe, Fault-tolerant control of an error- with superconducting qubits, Phys. Rev. Lett. 129, 030501 corrected qubit, Nature 598, 281 (2021).(2022).

[0013] C. Ryan- Anderson, J. G. Bohnet, K. Lee, D. Gresh, [6] Google Quantum Al, Suppressing quantum errors by scalA. Hankin, J. P. Gaebler, D. Francois, A. Chernoguzov, ing a surface code logical qubit, Nature 614, 676 (2023). D. Lucchetti, N. C. Brown, T. M. Gatterman, S. K. Halit, [7] R. S. Gupta, N. Sundaresan, T. Alexander, C. J. Wood, K. Gilmore, J. A. Gerber, B. Neyenhuis, D. Hayes, and S. T. Merkel, M. B. Healy, M. Hillenbrand, T. Jochym- R. P. Stutz, Realization of real-time fault-tolerant quanO’Connor, J. R. Wootton, T. J. Yoder, A. W. Cross, tum error correction, Phys. Rev. X 11, 041058 (2021). M. Takita, and B. J. Brown, Encoding a magic state with

[0014] J. Hilder, D. Pijn, O. Onishchenko, A. Stahl, M. Orth, beyond break-even fidelity, Nature 625, 259 (2024). B. Lekitsch, A. Rodriguez-Blanco, M. Muller, F. Schmidt- [8] L. Caune, L. Skoric, N. S. Blunt, A. Ruban, J. McDaniel, Kaier, and U. G. Poschinger, Fault-tolerant parity readJ. A. Valery, A. D. Patterson, A. V. Gramolin, J. Ma- out on a shuttling-based trapped-ion quantum computer, janiemi, K. M. Barnes, T. Bialas, O. Bugdayci, O. CrawPhys. Rev. X 12, 011032 (2022).ford, G. P. Geher, H. Krovi, E. Matekole, C. Topal,

[0015] L. Postler, S. Heufien, I. Pogorelov, M. Rispler, T. Feld-14 ker, M. Meth, C. D. Marciniak, R. Stricker, M. Ring- logical qubits (2024), arXiv:2412.07670.bauer, R. Blatt, P. Schindler, M. Muller, and T. Monz,

[0026] P. S. Rodriguez, J. M. Robinson, P. N. Jepsen, Z. He, Demonstration of fault-tolerant universal quantum gate C. Duckering, C. Zhao, K.-H. Wu, J. Campo, K. Bagoperations, Nature 605, 675 (2022). nall, M. Kwon, T. Karolyshyn, P. Weinberg, M. Cain,

[0016] Y. Wang, S. Simsek, T. M. Gatterman, J. A. Gerber, S. J. Evered, A. A. Geim, M. Kalinowski, S. H. Li, K. Gilmore, D. Gresh, N. Hewitt, C. V. Horst, M. MaT. Manovitz, J. Amato-Grill, J. I. Basham, et al., Experitheny, T. Mengle, B. Neyenhuis, and B. Criger, Fault- mental demonstration of logical magic state distillation tolerant one-bit addition with the smallest interesting (2024), arXiv:2412.15165.color code, Sci. Adv. 10, eado9024 (2024).

[0027] D. Gottesman, Stabilizer codes and quantum error cor

[0017] L. Postler, F. Butt, I. Pogorelov, C. D. Marciniak, rection, Ph. D. thesis, California Institute of Technology S. Heufien, R. Blatt, P. Schindler, M. Rispler, M. Muller, (1997).and T. Monz, Demonstration of fault-tolerant Steane

[0028] T. M. Graham, L. Phuttitarn, R. Chinnarasu, Y. Song, quantum error correction, PRX Quantum 5, 030326 C. Poole, K. Jooya, J. Scott, A. Scott, P. Eichler, and (2024). M. Saffman, Midcircuit measurements on a single-species

[0018] I. Pogorelov, F. Butt, L. Postler, C. D. Marciniak, neutral alkali atom quantum processor, Phys. Rev. X 13, P. Schindler, M. Muller, and T. Monz, Experimental 041051 (2023).fault-tolerant code switching, Nature Physics 21, 298

[0029] K. Singh, C. E. Bradley, S. Anand, V. Ramesh, R. White, (2025). and H. Bernien, Mid-circuit correction of correlated phase

[0019] C. Ryan-Anderson, N. C. Brown, C. H. Baldwin, J. M. errors using an array of spectator qubits, Science 380, Dreiling, C. Foltz, J. P. Gaebler, T. M. Gatterman, N. He1265 (2023).witt, C. Holliman, C. V. Horst, J. Johansen, D. Lucchetti,

[0030] W. Huie, L. Li, N. Chen, X. Hu, Z. Jia, W. K. C. Sun, T. Mengle, M. Matheny, Y. Matsuoka, K. Mayer, M. Mills, and J. P. Covey, Repetitive readout and real-time control S. A. Moses, B. Neyenhuis, J. Pino, et al., High-fidelity of nuclear spin qubits in171Yb atoms, PRX Quantum 4, teleportation of a logical qubit using transversal gates 030337 (2023).and lattice surgery, Science 385, 1327 (2024).

[0031] J. W. Lis, A. Senoo, W. F. McGrew, F. Rbnchen, A. Jenk

[0020] M. P. da Silva, C. Ryan- Anderson, J. M. Bello-Rivas, ins, and A. M. Kaufman, Midcircuit operations using the A. Chernoguzov, J. M. Dreiling, C. Foltz, F. Frachon, omg architecture in neutral atom arrays, Phys. Rev. X J. P. Gaebler, T. M. Gatterman, L. Grans-Samuelsson, 13, 041035 (2023).D. Hayes, N. Hewitt, J. Johansen, D. Lucchetti, M. Mills,

[0032] M. A. Norcia, W. B. Cairncross, K. Barnes, P. Battaglino, S. A. Moses, B. Neyenhuis, A. Paz, J. Pino, P. Siegfried, A. Brown, M. O. Brown, K. Cassella, C.-A. Chen, R. Coxe, et al., Demonstration of logical qubits and repeated error D. Crow, J. Epstein, C. Griger, A. M. W. Jones, H. Kim, correction with better-than- physical error rates (2024), J. M. Kindem, J. King, S. S. Kondov, K. Kotru, J. Lauigan, arXiv:2404.02280. M. Li, et al., Midcircuit qubit measurement and rearrange

[0021] N. Berthusen, J. Dreiling, C. Foltz, J. P. Gaebler, T. M. ment in a171Yb atomic array, Phys. Rev. X 13, 041034 Gatterman, D. Gresh, N. Hewitt, M. Mills, S. A. Moses, (2023).B. Neyenhuis, P. Siegfried, and D. Hayes, Experiments

[0033] G. A. Paz-Silva, G. K. Brennen, and J. Twamley, Fault with the four-dimensional surface code on a quantum tolerance with noisy and slow measurements and prepacharge-coupled device quantum computer, Phys. Rev. A ration, Phys. Rev. Lett. 105, 100501 (2010).110, 062413 (2024).

[0034] C.-K. Li, M. Nakahara, Y.-T. Poon, N.-S. Sze, and

[0022] M. H. Abobeih, Y. Wang, J. Randall, S. J. H. Loenen, H. Tomita, Recovery in quantum error correction for genC. E. Bradley, M. Markham, D. J. Twitchen, B. M. Terhal, eral noise without measurement, Quantum Inf. Comput. and T. H. Taminiau, Fault-tolerant operation of a logical 12, 149 (2012).qubit in a diamond quantum processor, Nature 606, 884

[0035] D. Crow, R. Joynt, and M. Saffman, Improved error (2022). thresholds for measurement-free error correction, Phys.

[0023] D. Bluvstein, S. J. Evered, A. A. Geim, S. H. Li, Rev. Lett. 117, 130503 (2016).H. Zhou, T. Manovitz, S. Ebadi, M. Cain, M. Kalinowski,

[0036] H. E. Ercan, J. Ghosh, D. Crow, V. N. Premaku- D. Hangleiter, J. P. Bonilla Ataides, N. Maskara, I. Cong, mar, R. Joynt, M. Friesen, and S. N. Coppersmith, X. Gao, P. Sales Rodriguez, T. Karolyshyn, G. Semeghini, Measurement-free implementations of small-scale surface M. J. Gullans, M. Greiner, V. Vuleti’c, et al., Logical codes for quantum-dot qubits, Phys. Rev. A 97, 012318 quantum processor based on reconfigurable atom arrays, (2018).Nature 626, 58 (2024).

[0037] M. A. Perlin, V. N. Premakumar, J. Wang, M. Saffman,

[0024] B. W. Reichardt, A. Paetznick, D. Aasen, I. Basov, J. M. and R. Joynt, Fault-tolerant measurement- free quantum Bello-Rivas, P. Bonderson, R. Chao, W. van Dam, M. B. error correction with multiqubit gates, Phys. Rev. A 108, Hastings, A. Paz, M. P. da Silva, A. Sundaram, K. M. 062426 (2023).Svore, A. Vaschillo, Z. Wang, M. Zanner, W. B. Cairn

[0038] S. Heufien, D. F. Locher, and M. Muller, Measurement- cross, C.-A. Chen, D. Crow, H. Kim, et al., Logical comfree fault-tolerant quantum error correction in near-term putation demonstrated with a neutral atom quantum devices, PRX Quantum 5, 010333 (2024). processor (2024), arXiv:2411.11822.

[0039] S. Veroni, M. Muller, and G. Giudice, Optimized

[0025] M. J. Bedalov, M. Blakely, P. D. Buttler, C. Carnahan, measurement- free and fault-tolerant quantum error correcF. T. Chong, W. C. Chung, D. C. Cole, P. Goiporia, tion for neutral atoms, Phys. Rev. Res. 6, 043253 (2024). P. Gokhale, B. Heim, G. T. Hickman, E. B. Jones, R. A.

[0040] K. Singh, S. Anand, A. Pocklington, J. T. Kemp, and Jones, P. Khalate, J.-S. Kim, K. W. Kuper, M. T. Licht- H. Bernien, Dual-element, two-dimensional atom array man, S. Lee, D. Mason, N. A. Neff- Mallon, et al., Fault- with continuous-mode operation, Phys. Rev. X 12, 011040 tolerant operation and materials science with neutral atom (2022).15

[0041] M. A. Norcia, H. Kim, W. B. Cairncross, M. Stone,

[0061] A. M. Steane, Error correcting codes in quantum theory, A. Ryou, M. Jaffe, M. O. Brown, K. Barnes, P. Battaglino, Phys. Rev. Lett. 77, 793 (1996).T. C. Bohdanowicz, A. Brown, K. Cassella, C.-A. Chen,

[0062] D. Bacon, Operator quantum error-correcting subsystems R. Coxe, D. Crow, J. Epstein, C. Griger, E. Halperin, for self-correcting quantum memories, Phys. Rev. A 73, F. Hummel, A. M. W. Jones, et al., Iterative assembly of 012340 (2006).171Yb atom arrays with cavity-enhanced optical lattices,

[0063] P. Aliferis and A. W. Cross, Subsystem fault tolerance PRX Quantum 5, 030316 (2024). with the Bacon-Shor code, Phys. Rev. Lett. 98, 220502

[0042] F. Gyger, M. Ammenwerth, R. Tao, H. Timme, S. Sni- (2007).girev, I. Bloch, and J. Zeiher, Continuous operation of

[0064] P. W. Shor, Scheme for reducing decoherence in quantum large-scale atom arrays in optical lattices, Phys. Rev. Res. computer memory, Phys. Rev. A 52, R2493 (1995). 6, 033104 (2024).

[0065] M. Li, D. Miller, M. Newman, Y. Wu, and K. R. Brown,

[0043] A. M. Steane, Active stabilization, quantum computation, 2d compass codes, Phys. Rev. X 9, 021041 (2019). and quantum state synthesis, Phys. Rev. Lett. 78, 2252

[0066] M. Vasmer and A. Kubica, Morphing quantum codes, (1997). PRX Quantum 3, 030319 (2022).

[0044] B. Eastin and E. Knill, Restrictions on transversal en

[0067] SparseStates.jl, GitHub repository.coded quantum gate sets, Phys. Rev. Lett. 102, 110502

[0068] S. Jaques and T. Haner, Leveraging state sparsity for more (2009). efficient quantum simulations, ACM Trans. Quantum

[0045] S. Bravyi and R. Konig, Classification of topologically Comput. 3, 10.1145 / 3491248 (2022).protected gates for local stabilizer codes, Phys. Rev. Lett.

[0069] L. H. Pedersen, N. M. Mpller, and K. Mplmer, Fidelity of 110, 170503 (2013). quantum operations, Physics Letters A 367, 47 (2007).

[0046] S. Bravyi and A. Kitaev, Universal quantum computation

[0070] To reduce the computational cost, for numerical simulawith ideal clifford gates and noisy ancillas, Phys. Rev. A tions of CCZ L we exploit the permutational invariance 71, 022316 (2005). and the local ZL symmetry, and adjust the weights in

[0047] E. T. Campbell, H. Anwar, and D. E. Browne, MagicEq. (6) accordingly.state distillation in all prime dimensions using quantum

[0071] M. A. Nielsen and I. L. Chuang, Quantum Computation reed-muller codes, Phys. Rev. X 2, 041021 (2012). and Quantum Information: 10th Anniversary Edition

[0048] E. T. Campbell and M. Howard, Unified framework for (Cambridge University Press, Cambridge, 2010).magic state distillation and multiqubit gate synthesis with

[0072] V. V. Shende and I. L. Markov, On the cnot-cost of toffoli reduced resource cost, Phys. Rev. A 95, 022316 (2017). gates, Quantum Inf. Comput. 9, 461 (2008).

[0049] J. O’Gorman and E. T. Campbell, Quantum computa

[0073] E. Knill, R. Laflamme, and W. H. Zurek, Resilient quantion with realistic magic-state factories, Phys. Rev. A 95, tum computation, Science 279, 342 (1998).032338 (2017).

[0074] D. Aharonov and M. Ben-Or, Fault-tolerant quantum

[0050] D. Litinski, Magic State Distillation: Not as Costly as computation with constant error rate, SIAM Journal on You Think, Quantum 3, 205 (2019). Computing 38, 1207 (2008).

[0051] J. T. Anderson, G. Duclos-Cianci, and D. Poulin, Fault-

[0075] P. Aliferis, D. Gottesman, and J. Preskill, Quantum accutolerant conversion between the Steane and reed-muller racy threshold for concatenated distance-3 codes (2005), quantum codes, Phys. Rev. Lett. 113, 080501 (2014). arXiv:quant-ph / 0504218.

[0052] M. E. Beverland, A. Kubica, and K. M. Svore, Cost of

[0076] D. Poulin, Optimal and efficient decoding of concatenated universality: A comparative study of the overhead of quantum block codes, Phys. Rev. A 74, 052333 (2006). state distillation and code switching with color codes,

[0077] F. Battistel, C. Chamberland, K. Johar, R. W. J. OverPRX Quantum 2, 020341 (2021). water, F. Sebastiano, L. Skoric, Y. Ueno, and M. Usman,

[0053] F. Butt, S. Heufien, M. Rispler, and M. Muller, Fault- Real-time decoding for fault-tolerant quantum computtolerant code-switching protocols for near-term quantum ing: progress, challenges and outlook, Nano Futures 7, processors, PRX Quantum 5, 020345 (2024). 10.1088 / 2399-1984 / aceba6 (2023).

[0054] T. J. Yoder, Universal fault- tolerant quantum computa

[0078] L. Skoric, D. E. Browne, K. M. Barnes, N. I. Gillespie, and tion with Bacon-Shor codes (2017), arXiv: 1705.01686. E. T. Campbell, Parallel window decoding enables scalable

[0055] T. J. Yoder, R. Takagi, and I. L. Chuang, Universal fault- fault tolerant quantum computation, Nat. Commun. 14, tolerant gates on concatenated stabilizer codes, Phys. Rev. 10.1038 / s41467-023-42482-l (2023).X 6, 031039 (2016).

[0079] N. Liyanage, Y. Wu, S. Tagare, and L. Zhong, Fpga-

[0056] A. Paetznick and B. W. Reichardt, Universal fault-tolerant based distributed union-find decoder for surface codes, quantum computation with only transversal gates and IEEE Trans. Quantum Eng. 5, 10.1109 / tqe.2024.3467271 error correction, Phys. Rev. Lett. Ill, 090505 (2013). (2024).

[0057] T. Jochym- O’Connor and R. Laflamme, Using concate

[0080] N. Delfosse and N. H. Nickerson, Almost-linear time nated quantum codes for universal fault-tolerant quantum decoding algorithm for topological codes, Quantum 5, gates, Phys. Rev. Lett. 112, 010505 (2014). 10.22331 / q- 2021-12-02-595 (2021).

[0058] C. Chamberland, T. Jochym-O’Connor, and R. Laflamme,

[0081] C. Gidney, Stim: a fast stabilizer circuit simulator, QuanOverhead analysis of universal concatenated quantum tum 5, 497 (2021).codes, Phys. Rev. A 95, 022313 (2017).

[0082] S. A. Moses, C. H. Baldwin, M. S. Allman, R. Ancona,

[0059] F. Butt, D. F. Locher, K. Brechtelsbauer, H. P. L. Ascarrunz, C. Barnes, J. Bartolotta, B. Bjork, P. BlanBuehler, and M. Muller, Measurement-free, scalable chard, M. Bohn, J. G. Bohnet, N. C. Brown, N. Q. Burand fault-tolerant universal quantum computing (2024), dick, W. C. Burton, S. L. Campbell, J. P. Campora, arXiv:2410.13568. C. Carron, J. Chambers, J. W. Chan, Y. H. Chen, et al.,

[0060] A. R. Calderbank and P. W. Shor, Good quantum errorA Race- Track Trapped-Ion Quantum Processor, Physical correcting codes exist, Phys. Rev. A 54, 1098 (1996). Review X 13, 041052 (2023).16

[0083] C. M. Lbschnauer, J. M. Toba, A. C. Hughes, S. A. 033028 (2019).King, M. A. Weber, R. Srinivas, R. Matt, R. Nour-

[0091] D. Bluvstein, H. Levine, G. Semeghini, T. T. Wang, shargh, D. T. C. Allcock, C. J. Ballance, C. Matthiesen, S. Ebadi, M. Kalinowski, A. Keesling, N. Maskara, M. Malinowski, and T. P. Harty, Scalable, high- H. Pichler, M. Greiner, V. Vuleti’c, and M. D. Lukin, fidelity all-electronic control of trapped-ion qubits (2024), A quantum processor based on coherent transport of enarXiv:2407.07694. tangled atom arrays, Nature 604, 451 (2022).

[0084] J.-S. Chen, E. Nielsen, M. Ebert, V. Inlek, K. Wright,

[0092] S. Hwang, H. Hwang, K. Kim, A. Byun, K. Kim, S. Jeong, V. Chaplin, A. Maksymov, E. Paez, A. Poudel, P. Maunz, M. P. Soegianto, and J. Ahn, Fast and reliable atom and J. Gamble, Benchmarking a trapped-ion quantum transport by optical tweezers, Optica Quantum 3, 64 computer with 30 qubits, Quantum 8, 10.22331 / q-2024- (2025).11-07-1516 (2024).

[0093] A. G. Radnaev, W. C. Chung, D. C. Cole, D. Mason, T. G.

[0085] S. Ma, A. P. Burgers, G. Liu, J. Wilson, B. Zhang, and Ballance, M. J. Bedalov, D. A. Belknap, M. R. Berman, J. D. Thompson, Universal gate operations on nuclear M. Blakely, I. L. Bloomfield, P. D. Buttler, C. Campbell, spin qubits in an optical tweezer array of171Yb atoms, A. Chopinaud, E. Copenhaver, M. K. Dawes, S. Y. EuPhys. Rev. X 12, 021028 (2022). banks, A. J. Friss, D. M. Garcia, J. Gilbert, M. Gillette,

[0086] S. J. Evered, D. Bluvstein, M. Kalinowski, S. Ebadi, et al., A universal neutral-atom quantum computer with T. Manovitz, H. Zhou, S. H. Li, A. A. Geim, T. T. individual optical addressing and non-destructive readout Wang, N. Maskara, H. Levine, G. Semeghini, M. Greiner, (2024), arXiv:2408.08288.V. Vuleti’c, and M. D. Lukin, High-fidelity parallel entan

[0094] L. Schmid, D. F. Locher, M. Rispler, S. Blatt, J. Zeigling gates on a neutral-atom quantum computer, Nature her, M. Muller, and R. Wille, Computational capabilities 622, 268 (2023). and compiler development for neutral atom quantum

[0087] R. Finkelstein, R. B.-S. Tsai, X. Sun, P. Scholl, S. Direkci, processors — connecting tool developers and hardware exT. Gefen, J. Choi, A. L. Shaw, and M. Endres, Universal perts, Quantum Science and Technology 9, 10.1088 / 2058- quantum operations and ancilla-based read-out for tweezer 9565 / ad33ac (2024).clocks, Nature 634, 321 (2024).

[0095] N. Constantinides, A. Fahimniya, D. Devulapalli, D. Blu

[0088] R. B.-S. Tsai, X. Sun, A. L. Shaw, R. Finkelstein, and vstein, M. J. Gullans, J. V. Porto, A. M. Childs, and A. V.M. Endres, Benchmarking and fidelity response theory of Gorshkov, Optimal routing protocols for reconfigurable high-fidelity rydberg entangling gates, PRX Quantum 6, atom arrays (2024), arXiv:2411.05061.010331 (2025).

[0096] H. Zhou, C. Zhao, M. Cain, D. Bluvstein, C. Duckering,

[0089] J. A. Muniz, M. Stone, D. T. Stack, M. Jaffe, J. M. H.-Y. Hu, S.-T. Wang, A. Kubica, and M. D. Lukin, Kindem, L. Wadleigh, E. Zalys-Geller, X. Zhang, C.-A. Algorithmic fault tolerance for fast quantum computing Chen, M. A. Norcia, J. Epstein, E. Halperin, F. Hum(2024), arXiv:2406.17653.mel, T. Wilkason, M. Li, K. Barnes, P. Battaglino, T. C.

[0097] A. M. Dalzell, S. McArdle, M. Berta, P. Bienias, C.- Bohdanowicz, G. Booth, A. Brown, et al., High-Fidelity F. Chen, A. Gilyen, C. T. Hann, M. J. Kastoryano, Universal Gates in the 171 Yb Ground-State Nuclear-Spin E. T. Khabiboulline, A. Kubica, G. Salton, S. Wang, Qubit, PRX Quantum 6, 020334 (2025). and F. G. S. L. Brandao, Quantum algorithms: A sur

[0090] C. Vuillot, L. Lao, B. Criger, C. Garcia Almudever, K. Bervey of applications and end-to-end complexities (2023), tels, and B. M. Terhal, Code deformation and lattice arXiv:2310.03011.surgery are gauge fixing, New Journal of Physics 21,

Claims

June 20, 2025 PlanQC GmbH P177842WO ANE / BMN / WNJCLAIMS1. Method for fault-tolerant quantum computing, comprising:preparing (710), based on a quantum error correction code, a set of three or more logical qubits in an initial state, wherein each logical qubit comprises a plurality of physical qubits; andperforming (720) a fault-tolerant logical entangling gate on the three or more logical qubits.

2. Method of claim 1, wherein each of the three or more logical qubits comprises nine or more physical qubits, and / or the quantum error correction code comprises one or more of: a Bacon-Shor code, a CSS code, and a repetition code.

3. Method of claim 1 or 2, wherein performing the fault-tolerant logical entangling gate on the set of three or more logical qubits comprises:performing a fault-tolerant non-Clifford gate, preferably a fault-tolerant logical Controlled-Controlled-Z, CCZ, gate on the set of three or more logical qubits.

4. Method of claim 3, wherein performing the fault-tolerant logical CCZ gate on the set of three or more logical qubits comprises:performing a measurement-free code deformation protocol on each of the three or more logical qubits to obtain a set of three or more extended logical qubits; andperforming measurement-free single qubit error corrections for each of the three or more extended logical qubits;performing a transversal CCZ gate on the set of three or more extended logical qubits, preferably using non-local CCZ gates on the physical qubits.

5. Method of any of claims 1 to 4, wherein performing the fault-tolerant logical entangling gate on the set of three or more logical qubits comprises moving the physical qubits from one part of a quantum register to another one.

6. The method of claim 4 or 5, wherein performing the fault-tolerant logical CCZ gate on the set of three or more logical qubits further comprises:performing, after performing the transversal CCZ gate on the set of three or more extended logical qubits, one or more reset operations on each of the set of three or more extended logical qubits.

7. The method of any of claims 4 to 6, wherein performing the transversal CCZ gate on the set of three or more extended logical qubits comprises:performing a plurality of CCZ gates on triplets of physical qubits of the set of three or more extended logical qubits, wherein preferably one or more of the plurality of CCZ gates are non-local.

8. Method of any of claims 1 to 7, wherein preparing the set of three or more logical qubits in the initial state comprises preparing a set of three or more concatenated logical qubits, wherein each concatenated logical qubit comprises a plurality of nonconcatenated logical qubits and wherein each non-concatenated logical qubits comprises a plurality of physical qubits.

9. Method of claim 8, wherein performing the fault-tolerant logical entangling gate on the set of three or more concatenated logical qubits comprises:performing measurement-free single qubit error corrections for each of the three or more concatenated logical qubits comprising:unencoding two or more ancilla logical qubits from a first quantum error correction code to a repetition code; andperforming one or more CCZ gates and / or CCNOT gates on two of the unencoded ancilla logical qubits and the concatenated logical qubit.

10. Method for fault-tolerant quantum computing, comprising:preparing (1210) one or more logical qubits of a concatenation level m in an initial state, wherein each logical qubit of the concatenation level m comprises a plurality of logical qubits of a concatenation level m-i;performing (1220) a measurement-free quantum error correction operation on the one or more logical qubits of a concatenation level m, comprising:performing a set of transversal CNOT operations for the plurality of logical qubits of the concatenation level m-i and two or more ancilla logical qubits of the concatenation level m-i;unencoding the two or more ancilla logical qubits of the concatenation level m-i from a first quantum error correction code to a repetition code;performing one or more CCZ gates and / or CCNOT gates between the two or more unencoded ancilla logical qubits and the one or more logical qubits of the concatenation level m; andresetting the two or more ancilla logical qubits.

11. Quantum computing device, comprising:a 2D quantum register of neutral atom qubits arranged to support nearest-neighbor and / or next-nearest-neighbor interactions;a quantum gate radiation system configured to illuminate the 2D quantum register with electromagnetic radiation to perform local single-qubit gates and / or local multi-qubit gates on the neutral atom qubits of the 2D quantum register; anda control system configured to control the quantum gate radiation system to:prepare, based on a quantum error correction code, a set of three or more logical qubits in an initial state, wherein each logical qubit comprises a plurality of physical qubits; andperform a fault-tolerant logical entangling gate on the three or more logical qubits.

12. Device of claim 11, wherein each of the three or more logical qubits comprises nine or more physical qubits, and / or the quantum error correction code comprises one or more of: a Bacon-Shor code, a CSS code, and a repetition code.

13. Device of claim 11 or 12, wherein the control system is configured to perform the fault-tolerant logical entangling gate by performing a fault-tolerant non-Clifford gate, preferably a fault-tolerant logical Controlled-Controlled-Z, CCZ, gate on the set of three or more logical qubits.

14. Device of claim 13, wherein the control system is configured to perform the fault-tolerant logical CCZ gate by:performing a measurement-free code deformation protocol on each of the three or more logical qubits to obtain a set of three or more extended logical qubits;performing measurement-free single qubit error corrections for each of the three or more extended logical qubits; andperforming a transversal CCZ gate on the set of three or more extended logical qubits, preferably using non-local CCZ gates on the physical qubits.

15. Device of any of claims 11 to 14, further comprising control circuitry configured to move the physical qubits from one part of the quantum register to another part during performance of the fault-tolerant logical entangling gate.

16. Device of claim 14 or 15, wherein the control system is configured to perform, after performing the transversal CCZ gate on the set of three or more extended logical qubits, one or more reset operations on each of the set of three or more extended logical qubits.

17. Device of any of claims 15 to 16, wherein the control system is configured to perform the transversal CCZ gate by performing a plurality of CCZ gates on triplets of physical qubits of the set of three or more extended logical qubits, wherein preferably one or more of the plurality of CCZ gates are non-local.

18. Device of any of claims 11 to 17, wherein the control system is configured to prepare a set of three or more concatenated logical qubits, wherein each concatenated logical qubit comprises a plurality of non-concatenated logical qubits and wherein each non-concatenated logical qubit comprises a plurality of physical qubits.

19. Device of claim 18, wherein the control system is configured to perform the fault-tolerant logical entangling gate on the set of three or more concatenated logical qubits by:performing measurement-free single qubit error corrections for each of the three or more concatenated logical qubits comprising:unencoding two or more ancilla logical qubits from a first quantum error correction code to a repetition code; andperforming one or more CCZ gates and / or CCNOT gates on two of the unencoded ancilla logical qubits and the concatenated logical qubit.

20. Device of claim 11, further comprising:a quantum register readout system (1230) configured to measure a multi-qubit quantum state of the quantum register.

21. Method for fault-tolerant quantum computing, comprising:determining (1310) a logical error rate required for executing a quantum algorithm;determining (1320) a physical error rate for a quantum computing device adapted to carry out the quantum algorithm, andencoding (1330) a plurality of concatenated logical qubits of a concatenation level m >= 1, based on the determined logical and physical error rate.

22. Method of claim 21, where encoding the plurality of concatenated logical qubits comprises:determining, based on the determined logical and physical error rate and, preferably based on a number of physical qubits usable by the quantum computing device for the quantum algorithm the concatenation level m for encoding the plurality of concatenated logical qubits.

23. Quantum computing device comprising means for carrying out the method of any of preceding claims 1 to 9, 10, or 21 to 22.

24. Computer program for carrying out the method of any of preceding claims 1 to 9, 10, or 21 to 22, when executed by a data and signal processing device configured for controlling a quantum computing device comprising a quantum register of physical qubits and a qubit control system.

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