High-voltage super-junction terminal structure

A junction terminal, high voltage technology, applied in the field of high voltage super junction terminal structure, can solve the problems of increasing chip production cost, poor electric field uniformity, increasing chip area, etc., to reduce ion pollution and charge accumulation, and avoid electric field concentration effect. , the effect of preventing charge imbalance

CN103681780AActive Publication Date: 2014-03-26INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2014-03-26

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Abstract

The invention provides a high-voltage super-junction terminal structure. The high-voltage super-junction terminal structure comprises a super-junction zone and a terminal surface structure, wherein the super-junction zone is formed through the spaced distribution of P+, N- and N+ poles; a metal field plate and an SIPOS (Semi-Insulating Polycrystalline Silicon) field plate are arranged on the terminal surface structure; a P- layer is arranged between the super-junction zone and the terminal surface structure; a high-resistance SIPOS layer, an SiO2 layer, a low-resistance SIPOS layer, the metal field plate and a nitrogen-doped SIPOS layer are sequentially deposited on the terminal surface structure from the bottom to the top, or the high-resistance SIPOS layer, the SiO2 layer, the metal field plate and the nitrogen-doped SIPOS layer are sequentially deposited on the terminal surface structure from the bottom to the top; the bottom end of the terminal surface structure is ended by a trench. The high-voltage super-junction terminal structure which is provided by the invention has the advantages that high voltage can be resisted, the reliability of the terminal is improved, and leaked current is reduced. The high-voltage super-junction terminal structure can be applied in the manufacture of the terminals of large power devices, such as an IGBT (Insulated Gate Bipolar Translator) and a VDMOS (Vertical Double Diffused Metal Oxide Semiconductor).
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Description

technical field

[0001] The invention relates to the field of manufacture of voltage-controlled power devices, in particular to a high-voltage superjunction terminal structure. Background technique

[0002] The ability of a device to block high voltages depends primarily on the reverse-biased breakdown voltage of a particular PN junction in the device structure. In power devices, the reverse-bias breakdown voltage of PN junction is limited to occur near the surface or the local area at the junction bending due to the influence of the PN junction bending or surface non-ideal factors at the junction termination relative to the parallel plane junction in the body. breakdown phenomenon. The junction terminal is a special structure specially designed to reduce the local electric field, improve the surface breakdown voltage and reliability, and make the actual breakdown voltage of the device closer to the ideal value of the parallel plane junction. In vertical conducting devices ...

Examples

Embodiment Construction

[0027] see figure 2 , the present invention provides a high-voltage super junction terminal structure, including a super junction region 1 composed of spaced P+, N-, N+ columns and a terminal surface structure 2 with a metal field plate and a SIPOS field plate, the super junction region 1 There is a layer of P-layer 3 between the terminal surface structure 2 and the terminal surface structure 2, and the surface of the silicon wafer of the terminal surface structure 2 is sequentially deposited with a high resistance SIPOS layer 201, SiO layer from bottom to top 2 layer 202 , low resistance SIPOS layer 203 , metal field plate 204 and nitrogen doped SIPOS layer 205 .

[0028] see image 3 , a high-voltage superjunction terminal structure provided by an embodiment of the present invention includes a superjunction region 1 composed of spaced P+, N-, and N+ columns and a terminal surface structure 2 with a metal field plate and a SIPOS field plate. There is a layer of P-layer 3 b...