Atomic cross-media write on storage device

Abstract

Examples include techniques for implementing a write transaction to two or more memory devices in a storage device. In some examples, the write transaction includes an atomic write transaction from an application or operating system executing on a computing platform to a storage device coupled with the computing platform. For these examples, the storage device includes a storage controller to receive an atomic multi-media write transaction request to write first data and second data; simultaneously and atomically cause the first data to be stored in a first memory device and the second data to be stored in a second memory device.

Description

TECHNICAL FIELD

[0001] Examples described herein generally relate to techniques for writing transactions to storage devices. BACKGROUND

[0002] In some examples, file systems, databases, or disk caches can be associated with different types of applications or operating systems (OS) in a computing system. For these examples, the applications or OS can issue transaction requests (e.g., write transactions) such as a set of one or more write operations to non-volatile memory included in a storage device. The applications or OS typically need to ensure that the write transaction completes before issuing the next transaction. If the computing system needs to ensure that the write transaction completes, the computing system can characterize the operations associated with these types of write transactions as atomic write transactions.

[0003] When applications such as file systems, databases, and disk caches update data on a storage device, they also have to update some metadata to allow future correct lookup / recovery of the data. Many storage devices do not provide atomic metadata per input / output (I / O) request, which leads to the need for complex logging or journaling mechanisms and corresponding complex and expensive recovery methods for power- fail handling. This requires the performance of additional I / O requests. In some computing environments, such log / metadata writes can be combined to reduce the additional I / O requests (e.g., write them only at OS flush time), however other scenarios (e.g., when the volatile write cache is disabled by the user / administrator, which is typically done in data center solutions) require an additional metadata write operation per data write operation. This doubles the number of write operations to the storage device, resulting in performance, power, and endurance degradation.

[0004] In some computing environments, the applications or OS can synthesize the atomicity guarantees they each require to write arbitrarily sized and arbitrarily scattered data indivisibly on an HDD or SSD by using one or more of known techniques (e.g., copy-and-update, journaling, ordered updates, two-pass writes, sequential additional metadata writes, etc.). These techniques also typically double the number of write operations to the storage device, and thus can significantly impair the performance and endurance of the storage device.

[0005] Fused commands as described in the Non-Volatile Memory (NVM) Express standard (version 1.3, available at nvmexpress.org) are insufficient to solve this problem. These fused commands do not guarantee all-or-none atomic behavior, require sequential operations, and also have to have the same logical block address (LBA), which is typically impossible for such applications. BRIEF DESCRIPTION OF DRAWINGS

[0006] Figure 1 An example first system is shown.

[0007] Figure 2 An example first process is shown.

[0008] Figure 3 An example second system is shown.

[0009] Figure 4 An example block diagram for an apparatus is shown.

[0010] Figure 5 An example of a first logical flow is shown.

[0011] Figure 6 An example of a second logical flow is shown.

[0012] Figure 7 An example of a third logical flow is shown.

[0013] Figure 8 An example storage medium is shown.

[0014] Figure 9 An example storage device is shown.

[0015] Figure 10 An example computing platform is shown. DETAILED DESCRIPTION

[0016] As contemplated in the present disclosure, applications or OS associated with a file system, database, or disk cache can need to ensure that write transactions to a storage device are completed before the next transaction is issued. Ensuring that write transactions are completed requires logically atomic write transactions to provide data consistency for users of these applications or OS. Logically atomic write transactions can allow multiple operations to be grouped into a single logical entity that can enable these applications or OS to see that all write transactions have completed or that no write transactions have completed. In embodiments, in an atomic write transaction, data can be stored in one type of memory in a storage device and associated metadata can be stored in another type of memory in the storage device.

[0017] Figure 1 An example system 100 is shown. In some examples, as shown Figure 1 the system 100 includes a host computing platform 110 coupled to a storage device 120 through an I / O interface 103 and an I / O interface 123. Further, as shown Figure 1As shown, the host computing platform 110 can include an OS 111, one or more system memory devices 112, circuitry 116, and one or more applications 117. For these examples, the circuitry 116 can be capable of executing various functional elements of the host computing platform 110, such as the OS 111 and the applications 117, which can be at least partially maintained within the system memory devices 112. The circuitry 116 can include host processing circuitry to include one or more central processing units (CPUs) and associated chipsets and / or controllers.

[0018] According to some examples, as Figure 1 As shown, the OS 111 can include a file system 113 and a storage device driver 115, and the storage device 120 can include a storage controller 124, one or more storage memory devices 122, and a storage 126. The OS 111 can be arranged to implement the storage device driver 115 to coordinate at least temporary storage of data for files among the files 113-1 through 113-n, where "n" is any positive integer > 1. The data can originate from or be associated with, for example, execution of at least portions of the applications 117 and / or the OS 111. As described in more detail below, the OS 111 communicates one or more commands and transactions to the storage device 120 to write data to the storage device 120. The commands and transactions can be organized and processed by logic and / or features at the storage device 120 to implement atomic write transactions to write data to the storage device 120.

[0019] In some examples, the storage controller 124 can include logic and / or features to receive write transaction requests for atomic write transactions to the storage memory devices 122 at the storage device 120. For these examples, the atomic write transactions can be initiated or originate from an application, such as the applications 117, that utilizes the file system 113 to write data to the storage device 120 through the input / output (I / O) interfaces 103 and 123.

[0020] In some examples, the memory 126 can include a volatile type of memory, including but not limited to RAM, D-RAM, DDR SDRAM, SRAM, T-RAM, or Z-RAM. One example of a volatile memory includes DRAM or some variant such as SDRAM. The memory subsystem as described herein can be compatible with a variety of memory technologies, such as DDR4 (DDR version 4, initial specification published by JEDEC in September 2012), LPDDR4 (Low Power Double Data Rate (LPDDR) version 4), JESD209-4 (initially published by JEDEC in August 2014), WIO2 (Wide I / O 2), JESD229-2 (initially published by JEDEC in August 2014), HBM (High Bandwidth Memory DRAM), JESD235 (initially published by JEDEC in October 2013), DDR5 (DDR version 5 currently under discussion by JEDEC), LPDDR5 (LPDDR version 5 currently under discussion by JEDEC), HBM2 (HBM version 2 currently under discussion by JEDEC), and / or other technologies and technologies based on derivatives or extensions of such specifications.

[0021] However, examples are not limited to this approach, and in some instances, the memory 126 can include a non-volatile type of memory, the state of which is determinative even if power to the memory 126 is interrupted. In some examples, the memory 126 can include a non-volatile type of memory that is block addressable, such as NAND or NOR technologies. Thus, the memory 126 can also include future generation types of non-volatile memory, such as 3-dimensional cross point memory (3D XPoint TM ), or other byte addressable non-volatile types of memory. According to some examples, the memory 126 can include a type of non-volatile memory that includes chalcogenide glass, multi-level NAND flash memory, NOR flash memory, single or multi-level phase change memory (PCM), resistive memory, nanowire memory, FeTRAM, MRAM including memristor technology, or STT-MRAM, or a combination of any of the above technologies, or other memory.

[0022] In some examples, the storage memory device 122 can be a device for storing data from write transactions and / or write operations. The storage memory device 122 can include one or more chips or dies having gates that can individually include one or more types of non-volatile memory, including but not limited to NAND flash memory, NOR flash memory, 3-D cross point memory (3D XPoint TM), ferroelectric memory, SONOS memory, ferroelectric polymer memory, FeTRAM, FeRAM, bidirectional memory, nanowire, EEPROM, phase change memory, memristor, or STT-MRAM. For these examples, the storage device 120 can be arranged or configured as a solid state drive (SSD). Data can be read and written in blocks, and mapping or location information for the blocks can be saved in the memory 126.

[0023] Examples are not limited to storage devices arranged or configured as SSDs, other storage devices are contemplated, such as a hard disk drive (HDD). In these examples, the storage memory device 122 can include one or more platters or spinning disks having magnetic material for storing data.

[0024] According to some examples, communication between the storage device driver 115 and the storage controller 124 for data stored in the storage memory device 122 and accessed via the files 113-1 through 113-n can be routed through the I / O interface 103 and the I / O interface 123. The I / O interface 103 and 123 can be arranged as a serial advanced technology attachment (SATA) interface to couple elements of the host computing platform 110 to the storage device 120. In another example, the I / O interface 103 and 123 can be arranged as a serial attached, small computer system interface (SCSI) (or simply SAS) interface to couple elements of the host computing platform 110 to the storage device 120. In another example, the I / O interface 103 and 123 can be arranged as a peripheral component interconnect express (PCIe) interface to couple elements of the host computing platform 110 to the storage device 120. In another example, the I / O interface 103 and 123 can be arranged as a non-volatile memory express (NVMe) interface to couple elements of the host computing platform 110 to the storage device 120. For this other example, communication can be conducted over the I / O interface 103 and 123 utilizing a communication protocol as described in an industry standard or specification (including progeny or variants), such as: Peripheral Component Interconnect (PCI) Express Base Specification Revision 3.1 ("PCI Express Specification" or "PCIe Specification"), published in November 2014 or later versions; and / or Non-Volatile Memory Express (NVMe) Specification Revision 1.2 ("NVMe Specification"), also published in November 2014 or later versions.

[0025] In some examples, the system memory device 112 can store information and commands that can be used by the circuit 116 to process information. Further, as Figure 1As shown, circuitry 116 may include a memory controller 118. Memory controller 118 may be arranged to control access to data at least temporarily stored at system memory device 112 for ultimate storage at storage memory device 122 at storage device 120.

[0026] In some examples, storage device driver 115 may include logic and / or features for forwarding commands associated with one or more write transactions and / or write operations originating from application 117. For example, storage device driver 115 may forward commands associated with an atomic write transaction so that data may be stored to storage memory device 122 at storage device 120. More specifically, storage device driver 115 may enable communication of write operations from application 117 at computing platform 110 to controller 124.

[0027] The system memory device 112 may include one or more chips or dies having a volatile type of memory, such as RAM, D-RAM, DDR SDRAM, SRAM, T-RAM, or Z-RAM. However, examples are not limited in this manner, and in some instances, the system memory device 112 may include a non-volatile type of memory, including but not limited to NAND flash memory, NOR flash memory, 3-D crosspoint memory (3D XPoint TM ), ferroelectric memory, SONOS memory, ferroelectric polymer memory, FeTRAM, FeRAM, bidirectional memory, nanowire, EEPROM, phase change memory, memristor, or STT-MRAM.

[0028] According to some examples, the host computing platform 110 may include, but is not limited to, a server, a server array or server farm, a web server, a network server, an Internet server, a workstation, a minicomputer, a mainframe computer, a supercomputer, a network appliance, a web appliance, a distributed computing system, a personal computer, a tablet computer, a smart phone, a multiprocessor system, a processor-based system, or a combination thereof.

[0029] Figure 2 An exemplary process is shown. In some examples, such as Figure 2 The process shown depicts the process used to implement an atomic write transaction. For these examples, the process can be achieved by Figure 1 The components or elements of system 100 are shown as being implemented or using the described components or elements, such as application 117, OS 111, storage device 120, storage controller 124, memory 126, and / or storage memory device 122. However, the process is not limited to being implemented by or using only these components or elements of system 100.

[0030] In embodiments of the application, a storage device 120 with multiple storage memory devices 122 (e.g., multiple media) can be extended to provide a write transaction that writes two or more of the multiple media in the storage device simultaneously and atomically. In embodiments, the storage memory devices 122 include two or more non-volatile memory (NVM). In embodiments, a first NVM can be a NAND memory and a second NVM can be a power-protected DRAM memory. In embodiments, the power-protected DRAM memory can include an internal memory buffer (IMB). In embodiments, primary user data such as a cache line (typically including multiple sectors) can be written to the first NVM and metadata (e.g., including multiple bytes of cache metadata) associated with storage of the primary user data can be written to the second NVM. Multiple writes to either media can be combined. In some examples, at 210, a write transaction request referred to as an atomic multi-media write can be sent or submitted by the application 117 via the OS 111 and / or the storage device driver 115 to be processed by the storage device 120 for an atomic write transaction. In embodiments, parameters of the atomic multi-media write transaction include a starting logical block address (LBA) (“L”) for sectors of user data to be stored in the first memory device, a number of sectors of user data (“N”), the user data (“Data 1”), a starting address (“A”) for associated metadata to be stored in the second memory device, a number of words of metadata to be stored (“K”), and the metadata (“Data 2”), although other combinations of parameters can be used in other embodiments.

[0031] When all relevant writes are complete, completion of the write request can be returned to the host application 117 with an “all-or-nothing” behavior (i.e., the write transaction exhibits atomicity). In embodiments, atomicity can be ensured using a well-defined command start sequence, power loss imminent (PLI) power capabilities, and internal rollback capabilities.

[0032] Embodiments of the application provide the benefits of atomic metadata support while also utilizing the benefits of small granularity, fast media for storing metadata.

[0033] While embodiments described herein illustrate a storage device 120 with two storage memory devices 122, the storage device 120 can be extended to M media types to provide atomic operations across any subset of the M media, where M is a natural number. Similarly, while some embodiments describe the context of writing a single logical block address (LBA) range to a first media, this can be extended to multiple ranges per media in other embodiments.

[0034] Figure 3An example storage device 120 is shown. In embodiments, the storage device 120 includes media 1 302 and media 2 306. In embodiments, media 1 302 can be a NAND NVM memory and media 2 306 can be a 3D XPoint TM NVM memory. In other embodiments, additional NAND and / or DRAM and / or 3D XPoint TM memory can be added. In embodiments, the available data storage within media 1 302 can be exposed to the application 117 as a first namespace with a write granularity of, for example, 512B sectors, and the available data storage within media 2 306 can be exposed to the application 117 as a second namespace with a write granularity of, for example, 4KB doublewords. Other sizes can also be used. Embodiments of the storage device 120 provide a command equivalent to a "write media 1 (L, N, data 1)" that writes N sectors of data 1 304 starting at sector L in the first namespace. Embodiments of the storage device 120 also provide a command equivalent to a "write media 2 (A, K, data 2)" that writes K doublewords of data 2 308 starting at address A in the second namespace.

[0035] Embodiments of the present invention combine the two commands to provide a new command atomic multi-media write (L, N, data 1, A, K, data 2) 210. This command instructs the storage device 120 to perform both the write media 1 and write media 2 operations simultaneously, while ensuring that either both succeed or both fail. In other words, to implement the atomic multi-media write (L, N, data 1, A, K, data 2) command 210, the storage device atomically writes N sectors of data 1 304 starting at sector L in the first namespace and K doublewords of data 2 308 starting at address A in the second namespace. In embodiments, data 1 304 includes user data and data 2 308 includes metadata related to the storage of data 1 304.

[0036] If either write fails, then the data on media 1 302 and the data on media 2 306 can remain unchanged for both the address LBA and the address range (in media 1 302 and media 2 306, respectively). In other embodiments, alternatives can be used to specify the atomic multi-media write operation, for example by using an extension to the fused command, or by using a transaction ID, with the difference being that in embodiments of the present invention the associated individual writes can refer to multiple media types. In other embodiments, other granularities and methods of exposing regions of data storage in the media can be used. In other embodiments, the atomic multi-media write command can be exposed via NVMe or other protocol commands equivalent to those described herein.

[0037] In embodiments, the storage device 120 waits for both the data 1 304 buffer and the data 2 308 buffer to be available in the storage device, e.g., waits for appropriate corresponding direct memory access (DMA) completion. In embodiments, the atomic multi-media write command can be completed in a single DMA transfer. If the storage device has PLI power 310 protection capability, the storage device can optionally return a completion indication of the atomic write transaction to the storage device driver 115 at this time. The storage device 120 performs the write media 1 (L, N, data 1) 312 and / or write media 2 (A, K, data 2) 314 operations internally, and then can return a completion indication of the atomic write command to the storage device driver 115 if the storage device did not do so earlier. If the write media 1 (L, N, data 1) 312 and / or write media 2 (A, K, data 2) 314 write operations are interrupted by a power loss event, in embodiments, the PLI power 310 and / or power loss recovery (PLR) schemes can be used to complete the write operations in a non-volatile manner.

[0038] In embodiments, if the storage device 120 does not have PLI power 310, the storage device can not complete the atomic multi-media write request 210 early, and must wait for both the write media 1 312 write operation and the write media 2 314 write operation to successfully complete to media 1 302 and media 2 306, respectively, before returning a success indicator to the storage device driver 115. If the storage device 120 returns a failure indicator (or if there is a power failure on a storage device without PLI power capability), the storage device 120 can use known rollback methods (e.g., internal journaling) to roll back the writes of write media 1 312 and write media 2 314.

[0039] Thus, in embodiments of the invention, data can be written to a first type of memory, and metadata associated with the stored data can be stored to a second type of memory simultaneously in an atomic operation.

[0040] Figure 4 An exemplary block diagram of an apparatus 400 is shown. While the apparatus shown in FIG. 4 has a limited number of elements in a particular topology, it can be appreciated that the apparatus 400 can include more or fewer elements in alternative topologies as desired for a given implementation. Figure 4 The apparatus shown in FIG. 4 has a limited number of elements in a particular topology, but it can be appreciated that the apparatus 400 can include more or fewer elements in alternative topologies as desired for a given implementation.

[0041] The apparatus 400 can be supported by circuitry 420, and the apparatus 400 can be a storage controller maintained at a storage device, such as the storage controller 124 of the storage device 120 of the system 100 shown. Figure 1 The storage device can be coupled to a host computing platform or similar to the storage device also shown in FIG. 1. The apparatus 400 can be a storage controller of a storage device 120 of a system 100, such as the storage controller 124 of the storage device 120 of the system 100 shown. Figure 1The devices of the host computing platform 110 are illustrated in FIG. 1. Further, as noted above, the storage device can include one or more memory devices or dies to store data associated with atomic multi-media write transaction requests placed by one or more applications hosted by the host computing platform. The circuitry 420 can be arranged to execute one or more software or firmware-implemented components or modules 422-a (e.g., implemented at least in part by a storage controller of the storage device). Notably, "a" and "b" and "c" and similar designators as used herein are intended to be variables representing any positive integer. Thus, for example, if an implementation sets a = 4, then the full set of software or firmware for the components or modules 422-a can include components 422-1, 422-2, 422-3, or 422-4. Further, these "components" can be software / firmware stored in a computer-readable medium, and although illustrated as discrete blocks, these components need not be stored at different locations in the computer-readable medium. Figure 4 The components are illustrated in FIG. 4 as discrete blocks, but this is not intended to be limiting of these components being stored in different computer-readable media components (e.g., separate memory devices, etc.).

[0042] According to some examples, the circuitry 420 can include a processor or processor circuitry. The processor or processor circuitry can be any of a variety of commercially available processors, including without limitation: and processors; application, embedded, and safety processors; and and processors; IBM and Cell processors; Core (2) Core i3, Core i5, Core i7, Xeon and processors; and similar processors. According to some examples, the circuitry 420 can also include one or more application-specific integrated circuits (ASICs), and at least some of the components 422-a can be implemented as hardware elements of these ASICs.

[0043] According to some examples, the apparatus 400 can include a request component 422-1. The request component 422-1 can be logic and / or features executed by the circuitry 420 to receive a write request 405 for an atomic multi-media write transaction to one or more storage memory devices. For these examples, the atomic multi-media write transaction request can be included in the write request 405, and the one or more storage memory devices can be located at a storage device that includes the apparatus 400. For example, the write request 405 can have been sent from an application executing at a host computing device coupled with the storage device that includes the apparatus 400.

[0044] In some examples, the apparatus 400 can also include a store data component 422-2. The store data component 422-2 can be logic and / or features executed by the circuit 420 to cause data included in the atomic multi-media write transaction to be stored to one or more storage memory devices. In some examples, the store data component 422-2 can cause the data to be stored to physical memory addresses of the one or more storage memory devices of the first memory type.

[0045] In some examples, the apparatus 400 can also include a store metadata component 422-3. The store metadata component 422-3 can be logic and / or features executed by the circuit 420 to cause metadata included in the atomic multi-media write transaction to be stored to one or more storage memory devices. In some examples, the store metadata component 422-3 can cause the metadata to be stored to physical memory addresses of the one or more storage memory devices of the second memory type. When the circuit 420 successfully completes the atomic multi-media write transaction, the circuit 420 can return a completion status 445 to the requesting application.

[0046] According to some examples, the apparatus 400 can also include a power failure component 422-4. The power failure component 422-4 can be logic and / or features executed by the circuit 420 to cause data and metadata stored to one or more memory storage devices after a detected power failure event indicated in the power failure notification 450 to be preserved or accessible.

[0047] Included herein are a set of logic flows representing examples of exemplary methods for performing novel aspects of the disclosed architecture. Although one or more methods are shown and described herein as a series of acts, it will be appreciated that the methods are not limited by the order of acts. Accordingly, some acts can take place in a different order or simultaneously with other acts from that shown and described herein. For example, one of skill in the art will understand and appreciate that a method could alternatively be represented as a series of interrelated states or events, such as in a state diagram. Moreover, not all acts illustrated in a method can be required for a novel implementation.

[0048] The logic flows can be implemented in software, firmware, and / or hardware. In software and firmware embodiments, the logic flows can be implemented by computer executable instructions stored on at least one non-transitory computer- or machine-readable medium (e.g., optical, magnetic, or semiconductor storage). Embodiments are not limited in this context.

[0049] Figure 5An example of a first logic flow 500 is shown. The logic flow 500 can be representative of some or all of the operations executed by one or more logics, features, or devices described herein (e.g., the apparatus 400). More specifically, the logic flow 500 can be implemented by one or more of the request component 422-1, the store data component 422-2, the store metadata component 422-3, and the power failure component 422-4.

[0050] According to some examples, when the storage device 120 provides sufficient PLI power 310, a storage controller of the storage device can receive a write transaction request for an atomic multi-media write transaction 210 to one or more storage memory devices. For these examples, the request component 422-1 can receive the write transaction request for the atomic multi-media write transaction. At block 502, data 1 304 and associated metadata data 2 308 can be received and stored into a transfer buffer in the memory 126. At block 504, the request can be completed to the host computing platform. At block 506, commands for a write to media 1 (L, N, data 1) 312 and for a write to media 2 (A, K, data 2) 314 can be issued in parallel using the store data component 422-2 and the store metadata component 422-3, respectively, without waiting for the commands to complete. At block 508, if a power down event is received during the execution of the write to media 1 or the write to media 2 operations, any outstanding media 1 and media 2 write operations can be completed at least in part using the PLI power 310 and the power failure component 422-4.

[0051] Figure 6 An example of a second logic flow 600 is shown. The logic flow 600 can be representative of some or all of the operations executed by one or more logics, features, or devices described herein (e.g., the apparatus 400). More specifically, the logic flow 600 can be implemented by one or more of the request component 422-1, the store data component 422-2, the store metadata component 422-3, and the power failure component 422-4.

[0052] According to some examples, when the storage device 120 provides minimal PLI power 310 and also supports atomic in-place write operations on individual media, a storage controller of the storage device can receive a write transaction request for an atomic multi-media write transaction 210 to one or more storage memory devices. For these examples, media 1 302 can be NAND memory, and media 2 306 can be 3D XPoint TMMemory. For these examples, atomic write medium 1 can be implemented using known rollback techniques, and atomic write medium 2 can be implemented using minimal PLI power. Other implementations are possible. For these examples, request component 422-1 can receive a write transaction request for an atomic multi-medium write transaction. At block 602, data 1 304 and associated metadata data 2 308 can be received and stored into a transfer buffer in memory 126. At block 604, a read operation can be performed to obtain metadata starting at address A and length K from medium 2 306, and store the metadata as temporary metadata in memory 126 for future use in the event of a power failure event. At block 606, commands for atomic write medium 1 (L, N, data 1) 312 and atomic write medium 2 (A, K, data 2) 314 can be issued in parallel using store data component 422-2 and store metadata component 422-3, respectively, without waiting for the commands to complete. At block 608, the request to the host computing platform can be completed when both the atomic write medium 1 312 operation and the atomic write medium 2 314 operation are completed.

[0053] Figure 7 An example of a third logic flow 700 is shown. Logic flow 700 can be representative of some or all of the operations executed by one or more of the logic, features, or apparatus described herein (e.g., apparatus 400). More specifically, logic flow 700 can be implemented by one or more of request component 422-1, store data component 422-2, store metadata component 422-3, and power failure component 422-4. Logic flow 700 illustrates processing by storage controller 120 upon detecting a power failure event during a pending atomic write and communicating via power failure 450.

[0054] At block 702, if there are no atomic write transactions pending, no additional power failure event processing is required, and processing ends at block 704. If at least one atomic multi-medium write transaction is still pending, block 706 determines whether the atomic write medium 1 operation 312 (part of the atomic multi-medium write transaction) is complete. If so, at block 708, the corresponding atomic write medium 2 operation 314 can be completed using minimal PLI power 310. Processing continues to block 702. If the atomic write medium 1 operation 312 is not complete at block 706, the following steps can be performed. At block 710, the atomic write medium 1 operation can be discarded (if necessary, can need to be rolled back upon next power up of the storage device). At block 712, any pending atomic write medium 2 operations can be completed. At block 714, a write medium 2 operation can be performed to restore the temporary metadata obtained in block 604 as described above into medium 2 306. Processing can continue to block 702.

[0055] Figure 8 An example of the first storage medium is shown. Figure 6 As shown, the first storage medium includes storage medium 700. Storage medium 800 may include an article of manufacture. In some examples, storage medium 800 may include any non-transitory computer-readable medium or machine-readable medium, such as an optical, magnetic, or semiconductor storage device. Storage medium 800 may store various types of computer-executable instructions, such as instructions for implementing logic flows 500, 600, and 700. Examples of computer-readable or machine-readable storage media may include any tangible medium capable of storing electronic data, including volatile or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writable or rewritable memory, and the like. Examples of computer-executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. Examples are not limited in this context.

[0056] Figure 9 An exemplary storage device 900 is shown. In some examples, such as Figure 9 As shown, storage device 900 may include a processing component 940, other storage device components 950, and a communication interface 960. According to some examples, storage device 900 may be capable of being coupled to a host computing device or platform.

[0057] According to some examples, the processing component 940 can perform processing operations or logic for the apparatus 400 and / or the storage medium 800. The processing component 940 can include various hardware elements, software elements, or a combination of both. Examples of hardware elements can include devices, logic devices, components, processors, microprocessors, circuitry, processor circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, etc.), integrated circuits, ASICs, programmable logic devices (PLDs), digital signal processors (DSPs), FPGA / programmable logic, memory units, logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. Examples of software elements can include software components, programs, applications, computer programs, application programs, device drivers, system programs, software development programs, machine programs, operating system software, middleware, firmware, software components, routines, subroutines, functions, methods, procedures, software interfaces, application program interfaces (API), instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an example is implemented using hardware elements and / or software elements can vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints, as desired for the

[0058] In some examples, the other storage device components 950 can include common computing elements or circuitry such as one or more processors, multi-core processors, co-processors, memory units, chipsets, controllers, interfaces, oscillators, timing devices, power supplies, and so forth. Examples of memory units can include without limitation various types of computer readable and / or machine readable storage media in the form of one or more higher speed memory units, such as read-only memory (ROM), RAM, DRAM, DDR DRAM, SDRAM, DDR SDRAM, SRAM, Programmable ROM (PROM), EPROM, EEPROM, flash memory, ferroelectric memory, SONOS memory, polymer memory such as ferroelectric polymer memory, nanowire memory, FeTRAM or FeRAM, ovonic memory, phase change memory, memristor, STT-MRAM, magnetic or optical cards, 3D XPoint TM and any other type of storage media suitable for storing information.

[0059] In some examples, the communication interface 960 can include logic and / or features to support the communication interface. For these examples, the communication interface 960 can include one or more communication interfaces that operate according to various communication protocols or standards to communicate over direct or network communication links. Direct communication can occur via use of a communication protocol such as SMBus, PCIe, NVMe, QPI, SATA, SAS, or USB communication protocols. Network communication can occur via use of a communication protocol Ethernet, Infiniband, SATA, or SAS communication protocols.

[0060] The storage device 900 can be arranged as an SSD or HDD, which can be configured as described above for the storage device 120 of the system 100 as shown in Figure 1 Thus, the functionality and / or specific configuration of the storage device 900 described herein can be included or omitted in various embodiments of the storage device 900 as suitably desired.

[0061] The components and features of the storage device 900 can be implemented using any combination of discrete circuitry, ASICs, logic gates and / or single chip architectures. Further, the features of the storage device 900 can be implemented using microcontrollers, programmable logic arrays and / or microprocessors or any combination of the foregoing, as suitably desired. It is noted that hardware, firmware and / or software elements can be collectively or individually referred to herein as "logic" or "circuit."

[0062] It is to be appreciated that Figure 9 The example storage device 900 shown in the block diagram can represent one functional description example of many potential implementations. Thus, the division, omission or inclusion of block functions depicted in the flow diagrams does not infer that the hardware components, circuits, software and / or elements for implementing these functions must be divided, omitted, or included in embodiments in the manner shown.

[0063] Figure 10 An example computing platform 1000 is shown. In some examples, the computing platform 1000 can include a storage system 1030, a processing component 1040, other platform components 1050, and a communication interface 1060, as shown in Figure 10 According to some examples, the computing platform 1000 can be implemented in a computing device.

[0064] According to some examples, the storage system 1030 can be similar to the storage device 120 of the system 100 as shown in Figure 1 Figure 9 ​900 is shown, and includes a controller 1032 and a memory device 1034. For these examples, logic and / or features resident or located at the controller 1032 may perform at least some processing operations or logic for the apparatus 400 and may include storage media, including the storage medium 800. Additionally, the memory device 1034 may include similar types of volatile or non-volatile memory (not shown) as described above with respect to the storage device 120.

[0065] According to some examples, processing component 1040 may include various hardware elements, software elements or a combination of the two. Examples of hardware elements may include devices, logic devices, components, processors, microprocessors, circuits, processor circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, etc.), integrated circuits, ASICs, PLDs, DSPs, FPGAs / programmable logic, memory cells, logic gates, registers, semiconductor devices, chips, microchips, chipsets, etc. Examples of software elements may include software components, programs, applications, computer programs, application programs, system programs, software development programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, processes, software interfaces, APIs, instruction sets, computing codes, computer codes, code segments, computer code segments, words, values, symbols or any combination thereof. Determining whether an example is implemented using hardware elements and / or software elements can vary according to any number of factors, such as desired computing rate, power level, thermal tolerance, processing cycle budget, input data rate, output data rate, memory resources, data bus speed and other design or performance constraints, as desired for a given example.

[0066] In some examples, other platform components 1050 may include common computing elements, such as one or more processors, multi-core processors, coprocessors, memory units, chipsets, controllers, peripherals, interfaces, oscillators, timing devices, video cards, audio cards, multimedia I / O components (e.g., digital displays), power supplies, etc. Examples of memory units associated with other platform components 1050 or storage system 1030 may include, but are not limited to, various types of computer-readable and machine-readable storage media in the form of one or more higher-speed memory units, such as ROM, RAM, DRAM, DDRAM, SDRAM, SRAM, PROM, EPROM, EEPROM, flash memory, ferroelectric memory, SONOS memory, polymer memory, such as ferroelectric polymer memory, nanowires, FeTRAM or FeRAM, bidirectional memory, nanowires, EEPROM, phase change memory, memristors, STT-MRAM, 3D XPoint TMa magnetic card or an optical card, a series of devices such as a RAID drive, a solid state memory device, a SSD, a HDD, or any other type of storage medium suitable for storing information.

[0067] In some examples, the communication interface 1060 can include logic and / or features to support the communication interface. For these examples, the communication interface 1060 can include one or more communication interfaces that operate in accordance with various communication protocols or standards to communicate over direct or network communication links. Direct communication can occur through a direct interface via use of a communication protocol or standard described in one or more industry standards, including progeny and variants (e.g., standards associated with the SMBus specification, the PCIe specification, the NVMe specification, the SATA specification, the SAS specification, or the USB specification). Network communication can occur via a network interface via use of a communication protocol or standard described in one or more Ethernet standards published by the IEEE (e.g., IEEE 802.3-2012, Carrier Sense Multiple Access with Collision Detection (CSMA / CD) Access Method and Physical Layer Specifications, published December 2012 (hereinafter “IEEE 802.3”).

[0068] The computing platform 1000 can be part of a computing device, which can be, for example, a user device, a computer, a personal computer (PC), a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, a smartphone, an embedded electronic device, a gaming terminal, a server, a server array or server farm, a web server, an Internet server, a work station, a mini-computer, a mainframe computer, a supercomputer, a network appliance, a web appliance, a distributed computing system, multiprocessor system, processor-based system, or combination thereof. As such, the functionality and / or the specific configuration of the computing platform 1000 described herein can be included or omitted, as suitably desired, in various embodiments of the computing platform 1000.

[0069] The components and features of the computing platform 1000 can be implemented using any combination of discrete circuitry, ASICs, logic gates and / or single chip architectures. Further, the features of the computing platform 1000 can be implemented using microcontrollers, programmable logic arrays and / or microprocessors or any combination thereof, as suitably desired. Note that the hardware, firmware and / or software elements of the computing platform 1000 can be centrally or remotely located.

[0070] One or more aspects of at least one example can be implemented by representative instructions stored on at least one machine-readable medium which represents various logic within the processor, which when read by a machine, computing device or system causes the machine, computing device or system to fabricate logic to perform the techniques described herein. Such representations can be stored on a tangible, machine readable medium and supplied to various customers or manufacturing facilities to load into the fabrication machines that actually make the logic or processor.

[0071] Various examples can be implemented using either hardware elements, software elements, or combinations of both. In some examples, hardware elements can include devices, components, processors, microprocessors, circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, etc.), integrated circuits, ASICs, PLDs, DSPs, FPGAs, memory units, logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. In some examples, software elements can include software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software components, routines, subroutines, functions, methods, procedures, software interfaces, APIs, instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an example is implemented using hardware elements and / or software elements can vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints, as desired for a given implementation.

[0072] Some examples can include an article of manufacture or at least one computer-readable medium. A computer-readable medium can include a non-transitory storage medium to store logic. In some examples, a non-transitory storage medium can include one or more types of computer-readable storage media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writeable or re-writeable memory, and so forth. In some examples, the logic can include various software elements, such as software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, APIs, instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof.

[0073] According to some examples, a computer-readable medium can include a non-transitory storage medium to store or maintain instructions that, when executed by a machine, computing device or system, cause the machine, computing device or system to perform methods and / or operations according to the described examples. The instructions can include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. The instructions can be implemented according to a predefined computer language, manner or syntax, for instructing the machine, computing device or system to perform a certain function. The instructions can be implemented using any suitable high-level, low-level, object-oriented, visual, compiled and / or interpreted programming language.

[0074] Some examples can be described using the expression "one or more example" or "an example" along with their derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with the example is included in at least one example. The appearances of the phrase "in one example" in various places in the specification are not necessarily all referring to the same example.

[0075] Some examples can be described using the expression "coupled" and "connected" along with their derivatives. These terms are not necessarily intended as synonyms for each other. For example, descriptions using the terms "connected" and / or "coupled" can indicate that two or more elements are in direct physical or electrical contact with each other. On the other hand, the term "coupled" can also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other.

[0076] The following examples pertain to further examples of the technology disclosed herein.

[0077] Example 1. An example apparatus comprising: two or more memory devices; and a storage controller comprising logic to: receive an atomic multi-media write transaction request to write first data and second data; and simultaneously and atomically cause the first data to be stored in a first memory device and the second data to be stored in a second memory device.

[0078] Example 2. The apparatus of example 1, comprising the apparatus coupled with a host computing platform, wherein a source of the atomic multi-media write transaction request is at least one of an application and an operating system executing at the host computing platform.

[0079] Example 3. The apparatus of example 1, wherein the memory devices comprise non-volatile memory.

[0080] Example 4. The apparatus of example 3, wherein the first memory device comprises NAND memory and the second memory device comprises power-protected DRAM memory.

[0081] Example 5. The apparatus of example 3, wherein the first memory device comprises NAND memory and the second memory device comprises 3D XPoint TM memory.

[0082] Example 6. The apparatus of example 1, wherein the first data comprises primary user data and the second data comprises metadata associated with storage of the first data.

[0083] Example 7. The apparatus of example 1, wherein causing the first data to be stored in the first device comprises performing a first write media operation to cause the first data to be stored in a first namespace of a first granularity in the first memory device, and wherein causing the second data to be stored in the second device comprises performing a second write media operation to cause the second data to be stored in a second namespace of a second granularity in the second memory device.

[0084] Example 8. The apparatus of example 1, further comprising a power loss imminent (PLI) power protection component to complete an atomic multi-media transaction request upon a power interruption of the apparatus.

[0085] Example 9. The apparatus of example 1, wherein the logic comprises: a request component to receive an atomic multi-media write transaction request to write first data and second data; a store data component to store the first data in the first memory device; a store metadata component to store the second data in the second memory device; and a power failure component to cause the first data and the second data to be retained following a detected power failure event.

[0086] Example 10. An example method comprising: receiving, at a storage controller of a storage device, an atomic multi-media write transaction request to write first data and second data to a first memory device and a second memory device, respectively; sending, to a source of the atomic multi-media write transaction request, an indication of completion of the atomic multi-media write transaction request; and simultaneously and atomically causing the first data to be stored in the first memory device and the second data to be stored in the second memory device.

[0087] Example 11. The method of example 10, comprising receiving a power loss event, and wherein simultaneously and atomically causing the first data to be stored in the first memory device and the second data to be stored in the second memory device comprises storing the first data and the second data using, at least in part, a power loss imminent (PLI) power protection component.

[0088] Example 12. The method of example 10, wherein the storage device is coupled with a host computing platform, and wherein the source of the atomic multi-media write transaction request is at least one of an application and an operating system executing at the host computing platform.

[0089] Example 13. The method of example 10, wherein the first data comprises host user data and the second data comprises metadata associated with storage of the first data.

[0090] Example 14. The method of example 10, wherein causing the first data to be stored in the first device comprises performing a first write media operation to cause the first data to be stored in a first namespace of a first granularity in the first memory device, and wherein causing the second data to be stored in the second device comprises performing a second write media operation to cause the second data to be stored in a second namespace of a second granularity in the second memory device.

[0091] Example 15. An example system comprising: a processor to execute one or more applications of a host computing platform; and a storage device coupled with the host computing platform, the storage device comprising: two or more memory devices; and a storage controller comprising logic to: receive an atomic multi-media write transaction request to write first data and second data; and cause the first data to be stored in a first memory device and the second data to be stored in a second memory device simultaneously and atomically.

[0092] Example 16. The system of example 15, wherein a source of the atomic multi-media write transaction request is at least one of an application and an operating system executing at the host computing platform.

[0093] Example 17. The system of example 15, wherein the first memory device comprises NAND memory and the second memory device comprises power-protected DRAM memory.

[0094] Example 18. The system of example 15, wherein the first memory device comprises NAND memory and the second memory device comprises phase change memory.

[0095] Example 19. The system of example 15, further comprising a power loss imminent (PLI) power protection component to complete the atomic multi-media transaction request upon a power interruption of the device.

[0096] Example 20. The system of example 15, wherein the logic comprises: a request component to receive an atomic multi-media write transaction request to write first data and second data; a store data component to store the first data in a first memory device; a store metadata component to store the second data in a second memory device; and a power failure component to cause the first data and the second data to be retained following a detected power failure event.

[0097] Example 21. An example method comprising: receiving, at a storage controller of a storage device, an atomic multi-media write transaction request to write first data and second data to a first memory device and a second memory device, respectively; reading temporary metadata from the second memory device based at least in part on a starting address in a namespace of the second memory device and a number of words of the second data; storing the first data in the first memory device and the second data in the second memory device simultaneously and atomically; and sending an indication of completion of the atomic multi-media write transaction request to a source of the atomic multi-media write transaction request when both the first data and the second data are stored.

[0098] Example 22. The method of example 21, comprising: receiving a power loss event while storing the first data in the first memory device and the second data in the second memory device simultaneously and atomically; determining whether the atomic multi-media write transaction is pending; determining whether the storing of the first data is complete when the atomic write transaction is pending; and sending the indication of completion of the atomic multi-media write transaction request to the source of the atomic multi-media write transaction request when the storing of the first data is complete and the storing of the second data is at least partially using a power loss imminent (PLI) power protection component.

[0099] Example 23. The method of example 21, further comprising: when the storing of the first data is not complete: discarding the first data from the first memory device; sending the indication of completion of the atomic multi-media write transaction request to the source of the atomic multi-media write transaction request when the storing of the second data is complete at least partially using a power loss imminent (PLI) power protection component; and storing the temporary metadata at the starting address in the second memory device.

[0100] Example 24. The method of example 21, wherein the first data comprises primary user data and the second data comprises metadata associated with the storing of the first data.

[0101] Example 25. An example of at least one machine readable medium can include a plurality of instructions to cause a system, responsive to execution of the instructions at a storage device, to perform the method according to any of examples 10-15 and 21-24.

[0102] Example 26. An example apparatus can include means for performing the method of any of examples 10-15 and 21-24.

[0103] It is emphasized that the Abstract of the disclosure is provided to comply with 37 C.F.R. § 1.72(b) requiring an abstract that will allow the reader to quickly ascertain the nature of the technical disclosure. It is proposed that it is used to interpret or limit the scope or meaning of the claims. Furthermore, in the preceding detailed description, it can be seen that various features are grouped together in a single example for the purpose of streamlining the disclosure. This disclosure of a method should not be interpreted as reflecting an intention that the claimed example require more features than are explicitly recited in each claim. Rather, as the appended claims reflect, inventive subject matter lies in fewer than all features of a single disclosed example. Thus, the following claims are hereby incorporated into the detailed description, where each claim independently represents a separate example. In the appended claims, the terms "including," "including a," "has," and "has a" are used as the plain English equivalents of the respective terms "comprising," "comprising a," "has," and "has a." Also, the terms "first," "second," "third," etc. are simply labels to the names of elements and are not intended to impose numerical requirements on their objects.

[0104] Although the subject matter has been described in language specific to structural features and / or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims

1. An apparatus for storing data, comprising: a block-addressable NAND non-volatile memory device having a first write speed and a first namespace having a first write granularity; a byte-addressable 3-dimensional cross-point non-volatile memory device having a second write speed faster than the first write speed and a second namespace having a second write granularity smaller than the first write granularity; and a storage controller including logic to: receive an atomic multi-media write transaction request to write user data and metadata associated with storage of the user data; and store the user data in the block-addressable NAND non-volatile memory device and the metadata in the byte-addressable 3-dimensional cross-point non-volatile memory device simultaneously and atomically, and roll back the storage of the user data and the metadata when the storage of the user data or the storage of the metadata indicates a failure, or when a power failure occurs for at least one of the block-addressable NAND non-volatile memory device and the byte-addressable 3-dimensional cross-point non-volatile memory device that does not have a power-fail imminent capability. The source of the atomic multi-media write transaction request is at least one of an application and an operating system executing at the host computing platform.

2. The apparatus of claim 1, comprising the apparatus coupled with a host computing platform, wherein, 3. The apparatus of claim 1, further comprising a power-fail imminent power protection component to complete the atomic multi-media write transaction request upon a disruption of power to the apparatus. The logic includes:

4. The apparatus of claim 1, wherein, a request component to receive the atomic multi-media write transaction request to write the user data and the metadata; a store data component to store the user data in the block-addressable NAND non-volatile memory device; a store metadata component to store the metadata in the byte-addressable 3-dimensional cross-point non-volatile memory device; and a power failure component to cause the user data and the metadata to be preserved following a detected power failure event.

5. A method for storing data, comprising: receiving, at a storage controller of a storage device, an atomic multi-media write transaction request to write user data to a block-addressable NAND non-volatile memory device having a first write speed and a first namespace having a first write granularity, and to write metadata to a byte-addressable 3-dimensional cross-point non-volatile memory device having a second write speed faster than the first write speed and a second namespace having a second write granularity smaller than the first write granularity; sending an indication of completion of the atomic multi-media write transaction request to a source of the atomic multi-media write transaction request; and and ​ atomically storing the user data in the block-addressable NAND non-volatile memory device and the metadata in the byte-addressable 3-dimensional cross-point non-volatile memory device, and rolling back the storing of the user data and the metadata when the storing of the user data or the storing of the metadata indicates a failure, or when a power failure occurs for at least one of the block-addressable NAND non-volatile memory device without power-fail imminent capability and the byte-addressable 3-dimensional cross-point non-volatile memory device without power-fail imminent capability.

6. The method of claim 5, comprising receiving a power down event, and wherein, atomically storing the user data in the block-addressable NAND non-volatile memory device and the metadata in the byte-addressable 3-dimensional cross-point non-volatile memory device includes storing the user data and the metadata using, at least in part, a power-fail imminent power protection component.

7. The method of claim 5, wherein, The storage device is coupled with a host computing platform, and wherein the source of the atomic multi-media write transaction request is at least one of an application and an operating system executing at the host computing platform.

8. A system for storing data, comprising: a processor for a host computing platform to execute one or more applications; and a storage device coupled with the host computing platform, the storage device comprising: a block-addressable NAND non-volatile memory device having a first write speed, and a first namespace having a first write granularity; a byte-addressable 3-dimensional cross-point non-volatile memory device having a second write speed faster than the first write speed, and a second namespace having a second write granularity smaller than the first write granularity; and a storage controller comprising logic to: receive an atomic multi-media write transaction request to write user data and metadata associated with the storing of the user data; and atomically store the user data in the block-addressable NAND non-volatile memory device and the metadata in the byte-addressable 3-dimensional cross-point non-volatile memory device, and roll back the storing of the user data and the metadata when the storing of the user data or the storing of the metadata indicates a failure, or when a power failure occurs for at least one of the block-addressable NAND non-volatile memory device without power-fail imminent capability and the byte-addressable 3-dimensional cross-point non-volatile memory device without power-fail imminent capability.

9. The system of claim 8, wherein, The source of the atomic multi-media write transaction request is at least one of an application and an operating system executing at the host computing platform.

10. At least one machine readable medium comprising a plurality of instructions to cause a system, in response to execution of the instructions by the system, to perform the method of any one of claims 5 to 7.

11. An apparatus for storing data, comprising means for performing the method of any one of claims 5 to 7.

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