A μLED current mode pixel driving circuit system

Abstract

The present invention provides a micro-LED (μLED) current-mode pixel drive circuit system, comprising: a reference current generating circuit, a pixel current driving unit, an 8-bit SRAM unit, a counter, and a comparator. The pixel current driving unit comprises a cascaded current mirror circuit and a switch control tube; the current of the cascaded current mirror circuit is the same as that of the reference current generating circuit. The comparator compares the data stored in the 8-bit SRAM unit with the data in the counter, converts the 8-bit pixel grayscale signal into a PWM signal, and controls the switch control tube via the PWM signal, thereby achieving PWM current control of the μLED brightness. The present invention can accurately copy the constant current of the reference current generating circuit to the cascaded current mirror circuit, and control the on-off time of the switch control tube via the PWM signal generated by the comparator, thereby achieving pulse modulation of the current. This improves the problems of increased difficulty in display brightness control and uneven display caused by traditional voltage control circuits, and can achieve better display effects and contrast.

Description

Technical Field

[0001] The present invention relates to the technical field of drive circuits, and in particular to a μLED current mode pixel drive circuit system. Background Art

[0002] An LED driver is a power converter that converts power to a specific voltage and current to drive LEDs. Most LED driver outputs are constant current sources whose voltage varies with the LED's forward voltage drop. There are two common drive methods: one constant voltage source powers multiple constant current sources, each of which independently powers each LED. This flexible combination allows for the failure of one LED without affecting the operation of the others.

[0003] Driving methods include constant current, voltage regulation, and pulse drive. A constant current drive circuit outputs a constant current, while the output DC voltage varies within a certain range depending on the load resistance. Small load resistance results in a low output voltage, while large load resistance results in a high output voltage. Constant current drive circuits are ideal for driving LEDs. With voltage regulation, once all parameters in the voltage regulation circuit are determined, the output voltage remains fixed, while the output current varies with load changes. Pulse drive: Many LED applications require dimming, such as LED backlighting or architectural lighting. Dimming can be achieved by adjusting the LED's brightness and contrast. While reducing the device current may adjust the LED's light output, operating the LED below its rated current can result in numerous adverse effects, such as color shift. An alternative to simple current regulation is to integrate a pulse-width modulation (PWM) controller into the LED driver. The PWM signal doesn't directly control the LED, but rather controls a switch, such as a MOSFET, to provide the required current to the LED. PWM controllers typically operate at a fixed frequency and adjust the pulse width to match the desired duty cycle. Most current LED chips use PWM to control LED light. To prevent noticeable flicker, the PWM pulse frequency must be greater than 100 Hz. The main advantage of PWM control is that it allows for more precise dimming current, minimizing color variation in LED light.

[0004] Based on the above driving methods, according to the current and voltage characteristics of LED, it is more ideal to use constant current drive, which can avoid the change of LED forward voltage causing current fluctuation. Constant current makes the brightness of LED more stable.

[0005] However, in traditional LEDs, constant current control is usually used, and the constant current is usually directly connected to the LED, which inevitably causes the current to fluctuate or even fluctuate greatly during LED operation. This will make the display brightness difficult to control and uneven. Summary of the Invention

[0006] In order to overcome the above problems, the present invention aims to provide a μLED current mode pixel driving circuit system to achieve a constant current of the driving circuit and accurately control the on and off of the driving circuit through a PWM signal.

[0007] In order to achieve the above object, the present invention provides a μLED current mode pixel driving circuit system, which includes: a reference current generating circuit, a pixel current driving unit, a counter, an 8-bit SRAM unit and a comparator;

[0008] A reference current generating circuit, used for generating a reference current;

[0009] The pixel current driving unit includes a cascade current mirror circuit and a switch control tube; the cascade current mirror circuit serves as a mirror branch of a reference current generating circuit and maintains the same current as the reference current generating circuit; the reference current generating circuit is a constant current circuit;

[0010] The comparator compares the data stored in the 8-bit SRAM unit with the signal data of the counter, and converts the 8-bit pixel grayscale information data into a PWM signal; the PWM signal controls the on-off time of the switch control tube.

[0011] Preferably, the cascade current mirror circuit specifically includes: a zeroth MOS transistor, a first MOS transistor, and a second MOS transistor connected in series, wherein the zeroth MOS transistor is connected to a power supply, the second MOS transistor is connected to a μLED, and the first MOS transistor is sandwiched between the zeroth MOS transistor and the second MOS transistor; and the gate terminal of the first MOS transistor is connected to the SRAM unit.

[0012] In some embodiments, the counter uses a RAMP generator, and the PWM signal is output through a 1-bit SRAM output; wherein,

[0013] One end of the 8-bit SRAM unit is connected to the comparator, and the other end is connected to the image signal end;

[0014] The RAMP generator is connected to the comparator;

[0015] The comparator receives and compares the frame signal from the 8-bit SRAM unit and the ramp signal of the RAMP generator; when the frame signal and the ramp signal are the same, sends a 1-bit PWM signal to the 1-bit SRAM output;

[0016] The 1-bit SRAM output device is connected to the comparator, receives the 1-bit PWM signal from the comparator and sends it to the gate terminal of the first MOS transistor;

[0017] After the gate terminal of the first MOS transistor receives a signal from the 1-bit SRAM, the first MOS transistor is turned on or off.

[0018] In some embodiments, the reference current generating circuit specifically includes: a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor connected in series; wherein the fifth MOS transistor is connected to a power supply, the third MOS transistor is connected to a reference current, and the fourth MOS transistor is grounded; the fourth MOS transistor is sandwiched between the third MOS transistor and the fifth MOS transistor; the gate terminal of the third MOS transistor is connected to the gate terminal of the second MOS transistor; and the gate terminal of the fifth MOS transistor is connected to the gate terminal of the zeroth MOS transistor.

[0019] In some embodiments, the zeroth MOS transistor, the first MOS transistor, the second MOS transistor, the fifth MOS transistor, the fourth MOS transistor, and the third MOS transistor are all MOS transistors of the same type.

[0020] In some embodiments, the zeroth MOS transistor, the first MOS transistor, the second MOS transistor, the fifth MOS transistor, the fourth MOS transistor, and the third MOS transistor are all PMOS transistors.

[0021] In some embodiments, the third MOS transistor is further connected to a reference current source; one end of the reference current source is grounded, and the other end is connected to the gate and source ends of the third MOS transistor.

[0022] In some embodiments, the gate terminal of the fifth MOS transistor is connected to the drain terminal of the fourth MOS transistor.

[0023] In some embodiments, the drain terminal of the zeroth MOS transistor is connected to a power supply, the source terminal of the zeroth MOS transistor is connected to the drain terminal of the first MOS transistor, the source terminal of the first MOS transistor is connected to the drain terminal of the second MOS transistor, and the source terminal of the second MOS transistor is connected to a μLED.

[0024] In some embodiments, the drain terminal of the fifth MOS transistor is connected to a power supply, the source terminal of the fifth MOS transistor is connected to the drain terminal of the fourth MOS transistor, and the drain terminal of the fourth MOS transistor is connected to the source terminal of the third MOS transistor.

[0025] In some embodiments, the reference current generating circuit is located outside the pixel, and the cascade current mirror circuit is located inside the pixel.

[0026] In some embodiments, there is one reference current generating circuit, and there are multiple cascade current mirror circuits, and the multiple cascade current mirror circuits are connected to the μLED array.

[0027] The μLED current-mode pixel driving circuit system of the present invention can accurately copy the constant current of the reference current generating circuit to the cascade current mirror circuit, and control the on-off time of the switch control tube through the PWM signal generated by the comparator, thereby realizing pulse modulation of the current, improving the problems of increased difficulty in display brightness control and uneven display caused by traditional voltage control circuits, and can obtain better display effects and contrast. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of the structure of a μLED current mode pixel driving circuit system according to an embodiment of the present invention DETAILED DESCRIPTION

[0029] To make the content of the present invention more clear and understandable, the content of the present invention is further described below in conjunction with the accompanying drawings. Of course, the present invention is not limited to this specific embodiment, and general replacements known to those skilled in the art are also included in the scope of protection of the present invention.

[0030] The μLED current mode pixel driving circuit system of the present invention includes: a reference current generating circuit, a pixel current driving unit, a counter, an 8-bit SRAM unit, and a comparator. The reference current generating circuit is used to generate a reference current; the pixel current and driving unit includes a cascade current mirror circuit and a switch control tube. The cascade current mirror circuit serves as a mirror branch of the reference current generating circuit and maintains the same current as the reference current generating current. The reference current generating circuit is a constant current circuit; the comparator compares the data stored in the 8-bit SRAM unit with the signal data of the counter and converts the 8-bit pixel grayscale information data into a PWM signal; the PWM signal controls the on-off time of the switch control tube. The cascade current mirror circuit can accurately replicate the constant current of the reference current circuit and control the on-off time of the switch control tube through the PWM signal generated by the comparator, thereby realizing PWM current control of the brightness of the μLED.

[0031] The following is combined with Figure 1 It should be noted that the drawings are in very simplified form and not in exact proportions, and are only used for the purpose of assisting in explaining the present embodiment in a convenient and clear manner.

[0032] See also Figure 1 , along the dotted line in the figure, the reference current generating circuit ( Figure 1 Left) and cascade current mirror circuit ( Figure 1On the right side of the dotted line, the reference current generating circuit and the cascaded current mirror circuit are symmetrically arranged. That is, the fifth MOS transistor M5 corresponds to the zeroth MOS transistor M0, the third MOS transistor M3 corresponds to the second MOS transistor M2, and the fourth MOS transistor M4 corresponds to the first MOS transistor M1, thereby forming a cascade circuit.

[0033] Here, the fifth MOS transistor M5 is connected to the power supply VDDP, the third MOS transistor M3 is connected to the reference current, and the fourth MOS transistor M4 is grounded. The fourth MOS transistor M4 is sandwiched between the third MOS transistor M3 and the fifth MOS transistor M5. The gate terminal of the third MOS transistor M3 is connected to the gate terminal of the second MOS transistor M2; the gate terminal of the fifth MOS transistor M5 is connected to the gate terminal of the zeroth MOS transistor M0. Here, the third MOS transistor M3 is also connected to a reference current source IREF. One end of the reference current source IREF is grounded, and the other end is connected to the gate and source terminals of the third MOS transistor M3. The gate terminal of the fifth MOS transistor M5 is connected to the drain terminal of the fourth MOS transistor M4. The drain terminal of the fifth MOS transistor M5 is connected to the power supply VDDP, the source terminal of the fifth MOS transistor M5 is connected to the drain terminal of the fourth MOS transistor M4, and the drain terminal of the fourth MOS transistor M4 is connected to the source terminal of the third MOS transistor M3.

[0034] Correspondingly, the zeroth MOS transistor M0 is connected to the power supply VDDP, the second MOS transistor M2 is connected to the μLED, and the first MOS transistor M1 is sandwiched between the zeroth MOS transistor M0 and the second MOS transistor M2. The gate terminal of the first MOS transistor M1 is connected to the SRAM unit. The drain terminal of the zeroth MOS transistor M0 is connected to the power supply VDDP, the source terminal of the zeroth MOS transistor M0 is connected to the drain terminal of the first MOS transistor M1, the source terminal of the first MOS transistor M1 is connected to the drain terminal of the second MOS transistor M2, and the source terminal of the second MOS transistor M2 is connected to the μLED.

[0035] Here, the zeroth MOS transistor M0, the first MOS transistor M1, the second MOS transistor M2, the fifth MOS transistor M5, the fourth MOS transistor M4, and the third MOS transistor M3 are all MOS transistors of the same type, for example Figure 1 The PMOS tube is shown in FIG.

[0036] Next, please refer to Figure 1 Specifically, let's look at the 8-bit SRAM unit 201, counter 202, and comparator 203 of this embodiment. 8-bit SRAM unit 201, RAMP generator (counter 202), comparator 203, 1-bit SRAM output 204. One end of the 8-bit SRAM unit 201 is connected to the comparator 203, and the other end is connected to the image signal end.

[0037] The RAMP generator (counter 202) is connected to the comparator 203; the comparator 203 receives and compares the frame signal from the 8-bit SRAM unit 201 and the ramp signal from the RAMP generator (counter 202); when the frame signal and the ramp signal are the same, a 1-bit PWM signal is sent to the 1-bit SRAM output 204; the 1-bit SRAM output 204 is connected to the comparator 203, receives the 1-bit PWM signal from the comparator 203 and sends it to the gate terminal of the first MOS transistor M1.

[0038] After the gate terminal of the first MOS transistor M1 receives a signal from the 1-bit SRAM, the first MOS transistor M1 is turned on or off.

[0039] like Figure 1 As shown in FIG. 1 , in the relative positions of the reference current generating circuit and the cascade current mirror circuit, the reference current generating circuit is located outside the pixel, and the cascade current mirror circuit is located inside the pixel.

[0040] Furthermore, in other embodiments of the present invention, there is one reference current generating circuit, and there are multiple cascaded current mirror circuits, which are connected to the μLED array, for example, each circuit is connected to one pixel.

[0041] In summary, the present invention can accurately copy the constant current of the reference current generating circuit to the cascade current mirror circuit, and control the on-off time of the switch control tube through the PWM signal generated by the comparator, thereby realizing pulse modulation of the current, improving the problems of increased difficulty in controlling the display brightness and uneven display caused by the traditional voltage control circuit, and being able to obtain better display effect and contrast.

[0042] Although the present invention has been disclosed above with reference to preferred embodiments, the embodiments are merely examples for the purpose of illustration and are not intended to limit the present invention. Those skilled in the art may make various modifications and alterations without departing from the spirit and scope of the present invention. The scope of protection claimed by the present invention shall be subject to the claims.

Claims

1. A μLED current mode pixel driving circuit system, characterized in that: include: Reference current generating circuit, pixel current driving unit, counter, 8-bit SRAM unit and comparator; A reference current generating circuit, used for generating a reference current; The pixel current driving unit includes a cascade current mirror circuit and a switch control tube; the cascade current mirror circuit serves as a mirror branch of the reference current generating circuit and maintains the same current as the reference current generating circuit; The reference current generating circuit is a constant current circuit; The comparator compares the data stored in the 8-bit SRAM unit with the signal data of the counter, and converts the 8-bit pixel grayscale information data into a PWM signal; The PWM signal controls the on and off time of the switch control tube; The cascade current mirror circuit specifically includes: a zeroth MOS transistor, a first MOS transistor, and a second MOS transistor connected in series, wherein the zeroth MOS transistor is connected to a power supply, the second MOS transistor is connected to a μLED, and the first MOS transistor is sandwiched between the zeroth MOS transistor and the second MOS transistor; the gate terminal of the first MOS transistor is connected to the SRAM unit; the counter uses a RAMP generator, and the PWM signal is output through a 1-bit SRAM output device; wherein, One end of the 8-bit SRAM unit is connected to the comparator, and the other end is connected to the image signal end; The RAMP generator is connected to the comparator; The comparator receives and compares the frame signal from the 8-bit SRAM unit and the ramp signal of the RAMP generator; when the frame signal and the ramp signal are the same, sends a 1-bit PWM signal to the 1-bit SRAM output device; The 1-bit SRAM output device is connected to the comparator, receives the 1-bit PWM signal from the comparator and sends it to the gate terminal of the first MOS transistor; After the gate end of the first MOS tube receives the signal from the 1-bit SRAM, the first MOS tube is turned on or off; there are multiple cascade current mirror circuits, and the multiple cascade current mirror circuits are connected to the μLED array.

2. The μLED current mode pixel driving circuit system according to claim 1, wherein: The reference current generating circuit specifically includes: a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor connected in series; wherein the fifth MOS transistor is connected to a power supply, the third MOS transistor is connected to a reference current, and the fourth MOS transistor is grounded; the fourth MOS transistor is sandwiched between the third and fifth MOS transistors; the gate terminal of the third MOS transistor is connected to the gate terminal of the second MOS transistor; and the gate terminal of the fifth MOS transistor is connected to the gate terminal of the zeroth MOS transistor.

3. The μLED current mode pixel driving circuit system according to claim 2, wherein: The zeroth MOS transistor, the first MOS transistor, the second MOS transistor, the fifth MOS transistor, the fourth MOS transistor, and the third MOS transistor are all MOS transistors of the same type.

4. The μLED current mode pixel driving circuit system according to claim 2, wherein: The zeroth MOS transistor, the first MOS transistor, the second MOS transistor, the fifth MOS transistor, the fourth MOS transistor, and the third MOS transistor are all PMOS transistors.

5. The μLED current mode pixel driving circuit system according to claim 2, wherein: The third MOS transistor is further connected to a reference current source; one end of the reference current source is grounded, and the other end is connected to the gate end and the source end of the third MOS transistor.

6. The μLED current mode pixel driving circuit system according to claim 2, wherein: The gate terminal of the fifth MOS transistor is connected to the drain terminal of the fourth MOS transistor.

7. The μLED current mode pixel driving circuit system according to claim 2, wherein: The drain terminal of the zeroth MOS transistor is connected to the power supply, the source terminal of the zeroth MOS transistor is connected to the drain terminal of the first MOS transistor, the source terminal of the first MOS transistor is connected to the drain terminal of the second MOS transistor, and the source terminal of the second MOS transistor is connected to the μLED.

8. The μLED current mode pixel driving circuit system according to claim 2, wherein: The drain end of the fifth MOS transistor is connected to the power supply, the source end of the fifth MOS transistor is connected to the drain end of the fourth MOS transistor, and the drain end of the fourth MOS transistor is connected to the source end of the third MOS transistor.

9. The μLED current mode pixel driving circuit system according to claim 1, wherein: The reference current generating circuit is located outside the pixel, and the cascade current mirror circuit is located inside the pixel.

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