Drive control circuit and air conditioner
By designing a driving control circuit including inverter bridge, bus capacitor, reactor, sampling circuit, comparison circuit and control chip, the series-connected surge absorption circuit structure is used to solve the problem of insufficient surge absorption capacity in the prior art, efficient surge signal absorption and voltage reduction are achieved, and component life is extended.
Patent Information
- Application Number
- CN201910447793.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-01-16
- Filing Date
- 2019-05-27
- Publication Date
- 2025-06-20
- Estimated Expiration
- 2039-05-27
AI Technical Summary
In the prior art, the filter module in the AC-DC-AC topology uses a larger capacity of electrolytic capacitors, resulting in an increase in the THD of the input AC current, a shorter life of the electrolytic capacitor, affecting the controller efficiency, and the surge absorption capacity of the electrolytic capacitorless control scheme is insufficient, affecting control stability.
A driving control circuit is designed, including an inverter bridge, bus capacitor, reactor, sampling circuit, comparison circuit and control chip. By connecting the first surge absorption circuit and the second surge absorption circuit in series, the circuit structure composed of switching elements and resistive elements can be quickly absorbed, the high-voltage bus voltage is reduced, and components are avoided.
Effectively absorb surge signals, reduce high-voltage bus voltage, extend the life of circuit components, and improve the stability and efficiency of the controller.
Smart Images

Figure CN110071624B_ABST
Abstract
Description
[0001] This application claims the priority of the Chinese patent application filed with the China Patent Office on January 16, 2019, with application number 201910041249.X and invention name “Drive Control Circuit and Air Conditioner”, the entire contents of which are incorporated by reference in this application. Technical Field
[0002] The present invention relates to the field of circuit technology, and in particular to a drive control circuit and an air conditioner. Background Art
[0003] For example, three-phase load devices such as compressors, motors, and engines use an AC-DC-AC topology. Specifically, the AC-DC-AC topology is Figure 1 As shown, it includes: an AC power supply module, a power filter module, a rectifier module, a filter module, an inverter module and a load.
[0004] Since the filter module needs to smooth the rectified power frequency signal, a large-capacity electrolytic capacitor is often used as the main filter element. However, the use of electrolytic capacitors will increase the THD (Total Harmonic Distortion) of the input AC current, and its short lifespan affects the lifespan of the controller. In addition, the heat generated by the electrolytic capacitor reduces the efficiency of the controller.
[0005] As the cost and reliability requirements increase, the electrolytic capacitor capacity is reduced and even the electrolytic capacitor-free control solution is gradually mature. For the electrolytic capacitor-free control solution, a smaller film capacitor is generally used to replace the electrolytic capacitor. Due to the reduction in busbar capacitance, the surge absorption capacity becomes worse, and its defects are mainly reflected in the following two aspects:
[0006] 1. Film capacitors or smaller electrolytic capacitors have limited surge absorption, resulting in excessive bus voltage and damage to components.
[0007] 2. Film capacitors or smaller electrolytic capacitors have limited surge absorption. If a surge voltage is input during normal operation of the prototype, the bus voltage will change dramatically in an instant, affecting control stability. Summary of the invention
[0008] The present invention aims to solve at least one of the technical problems existing in the prior art or related art.
[0009] To this end, a first aspect of the present invention is to provide a drive control circuit.
[0010] A second aspect of the present invention is to provide an air conditioner.
[0011] In view of this, according to the first aspect of the present invention, a drive control circuit is proposed, including: an inverter bridge, which is used to drive and control the operation of a load, and the inverter bridge is connected between a high-voltage bus and a low-voltage bus; a bus capacitor, which is used to provide the starting voltage required for the load to be powered on, and the bus capacitor is also used to absorb the surge signal, and the bus capacitor is connected to the bus line on the input side of the inverter bridge; a reactor, which is used to absorb the surge signal generated during the operation of the drive control circuit to drive the load, and the reactor is connected between the power grid and the load; a sampling circuit, which is used to collect power supply signals; a first surge absorption circuit, the first surge absorption circuit includes: a first resistive element and a switching element, and the switching element is configured to control the first resistive element to absorb the surge signal on the bus, and the first resistive element and the switching element are connected in series and then connected in series between the high-voltage bus and the low-voltage bus; a comparison circuit, which is used to detect and confirm that the power supply signal is greater than or equal to a preset voltage and trigger the interrupt port of the control chip, and the comparison circuit is connected to the sampling circuit; a control chip, which is used to control the switching element to work at different carrier frequencies or different duty cycles according to the number of times the interrupt port is triggered within a preset time, and the control chip is respectively connected to the switching element and the comparison circuit.
[0012] The drive control circuit according to the embodiment of the present invention includes: an inverter bridge, a bus capacitor, a reactor, a comparison circuit, a control chip, and a first surge absorption circuit composed of a first resistive element and a switching element. Among them, the inverter bridge drives and controls the operation of the load, such as controlling the operation of a motor. Since the capacitance value of the bus capacitor is low, the surge signal formed on the high-voltage bus cannot be ensured to be completely absorbed. Therefore, a first surge absorption circuit composed of a first resistive element and a switching element is connected in series between the high-voltage bus and the low-voltage bus, and a comparison circuit is set up to compare the power supply signal collected by the sampling circuit with a preset voltage. When the power supply signal is greater than or equal to the preset voltage, the interrupt port of the control chip is triggered, and the control chip controls the switching element to work at different carrier frequencies or different duty cycles according to the number of times the interrupt port is triggered, that is, by adjusting the working frequency of the switching element, the surge signal can be quickly absorbed within a short time, and then the voltage of the high-voltage bus can be quickly reduced to avoid damage to the components in the drive control circuit.
[0013] Among them, the carrier frequency and the duty cycle can be preset fixed values or adjustable variable values.
[0014] It should be noted that, for the convenience of controlling the surge signal, a reactor is provided to absorb the surge signal generated during the operation of the load driven by the drive control circuit, thereby blocking the surge signal generated by the inverter bridge and the AC input side. When the bus voltage is greater than the preset voltage, the interrupt port of the control chip is triggered. For example, when it is detected that the bus voltage is greater than or equal to the first preset voltage 1, the interrupt port is triggered; when it is detected that the bus voltage is less than the first preset voltage 1, the triggering of the interrupt port is stopped.
[0015] According to the drive control circuit of the above embodiment of the present invention, the following technical features may also be included:
[0016] In any of the above technical solutions, further, the drive control circuit further includes: a second surge absorption circuit, and the second surge absorption circuit includes: a first capacitive element and a unidirectional conduction element. The unidirectional conduction element is configured to limit the first capacitive element from absorbing the surge signal on the high-voltage bus, and the first capacitive element is connected in series with the unidirectional conduction element.
[0017] In this technical solution, by providing the second surge absorption circuit composed of the first capacitive element and the unidirectional conduction element, when the unidirectional conduction element meets the conduction condition, the first capacitive element is used to absorb the surge signal on the high-voltage bus, thereby improving the surge absorption ability of the drive control circuit. Among them, the unidirectional conduction element is an element with unidirectional conduction characteristics, such as a diode.
[0018] In any of the above technical solutions, further, the second surge absorption circuit further includes: a second resistive element, and the second resistive element is used to release the surge signal in the first capacitive element, and the second resistive element is connected in parallel with the first capacitive element.
[0019] In this technical solution, after the first capacitive element absorbs the surge signal on the high-voltage bus, the second resistive element provided in parallel with the first capacitive element is used to release the surge signal in the first capacitive element, and the setting of the second resistive element improves the reliability of the drive control circuit.
[0020] In any of the above technical solutions, further, the second surge absorption circuit further includes: a second capacitive element, which is used to absorb the surge signal on the high-voltage bus, and the second capacitive element is connected in series with the first capacitive element.
[0021] In this technical solution, when the pressure on the high-voltage bus is relatively large, a second capacitive element is connected in series on the basis of the first capacitive element to improve the absorption ability of the surge signal on the high-voltage bus.
[0022] In any of the above technical solutions, further, the second surge absorption circuit further includes: a third resistive element, and the third resistive element is used to release the surge signal in the second capacitive element, and the third resistive element is connected in parallel with the second capacitive element.
[0023] In this technical solution, when the second capacitive element is provided, the third resistive element is provided to cooperate with the second resistive element to balance the voltages across the first capacitive element and the second capacitive element. At the same time, the third resistive element is also used to release the surge signal on the second capacitive element, thereby improving the reliability of the drive control circuit.
[0024] In any of the above technical solutions, further, the second surge absorption circuit further includes: a fourth resistive element for limiting the current flowing through the first capacitive element and / or the second capacitive element; the fourth resistive element, the first capacitive element, and the unidirectional conduction element are connected in series; or the fourth resistive element, the first capacitive element, the second capacitive element, and the unidirectional conduction element are connected in series.
[0025] In this technical solution, a fourth resistive element is further provided in the second surge absorption circuit. The fourth resistive element limits the current flowing through the second surge absorption circuit in the second surge absorption circuit, thereby improving the reliability of the drive control circuit. At the same time, the fourth resistive element also absorbs the surge signal in the second surge absorption circuit, thereby improving the surge signal absorption ability of the second surge absorption circuit. Further, the surge signal absorption ability of the drive control circuit is improved.
[0026] In any of the above technical solutions, further, the first surge absorption circuit further includes: a discharge element for releasing the surge signal in the first resistive element, and the discharge element is connected in parallel with the first resistive element.
[0027] In this technical solution, by providing the discharge element, after the first resistive element absorbs the surge signal on the high-voltage bus, the discharge element connected in parallel with the first resistive element is used to release the surge signal in the first resistive element. The provision of the discharge element improves the reliability of the drive control circuit.
[0028] In any of the above technical solutions, further, the control chip is specifically configured to: when the number of times the interrupt port is triggered within a preset time is once, control the switching element to operate at a first carrier frequency (with the same duty cycle) or a first duty cycle (with the same carrier); when the number of times the interrupt port is triggered within a preset time is twice, control the switching element to operate at a second carrier frequency (with the same duty cycle) or a second duty cycle (with the same carrier); wherein, the second carrier frequency is greater than the first carrier frequency or the second duty cycle is less than the first duty cycle.
[0029] In this technical solution, the control switch element operates at different carrier frequencies by detecting the number of times the interrupt port is triggered within a preset time. Further, since the number of times triggered within the preset time is relatively large, in order to reduce the risk of damage to the components in the drive control circuit, the carrier frequency of the control switch element is increased or the duty cycle of the switch element operation is reduced, thereby reducing the risk of component damage.
[0030] Furthermore, since the preset voltage is set to multiple values, when it is detected that the bus voltage is greater than or equal to the first preset voltage 1, that is, when the interrupt port is triggered once, the control switch element operates at the first carrier frequency. When the bus voltage gradually increases and it is detected that the bus voltage is greater than the first preset voltage 1, that is, when the interrupt port is triggered twice, the control switch element operates at the second carrier frequency, where the second carrier frequency is greater than the first carrier frequency, thereby achieving a rapid reduction in the voltage of the high-voltage bus to avoid damage to the components in the drive control circuit. When the bus voltage gradually increases again and it is detected that the bus voltage is greater than the first preset voltage 1, that is, when the interrupt port is triggered three times, the control switch element operates at the third carrier frequency, thereby rapidly reducing the voltage of the high-voltage bus to avoid damage to the components in the drive control circuit. The carrier frequency is positively correlated with the number of times the terminal port is triggered until the carrier frequency reaches the set maximum value.
[0031] In any of the above technical solutions, further, the control chip is further configured to: stop driving the switch element when the bus voltage of the high-voltage bus is less than the preset voltage and the continuous conduction time of the switch element is greater than the preset duration; or stop driving the switch element when the bus voltage of the high-voltage bus is less than the preset voltage.
[0032] In this technical solution, when it is detected that the bus voltage of the high-voltage bus is less than the preset voltage and the continuous conduction time of the switch element is greater than the preset duration, stop driving the switch element; or when the bus voltage of the high-voltage bus is less than the preset voltage, stop driving the switch element. Thereby, it is avoided that the absorption circuit corresponding to the switch element is used as the bus capacitor, and further, the service life of the first resistive element and other capacitive elements is improved.
[0033] In any of the above technical solutions, further, the bus capacitor is a thin-film capacitor.
[0034] In any of the above technical solutions, further, it further includes: a rectifier circuit, which rectifies the AC signal and outputs it as the power supply signal, and the power supply signal is output to the bus capacitor, the inverter bridge, and the load through the high-voltage bus and the low-voltage bus, where the control chip controls the conduction state of the switch element according to the AC signal.
[0035] In this embodiment, the drive control circuit includes a power supply filtering module. The power supply filtering module is connected in series between the AC power supply and the rectification circuit. The sampling circuit is specifically configured to collect the peak voltage signal of the AC power supply input before the power supply filtering module and / or the voltage signal before the rectification circuit after the power supply filtering module.
[0036] According to the second aspect of the present invention, an air conditioner is provided, including: a motor; and the drive control circuit according to any one of the above technical solutions. The signal input end of the motor is connected to the drive control circuit, and the drive signal output by the drive control circuit is used to drive the motor to operate. Therefore, the air conditioner has all the beneficial effects of the drive control circuit described in any one of the above embodiments, which will not be elaborated herein.
[0037] The additional aspects and advantages of the present invention will become apparent in the following description section, or be understood through the practice of the present invention. Description of the Drawings
[0038] The above and / or additional aspects and advantages of the present invention will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings, where:
[0039] Figure 1 Shows the AC-DC-AC topology in the prior art;
[0040] Figure 2 Shows a schematic diagram of a drive control circuit;
[0041] Figure 3 Shows a schematic diagram of the drive control circuit of an embodiment of the present invention;
[0042] Figure 4 Shows a schematic diagram of the drive control circuit of another embodiment of the present invention;
[0043] Figure 5 Shows a schematic diagram of the drive control circuit of still another embodiment of the present invention;
[0044] Figure 6 Shows a schematic diagram of the drive control circuit of yet another embodiment of the present invention;
[0045] Figure 7 Shows a schematic diagram of the drive control circuit of yet another embodiment of the present invention;
[0046] Figure 8 Shows a schematic diagram of the drive control circuit of yet another embodiment of the present invention;
[0047] Figure 9 Shows a schematic diagram of the drive control circuit of yet another embodiment of the present invention;
[0048] Figure 10 Schematic diagram of a drive control circuit showing another embodiment of the present invention;
[0049] Figure 11 Schematic diagram of a drive control circuit showing another embodiment of the present invention;
[0050] Figure 12 Schematic diagram of a drive control circuit showing another embodiment of the present invention;
[0051] Figure 13 Schematic diagram of control showing another embodiment of the present invention;
[0052] Figure 14 Schematic diagram of conduction time showing another embodiment of the present invention;
[0053] Figure 15 Schematic diagram of a process showing another embodiment of the present invention.
[0054] Among them, Figures 2 to 11 The corresponding relationship between the reference numerals and the component names in is:
[0055] 102 Inverter bridge, 104 Switch element, 106 Comparison circuit, 108 Control chip, 110 Discharge element, 112 Rectifier circuit. Specific embodiments
[0056] In order to be able to more clearly understand the above aspects, features and advantages of the present invention, the present invention will be further described in detail below in conjunction with the drawings and specific embodiments. It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments can be combined with each other.
[0057] Many specific details are set forth in the following description in order to fully understand the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited to the limitations of the specific embodiments disclosed below.
[0058] An embodiment of the first aspect of the present invention provides a drive control circuit, such as Figure 8As shown in the figure, the drive control circuit includes: an inverter bridge 102, which is used to drive and control the load to operate. The inverter bridge 102 is connected between the high-voltage bus and the low-voltage bus; a bus capacitor C1, which is used to provide the starting voltage required for the load to be powered on, and the bus capacitor C1 is also used to absorb the surge signal. The bus capacitor C1 is connected to the bus line on the input side of the inverter bridge 102; a reactor Ldc, which is used to absorb the surge signal generated during the operation of the drive control circuit to drive the load. The reactor Ldc is connected between the power grid and the load; a sampling circuit, which is used to collect the power supply signal; a first surge absorption circuit, which includes: a first resistive element R1 and a switching element 104. The switching element 104 is configured to control the first resistive element R1 to absorb the surge signal on the bus. The first resistive element R1 and the switching element 104 are connected in series and then connected in series between the high-voltage bus and the low-voltage bus; a comparison circuit 106, which is used to detect and confirm that the power supply signal is greater than or equal to a preset voltage and trigger the interrupt port of the control chip 108. The comparison circuit 106 is connected to the sampling circuit; a control chip 108, which is used to control the switching element 104 to operate at different carrier frequencies according to the number of times the interrupt port is triggered within a preset time. The control chip 108 is respectively connected to the switching element 104 and the comparison circuit 106.
[0059] The drive control circuit according to an embodiment of the present invention is for a motor driven by an inverter bridge. Among them, the drive control circuit includes: an inverter bridge 102, a bus capacitor C1, a reactor Ldc, a comparison circuit 106, a control chip 108, and a first surge absorption circuit composed of a first resistive element R1 and a switching element 104. Among them, the inverter bridge 102 outputs a drive signal to the motor to control the operation of the motor. Since the capacitance value of the bus capacitor C1 is relatively low, the surge signal formed on the high-voltage bus cannot be ensured to be completely absorbed. Therefore, a first surge absorption circuit composed of a first resistive element R1 and a switching element 104 is connected in series between the high-voltage bus and the low-voltage bus, and a comparison circuit 106 is set to compare the power supply signal collected by the sampling circuit, such as the bus voltage of the high-voltage bus, with a preset voltage. When the power supply signal is greater than or equal to the preset voltage, the interrupt port of the control chip 108 is triggered. The control chip 108 controls the switching element 104 to operate at different carrier frequencies or different duty cycles according to the number of times the interrupt port is triggered, that is, by adjusting the operating frequency of the switching element 104, the surge signal can be quickly absorbed within a short time, and then the voltage of the high-voltage bus can be quickly reduced to avoid damage to the components in the drive control circuit, and at the same time reduce the influence of the absorption capacity of the first resistive element R1 due to its own temperature rise.
[0060] It should be noted that, for the convenience of controlling the surge signal, a reactor Ldc is set to block the surge signal generated by the inverter bridge and the AC input side. The preset voltage can be multiple preset voltages with different values. When the bus voltage is greater than the preset voltage, the interrupt port of the control chip 108 is triggered. For example, when it is detected that the bus voltage is greater than or equal to the first preset voltage 1, the interrupt port is triggered, and when it is detected that the bus voltage is less than or equal to the first preset voltage 2, the triggering of the interrupt port stops. Here, the first preset voltage 1 is greater than the first preset voltage 2. The setting of the preset voltage is related to the surge absorption capacity of the bus capacitor C1, and the setting of the preset time is related to the tolerance of circuit component damage.
[0061] In an embodiment of the present invention, as Figure 4 、 Figure 5 、 Figure 7 and Figure 8 shown, the drive control circuit further includes: a second surge absorption circuit, and the second surge absorption circuit includes: a first capacitive element C2 and a unidirectional conduction element D1. The unidirectional conduction element D1 is configured to limit the first capacitive element C2 from absorbing the surge signal on the high-voltage bus. The first capacitive element C2 is connected in series with the unidirectional conduction element D1.
[0062] In this embodiment, by setting the second surge absorption circuit composed of the first capacitive element C2 and the unidirectional conduction element D1, when the unidirectional conduction element D1 meets the conduction condition, the first capacitive element C2 is used to absorb the surge signal on the high-voltage bus, thereby improving the surge absorption capacity of the drive control circuit. Specifically, the anode of the unidirectional conduction element D1 is connected to the high-voltage bus, and the cathode of the unidirectional conduction element D1 is connected to the low-voltage bus via the first capacitive element C2. Here, the unidirectional conduction element D1 is an element with unidirectional conduction characteristics, such as a diode, etc.
[0063] In an embodiment of the present invention, as Figure 4 、 Figure 5 、 Figure 7 and Figure 8 shown, the second surge absorption circuit further includes: a second resistive element R2. The second resistive element R2 is used to release the surge signal in the first capacitive element C2. The second resistive element R2 is connected in parallel with the first capacitive element C2.
[0064] In this embodiment, after the first capacitive element C2 absorbs the surge signal on the high-voltage bus, the second resistive element R2 set in parallel with the first capacitive element C2 is used to release the surge signal in the first capacitive element C2. The setting of the second resistive element R2 improves the reliability of the drive control circuit.
[0065] In an embodiment of the present invention, as Figure 4 、 Figure 5 、 Figure 7 andFigure 8 As shown, the second surge absorption circuit further includes: a second capacitive element C3 for absorbing surge signals on the high-voltage bus, and the second capacitive element C3 is connected in series with the first capacitive element C2.
[0066] In this embodiment, when the pressure on the high-voltage bus is relatively high, the second capacitive element C3 is connected in series on the basis of the first capacitive element C2 to improve the absorption ability of the surge signals on the high-voltage bus.
[0067] In one embodiment of the present invention, as Figure 4 , Figure 5 , Figure 7 and Figure 8 shown, the second surge absorption circuit further includes: a third resistive element R3 for releasing the surge signals in the second capacitive element C3, and the third resistive element R3 is connected in parallel with the second capacitive element C3.
[0068] In this embodiment, in the case of setting the second capacitive element C3, by setting the third resistive element R3 to cooperate with the second resistive element R2, the voltages at both ends of the first capacitive element C2 and the second capacitive element C3 are balanced. At the same time, the third resistive element R3 is also used to release the surge signals on the second capacitive element C2, thereby improving the reliability of the drive control circuit.
[0069] In one embodiment of the present invention, further, as Figure 4 , Figure 5 , Figure 7 and Figure 8 shown, the second surge absorption circuit further includes: a fourth resistive element R4 for limiting the current flowing through the first capacitive element C2 and / or the second capacitive element C3; the fourth resistive element R4, the first capacitive element C2 and the unidirectional conduction element are connected in series; or the fourth resistive element R4, the first capacitive element C2, the second capacitive element C3 and the unidirectional conduction element are connected in series.
[0070] In this embodiment, a fourth resistive element R4 is further provided in the second surge absorption circuit. The fourth resistive element R4 limits the current flowing through the second surge absorption circuit in the second surge absorption circuit, thereby improving the reliability of the drive control circuit. At the same time, the fourth resistive element R4 also absorbs the surge signals in the second surge absorption circuit, thereby improving the absorption ability of the surge signals of the second surge absorption circuit. Further, the absorption ability of the surge signals of the drive control circuit is improved.
[0071] In one embodiment of the present invention, further, as Figures 2 to 8 shown, the first surge absorption circuit further includes: a discharge element 110 for releasing the surge signals in the first resistive element R1, and the discharge element 110 is connected in parallel with the first resistive element R1.
[0072] In this embodiment, by providing the discharge element 110, after the first resistive element R1 absorbs the surge signal on the high-voltage bus, the discharge element provided in parallel with the first resistive element R1 is used to release the surge signal in the first resistive element R1. The provision of the discharge element 110 improves the reliability of the drive control circuit.
[0073] In an embodiment of the present invention, as Figures 9 to 11 shown, wherein, Figure 9 is Figure 5 a feasible example of the installation position of the surge absorption circuit in Figure 10 and Figure 11 is a feasible connection relationship between the first surge absorption circuit and the second surge absorption circuit. According to the overcurrent signal detected by the current measuring element, the switching element 104 is controlled to conduct or cut off.
[0074] In an embodiment of the present invention, further, the control chip 108 is specifically configured to: when the number of times the interrupt port is triggered within a preset time is one, control the switching element 104 to operate at a first carrier frequency (with the same duty cycle) or a first duty cycle (with the same carrier); when the number of times the interrupt port is triggered within a preset time is two, control the switching element 104 to operate at a second carrier frequency (with the same duty cycle) or a second duty cycle (with the same carrier); wherein, the second carrier frequency is greater than the first carrier frequency or the second duty cycle is less than the first duty cycle.
[0075] In this embodiment, by detecting the number of times the interrupt port is triggered within a preset time, the switching element 104 is controlled to operate at different carrier frequencies. Further, since the number of times triggered within the preset time is relatively large, in order to reduce the risk of damage to the components in the drive control circuit, by increasing the carrier frequency of the switching element 104 or reducing the duty cycle of the switching element, the risk of damage to the components is reduced.
[0076] Furthermore, since multiple preset voltages are set, when it is detected that the bus voltage is greater than or equal to the first preset voltage 1, that is, when the interrupt port is triggered once, the control switch element 104 operates at the first carrier frequency. When the bus voltage gradually increases and it is detected that the bus voltage is greater than the first preset voltage 1, that is, when the interrupt port is triggered twice, the control switch element 104 operates at the second carrier frequency, where the second carrier frequency is greater than the first carrier frequency, thereby achieving a rapid reduction in the voltage of the high-voltage bus to avoid damage to the components in the drive control circuit. When the bus voltage gradually increases again and it is detected that the bus voltage is greater than the first preset voltage 1, that is, when the interrupt port is triggered three times, the control switch element 104 operates at the third carrier frequency; thereby enabling a rapid reduction in the voltage of the high-voltage bus to avoid damage to the components in the drive control circuit. The carrier frequency is positively correlated with the number of times the terminal port is triggered until the carrier frequency reaches the set maximum value.
[0077] In an embodiment of the present invention, as Figure 8 and Figure 13 shown, when the prototype is powered on, the input voltage is rectified by the rectifier circuit 112 and then charges the bus capacitor C1, the first capacitive element C2, and the second capacitive element C3 at the same time. At this time, if the input voltage is within the normal set range (150V - 264V) and does not exceed 294V (the set hardware protection voltage threshold Vref is 800V, the software protection threshold is 720V, and the corresponding AC input effective value is 720 / 1.414 / 1.732), the prototype operates normally and the switch element 104 of the first resistive element R1 is not turned on. After the charging is completed, the voltage across the first resistive element R1 stabilizes at the Vdc-max value (that is, the voltage across the first resistive element R1 stabilizes at the maximum value Vdc-max of the bus voltage, or changes slowly).
[0078] When the prototype is operating normally, the voltage on the bus capacitor C1 fluctuates at a frequency six times the AC input power supply frequency. When operating normally, the maximum value of the bus voltage is 264×1.414×1.732 = 646V, which is much smaller than the set protection threshold. Therefore, the switch element 104 of the first resistive element R1 will not come into play.
[0079] The surge energy mainly comes from the power input, the compressor winding when the prototype fails and stops, the freewheeling of the inductance on the AC and DC sides, and the kinetic energy of the compressor. When a surge comes, since the small-capacity bus capacitor C1 (film capacitor or small-capacity electrolytic capacitor) has limited surge absorption capacity, the bus voltage will rise rapidly. When the DC bus voltage is higher than the set threshold voltage V2 (set to 720V here, which can be adjusted actually), the DC bus voltage passes through the voltage-dividing resistors R6 and R7 to obtain the divided bus voltage and enters the AD port of the control chip 108 (MCU, micro controller unit, micro control unit) (the voltage entering the MCU is Vdc) and the input terminal of the comparator. When the divided bus voltage is greater than the set threshold of the comparison circuit 106, the output of the comparison circuit 106 (comparator) changes from high level to low level, and the level change signal enters the external interrupt port of the MCU.
[0080] As Figure 14 and Figure 15 shown, when the MCU receives an external interrupt signal and determines that the current bus voltage exceeds 720V, the compressor starts to operate at a reduced power or stops. At the same time, the MCU starts to count the external interrupt signals within a time window of 30 seconds (it can be other values), and sets different carrier frequencies according to different count values. For example, when the count value is 1, the MCU considers it the first surge within 30 seconds. At this time, the temperature of the first resistive element R1 is the ambient temperature, so it can absorb at the fastest speed, that is, absorb with a 1ms pulse as designed (this pulse time is related to the resistor and the set voltage threshold). Since the resistor absorbs surge energy instantaneously and generates heat, if the count value is 2 within 30 seconds, to ensure the normal operation of the first resistive element R1, at this time, an output with a 60% duty cycle of a 10K carrier frequency is used (the value can be adjusted), and at the same time, ensure that the continuous conduction time is not greater than 1ms. As the first resistive element R1 absorbs the surge energy twice, if there is still a surge signal within 30 seconds, that is, the count value is 3, then the MCU uses an output with a 60% duty cycle of a 20K carrier frequency. Further, as the count value increases, the carrier frequency of the output pulse width modulation of the MCU keeps increasing, and finally the carrier frequency is limited to 40K. Among them, 10K, 20K, 40K, and 30 seconds are only used for listing examples.
[0081] Due to the intervention of the absorption resistor, the bus voltage will drop rapidly. When it is lower than a certain fixed threshold (such as 700V), the MCU controls the switching element 104 of the first resistive element R1 to disconnect, and the first resistive element R1 no longer works.
[0082] It should be noted that the selection of the carrier frequency and the duty cycle is mainly determined by the set effective threshold V2, the resistance value of the first resistive element R1, the rated power of the first resistive element R1, and the instantaneous overload capacity (which will be reflected in the resistor specification sheet); generally speaking, the greater the rated power of the first resistive element R1, the greater its instantaneous overload capacity. Therefore, at the same effective threshold V2, the greater the duty cycle that can be turned on or the smaller the carrier frequency (i.e., the larger the period).
[0083] Specifically, the duty cycle is given by a formula, such as (Vdc-filter / V2)×T (Vdc-filter is the voltage value obtained by filtering the real-time detected bus voltage, and T is the period of pulse width modulation). At the same time, a duty cycle limiting link is added. The greater the bus voltage, the greater the output duty cycle. A high bus voltage and a high duty cycle can quickly absorb surge energy; other formulas can also be used, such as the greater the bus voltage, the smaller the output duty cycle, to ensure the reliability of the absorption resistor, etc.
[0084] Regarding the conduction threshold voltage (set to fixed 720V and 700V here), it can be a floating value (such as detecting the Vdc-max value in the previous several detection periods (such as 100ms) (Vdc-max is the maximum value of the bus voltage in the previous several detection periods), and using this value plus △V1 as the turn-off voltage threshold of the switching element, and using Vdc-max + △V1 + 20V (where △V1 is the floating value of the voltage, set according to the tolerance of component damage in the drive control circuit, and 20V can be other values) as the conduction voltage threshold of the switching element 104. Of course, it can also be extended to detect the peak value of the AC input, using the AC input peak value Vac-max + △V1 as the conduction voltage threshold of the switching element, and using Vdc-max + △V1 + 20V (which can be other values) as the conduction voltage threshold of the switching element.
[0085] For the judgment of overvoltage and exiting overvoltage, currently, it is judged as overvoltage by comparing the hardware comparator with the set threshold to generate a level conversion, and the software real-time detects that the bus voltage (Vdc-filter) after filtering is lower than a certain value and is set as exiting overvoltage; both overvoltage and exiting overvoltage are given by the hardware hysteresis comparator.
[0086] Regarding the carrier frequencies (10K\20K\30K\40K), they can all be changed, but the change trend should be getting larger and larger; the time window of 30 seconds can also be changed, mainly based on the time required from the MCU receiving the first overvoltage fault signal to the normal shutdown of the whole machine; the fixed-duty-cycle PWM (60%) and the counting times can also be adjusted.
[0087] In an embodiment of the present invention, as Figure 15As shown, the control chip 108 is further configured to: stop driving the switching element 104 when the bus voltage of the high-voltage bus is less than a preset voltage and the continuous conduction time of the switching element 104 is greater than a preset duration; or stop driving the switching element 104 when the bus voltage of the high-voltage bus is less than the preset voltage.
[0088] In this technical solution, when it is detected that the bus voltage of the high-voltage bus is less than the preset voltage and the continuous conduction time of the switching element is greater than the preset duration, the driving of the switching element 104 is stopped; or when the bus voltage of the high-voltage bus is less than the preset voltage, the driving of the switching element 104 is stopped. Thus, it is avoided that the absorption circuit corresponding to the switching element 104 is used as the bus capacitor, thereby improving the service life of the first resistive element R1 and other capacitive elements.
[0089] As Figure 12 shown, R5 is the system damping resistor. If it is a region without harmonic requirements, Ldc is preferably a small inductor (for cost reasons), such as less than 2 mH, and it can actually be not used. If a small inductor is selected, it is best to match the system damping resistor to improve the system stability.
[0090] The resistance value of the first resistive element R1 is related to the set bus voltage protection threshold and the overcurrent capacity of the switching element 104.
[0091] The selection of the fourth resistive element R4 and the first capacitive element C2 is related to the inductance of the first resistive element R1. If the first resistive element R1 is a non-inductive resistor, the fourth resistive element R4, the first capacitive element C2, and the discharge element 110 (antiparallel diode) can be not used.
[0092] The selection of the discharge element 110 (antiparallel diode) is related to the inductance and resistance value of the first resistive element R1.
[0093] Theoretically, a 1 ms continuous conduction time limit is used when counting 1; when the count is 2, the 1 ms value should be reduced, such as 0.9 ms can be used; when the count value is 3, a 0.8 ms time limit is used, etc. Assume that the software is set to conduct at 720 V and the hardware conducts at 800 V. Due to reasons such as detection and filtering, the actual conduction voltage is at most 800 V. Since four resistors are connected in series, the maximum voltage across each resistor is 200 V. Then (200×200 / 10)×t / 1 = 5 W, so t = 1.25 ms. That is to say, the continuous conduction time should not exceed 1.25 ms within 1 second.
[0094] In any of the above embodiments, further, the bus capacitor C1 is a thin-film capacitor.
[0095] In an embodiment of the present invention, as Figure 8As shown, a rectifier circuit 112, which rectifies an AC signal and outputs it as the power supply signal. The power supply signal is output to the bus capacitor C1, the inverter bridge 102, and the load through the high-voltage bus and the low-voltage bus. Among them, the control chip controls the conduction state of the switching element 104 according to the AC signal.
[0096] In this embodiment, the voltage signal of the high-voltage bus can be obtained by detecting the voltage before the reactor Ldc after the rectifier circuit 112 or the voltage before the inverter bridge 102 after the reactor Ldc. The voltage signal of the AC power supply is measured through the AC power supply V AC For example, the peak value of the AC voltage of the AC power supply. Optionally, the drive control circuit includes a power supply filtering module (not shown). The power supply filtering module is connected in series between the AC power supply and the rectifier circuit 112. The sampling circuit is specifically used to collect the peak voltage signal of the AC power supply input before the power supply filtering module and / or the voltage signal before the rectifier circuit 112 after the power supply filtering module.
[0097] In a specific embodiment of the present invention, the capacitance value of the film capacitor is lower than a preset capacitance value, where the preset capacitance value is calculated according to the following calculation formula:
[0098]
[0099] Where C dc is the preset capacitance, L S is the total inductance value of the DC side of the equivalent drive control circuit, P L is the load power of the drive control circuit, R S is the total resistance of the DC side of the equivalent drive control circuit, v dc0 is the average value of the bus voltage. For example, taking the 7P prototype as an example, according to this calculation formula, it can be determined that C dc must be greater than 840 uF, the preset capacitance is above 840 uF, and 1230 uF is used in the specific implementation.
[0100] An embodiment of the second aspect of the present invention provides an air conditioner, including: a motor; and the drive control circuit as described in any of the above technical solutions. The signal input end of the motor is connected to the drive control circuit, and the drive signal output by the drive control circuit is used to drive the motor to operate. Therefore, this air conditioner has all the beneficial effects of the drive control circuit described in any of the above embodiments, which will not be elaborated here.
[0101] In the description of this specification, the descriptions of the terms "one embodiment", "some embodiments", "specific embodiments", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or instance. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.
[0102] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A drive control circuit, comprising: Inverter bridge, the inverter bridge is used to drive and control the operation of a load, the inverter bridge is connected between a high-voltage bus and a low-voltage bus, and is characterized by including: A reactor, which is used to absorb the surge signal generated during the process of the drive control circuit driving the load to operate, and the reactor is connected between the power grid and the load; A sampling circuit, which is used to collect power supply signals; A bus capacitor, the bus capacitor is used to provide the starting voltage required for the load to be powered on, and the bus capacitor is also used to absorb the surge signal, and the bus capacitor is connected to the bus line on the input side of the inverter bridge; A first surge absorption circuit, the first surge absorption circuit includes: a first resistive element and a switching element, the switching element is configured to control the first resistive element to absorb the surge signal on the bus, and the first resistive element and the switching element are connected in series and then connected in series between the high-voltage bus and the low-voltage bus; A comparison circuit, which is used to detect and confirm that the power supply signal is greater than or equal to a preset voltage and trigger the interrupt port of the control chip, and the comparison circuit is connected to the sampling circuit; A control chip, which is used to control the switching element to work at different carrier frequencies or different duty cycles according to the number of times the interrupt port is triggered within a preset time, and the control chip is respectively connected to the switching element and the comparison circuit; Specifically, the control chip is used for: When the number of times the interrupt port is triggered within the preset time is once, controlling the switching element to work at a first carrier frequency or a first duty cycle; When the number of times the interrupt port is triggered within the preset time is twice, controlling the switching element to work at a second carrier frequency or a second duty cycle; Wherein, the second carrier frequency is greater than the first carrier frequency, the second duty cycle is less than the first duty cycle, and the carrier frequency is positively correlated with the number of times the interrupt port is triggered until the carrier frequency reaches the set maximum value; The bus capacitor is a thin-film capacitor; The capacitance value of the thin-film capacitor is less than a preset capacitance value, wherein, the preset capacitance value is calculated according to the following calculation formula: Among them, C dc is the preset capacity, L S is the total inductance value of the DC side of the equivalent drive control circuit, P L is the load power of the drive control circuit, R S is the total resistance of the DC side of the equivalent drive control circuit, v dc0 is the average value of the bus voltage; The drive control circuit further includes: A second surge absorption circuit, the second surge absorption circuit includes: a first capacitive element and a unidirectional conduction element, the unidirectional conduction element is configured to limit the first capacitive element to absorb the surge signal on the high-voltage bus, and the first capacitive element is connected in series with the unidirectional conduction element; The second surge absorption circuit further includes: A second resistive element, the second resistive element is used to release the surge signal in the first capacitive element, and the second resistive element is connected in parallel with the first capacitive element; A second capacitive element, which is used to absorb the surge signal on the high-voltage bus, and the second capacitive element is connected in series with the first capacitive element.
2. The drive control circuit according to claim 1, wherein, The second surge absorption circuit further includes: A third resistive element, the third resistive element is used to release the surge signal in the second capacitive element, and the third resistive element is connected in parallel with the second capacitive element.
3. The drive control circuit according to claim 2, wherein, The second surge absorption circuit further includes: A fourth resistive element, which is used to limit the current flowing through the first capacitive element and / or the second capacitive element; The fourth resistive element, the first capacitive element, and the unidirectional conduction element are connected in series; or the fourth resistive element, the first capacitive element, the second capacitive element, and the unidirectional conduction element are connected in series.
4. The drive control circuit according to claim 1, wherein, The first surge absorption circuit further includes: A discharge element for releasing the surge signal in the first resistive element, and the discharge element is connected in parallel with the first resistive element.
5. The drive control circuit according to claim 1, wherein, The control chip is further configured to: When the bus voltage of the high-voltage bus is less than the preset voltage and the continuous conduction time of the switching element is greater than the preset duration, stop driving the switching element; or when the bus voltage of the high-voltage bus is less than the preset voltage, stop driving the switching element.
6. The drive control circuit according to claim 1, wherein, Further included is: A rectification circuit that rectifies the AC signal and outputs it as the power supply signal, and the power supply signal is output to the bus capacitor, the inverter bridge, and the load through the high-voltage bus and the low-voltage bus. Wherein, the control chip controls the conduction state of the switching element according to the AC signal.
7. An air conditioner, wherein, Including: A motor; The drive control circuit according to any one of claims 1 to 6, wherein the signal input terminal of the motor is connected to the drive control circuit, and the drive signal output by the drive control circuit is used to drive the motor to operate.
Citation Information
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