Body test intelligent wireless speaker

Abstract

The present invention discloses a physical test intelligent wireless speaker, comprising a main control circuit module, a power circuit module and a wireless communication circuit module, wherein the main control circuit module comprises a chip unit, and the chip unit comprises a power interface, a communication interface and a control interface; the power circuit module comprises a power supply battery power supply management circuit and a power supply switching circuit, and the power supply battery power supply management circuit is connected to the power supply switching circuit; the wireless communication module comprises a first wireless communication module and a second wireless communication module; the present invention adopts a physical test intelligent wireless speaker to process the received physical test peripheral test data and send it to a handheld terminal, so that the whole test process is simple and efficient, and the accuracy of the received physical test data is improved through transmission by the wireless communication module, and data information from various physical test peripherals can be accepted, the technical requirements for the physical test peripherals are reduced, the test cost is reduced, and the device is convenient and practical.

Description

Technical Field

[0001] The invention relates to the field of sports testing equipment, and in particular to a physical testing intelligent wireless speaker. Background Art

[0002] At present, physical examination is widely used in daily life to test the body. With the development of science and technology, physical examination has gradually transitioned from the original manual test to the test by machine. However, the unified collection and processing of the test data collected by a large number of physical examination peripherals during the test and finally aggregating them to the terminal is relatively complicated and troublesome. At this time, it is necessary to provide a device as an intermediate bridge to obtain and organize the test data of the physical examination peripherals and connect the physical examination peripherals and the terminal. Summary of the invention

[0003] In order to overcome the deficiencies of the prior art, the purpose of the present invention is to provide a physical test intelligent wireless speaker, which receives and processes the data of physical test peripherals and sends it to a handheld terminal, thereby improving the efficiency of physical test and the accuracy of test results, and is convenient and practical.

[0004] The purpose of the present invention is achieved by the following technical solutions:

[0005] A physical measurement intelligent wireless speaker comprises a main control circuit module, a power circuit module and a wireless communication circuit module, wherein the main control circuit module comprises a chip unit, and the chip unit comprises a power interface, a communication interface and a control interface; the power circuit module comprises a power supply battery power management circuit and a power supply switching circuit, and the power supply battery power management circuit is connected to the power supply switching circuit; the wireless communication module comprises a first wireless communication module and a second wireless communication module; the power supply interface of the chip unit is connected to the power supply switching circuit, and the control interface of the chip unit is respectively connected to the power supply battery power management circuit and the power supply switching circuit; the communication interface and the control interface of the chip unit are respectively connected to the first wireless communication module, and the communication interface and the control interface of the chip unit are also respectively connected to the second wireless communication module, and the power supply switching circuit is also respectively connected to the first wireless communication module and the second wireless communication module; the chip unit controls the first communication module to communicate with the physical measurement device of the peripheral device, and receives the detection data of the physical measurement device, and the chip unit processes the physical measurement data and sends it to the terminal device of the peripheral device through the second wireless communication module.

[0006] Furthermore, it also includes a voice circuit module, which is connected to the power switching circuit and is also connected to the control interface and communication interface of the chip unit respectively. The voice circuit module is used to receive the physical measurement data and perform voice broadcasting through voice signals.

[0007] Furthermore, the voice circuit module includes an audio power amplifier circuit, a voice module, a voice module expansion module and a volume adjustment board circuit; the voice module is respectively connected to the power switching switch circuit, the audio power amplifier circuit, the volume adjustment circuit and the voice module expansion module, and the voice module is also respectively connected to the control interface and communication interface of the chip unit; the audio power amplifier circuit, the volume adjustment board circuit and the voice module expansion circuit are respectively connected to the power switching switch circuit, and the audio power amplifier circuit, the volume adjustment board circuit and the voice module expansion circuit are respectively connected to the control interface of the chip unit.

[0008] Furthermore, the volume adjustment board circuit includes a power reference voltage circuit, a first-stage amplifier circuit, a high-pitched tone adjustment circuit, a second-stage amplifier circuit, an LED indicator light, an interface for connecting to a mainboard, and an OLED module. The power reference voltage circuit, the first-stage amplifier circuit, the high-pitched tone adjustment circuit, the second-stage amplifier circuit, the LED indicator light, the interface for connecting to the mainboard, and the OLED module are respectively connected to the power switching circuit and the control interface of the chip unit.

[0009] Furthermore, it also includes an interactive interface module, the interactive interface circuit is connected to the power supply switching circuit, and the interactive interface circuit is connected to each part of the circuit to provide an interface for each part of the circuit.

[0010] Furthermore, the interactive interface module includes a buzzer drive circuit, a debugging indicator light, a debugging interface, a button interface, an interface JP1 for connecting to a volume adjustment board, an interface JP4 for connecting to a volume adjustment board, a Flash storage interface, and an interface for connecting to a microphone board. The buzzer drive circuit and the debugging indicator light are respectively connected to the power switching circuit, the buzzer drive circuit and the debugging indicator light are respectively connected to the control interface of the chip unit, and the buzzer drive circuit and the debugging indicator light are also respectively connected to a communication interface.

[0011] Furthermore, the main control circuit module also includes a reset circuit, a crystal oscillator circuit, a JTAG debugging interface, a startup mode control circuit and a reference voltage circuit; the reset circuit, the crystal oscillator circuit, the JTAG debugging interface, the startup mode control circuit and the reference voltage circuit are respectively connected to the power switching circuit; the reset circuit, the crystal oscillator circuit, the JTAG debugging interface, the startup mode control circuit and the reference voltage circuit are respectively connected to the control interface of the chip unit.

[0012] Furthermore, the power supply circuit module also includes a 5V voltage stabilizing circuit, a 3.3V voltage stabilizing circuit, a return ground isolation circuit, a charging connection and a battery voltage detection circuit. The 5V voltage stabilizing circuit, the 3.3V voltage stabilizing circuit, the return ground isolation circuit, the charging connection and the battery voltage detection circuit are respectively connected to the power supply battery power supply management circuit and the power switching switch circuit, and the 5V voltage stabilizing circuit, the 3.3V voltage stabilizing circuit, the return ground isolation circuit, the charging connection and the battery voltage detection circuit are respectively connected to the control interface of the chip unit.

[0013] Furthermore, the first wireless communication module includes a 2.4G communication module control circuit, and the second wireless communication module includes a Bluetooth communication module control circuit, the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the power switching circuit, the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the control interface of the chip unit, and the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the communication interface.

[0014] Furthermore, the Bluetooth communication module control circuit includes a manual reset circuit, a forced reset circuit, a status indication circuit and a startup circuit, the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the power switching switch circuit, the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the control interface of the chip unit, and the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the communication interface.

[0015] The beneficial effects of the present invention are:

[0016] The present invention adopts a physical test intelligent wireless speaker to process the received physical test peripheral test data and send it to a handheld terminal, so that the entire test process is simple and efficient. The accuracy of the received physical test data is improved through transmission through a wireless communication module. Data information from various physical test peripherals can be accepted, the technical requirements for the physical test peripherals are reduced, the test cost is reduced, the efficiency of the physical test and the accuracy of the test results are improved, and the test is convenient and practical. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the structure of a chip unit provided by the present invention;

[0018] Figure 2 A circuit diagram of a chip unit control mainboard provided by the present invention;

[0019] Figure 3A circuit diagram of a reset circuit crystal oscillator circuit provided by the present invention;

[0020] Figure 4 A circuit diagram of the JTAG debugging interface and startup mode control provided by the present invention;

[0021] Figure 5 A circuit diagram of a reference voltage circuit provided by the present invention;

[0022] Figure 6 A circuit diagram of a power supply management circuit for a power supply battery provided by the present invention;

[0023] Figure 7 A circuit diagram of a power supply switching circuit provided by the present invention;

[0024] Figure 8 A circuit diagram of a 5V voltage stabilizing circuit provided by the present invention;

[0025] Fig. 9 A circuit diagram of a 3.3V voltage stabilizing circuit a provided by the present invention;

[0026] Fig.10 A circuit diagram of a 3.3V voltage stabilizing circuit b provided by the present invention;

[0027] Fig.11 A circuit diagram of a backflow isolation circuit provided by the present invention;

[0028] Fig.12 A circuit diagram of a charging connection circuit provided by the present invention;

[0029] Fig.13 A circuit diagram of a battery voltage detection circuit provided by the present invention;

[0030] Fig.14 A circuit diagram of the Bluetooth communication module provided by the present invention;

[0031] Fig.15 A circuit diagram of a Bluetooth communication module startup circuit provided by the present invention;

[0032] Fig.16 A circuit diagram of a manual reset circuit for a Bluetooth communication module provided by the present invention;

[0033] Fig.17 A circuit diagram of a forced reset circuit for a Bluetooth communication module provided by the present invention;

[0034] Fig.18 A circuit diagram of a Bluetooth communication module status indication circuit provided by the present invention;

[0035] Fig.19 A circuit diagram of a 2.4G communication module provided by the present invention;

[0036] Fig. 20 A circuit diagram of the voice module circuit provided by the present invention;

[0037] Fig.21 A circuit diagram of the voice module expansion interface circuit provided by the present invention;

[0038] Fig. 22 A circuit diagram of the audio power amplifier circuit provided by the present invention;

[0039] Fig.23 A circuit diagram of a single power supply reference voltage interface circuit provided by the present invention;

[0040] Fig.24 A circuit diagram of a first-stage amplifier circuit interface circuit provided by the present invention;

[0041] Fig.25 A circuit diagram of a high-pitched tone adjustment circuit provided by the present invention;

[0042] Fig.26 A circuit diagram of a secondary amplifier circuit provided by the present invention;

[0043] Fig. 27 A circuit diagram for connecting to a mainboard interface circuit provided by the present invention;

[0044] Fig.28 A circuit diagram of an OLED module circuit provided by the present invention;

[0045] Fig.29 A circuit diagram of the LED indicator light provided by the present invention;

[0046] Fig.30 A circuit diagram of an interface circuit for connecting to a volume adjustment board provided by the present invention;

[0047] Fig.31 A circuit diagram for connecting a microphone board interface provided by the present invention;

[0048] Fig.32 A circuit diagram of the Flash storage circuit provided by the present invention;

[0049] Fig.33 A circuit diagram of a buzzer driving circuit provided by the present invention;

[0050] Fig.34 A circuit diagram of the debugging interface circuit provided by the present invention;

[0051] Fig.35 A circuit diagram of a key interface circuit provided by the present invention;

[0052] Fig.36 A circuit diagram of the debugging indicator light provided by the present invention. DETAILED DESCRIPTION

[0053] The present invention is further described below in conjunction with the accompanying drawings and specific implementation methods. It should be noted that, under the premise of no conflict, the various embodiments or technical features described below can be arbitrarily combined to form a new embodiment.

[0054] See also Figures 1 to 18 , a physical measurement intelligent wireless speaker includes a main control circuit module, a power circuit module and a wireless communication circuit module, the main control circuit module includes a chip unit, the chip unit includes a power interface, a communication interface and a control interface; the power circuit module includes a power battery power management circuit and a power switching switch circuit, and the power battery power management circuit is connected to the power switching switch circuit; the wireless communication module includes a first wireless communication module and a second wireless communication module; the power interface of the chip unit is connected to the power switching switch circuit, and the control interface of the chip unit is respectively connected to the power battery power management circuit and the power switching switch circuit; the communication interface and control interface of the chip unit are respectively connected to the first wireless communication module, and the communication interface and control interface of the chip unit are also respectively connected to the second wireless communication module, and the power switching switch circuit is also respectively connected to the first wireless communication module and the second wireless communication module; the chip unit controls the first communication module to communicate with the external physical measurement device and receive the detection data of the physical measurement device, and the chip unit processes the physical measurement data and sends it to the external terminal device through the second wireless communication module.

[0055] The physical test peripheral sends the test data to the smart wireless speaker through the 2.4G communication module. The smart wireless speaker main control board processes the data and sends it to the handheld terminal through the Bluetooth communication module. When the smart wireless speaker is paired with the physical test peripheral or handheld terminal, the voice module emits an external sound prompt to indicate success or failure.

[0056] Chip unit main program design:

[0057] The tasks that need to be executed once after the MCU is powered on are shown in the following program, including initializing default parameters, initializing external hardware and on-chip peripherals, displaying the power-on interface, broadcasting the power-on voice prompt, 2.4G communication module self-test, Flash storage self-test, BTM and its communication configuration, power supply detection report, etc.

[0058] In the main loop, various tasks are processed by frequency division, including test process control, 2.4G communication control, BTM communication control, various status detection reports, etc.

[0059]

[0060]

[0061] BTM control and data reception processing program:

[0062] After the wireless speaker is turned on and started successfully, other terminal devices with Bluetooth communication function such as mobile phones or tablets can search for the MAC of the BTM on the speaker and connect directly. To ensure that it will not be connected to other peripherals, the OLED on the speaker can display its MAC and connect after the handheld terminal confirms that it is consistent. Since the 12-bit MAC is not convenient to check, the same CRC16_CCITT algorithm is used on the speaker and the handheld terminal to convert the 12-bit MAC into 4 bits for display.

[0063] Therefore, the processing steps after BTM is powered on are:

[0064]

[0065]

[0066]

[0067] After receiving data from other terminals, Bluetooth also sends it back to STM32 through USART2. STM32 processes the data byte by byte, and 45 consecutive bytes (the protocol defines 45 bytes as a frame of data) that meet the data format will trigger the processing function; the program structure of the receiving function and the processing function is as follows:

[0068]

[0069]

[0070]

[0071] 2.4G communication module communicates with physical test peripherals:

[0072] The physical test equipment that communicates with the speaker is also equipped with the NRF24L01 communication module. After the speaker is powered on, it enters the polling mode, that is, starts the 2.4G communication. According to the Bluetooth data command from the handheld terminal, the polling state is switched and data is transmitted. According to the communication polling state flag, it can be roughly divided into access peripheral status, set peripheral number, start test, stop communication, end test, bind student number and other modes. The main code is as follows:

[0073]

[0074]

[0075] To achieve one-to-many communication, the speaker switches the communication channel continuously to access the peripherals on different channels. The underlying polling code is as follows:

[0076]

[0077]

[0078] like Figure 1 As shown, the control motherboard model of the chip unit is STM32F103VET6.

[0079] like Figure 2 As shown in the figure, the crystal reset circuit nRST is connected to the 14th pin (NRST) of STM32, and a 10K pull-up resistor is connected externally. C11 filters the reset signal and also plays a debounce role on the mechanical button SW5. The X7 interface can be led out to the external button and can also perform a reset operation. The crystal oscillator circuit uses a two-pin 8M passive crystal oscillator, and the oscillation capacitor uses two 22pF non-polar chip capacitors. Among them, OSC_IN and OSC_OUT are connected to the 12th (OSC_IN) and 13th (OSC_OUT) pins of STM32 respectively.

[0080] like Figure 3 As shown, the JTAG debugging interface and the boot mode control circuit JTAG interface are used for program download and online debugging simulation test, and the boot mode control circuit is used to select the boot mode of the system after reset: main memory boot or system memory boot. Among them, JTDO, JTDI, JTCK, JTMS, nRST, and JNTRST are respectively connected to the 89th (PB3) pin, the 77th (PA15) pin, the 76th (PA14) pin, the 72nd (PA13) pin, the 14th (NRST) pin, and the 90th (PB4) pin of STM32. Among them, BOOT0 is connected to the 94th (BOOT0) pin of STM32, as shown Figure 1 .3.2-1, STM32 pin 37 (PB2 / BOOT0) has been pulled down by a 10K resistor.

[0081] like Figure 4 As shown, the reference voltage circuit 3V3-1 voltage is isolated by inductance and capacitance to power the STM32 reference source, wherein VREF+ is connected to the 21st (VREF+) and 22nd (VDDA) pins of the STM32, and VREF- is connected to the 20th (VREF-) and 19th (VSSA) pins of the STM32.

[0082] like Figure 5 As shown in the figure, the power supply battery management circuit is designed with CN3705 charging IC. The CHG and DCHG networks are connected to the 38th (PE7) and 39th (PE8) pins of the STM32 main control respectively. +23V and CHG' are connected to the volume adjustment board interface JP1 to drive the LED on the volume adjustment board to indicate the charging status. The 220V AC mains is adjusted to 24V AC by the transformer and connected to the Figure 5The X1 charging interface obtains nearly 23V DC through the rectifier bridge KBP307 and the filter capacitor, and the voltage and current are controlled and adjusted by the charging management ICCN3705 to power the battery. The battery uses 8 3.7V 18650 lithium batteries in series and parallel to obtain a 14.8V lithium battery pack; CN3705 is a PWM buck mode lithium battery or lithium iron phosphate battery charging management integrated circuit, which independently manages the charging of single or multiple lithium batteries or lithium iron phosphate batteries. It has the advantages of small package size, few peripheral components and simple use. CN3705 has constant current and constant voltage charging modes, which is very suitable for charging lithium batteries or lithium iron phosphate batteries. In constant voltage charging mode, the constant voltage charging voltage is set by an external resistor divider network; in constant current charging mode, the charging current is set by an external resistor; for deeply discharged batteries, when the battery voltage is lower than 66.7% of the set constant voltage charging voltage, CN3705 uses 15% of the set constant current charging current to trickle charge the battery. During the constant voltage charging stage, the charging current gradually decreases. When the charging current drops to the set value of the external resistor, the charging ends. At the end of charging, if the battery voltage drops to 91.1% of the set constant voltage charging voltage, a new charging cycle automatically starts. When the input power is off or the input voltage is lower than the battery voltage, it automatically enters a low-power sleep mode. Other functions include input low voltage latching, battery temperature monitoring, battery terminal overvoltage protection and charging status indication; VG is the output of the internal voltage modulator, which provides power for the internal drive circuit; PGND is the power ground; GND is the analog ground; / CHRG is the open drain output terminal. In the charging state, the internal transistor pulls this pin to a low level; otherwise, this pin is in a high impedance state; / DONE is an open drain output terminal. At the end of charging, the internal transistor pulls this pin to a low level; otherwise, this pin is in a high-impedance state; TEMP is the battery temperature monitoring input terminal, and a negative temperature coefficient thermistor is connected between this pin and the ground; EOC is the end of charging current setting terminal, and this pin is directly connected to the ground or connected to the ground through a resistor; COM1 loop compensation input terminal 1.Connect a 470pF capacitor between this pin and ground; COM2 is loop compensation input terminal 2, a 120Ω resistor and a 220nF capacitor are connected in series between this pin and ground; FB is the battery voltage feedback terminal, an external resistor divider network is connected to detect the battery voltage; COM3 is loop compensation input terminal 3, a 100nF capacitor is connected between this pin and ground; NC is not connected; CSP is the positive input terminal for charging current detection, this pin and BAT pin measure the voltage across the charging current detection resistor RCS, and feed this voltage signal back to the chip for current modulation; BAT is the negative input terminal for charging current detection, this pin and CSP pin measure the voltage across the charging current detection resistor RCS, and feed this voltage signal back to the chip for current modulation; VCC is the external power input terminal, which is also the power supply for the internal circuit; DRV is used to drive the gate of the off-chip P-channel MOS field effect transistor.

[0083] like Figure 6 As shown, the power switch circuit is designed with PMOS NCE60P50K. The circuit function of the power switch circuit is: the battery is always connected to the main control board. When the charging interface is not connected to the external power supply, that is, when not charging, the battery powers the entire system. When the external power supply is connected, only the external power supply is used to power the entire system. S1 is the power switch. Circuit analysis: X6 is always connected to the battery pack. When the external power supply is not connected, the negative electrode of the battery pulls down the G pole of PMOS Q2 through R14, Q2 is turned on (Ug is less than Us by more than 10V), and the battery current passes through the S pole of Q2 to the D pole, and then through the parasitic diode of Q1 (the diode is not directly used here to reduce the voltage drop and energy consumption) to reach point A, V2850WQ03 is cut off, and the A voltage is the battery voltage of 14.8V. Turn on switch S1 and the system is powered by the battery. Among them, the diodes V2850WQ03 and V161N4148 are used to prevent the battery from leaking to the outside when the external connection is not powered on. When connected to an external power source and powered on externally (i.e. connected and powered), V28 is turned on, and the voltage at point A is the external voltage. The external voltage pulls up the G pole of Q2 after passing through the voltage divider resistors R13 and R14, and Q2 is cut off. The battery current cannot pass through Q2, thus ensuring that only the external power source is used without consuming battery power. At the same time, the external power source can also charge the battery through the (1) power supply and battery power management circuit. Among them, the voltage obtained after the S1 switch mainly powers the audio power amplifier circuit.

[0084] like Figure 7As shown in the figure, the 5V voltage regulator circuit requires 3.3V power supply for most ICs on the main control board. In order to avoid excessive voltage drop and crosstalk between the power supplies of each module, the external voltage or battery voltage must be stepped down to 5V first, and then the voltage is stepped down to 3.3V to power each module. In order to reduce heat and energy consumption, the DC-DC voltage regulator LM2596-5.0 is used. The LM2596 switching voltage regulator is a step-down power management monolithic integrated circuit. It can output a driving current of 3A and has good linear and load regulation characteristics. The device integrates frequency compensation and fixed frequency generators, and the switching frequency is 150KHz. Compared with low-frequency switching regulators, smaller filter components can be used, and universal standard inductors can be used, which optimizes the use of LM2596 and greatly simplifies the design of switching power supply circuits. Its packaging forms include standard 5-pin TO-220 package (DIP) and 5-pin TO-263 surface mount package (SMD). The device has other features: under specific input voltage and output load conditions. The output voltage error can be guaranteed within the range of ±4%, and the oscillation frequency error can be guaranteed within the range of ±15%; external power-off can be achieved with a standby current of only 80uA; it has a self-protection circuit (a two-level frequency reduction and current limiting protection and an over-temperature complete protection circuit that cuts off power under abnormal circumstances).

[0085] like Figure 8 and Fig. 9 As shown, the 3V voltage regulator circuit divides the 5V and then steps down the voltage to 3.3V (less crosstalk between the circuit modules) to obtain 3V3-1, 3V3-2, 3V3-3, and 3V3-4, which are used to power the main control MCU, Bluetooth module, 2.4G communication module, and voice module respectively. The 3.3V voltage regulator can use the forward low-dropout voltage regulator AMS1117-3.3. Among them, the 2.4G communication module and the Bluetooth communication module will have instantaneous large current when performing wireless data transmission, which will cause high-frequency and high-amplitude interference to the power supply voltage. For example, in the 2.4G communication module, the processing method used is to perform three-order isolation on the power supply line. As shown in the figure, the three winding inductors L10, L11, and L12 and the three energy storage capacitors C74, C69, and C70 form a three-order isolation circuit, and the specific parameters are shown in the figure. The power supply of the Bluetooth communication module is designed in the same way. AMS1117 is a low dropout voltage regulator. Its voltage regulator is composed of a PNP-driven NPN tube. AMS1117 has 1% accuracy and internally integrates overheat protection and current limiting protection.

[0086] like Fig.10As shown, the return isolation circuit AGND-1 is the ground of the audio power amplifier circuit, DGND-1 is the ground of the main control circuit, DGND-2 is the ground of the Bluetooth communication module, DGND-3 is the ground of the 2.4G communication module, DGND-4 is the ground of the voice module, AGND is the negative electrode of the battery, and PGND is the ground of the charging circuit. Among them, AGND-1, DGND-1, DGND-2, DGND-3, and DGND-4 are connected to AGND at a single point through a 0 ohm resistor or a magnetic bead, and finally AGND is connected to PGND at a single point.

[0087] like Fig.11 and Fig.12 As shown in the figure, the external power supply voltage and battery voltage of the charging connection circuit and the battery voltage detection circuit are sent to the STM32 analog input port after the voltage is divided by the voltage divider resistor and filtered by the filter capacitor. The STM32 can obtain the external voltage condition after AD conversion of the voltage. When the STM32 detects that the Charg_Voltage is at a high level, it can be known that the external power supply is currently connected and powered, that is, the connection condition of the external power supply is obtained. After the system is running, the STM32 detects the Battary_Voltage voltage, and after AD conversion and data processing, the current battery voltage can be known, and then the remaining battery power can be calculated. Among them, Charge_Voltage is connected to the 36th pin of STM32 (PB1 / ADC1_IN9); Battary_Voltage is connected to the 35th pin of STM32 (PB0 / ADC1_IN8).

[0088] like Fig.13 As shown, the Bluetooth communication module model BTM0608C2X has a total of 58 pins, and its IO allocation is as follows Fig.13As shown. Among them, pin 53 (RST#) is the BTM reset pin, which is valid at low level. Among them, pin 1 (PIO[1]) is the forced reset pin. After pulling this pin high for a period of time, the BTM enters the matching state. In this state, any other terminal device that can search for this BTM can directly match and connect to this BTM. This pin is labeled Blue_Force_RST and connected to pin 47 (PB10) of STM32 for convenient BTM state control. Among them, pin 7 (PIO7) is the BTM parameter setting state switching control port; when PIO7 is high level, the output (indicator) pins of the BTM are all off (LEDx pin outputs high level, PIOx pin outputs low level), and the module works in the parameter setting state. In the parameter setting state, the module RF signal stops working, and only the module parameters can be set at this time. When PIO7 is low level, the module exits the parameter setting state and starts the normal working mode. The module parameters cannot be set. This pin labeled Blue_IO7_State is connected to the STM32 pin No. 41 (PE10) to facilitate the control of the BTM state. Among them, pin No. 54 (UART_RX), pin No. 55 (UART_RTS), pin No. 56 (UART_TX), and pin No. 57 (UART_CTS) are respectively the UART data receiving port, UART data request sending port (low level is valid), UART data sending port, and UART clear sending port (low level is valid) of the BTM. (That is, the serial port receiving and sending and data flow control port). As shown in the figure, they are labeled Blue_USART2_TX, Blue_USART2_CTS, Blue_USART2_RX, and Blue_USART2_RTS, and are connected to the STM32 pin No. 25 (PA2), pin No. 23 (PA0), pin No. 26 (PA3), and pin No. 24 (PA1). Among them, pin No. 18 (VREGENABLE) is the power on / off pin. Among them, pin 58 (PIO[0]) (high level is valid) and pin 48 (LED[0]) (low level is valid) are used to connect indicator lights to indicate the module status. After connecting to the corresponding pin indicator lights, the main status indications are as follows: matching status LED[0] and PIO[0] flash alternately; connection status, LED[0] is off, PIO[0] flashes once per second; standby status, PIO[0] is off, LED[0] flashes once every 3 seconds; among them, pin 40 (BT_RF2) is connected to the chip ceramic antenna, and the audio output pins 35 (SPKR_LP) and 37 (SPKR_RP) are coupled into an audio signal WS-OUT through a 1uF coupling capacitor and led to the volume adjustment board interface JP1 (that is, the left and right channels of the Bluetooth module are coupled into one channel) as the main Bluetooth audio signal line.

[0089] like Fig.14 As shown, the Bluetooth communication module startup circuit Bluetooth communication module pin 18 (VREGENABLE) is the switch pin, which cannot be powered on at the same time as pin 13 (VBAT) and pin 15 (3V3), and must be powered on with a delay. The figure shows the VREGENABLE signal delayed power-on circuit. Circuit analysis: At the moment of power-on, 3V3-2 is equivalent to a step signal, C21 is powered, and a high level is obtained through the voltage divider resistors R97 and R36 to the base of T1, T1 is turned on, VREGENABLE is pulled low, and after C21 is discharged through R97 and R36, the base of T1 is pulled low by R36, T1 is turned off, and VREGENABLE obtains a 3V3-2 voltage through the R35 pull-up resistor. Increase C21 and R36 and increase the VREGENABLE delay power-on time.

[0090] like Fig.15 and Fig.16 As shown in the figure, the reset circuit of the Bluetooth communication module includes normal reset and forced reset; the Blue_RST port is connected to the No. 53 (RST#) pin of the BTM, which is pulled high by the R34 pull-up resistor, and the reset port can be pulled low by the SW3 button to reset the BTM. This operation does not require STM32 control (no operation is required when the system is running), and is used as a manual reset to troubleshoot hardware faults. Among them, the No. 1 (PIO[1]) pin of the BTM is the forced reset pin. After pulling this pin high for a period of time, the BTM enters the matching state. In this state, any other terminal device that can search for this BTM can directly match and connect to this BTM. Connect the forced reset control circuit Blue_Force_RST to the No. 1 (PIO[1]) pin of the BTM, and the forced reset operation can be performed by pressing the SW4 button. At the same time, this pin is connected to the No. 47 (PB10) pin of the STM32 to facilitate BTM state control.

[0091] like Fig.17 and Fig.18 As shown in FIG. 1 , the Bluetooth communication module status indication circuit BTM pin No. 58 (PIO[0]) (high level is valid) and pin No. 48 (LED[0]) (low level is valid) are used to connect the indicator light to indicate the module status. LED[0] is connected to Fig.18 The BLED0 port of PIO[0] is connected to Fig.18PIO0 port. Since PIO0 is high level effective and its driving capability is insufficient, NPN transistor T4 2N3904 is added to indirectly control multiple LEDs. Among them, BLED1, BLED0, and 3V3-2 are connected to the volume adjustment board interface JP1 to drive the LED on the adjustment board to indicate the BTM status. X20 and X21 interfaces can also be directly connected to LEDs as indicator lights. The main status indications are as follows: matching status LED[0] and PIO[0] flash alternately; connection status, LED[0] is off, PIO[0] flashes once per second; standby status, PIO[0] is off, and LED[0] flashes continuously once every 3 seconds.

[0092] See also Figures 19 to 28 Furthermore, it also includes a voice circuit module, which is connected to the power switching circuit. The voice circuit module is also connected to the control interface and the communication interface of the chip unit respectively. The voice circuit module is used to receive physical measurement data and perform voice broadcast through voice signals.

[0093] Furthermore, the voice circuit module includes an audio power amplifier circuit, a voice module, a voice module expansion module and a volume adjustment board circuit; the voice module is respectively connected to the power switching switch circuit, the audio power amplifier circuit, the volume adjustment circuit and the voice module expansion module, and the voice module is also respectively connected to the control interface and the communication interface; the audio power amplifier circuit, the volume adjustment board circuit and the voice module expansion circuit are respectively connected to the power switching switch circuit, and the audio power amplifier circuit, the volume adjustment board circuit and the voice module expansion circuit are respectively connected to the control interface.

[0094] like Fig.19 and Fig. 20 As shown in the figure, the voice module circuit and the voice module expansion interface circuit, the voice module SYN6658 Chinese speech synthesis chip is a high-end speech synthesis chip of Beijing Yuyintianxia Technology Co., Ltd. SYN6658 receives the text data to be synthesized through the UART interface or SPI interface communication method to realize the conversion of text to speech (or TTS speech). The chip supports the synthesis of any Chinese text, and can adopt four encoding methods: GB2312, GBK, BIG5 and Unicode. The amount of text synthesized each time can reach 4K bytes.

[0095] The pin description is as follows:

[0096] 1A: GND--------ground

[0097] 2A: NC ------ hanging

[0098] 3A: NC ------ hanging

[0099] 4A: RESET-------Reset pin

[0100] 5A: PWR_IN-----Power input

[0101] 6A: GND---------ground

[0102] 7A: TXD---------Serial port sending

[0103] 8A: RXD---------Serial port receiving

[0104] 1B: AO_P----------Audio output-positive

[0105] 2B: AO_N---------Audio output-negative

[0106] 3B: R / B-------------Chip working status indication

[0107] 4B: NC ------ hanging

[0108] 5B: SPI_SSEL-----SPI communication selection signal

[0109] 6B: SPI_SO--------SPI communication slave output

[0110] 7B: SPI_SI---------SPI communication slave input

[0111] 8B: SPI_CLK-------SPI communication clock signal

[0112] Among them, the 4A (RESET) pin of SYN is connected to the 67th (PA8) pin of STM32;

[0113] SYN's 4A (RESET) pin is connected to STM32's 67 (PA8) pin;

[0114] SYN's 7A (TXD) pin is connected to STM32's 69 (PA10 / USART1_RX) pin;

[0115] SYN's 8A (RXD) pin is connected to STM32's 68th (PA9 / USART1_TX) pin;

[0116] Pin 2B (AO_P) of SYN is connected to the volume adjustment board interface JP1 through C51 1uF coupling capacitor.

[0117] Interface X3 can be used to expand the connection to external text signals (not just receiving voice and text information from STM32).

[0118] like Fig.21 As shown in the figure, the audio power amplifier circuit TPA3110D2-Q1 is a 15W (per channel) high-efficiency, Class D audio power amplifier for driving bridge-tied stereo speakers. Advanced electromagnetic interference (EMI) suppression technology enables users to use inexpensive magnetic bead filters on the output while meeting electromagnetic compatibility (EMC) requirements. The SpeakerGuard protection circuit system includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter allows the user to set a virtual voltage rail lower than the chip supply voltage to limit the amount of power passing through the speaker. The DC detection circuit can measure the frequency and amplitude of the pulse width modulation (PWM) signal, and it will shut down the output stage if the input capacitor is damaged or there is a short circuit at the input. The TPA3110D2-Q1 can drive stereo speakers as low as 4Ω. The device has a high efficiency of 90%, and no external heat sink is required when playing music. The output is fully protected against shorts to GND, VCC, and output to output. Both short-circuit protection and thermal protection contain automatic recovery functions.

[0119] The functions of each pin are described as follows:

[0120] 1. / SD: Audio amplifier logic shutdown input (low level output is high impedance, high level enable), TTL level compatible with AVCC;

[0121] 2. / FAULT: open-drain output, used to indicate the status of short circuit or DC detection error. The voltage is compatible with AVCC. Directly connecting to the / SD pin can set automatic recovery of short circuit fault;

[0122] 3.LINP: left channel positive audio input, biased at 3V;

[0123] 4. LINN: left channel negative audio input, biased at 3V;

[0124] 5. GAIN0: The low bit of the gain setting effective bit;

[0125] 6. GAIN1: The high bit of the gain setting effective bit;

[0126] 7. AVCC: analog power positive;

[0127] 8. AGND: analog power ground;

[0128] 9. GVDD: High-side FET gate drive power supply, rated voltage is 7V, used to drive the PLIMIT pin and its functions;

[0129] 10. PLIMIT: Used for power limit adjustment. Connect a potentiometer between GVDD and GND to set the power directly.

[0130] Connect to GVDD without power limitation;

[0131] 11. RINN: right channel negative audio input, biased at 3V;

[0132] 12. RINP: right channel positive audio input, biased at 3V;

[0133] 13. NC: Not connected;

[0134] 14. PBTL: Parallel BTL mode switch;

[0135] 15. PVCCR: Right channel H-bridge power supply, left and right channel power supply inputs are internally connected;

[0136] 16. PVCCR: Right channel H-bridge power supply, left and right channel power supply inputs are internally connected;

[0137] 17. BSPR: Guide I / O for the right channel, high-side FET positive;

[0138] 18. OUTPR: Class D H-bridge right channel positive output;

[0139] 19. PGND: H-bridge power ground;

[0140] 20. OUTNR: Class D H-bridge right channel negative output;

[0141] 21. BSNR: Guide I / O for the right channel, negative for high-side FET;

[0142] 22. BSNL: Guide I / O for the left channel, negative for high-side FET;

[0143] 23. OUTNL: Class D H-bridge left channel negative output;

[0144] 24. PGND: H-bridge power ground;

[0145] 25. OUTPL: Class D H-bridge left channel positive output;

[0146] 26. BSPL: Guide I / O for the left channel, high-side FET positive;

[0147] 27. PVCCL: Left channel H-bridge power supply, right channel and left channel power supply input internal connection;

[0148] 28. PVCCL: Left channel H-bridge power supply, right channel and left channel power supply input internal connection;

[0149] like Fig.21, / SD is pulled down by R20 10K resistor, i.e. power-on disabled, in order to prevent noise output caused by power-on current impact; TPA-SD indirectly controls / SD through T2 2N3904 transistor, TPA-SD is connected to STM32 No. 7 (PC13) pin; Signal-BK is the final signal port of the audio signal, coming from the volume adjustment board (i.e. connected to the volume adjustment board interface), as shown in the figure, it is finally input to the TPA amplifier through a 1uF coupling capacitor; X8 interface is connected to the speaker;

[0150] Furthermore, the volume adjustment board circuit includes a power reference voltage circuit, a first-stage amplifier circuit, a high-pitched tone adjustment circuit, a second-stage amplifier circuit, an LED indicator light, an interface for connecting to a mainboard, and an OLED module. The power reference voltage circuit, the first-stage amplifier circuit, the high-pitched tone adjustment circuit, the second-stage amplifier circuit, the LED indicator light, an interface for connecting to a mainboard, and an OLED module are respectively connected to the power switching circuit and the control interface of the chip unit.

[0151] The volume control board uses a UTC4558E dual op amp to amplify the volume in two stages; a 10K potentiometer and resistor and capacitor form an attenuation type RC tone control circuit. UTC455E is a dual operational amplifier with two independent, high gain and internal frequency compensation. It is suitable for dual power supply mode and also for single power supply with a wide power supply voltage range.

[0152] like Fig. 22 As shown in the figure, the single power supply reference voltage interface circuit, because the power supply from the mainboard does not have a negative power supply, and the 5V power supply in the low-voltage power supply is sufficient and stable, 5V is drawn from the mainboard to power the op amp on the adjustment board. Because it is a single power supply and the audio signal is a bipolar signal, a "DC bias voltage" must be provided for the op amp to make the output voltage swing around a suitable level. This level is generally selected from the midpoint voltage of the op amp power supply. On the one hand, the input negative voltage can be output correctly, and on the other hand, the maximum dynamic range can be obtained. Fig. 22 , use two 24K voltage-dividing resistors AR96 and AR97 to get the +5V midpoint voltage +2.5V, and after filtering by capacitor AC85, connect it to the two positive input terminals of the dual op amp (pins 3 and 5 of UTC4558).

[0153] like Fig.23As shown, the first-stage amplifier circuit interface circuit uses one of the UTC4558 op amps to amplify the audio signal. The circuit is essentially a low-pass filter circuit with gain. As shown in the figure, WS-OUT is the audio signal from the mainboard SYN or BTM, and ExteAudOUT is the audio signal from the microphone connected to the mainboard. A 10K potentiometer is used to adjust the amplitude of the two audio signals. The volume control process is to adjust the volume by controlling the input amount of the audio signal through these two potentiometers. The gain of the circuit can be increased by increasing the resistance ratio of AR94 to AR92 (AR93) (that is, reducing AR92 or increasing AR94). The functions of the AC83 capacitor include: reducing the triggering conditions for the high-frequency self-oscillation of the amplifier; widening the gain bandwidth of the amplifier; among them, AC82 and AC88 are audio coupling capacitors, the purpose is to isolate DC and pass AC, that is, to remove the DC component in the signal; RriAmp_Out is the output of this first-stage amplifier circuit.

[0154] like Fig.24 As shown, the high-pitched tone adjustment circuit is realized by using an attenuation type RC tone control circuit; as shown in the figure, RriAmp_Out comes from the output of the first-stage amplifier circuit. TonReg_out is the output signal after tone adjustment; the volume of the high-frequency signal can be adjusted by adjusting the RP3 potentiometer, that is, the tone is raised. Circuit principle: For bass and mid-range, AC86 is equivalent to an open circuit. At this time, the bass and mid-range are adjusted by AR100 amplitude after passing through AR103 and AR99, and finally coupled to AC89 output; for high-frequency signals, the capacitive reactance of AC86 is very small, and the high-frequency signal can pass smoothly. After the amplitude is adjusted by RP3 and AR100, it is coupled to AC89 output. As shown in the figure, when the audio frequency reaches a certain level and RP3 is adjusted to the far left, AC86 is equivalent to a short circuit, which is equivalent to the audio signal directly reaching the coupling capacitor AC89. Relative to the bass, the volume of the treble is increased, and the overall tone is improved in hearing.

[0155] like Fig.25 As shown, TonReg_out of the second-stage amplifier circuit is the output signal after tone adjustment; Signal_BK is the signal output of this amplifier circuit. The principle of the second-stage amplifier circuit is the same as that of the first-stage amplifier circuit.

[0156] like Fig.26 and Fig. 27As shown, connect the mainboard interface circuit and OLED module circuit. The mainboard interface includes JP1 and JP4. The functions of each pin have been described in the mainboard circuit. On this volume adjustment board, a 0.96 OLED display module needs to be installed. The resolution of 0.96 inch OLED is 128*64. The OLED display module uses SSD (Solid State Drives) 1306 driver, and the video memory is 128*64bit. SSD1306 divides all video memory into 8 pages, 128 bytes per page. The module uses SPI serial communication protocol. The module displays content under the drive of MCU clock and MOSI, but cannot display Chinese. Since the Chinese font library is not small, the Chinese font library is downloaded to W25Q32, and the MCU reads the font data from W25Q32, that is, the external Flash. The display module has 7 pins: CLK, MOSI, RST, CS, D / C, VCC, GND. Among them, CLK and MOSI are the main pins for SPI communication; / CS is the OLED chip select signal, which is valid at low level; D / C is the data / command flag, 0-command, 1-data; RST is the reset pin of the module.

[0157] like Fig.28 As shown, the LED indicator lights, BLED0 and BLED1 indicator light control signals come from the BTM status indication signal on the mainboard, and their indication status has been described in the mainboard; the CHG indicator light control signal comes from the charging IC on the mainboard.

[0158] See also Figure 29 to Figure 35 Furthermore, it also includes an interactive interface module, the interactive interface circuit is connected to the power switching circuit, and the interactive interface circuit is connected to each part of the circuit to provide an interface for each part of the circuit.

[0159] Furthermore, the interactive interface module includes a buzzer drive circuit, a debugging indicator light, a debugging interface, a button interface, an interface JP1 for connecting to a volume adjustment board, an interface JP4 for connecting to a volume adjustment board, a Flash storage interface, and an interface for connecting to a microphone board. The buzzer drive circuit and the debugging indicator light are respectively connected to a power switching circuit, the buzzer drive circuit and the debugging indicator light are respectively connected to a control interface of a chip unit, and the buzzer drive circuit and the debugging indicator light are also respectively connected to a communication interface.

[0160] like Fig.29As shown, there are two interfaces for connecting to the volume adjustment board. JP1 is used for the transmission of audio signals and various indicator light signals. JP4 is specifically used to transmit OLED drive signals. Because the OLED module uses SPI communication, which is a high-frequency signal communication, the electromagnetic interference generated will become noise on the audio line, so the OLED connection line has an independent interface JP4 and is as far away from JP1 as possible. Among them, 3V3-2, BLED0, and BLED1 are the power supply of the BTM module and its indication signal; WS-OUT is the audio signal output of BTM and SYN; ExteAud_OUT is connected to the microphone board interface to obtain the microphone audio signal. +5V and AGND power the volume adjustment board; Signal-BK is the audio signal sent back after the volume adjustment board is adjusted; +23 and CHG' are the battery charging indication signals; the explanation of the JP4 interface is detailed in the volume adjustment board section.

[0161] like Fig.30 As shown, the microphone board interface circuit is connected. The signal from the microphone is connected to this interface and then connected to the volume adjustment board interface through the C50 1uF capacitor.

[0162] like Fig.31 As shown, the Flash storage circuit, W25Q32 (32M-bit) is a serial Flash memory that provides a minimum space, pin and power consumption memory solution for the system. The 25Q series is more flexible and has better performance than ordinary serial Flash memories. Based on double / quadruple SPI, they can immediately provide data to RAM, including storing sound, text and data. The chip supports an operating voltage of 2.7V to 3.6V, and the current is less than 5mA during normal operation and less than 1uA when powered off. All chips are provided in standard packages.

[0163] The W25Q32 consists of 256 bytes per page, a total of 16,384 pages. Each 256-byte page can be programmed with a single page programming instruction. Each erase is 16 pages (sectors), 128 pages (32KB blocks), 256 pages (64KB blocks) and full chip erase. The W25Q32 has 1024 erasable sectors and 64 erasable blocks. The minimum 4KB sector allows more flexible applications to require data and parameter preservation.

[0164] W25Q32 supports standard serial peripheral interface (SPI), and high-speed double / quadruple output, double / quadruple pins: serial clock CLK, chip select / CS, serial data DI, DO, / WP and / HOLD. SPI supports up to 80MHz, when using fast read double / quadruple instructions, it is equivalent to a maximum rate of 160MHz for double output and a maximum rate of 320MHz for quadruple output. This transfer rate is comparable to 8-bit and 16-bit parallel Flash memories. HOLD pin and write protection pin can be programmable write protection. In addition, the chip supports JEDEC standards and has a unique 64-bit identification serial number.

[0165] Among them, the No. 1 ( / CS) pin of W25Q is connected to the No. 51 (PB12) pin of STM32;

[0166] Pin 2 (DO) of W25Q is connected to pin 53 (PB14 / SPI2_MISO) of STM32;

[0167] Pin 3 ( / WP) of W25Q is connected to pin 55 (PD8) of STM32;

[0168] Pin 5 (DI) of W25Q is connected to pin 54 (PB15 / SPI2_MOSI) of STM32;

[0169] Pin 6 (CLK) of W25Q is connected to pin 52 (PB13 / SPI2_SCK) of STM32;

[0170] Pin 7 ( / HOLD) of W25Q is connected to pin 56 (PD9) of STM32;

[0171] like Fig.32 As shown, the buzzer drive circuit uses a low-power passive buzzer to realize low-voltage or fault alarm or operation prompt function; as shown in the figure, BUZZER indirectly controls the buzzer through a T32N3904 transistor. When BUZZER is high (low), T3 is turned on and the buzzer is turned on (off); resistor R31 2.2K is used to limit the BUZZER signal current; R58 1K is used to pull down the base of T3 to prevent power-on; the buzzer is an inductive component, so V15 1N4148 freewheeling diode is required for the buzzer power-off freewheeling. BUZZER is connected to the 66th (PC9) pin of STM32.

[0172] like Fig.33 , Fig.34 and Fig.35As shown in the figure, the debug interface circuit, the key interface circuit and the debug LED circuit, the debug interface and the key interface are convenient for connecting to the PC and external keys for program debugging and control testing; the debug LED can be used as a dynamic indicator for debug testing, or as an indicator for normal operation of the system or peripherals. The debug interface leads to the STM32 on-chip peripherals UART4 and UART5. The key interface uses pull-up resistors R30 and R15 for external pull-up, and the key signal is valid at low level, that is, short-circuiting the two pins of SW1 or the two pins of SW2. C22 and C43 are key signal debounce capacitors. Among them, pins 2 and 3 of JP2 are connected to pins 78 (UART4_TX) and 79 (UART4_RX) of STM32 respectively; pins 2 and 3 of JP3 are connected to pins 80 (UART5_TX) and 83 (UART5_RX) of STM32 respectively; SW1 is connected to pin 60 (PD13) of STM32; SW2 is connected to pin 61 (PD14) of STM32; LED_Fore_Test is connected to pin 1 (PE2) of STM32;

[0173] Furthermore, the main control circuit module also includes a reset circuit, a crystal oscillator circuit, a JTAG debugging interface, a startup mode control circuit and a reference voltage circuit. The reset circuit, the crystal oscillator circuit, the JTAG debugging interface, the startup mode control circuit and the reference voltage circuit are respectively connected to the power switching circuit, and the reset circuit, the crystal oscillator circuit, the JTAG debugging interface, the startup mode control circuit and the reference voltage circuit are respectively connected to the control interface of the chip unit.

[0174] Furthermore, the power circuit module includes a 5V voltage regulator circuit, a 3.3V voltage regulator circuit, a return ground isolation circuit, a charging connection and a battery voltage detection circuit. The 5V voltage regulator circuit, the 3.3V voltage regulator circuit, the return ground isolation circuit, the charging connection and the battery voltage detection circuit are respectively connected to the power battery power supply management circuit and the power switching circuit, and the 5V voltage regulator circuit, the 3.3V voltage regulator circuit, the return ground isolation circuit, the charging connection and the battery voltage detection circuit are respectively connected to the control interface of the chip unit.

[0175] Preferably, the 5V voltage stabilization circuit is designed using a DC-DC voltage regulator LM2596-5.0; and the 3.3V voltage stabilization circuit is designed using an LDO voltage regulator AMS1117-3.3.

[0176] Furthermore, the first wireless communication module includes a 2.4G communication module control circuit, and the second wireless communication module includes a Bluetooth communication module control circuit. The 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the power switching circuit, the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the control interface of the chip unit, and the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the communication interface.

[0177] Preferably, the model of the Bluetooth communication module is BTM0608C2X; the model of the 2.4G communication module is NRF24L01.

[0178] Furthermore, the Bluetooth communication module control circuit includes a manual reset circuit, a forced reset circuit, a status indication circuit and a startup circuit. The manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the power switching circuit, the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the control interface of the chip unit, and the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the communication interface.

[0179] The above-mentioned embodiments are only preferred embodiments of the present invention and cannot be used to limit the scope of protection of the present invention. Any non-substantial changes and substitutions made by technicians in this field on the basis of the present invention shall fall within the scope of protection required by the present invention.

Claims

1. The intelligent wireless speaker is characterized by: It includes a main control circuit module, a power circuit module and a wireless communication circuit module, wherein the main control circuit module includes a chip unit, and the chip unit includes a power interface, a communication interface and a control interface; the power circuit module includes a power supply battery power management circuit and a power supply switching circuit, and the power supply battery power management circuit is connected to the power supply switching circuit; the wireless communication circuit module includes a first wireless communication module and a second wireless communication module; the power supply interface of the chip unit is connected to the power supply switching circuit, and the control interface of the chip unit is respectively connected to the power supply battery power management circuit and the power supply switching circuit; the communication interface and the control interface of the chip unit are respectively connected to the first wireless communication module, and the communication interface and the control interface of the chip unit are also respectively connected to the second wireless communication module, and the power supply switching circuit is also respectively connected to the first wireless communication module and the second wireless communication module; the chip unit controls the first communication module to communicate with the external physical measurement equipment and receive the detection data of the physical measurement equipment, and the chip unit processes the physical measurement data and sends it to the external terminal equipment through the second wireless communication module; The power supply battery power supply management circuit is designed using the CN3705 charging IC, and the CHG lead and the DCHG lead are respectively connected to the 38th pin and the 39th pin of the STM32 main control; the +23V lead and the CHG' lead are connected to the volume adjustment board interface JP1, and the LED indicator on the volume adjustment board is driven to indicate the charging status; the 220V AC power is adjusted to AC 24V by the transformer and connected to the X1 charging interface of the power supply battery power supply management circuit, and a DC power close to 23V is obtained through the rectifier bridge KBP307 and the filter capacitor C1, and the voltage and current are controlled and adjusted by the CN3705 charging IC to power the battery.

2. The body measurement intelligent wireless speaker according to claim 1, characterized in that: It also includes a voice circuit module, which is connected to the power switching circuit and is also connected to the control interface and communication interface of the chip unit respectively. The voice circuit module is used to receive the physical measurement data and perform voice broadcasting through voice signals.

3. The body measurement intelligent wireless speaker according to claim 2, characterized in that: The voice circuit module includes an audio power amplifier circuit, a voice module, a voice module expansion module and a volume adjustment board circuit; the voice module is respectively connected to the power switching switch circuit, the audio power amplifier circuit, the volume adjustment circuit and the voice module expansion module, and the voice module is also respectively connected to the control interface and the communication interface of the chip unit; the audio power amplifier circuit, the volume adjustment board circuit and the voice module expansion circuit are respectively connected to the power switching switch circuit, and the audio power amplifier circuit, the volume adjustment board circuit and the voice module expansion circuit are respectively connected to the control interface of the chip unit.

4. The body measurement intelligent wireless speaker according to claim 3, characterized in that: The volume adjustment board circuit includes a power reference voltage circuit, a first-stage amplifier circuit, a high-pitched tone adjustment circuit, a second-stage amplifier circuit, an LED indicator light, an interface for connecting to a mainboard, and an OLED module. The power reference voltage circuit, the first-stage amplifier circuit, the high-pitched tone adjustment circuit, the second-stage amplifier circuit, the LED indicator light, the interface for connecting to the mainboard, and the OLED module are respectively connected to the power switching circuit and the control interface of the chip unit.

5. The body measurement intelligent wireless speaker according to claim 1, characterized in that: It also includes an interactive interface module, which is connected to the power switch circuit and connected to various circuit parts to provide an interface for each circuit part.

6. The body measurement intelligent wireless speaker according to claim 5, characterized in that: The interactive interface module includes a buzzer drive circuit, a debugging indicator light, a debugging interface, a button interface, an interface JP1 for connecting to a volume adjustment board, an interface JP4 for connecting to a volume adjustment board, a Flash storage interface, and an interface for connecting to a microphone board. The buzzer drive circuit and the debugging indicator light are respectively connected to the power switching circuit, the buzzer drive circuit and the debugging indicator light are respectively connected to the control interface of the chip unit, and the buzzer drive circuit and the debugging indicator light are also respectively connected to a communication interface.

7. The body measurement intelligent wireless speaker according to claim 1, characterized in that: The main control circuit module also includes a reset circuit, a crystal oscillator circuit, a JTAG debugging interface, a startup mode control circuit and a reference voltage circuit. The reset circuit, the crystal oscillator circuit, the JTAG debugging interface, the startup mode control circuit and the reference voltage circuit are respectively connected to the power switching circuit, and the reset circuit, the crystal oscillator circuit, the JTAG debugging interface, the startup mode control circuit and the reference voltage circuit are respectively connected to the control interface of the chip unit.

8. The body measurement intelligent wireless speaker according to claim 1, characterized in that: The power circuit module also includes a 5V voltage stabilizing circuit, a 3.3V voltage stabilizing circuit, a return ground isolation circuit, a charging connection and a battery voltage detection circuit. The 5V voltage stabilizing circuit, the 3.3V voltage stabilizing circuit, the return ground isolation circuit, the charging connection and the battery voltage detection circuit are respectively connected to the power battery power supply management circuit and the power switching switch circuit, and the 5V voltage stabilizing circuit, the 3.3V voltage stabilizing circuit, the return ground isolation circuit, the charging connection and the battery voltage detection circuit are respectively connected to the control interface of the chip unit.

9. The body measurement intelligent wireless speaker according to claim 1, characterized in that: The first wireless communication module includes 2.4G communication module control circuit, the second wireless communication module includes a Bluetooth communication module control circuit, the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the power switch circuit, the 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the control interface of the chip unit, the The 2.4G communication module control circuit and the Bluetooth communication module control circuit are respectively connected to the communication interface.

10. The smart wireless speaker for body measurement according to claim 9, characterized in that: The Bluetooth communication module control circuit includes a manual reset circuit, a forced reset circuit, a status indication circuit and a startup circuit. The manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the power switching circuit, the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the control interface of the chip unit, and the manual reset circuit, the forced reset circuit, the status indication circuit and the startup circuit are respectively connected to the communication interface.

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