Independent third-party monitoring system based on dual processors

Abstract

The present invention discloses an independent third-party monitoring system based on a dual processor, which is composed of a first power rail, a functional processing circuit, a functional circuit, a second power rail, a monitoring processing circuit, and a monitoring circuit. The present invention adopts a system-level BIT based on a dual processor for the key states of commercial rocket power distribution and ignition timing, thereby avoiding the inherent defects of device-level BIT based on a single processor, such as the loss of real-time performance and the inability to detect marginal faults. In addition, by accurately dividing the functions of high- and low-performance processors, reasonably setting the key state monitoring and calibration points of commercial rocket power distribution and ignition timing, and using multi-channel, self-calibration communication technology to coordinate the working states of the dual processors, the independent third-party monitoring system for the key states of commercial rocket power distribution and ignition timing based on the dual processor can have the characteristics of strong anti-interference ability and high working reliability, thereby ensuring the accuracy of commercial rocket self-test and flight telemetry data.

Description

Technical Field

[0001] The present invention relates to the technical field of commercial rocket status monitoring, and in particular to an independent third-party monitoring system based on dual processors. Background Art

[0002] The status monitoring of the power distribution and ignition sequence of commercial rockets is directly related to the reliability and safety of rocket launches. At present, the status monitoring of the power distribution and ignition sequence of commercial rockets is generally implemented by a single-processor-based device-level BIT (Prognostics and Health Management). However, the single-processor-based device-level BIT uses the same processor to implement its functional tasks and BIT tasks, which not only occupies precious processor resources and affects the real-time response of the system, but also fails to detect the system edge faults of the processor, and even causes a system shutdown when the processor is abnormal. Summary of the invention

[0003] The present invention aims to solve the problem that the status monitoring of the power distribution and ignition timing of existing commercial rockets uses a device-level BIT based on a single processor, which will affect the real-time response of the system and may even cause a system shutdown when the processor is abnormal. An independent third-party monitoring system based on a dual processor is provided.

[0004] To solve the above problems, the present invention is achieved through the following technical solutions:

[0005] An independent third-party monitoring system based on dual processors is composed of a first power rail, a function processing circuit, a function circuit, a second power rail, a monitoring processing circuit, and a monitoring circuit. The first power rail supplies power to the function processing circuit and the function circuit; the function processing circuit communicates with the flight control computer through the first external communication bus, the second external communication bus, and the third external communication bus to receive control commands and report working status data to the flight control computer; under the control of the function processing circuit, the function circuit realizes power distribution and related ignition timing control of commercial rockets, and feeds back the corresponding power distribution and ignition control results to the function processing circuit. The second power rail supplies power to the monitoring processing circuit and the monitoring circuit; the monitoring processing circuit communicates with the telemetry center through the fourth external communication bus and the fifth external communication bus to receive telemetry commands and report monitoring data to the telemetry center; under the control of the monitoring processing circuit, the monitoring circuit uses the first state acquisition bus to collect the core working state of the function processing circuit, and uses the second state acquisition bus to collect the core working state of the function circuit, and feeds back the corresponding acquisition results to the monitoring processing circuit. A function processor is provided in the function processing circuit, and a monitoring processor is provided in the monitoring processing circuit. The function processor and the monitoring processor are mutually calibrated via a first internal communication bus and a second internal communication bus.

[0006] In the above scheme, the function processing circuit includes a function processor, a first isolation communication interface circuit, a second isolation communication interface circuit, a third isolation communication interface circuit, a first power supply BIT, and a first power management circuit; the first communication port of the function processor is connected to the first external communication bus through the first isolation communication interface circuit; the second communication port of the function processor is connected to the second external communication bus through the second isolation communication interface circuit; the third communication port of the function processor is connected to the third external communication bus through the third isolation communication interface circuit; the BIT control port and the BIT acquisition port of the function processor are connected to the first power rail through the first power supply BIT; the core power port, the auxiliary power port, the first peripheral power port, the second peripheral power port and the third peripheral power port of the function processor are connected to the first power rail through the first power management circuit; the first power supply BIT is connected to the first power management circuit; the power distribution control port, the power distribution acquisition port, the ignition control port and the ignition acquisition port of the function processor are connected to the function circuit; the fourth communication port of the function processor is connected to the monitoring processor of the monitoring processing circuit through the first internal communication bus; the fifth communication port of the function processor is connected to the monitoring processor of the monitoring processing circuit through the second internal communication bus.

[0007] In the above scheme, the monitoring and processing circuit includes a monitoring processor, a fourth isolated communication interface circuit, a fifth isolated communication interface circuit, a second power supply BIT, and a second power management circuit; the fourth communication port of the monitoring processor is connected to the fourth external communication bus through the fourth isolated communication interface circuit; the fifth communication port of the monitoring processor is connected to the fifth external communication bus through the fifth isolated communication interface circuit; the BIT control port and the BIT acquisition port of the monitoring processor are connected to the second power rail through the second power supply BIT; the core power supply port and the auxiliary power supply port of the monitoring processor are connected to the second power rail through the second power management circuit; the second power supply BIT is connected to the second power management circuit; the SPI port of the monitoring processor is connected to the monitoring circuit; the first communication port of the monitoring processor is connected to the functional processor of the functional processing circuit through the first internal communication bus; the second communication port of the monitoring processor is connected to the functional processor of the functional processing circuit through the second internal communication bus.

[0008] In the above solution, the function processing circuit and the function circuit form an independent function module, and the monitoring processing circuit and the monitoring circuit form an independent monitoring module.

[0009] Compared with the prior art, the present invention proposes an independent third-party monitoring system based on dual processors, which uses a system-level BIT based on dual processors for the key states of commercial rocket power distribution and ignition timing, thereby avoiding the inherent defects of device-level BIT based on a single processor, such as the loss of real-time performance and the inability to detect marginal faults. In addition, by accurately dividing the functions of high- and low-performance processors, reasonably setting the key state monitoring and calibration points of commercial rocket power distribution and ignition timing, and using multi-channel, self-calibration communication technology to coordinate the working states of the dual processors, the independent third-party monitoring system for the key states of commercial rocket power distribution and ignition timing based on dual processors can have the characteristics of strong anti-interference ability and high working reliability, ensuring the accuracy of commercial rocket self-test and flight telemetry data. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 The schematic diagram of a dual-processor based independent third-party monitoring system. DETAILED DESCRIPTION

[0011] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific examples.

[0012] See also Figure 1 , an independent third-party monitoring system based on a dual processor, comprises a first power rail, a function processing circuit, a function circuit, a second power rail, a monitoring processing circuit, and a monitoring circuit.

[0013] The first power rail supplies power to the functional processing circuit and the functional circuit. The functional processing circuit communicates with the flight control computer through the first external communication bus, the second external communication bus and the third external communication bus to receive control commands and report working status data to the flight control computer. Under the control of the functional processing circuit, the functional circuit realizes the power distribution and related ignition timing control of the commercial rocket, and feeds back the corresponding power distribution and ignition control results to the functional processing circuit.

[0014] The function processing circuit includes a function processor, a first isolation communication interface circuit, a second isolation communication interface circuit, a third isolation communication interface circuit, a first power supply BIT, and a first power management circuit. The first communication port of the function processor is connected to the first external communication bus through the first isolation communication interface circuit. The second communication port of the function processor is connected to the second external communication bus through the second isolation communication interface circuit. The third communication port of the function processor is connected to the third external communication bus through the third isolation communication interface circuit. The BIT control port and the BIT acquisition port of the function processor are connected to the first power rail through the first power supply BIT. The core power port, the auxiliary power port, the first peripheral power port, the second peripheral power port and the third peripheral power port of the function processor are connected to the first power rail through the first power management circuit. The first power supply BIT is connected to the first power management circuit. The power distribution control port, the power distribution acquisition port, the ignition control port and the ignition acquisition port of the function processor are connected to the function circuit. The fourth communication port of the function processor is connected to the monitoring processor of the monitoring processing circuit through the first internal communication bus. The fifth communication port of the function processor is connected to the monitoring processor of the monitoring processing circuit through the second internal communication bus.

[0015] The second power rail supplies power to the monitoring processing circuit and the monitoring circuit. The monitoring processing circuit communicates with the telemetry center through the fourth external communication bus and the fifth external communication bus to receive telemetry commands and report monitoring data to the telemetry center. Under the control of the monitoring processing circuit, the monitoring circuit uses the first state acquisition bus to collect the core working state of the functional processing circuit, and uses the second state acquisition bus to collect the core working state of the functional circuit, and feeds back the corresponding acquisition results to the monitoring processing circuit. The first power rail is directly connected to the functional circuit.

[0016] The monitoring processing circuit includes a monitoring processor, a fourth isolated communication interface circuit, a fifth isolated communication interface circuit, a second power supply BIT, and a second power management circuit. The fourth communication port of the monitoring processor is connected to the fourth external communication bus through the fourth isolated communication interface circuit. The fifth communication port of the monitoring processor is connected to the fifth external communication bus through the fifth isolated communication interface circuit. The BIT control port and the BIT acquisition port of the monitoring processor are connected to the second power rail through the second power supply BIT. The core power supply port and the auxiliary power supply port of the monitoring processor are connected to the second power rail through the second power management circuit. The second power supply BIT is connected to the second power management circuit. The SPI port of the monitoring processor is connected to the monitoring circuit. The first communication port of the monitoring processor is connected to the functional processor of the functional processing circuit through the first internal communication bus. The second communication port of the monitoring processor is connected to the functional processor of the functional processing circuit through the second internal communication bus.

[0017] The first power rail is directly connected to the functional circuit, and the second power rail is directly connected to the monitoring circuit. The functional processor and the monitoring processor realize mutual calibration of the functional processing circuit and the monitoring processing circuit through the first internal communication bus and the second internal communication bus. The monitoring circuit is connected to the functional processor of the functional processing circuit through the first state acquisition bus, and the monitoring circuit is connected to the functional circuit through the second state acquisition bus. The functional processing circuit and the functional circuit form an independent functional module, whose function is to meet the commercial rocket flight mission. The monitoring processing circuit and the monitoring circuit form an independent monitoring module, whose function is to meet the commercial rocket self-inspection and flight telemetry requirements. The above-mentioned functional module and monitoring module are assembled together in a shell to form an independent third-party monitoring system.

[0018] The telemetry center sends the power distribution control information of the functional circuit through the flight control computer according to the data reported by the monitoring circuit to complete the power distribution operation; the telemetry center and the flight control computer send the ignition control information of the functional circuit according to the monitoring data reported by the functional processor and the monitoring processor respectively to complete the ignition operation. The monitoring processor communicates with the functional processor through the first internal communication bus and the second internal communication bus, so that the communication process does not affect the operation of the functional circuit. The functional processor and the monitoring processor are both set with a device-level BIT according to the processor capabilities, and a BIT self-calibration function is set. Based on the BIT self-calibration results, the functional processor and the monitoring processor use the first internal communication bus and the second internal communication bus, and use advanced health status management algorithms to achieve mutual calibration of the system-level BIT. The functional processor and the monitoring processor are set with the function of saving key data in case of power failure and recovering from breakpoints after abnormal reset. When a system-level failure occurs in any device-level BIT subsystem, the system-level BIT can add additional system reliability design means from the system-level BIT level through wake-up, stimulation reset and other means when the reliability design means of the device-level BIT subsystem fail, thereby fundamentally further improving the reliability of commercial rocket power distribution and ignition timing data monitoring.

[0019] It should be noted that although the embodiments of the present invention described above are illustrative, they are not intended to limit the present invention, and therefore the present invention is not limited to the above specific embodiments. Without departing from the principles of the present invention, any other embodiments obtained by those skilled in the art under the guidance of the present invention are deemed to be within the protection of the present invention.

Claims

1. An independent third-party monitoring system based on dual processors, characterized by: It is composed of a first power rail, a function processing circuit, a function circuit, a second power rail, a monitoring processing circuit, and a monitoring circuit; The first power rail supplies power to the functional processing circuit and the functional circuit; The function processing circuit communicates with the flight control computer through the first external communication bus, the second external communication bus and the third external communication bus to receive control commands and report working status data to the flight control computer; The functional circuit, under the control of the functional processing circuit, realizes the power distribution and related ignition timing control of the commercial rocket, and feeds back the corresponding power distribution and ignition control results to the functional processing circuit; The second power rail supplies power to the monitoring processing circuit and the monitoring circuit; The monitoring processing circuit communicates with the telemetry center through the fourth external communication bus and the fifth external communication bus to receive telemetry commands and report monitoring data to the telemetry center; The monitoring circuit, under the control of the monitoring processing circuit, uses the first state acquisition bus to acquire the core working state of the functional processing circuit, and uses the second state acquisition bus to acquire the core working state of the functional circuit, and feeds back the corresponding acquisition results to the monitoring processing circuit; A function processor is provided in the function processing circuit, and a monitoring processor is provided in the monitoring processing circuit. The function processor and the monitoring processor are mutually calibrated via a first internal communication bus and a second internal communication bus.

2. The dual-processor independent third-party monitoring system according to claim 1, characterized in that: The function processing circuit includes a function processor, a first isolation communication interface circuit, a second isolation communication interface circuit, a third isolation communication interface circuit, a first power supply BIT, and a first power management circuit; the first communication port of the function processor is connected to the first external communication bus through the first isolation communication interface circuit; the second communication port of the function processor is connected to the second external communication bus through the second isolation communication interface circuit; the third communication port of the function processor is connected to the third external communication bus through the third isolation communication interface circuit; the BIT control port and the BIT acquisition port of the function processor are connected to the first power rail through the first power supply BIT; the core power port, the auxiliary power port, the first peripheral power port, the second peripheral power port and the third peripheral power port of the function processor are connected to the first power rail through the first power management circuit; the first power supply BIT is connected to the first power management circuit; the power distribution control port, the power distribution acquisition port, the ignition control port and the ignition acquisition port of the function processor are connected to the function circuit; the fourth communication port of the function processor is connected to the monitoring processor of the monitoring processing circuit through the first internal communication bus; the fifth communication port of the function processor is connected to the monitoring processor of the monitoring processing circuit through the second internal communication bus.

3. The dual-processor independent third-party monitoring system according to claim 1, characterized in that: The monitoring and processing circuit includes a monitoring processor, a fourth isolated communication interface circuit, a fifth isolated communication interface circuit, a second power supply BIT, and a second power management circuit; the fourth communication port of the monitoring processor is connected to the fourth external communication bus through the fourth isolated communication interface circuit; the fifth communication port of the monitoring processor is connected to the fifth external communication bus through the fifth isolated communication interface circuit; the BIT control port and the BIT acquisition port of the monitoring processor are connected to the second power rail through the second power supply BIT; the core power supply port and the auxiliary power supply port of the monitoring processor are connected to the second power rail through the second power management circuit; the second power supply BIT is connected to the second power management circuit; the SPI port of the monitoring processor is connected to the monitoring circuit; the first communication port of the monitoring processor is connected to the functional processor of the functional processing circuit through the first internal communication bus; the second communication port of the monitoring processor is connected to the functional processor of the functional processing circuit through the second internal communication bus.

4. The dual-processor independent third-party monitoring system according to claim 1, characterized in that: The function processing circuit and the function circuit form an independent function module, and the monitoring processing circuit and the monitoring circuit form an independent monitoring module.

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