Semiconductor device package with clip interconnect and double-side cooling

By designing a structure of conductive clips with different thicknesses and molded plastic encapsulated signal leads in the semiconductor device package, the problems of heat dissipation and electrical signal access compatibility in the prior art are solved, and the double-side cooling of the device is realized and Electric signal transmission improves performance and reliability.

CN110634812BActive Publication Date: 2024-12-27SEMICON COMPONENTS IND LLC
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Patent Information

Application Number
CN201910546122.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-06-25
Filing Date
2019-06-24
Publication Date
2024-12-27
Estimated Expiration
2039-06-24

AI Technical Summary

Technical Problem

The prior art is difficult to provide effective heat dissipation on multiple surfaces of a semiconductor device package, while the contact surface of a compatible signal lead is coplanar with the surface of the semiconductor die, resulting in difficulty in thermal management and electrical signal access.

Method used

A package structure consisting of conductive welding pads, conductive clips and molded materials is designed, with conductive clips having different thicknesses to allow double-side cooling, and encapsulating signal leads through molded materials to achieve electrical coupling, ensuring heat dissipation and heat dissipation and Compatibility of electrical signal transmission.

Benefits of technology

The double-side cooling of semiconductor devices and the effective electrical coupling of signal leads is realized, which improves the performance and reliability of the device and reduces the risk of damage caused by overheating.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a semiconductor device package with clip interconnect and double-sided cooling. In general aspects, a packaged semiconductor device apparatus may include a conductive pad, a semiconductor die coupled to the conductive pad, and a conductive clip, the conductive clip including a first portion having a first thickness and a second portion having a second thickness. The first thickness may be greater than the second thickness. The first portion may be coupled to the semiconductor die. The device may also include a molding compound that encapsulates the semiconductor die and at least partially encapsulates the conductive pad and the conductive clip. The device may also include a signal lead that is at least partially encapsulated in the molding compound, and the second portion of the conductive clip is coupled to the signal lead.
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Description

Technical Field

[0001] The present description relates to semiconductor device packages. More particularly, the present description relates to semiconductor device packages that include an interconnect clip and allow heat dissipation (cooling) from multiple sides of the package. Background Art

[0002] Effective heat dissipation is important for semiconductor devices, such as power semiconductor devices included in semiconductor device package assemblies. Having multiple surfaces of a semiconductor package that can provide effective heat dissipation for such semiconductor device packages can improve the performance of the included semiconductor devices (die, device, etc.) and reduce the risk of damage to the device due to overheating. However, current methods for providing effective heat dissipation on multiple surfaces of a semiconductor device package are not compatible with some semiconductor device package configurations, such as package assemblies where the contact surface of a signal lead is not coplanar with the surface of a semiconductor die to which the signal lead is to be electrically coupled. Summary of the invention

[0003] In general aspects, a packaged semiconductor device arrangement may include a conductive pad, a semiconductor die coupled to the conductive pad, and a conductive clip, the conductive clip including a first portion having a first thickness and a second portion having a second thickness. The first thickness may be greater than the second thickness. The first portion may be coupled to the semiconductor die. The device may also include a molding compound that encapsulates the semiconductor die and at least partially encapsulates the conductive pad and the conductive clip. The device may also include a signal lead that is at least partially encapsulated in the molding compound, and the second portion of the conductive clip is coupled to the signal lead.

[0004] In another general aspect, a packaged semiconductor device apparatus may include a conductive pad and a semiconductor die having a first surface coupled to the conductive pad and a second surface disposed in a first plane (aligned along the first plane, aligned in the first plane, arranged in the first plane, etc.). The second surface of the semiconductor die may be opposite to the first surface. The device may also include a conductive clip, the conductive clip including a first portion having a first thickness and a second portion having a second thickness. The first thickness may be greater than the second thickness. The first portion may be coupled to the second surface of the semiconductor die. The device may also include a signal lead having a surface coupled to the second portion of the conductive clip. The surface of the signal lead may be disposed in a second plane parallel to the first plane (aligned along the second plane, aligned in the second plane, arranged in the second plane, etc.), the second plane not being coplanar with the first plane.

[0005] In another general aspect, a packaged semiconductor device apparatus may include a conductive pad and a first conductive clip having a first surface coupled to the conductive pad and a second surface opposite to the first surface. The device may also include a semiconductor die having a first surface coupled to the second surface of the first conductive clip and a second surface disposed in a plane (aligned along the plane, aligned in the plane, arranged in the plane, etc.). The second surface of the semiconductor die may be opposite to the first surface of the semiconductor die. The device may also include a second conductive clip having a first surface and a second surface opposite to the first surface. A first portion of the first surface of the second conductive clip may be coupled to the second surface of the semiconductor die. The device may further include a signal lead having a surface coupled to the second portion of the first surface of the second conductive clip. The surface of the signal lead may be disposed in a plane of the second surface of the semiconductor die (aligned along the plane, aligned in the plane, arranged in the plane, etc.). The device may further include a molding compound that encapsulates the semiconductor die, encapsulates the first conductive clip, at least partially encapsulates the conductive pad, at least partially encapsulates the second conductive clip, and at least partially encapsulates the signal lead. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a block diagram schematically illustrating a semiconductor device package.

[0007] Figure 2 is a schematic diagram showing an isometric view of a semiconductor device package.

[0008] Figure 3A is a schematic diagram showing a plan view of a semiconductor device package.

[0009] Figure 3B It is shown Figure 3A A schematic diagram of a side view of a semiconductor device package.

[0010] Figure 4A is a schematic diagram showing a plan view of a semiconductor device package.

[0011] Figure 4B It is shown Figure 4A A schematic diagram of a side view of a semiconductor device package.

[0012] Figure 5A is a schematic diagram showing a plan view of a semiconductor device package.

[0013] Figure 5B It is shown Figure 4A A schematic diagram of a side view of a semiconductor device package.

[0014] Fig. 6A is a schematic diagram showing a plan view of a semiconductor device package.

[0015] Figure 6B It is shown Fig. 6A A schematic diagram of a side view of a semiconductor device package.

[0016] Fig. 7A is a schematic diagram showing a plan view of a semiconductor device package.

[0017] Figure 7B It is shown Fig. 7A A schematic diagram of a side view of a semiconductor device package.

[0018] In the drawings that are not necessarily drawn to scale, the same reference symbols may indicate the same and / or similar parts (elements, structures, etc.) in different views. The drawings generally illustrate various embodiments discussed in the present disclosure by way of example and not limitation. Reference symbols shown in one drawing may not be repeated for the same and / or similar elements in the related views. Reference symbols repeated in multiple drawings may not be discussed specifically for each of the drawings, but are provided for context between the related views. In addition, not all identical elements in the drawings are specifically referenced by reference symbols when multiple instances of the element are shown. DETAILED DESCRIPTION

[0019] Figure 1 is a block diagram schematically illustrating a semiconductor device package (e.g., packaged semiconductor device, device, etc.) 100. Device 100 provides dual-sided cooling for a power semiconductor device included in device 100 (on a semiconductor die), and also allows for the use of (and may include) a conductive clip to electrically couple a semiconductor die included in device 100 with a signal lead (signal pillar, etc.), thereby allowing electrical access to the semiconductor die when the semiconductor die is included in a device package that is not compatible with current methods (such as indicated above).

[0020] The device 100 includes a conductive pad 110, a signal lead 120, a semiconductor die and a conductive clip assembly (assembly) 130, and a molding compound 140. In some embodiments, the conductive pad 110 may be a pad (e.g., a pad, a die attach pad, a die pad, etc.) formed of a copper metal sheet. In some embodiments, the conductive pad 110 may be coupled (e.g., directly coupled, electrically coupled) to a surface of a semiconductor die included in the assembly 130. In some embodiments, the conductive pad 110 may be coupled (e.g., directly coupled, electrically coupled) to a surface of a conductive clip (e.g., a first piece of a multi-piece conductive clip). Figures 2 to 6B Examples of such implementations are shown in and described below.

[0021] In the device 100, the signal lead 120 may have a contact surface 121 where the component 130 is coupled (e.g., directly coupled, electrically coupled) to the signal lead 120. In some embodiments, the component 130 may include a semiconductor die and a conductive clip (e.g., a single-piece clip or a multi-piece clip), wherein the conductive clip is configured to electrically couple the semiconductor die of the component to the signal lead 120 via the contact surface 121.

[0022] For example, the semiconductor die of the component 130 may be a metal oxide semiconductor field effect transistor (MOSFET), such as a power MOSFET, and the conductive clip of the component 130 may be configured to provide an electrical connection between the source terminal of the MOSFET and the contact surface 121 to electrically couple the signal lead 120 to the source terminal. In this example, the drain terminal of the MOSFET may be electrically coupled to the conductive pad 110 directly or via one of the multiple conductive clips of the component 130.

[0023] In the device 100, the molding material 140 may be an epoxy molding material or other suitable molding materials used for semiconductor device packaging. For example, the device 100 may be molded using an injection molding process, a transfer molding process, or any other suitable molding process. Figure 1 As shown, the molding compound 140 can at least partially encapsulate the conductive pads 110, the signal leads 120, and the assembly 130. In some embodiments, such as the various exemplary embodiments described herein, the molding compound 140 can completely encapsulate the semiconductor die included in the assembly 130.

[0024] Also like Figure 1 As shown, the surface 111 of the conductive pad 110 may be exposed through the molding compound 140 on the first side of the device 100. Figure 1 As shown, a surface 131 of the component 130 (e.g., a surface of a conductive clip of the component 130) can be exposed by the molding compound 140 on a second side of the device 100, wherein the second side of the device 100 is opposite to the first side. In some embodiments, during the manufacturing process, the device 100 can first be overmolded (where the molding compound covers the exposed surfaces 111 and 131), and then a grinding process can be performed to expose the surfaces 111 and 131. Double-sided cooling of a semiconductor die included in the device 100 (e.g., included in the component 130) can be facilitated by (provided by, etc., these exposed surfaces) the exposed surfaces 111 and 131.

[0025] Figure 2 2 is a schematic diagram showing an isometric view of a semiconductor device package (device) 200. The device 200 is Figure 2 is shown as an X-ray view, where for illustration purposes, Figure 2Internal components of the device 200 that cannot be seen in the physical device implementation are shown at appropriate locations in FIG. Figure 2 As shown, the device 200 includes a conductive pad 210, a signal lead (or a plurality of signal leads) 220, a semiconductor die and conductive clip assembly 230, and a molding compound 240. The device 200 also includes a signal lead 250 and a wire bond 260.

[0026] exist Figure 2 In the device 200 of FIG. 1 , the component 230 includes a conductive clip 232 and a semiconductor die 234. In this example, the semiconductor die 234 may include a power MOSFET device including a drain terminal coupled (e.g., directly coupled) to the conductive pad 210, a source terminal coupled (e.g., directly coupled) to the conductive clip 232, and a gate terminal 270. In the device 200, the conductive clip 232 electrically couples the source terminal of the semiconductor die 234 to one or more signal leads 222, and the wire bond 260 has a first end coupled to the gate terminal 270 (e.g., a gate signal pad of the MOSFET) and a second end coupled to the signal terminal 250 to electrically couple the signal terminal 250 to the gate terminal 270. For purposes of illustration, the embodiments described herein will be discussed as including a semiconductor die having a power MOSFET device. However, it should be understood that the methods described herein may be used with semiconductor dies including devices or circuits other than power MOSFET devices.

[0027] In device 200, the top surface of die 234 (eg Figure 2 ) (e.g., a surface including a source terminal connection for an included power MOSFET) may be disposed in a first plane (aligned along the first plane, aligned in the first plane, disposed in the first plane, etc.), and a contact surface 221 of one or more signal leads 220 may be disposed in a second plane (aligned along the second plane, aligned in the second plane, disposed in the second plane, etc.), wherein the second plane is not coplanar with the first plane of the semiconductor die. Figure 2 As shown, the conductive clip 232 of the device 200 can be a dual-gauge conductive clip (e.g., a conductive clip including different portions having different thicknesses), which can allow the conductive clip to electrically couple a semiconductor die 234 (e.g., a source terminal of an included power MOSFET) to a contact surface 221 of one or more signal leads 220 while having a surface exposed through the molding compound 240 to provide double-sided cooling for the device 200 in conjunction with an exposed surface of a conductive pad 210 on an opposite side of the device 200.

[0028] In some embodiments, the conductive clip 232 can be formed using a metal rolling process, where different gauges (different thicknesses) are formed using a separate rolling process (e.g., on copper or other metal sheets) to obtain multiple gauge conductive clips 232. In some embodiments, a solder reflow process can be used to couple components of the device 200 (or other components of other exemplary devices described herein) to each other (e.g., electrically, physically, and / or thermally). For example, the solder reflow process can be used to couple the semiconductor die 234 to the conductive pad 210, to couple the conductive clip 232 to the semiconductor die 234, and / or to couple the conductive clip 232 to the contact surface 221.

[0029] Figure 3A and Figure 3B is a schematic diagram showing a semiconductor device package (device) 300 . Figure 3A is a schematic diagram showing a planar X-ray view of device 300 . Figure 3B It is shown along Figure 3A Schematic diagram of a side cross-sectional view of a semiconductor device package 300 along the section line 3B-3B in FIG. The device 300 includes a conductive pad 310, a signal lead (or multiple signal leads) 320, a multi-piece conductive clip 332, a semiconductor die (including a power MOSFET) 334, and a molding compound 340. The device 300 also includes a signal lead 350 and a wire bond 360.

[0030] In the device 300, the multi-piece conductive clip 332 includes a first conductive clip 332a and a second conductive clip 332b, which can be used to produce the same conductive clips as described above. Figure 2 The discussed clip 232 is a multi-gauge conductive clip similar to the one discussed above. In some embodiments, the thickness of the clip piece 332a can be the same as the thickness of the clip piece 332b. Thus, the pieces 332a and 332b of the multi-piece clip 332 can be formed using a single metal rolling process.

[0031] like Figure 3B As shown, conductive clip 332b may be disposed between semiconductor die 334 and clip 332a. Clip 332a may have surface 331 exposed through molding compound 340, and conductive pad 310 may have surface 311 exposed through molding compound 340 on a side of device 300 opposite to surface 331. Surfaces 311 and 331 may be used to provide double-sided cooling for device 300.

[0032] like Figure 3BAs shown, the surface of the die 334 coupled to the clip 332b may be disposed in a first plane P1 (aligned along a first plane, aligned in a first plane, arranged in a first plane, etc.), and the contact surface 321 of one or more signal leads 320 may be disposed in a second plane P2 (aligned along a second plane, aligned in a second plane, arranged in a second plane, etc.), wherein the second plane P2 is not coplanar with the first plane P2 of the semiconductor die 334. Also as shown Figure 3B As shown, the multi-piece conductive clip 332 of the device 300 may include a first portion having a thickness T1 along the axis A1 and a second portion having a thickness T2 along the axis A2. In some embodiments, the thickness T1 may be at least twice the thickness T2. As shown in FIG. 3, in some embodiments, the multi-piece clip 332 may include a third portion having a third thickness T3 along the axis A3, wherein the thickness T3 is less than the thickness T2. The third portion of the clip 332 (having a thickness T3, such as a metal stamping process) may be formed using a stamping (e.g., metal stamping) process. Figure 3B 32 ). In some embodiments, a third portion of clip 332 along axis A3 may have the same thickness as thickness T2 along axis A2 (e.g., may not be stamped to thickness T3). The exact thicknesses T1, T2, and T3 will depend on the particular embodiment, such as the thickness of semiconductor die 334 and / or thicknesses T1 and T2. The multiple thicknesses of clip 332 allow semiconductor die 334 in plane P1 to electrically couple with contact surfaces 321 of one or more signal leads 320 in plane P2, while also providing (in conjunction with conductive pads 310) double-sided cooling for device 300.

[0033] See also Figure 3B , the elements of device 300 are arranged in a stacked arrangement (e.g., coupled to each other). As discussed above, at least some of the elements of device 300 can be coupled to each other using a solder reflow process to form an electrical connection, a physical connection, and / or a thermal connection. For example, in device 300, from left to right along axis A1, clip 232a is coupled to clip 232b, clip 232b is coupled to semiconductor die 334 (e.g., a source terminal), and semiconductor die 334 is coupled to conductive pad 310. Along Figure 3B From left to right along axis A2, device 300 includes clip 332a, molding compound 340, semiconductor die 334, and conductive pad 310. Along axis A3, device 300 includes clip 332a, signal lead 320 (eg, contact surface 321), and molding compound 340.

[0034] Figure 4A and Figure 4B is to show that at least Figure 2 Schematic diagram of a semiconductor device package (device) 400 similar to the device 200 . Figure 4Ais a schematic diagram showing a planar X-ray view of device 400 . Figure 4B It is shown along Figure 4A 4B-4B in FIG. 4B is a schematic diagram of a side cross-sectional view of a semiconductor device package 400. The device 400 includes a conductive pad 410, a signal lead (or multiple signal leads) 420, a multi-spec monolithic conductive clip 432, a semiconductor die (including a power MOSFET) 434, and a molding compound 440. The device 400 also includes a signal lead 450 and a wire bond 460. In the device 400, multiple rolling processes and / or stamping of different specifications (thicknesses) can be used to form the multi-spec conductive clip 432.

[0035] like Figure 4B As shown, conductive clip 432 may be coupled to semiconductor die 434 and may have surface 431 exposed through molding compound 440, while conductive pad 410 may have surface 411 exposed through molding compound 440 on a side of device 300 opposite surface 431. Surfaces 411 and 431 may be used to provide dual-sided cooling for device 400.

[0036] like Figure 4B As shown, the multi-gauge conductive clip 432 of the device 400 may include a first portion having a thickness T4 along the axis B1 and a second portion having a thickness T5 along the axis B2. In some embodiments, the thickness T4 may be at least twice the thickness T5. Figure 4B As shown, in some embodiments, the multi-format clip 432 may also include a third portion having a third thickness T6 along the axis B3, wherein the thickness T6 is less than the thickness T5. The third portion of the clip 432 (having a thickness T6, such as Figure 4B 4 and 5. As shown in FIG. 4 ). In some embodiments, a third portion of clip 432 along axis B3 may have the same thickness as thickness T5 along axis B2 (e.g., may not be stamped to thickness T6). The exact thicknesses T4, T5, and T6 will depend on the particular embodiment, such as the thickness of semiconductor die 434 and / or thicknesses T1 and T2. The multiple thicknesses of clip 432 allow semiconductor die 434 to be electrically coupled to contact surfaces 421 of one or more signal leads (even if they are not coplanar) while also providing (in conjunction with conductive pad 410) double-sided cooling for device 400.

[0037] See also Figure 4B, the elements of device 400 are arranged in a stacked arrangement (e.g., coupled to each other). As discussed above, at least some of the elements of device 400 can be coupled to each other using a solder reflow process to form an electrical connection, a physical connection, and / or a thermal connection. For example, in device 400, from left to right along axis B1, a first portion of multi-gauge clip 432 (of thickness T4) is coupled to semiconductor die 434 (e.g., a source terminal), and semiconductor die 434 is coupled to conductive pad 410. Along Figure 4B From left to right along axis B2 in FIG. 4 , device 400 includes a second portion of multi-gauge clip 432 (thickness T5), molding compound 440, semiconductor die 434, and conductive pad 310. Along axis B3, device 400 includes a third portion of multi-gauge clip 432 (thickness T6), signal lead 420 (e.g., contact surface 421), and molding compound 440.

[0038] Figure 5A and Figure 5B is a schematic diagram showing a semiconductor device package (device) 500 . Figure 5A is a schematic diagram showing a planar X-ray view of device 500 . Figure 5B It is shown along Figure 5A Schematic diagram of a side cross-sectional view of a semiconductor device package 500 along a section line 5B-5B in FIG. Figure 3A , Figure 4A and Fig. 6A In comparison, Figure 5A The plan view in FIG. 1 shows the device 500 before singulating the device 500 from the lead frame strip or lead frame matrix structure, and Figure 5A and Figure 5B The device 500 is shown without performing any signal wiring to form, for example Figure 3A , Figure 3B , Figure 4A , Figure 4B , Fig. 6A and Figure 6B Gull-wing shaped signal leads 320 , 350 , 420 , 450 , 620 , and 650 are shown.

[0039] Figure 5A and Figure 5B The device 500 includes a conductive pad 510, a signal lead (or a plurality of signal leads) 520, a semiconductor die and a multi-piece conductive clip assembly (assembly) 530, and a molding compound 540. The device 500 also includes a signal lead 550 and a wire bond 560.

[0040] In device 500, assembly 530 includes a first conductive clip 532a, a semiconductor die (including a power MOSFET) 534, and a second conductive clip 532b, which can be used to align (substantially align, approximately align, etc.) the surface of the semiconductor die 534 coupled to the first clip 532a and the contact surface 521 of one or more signal leads 520 in the same plane. In some embodiments, the thickness of clip 532a can be the same as that of clip 532b. Therefore, the pieces 532a and 532b of the multi-piece clip 332 can be formed using a single metal rolling process.

[0041] like Figure 3B As shown, the conductive clip 532b can be disposed between the semiconductor die 534 and the conductive pad 510. The clip 532a can be coupled to the semiconductor die 534 and have a surface 531 exposed through the molding compound 540, while the conductive pad 510 can have a surface 511 exposed through the molding compound 540 on a side of the device 500 opposite to the surface 531. The surfaces 511 and 531 (in combination with the clips 532a and 532b and the conductive pad 510) can be used to provide double-sided cooling for the device 500.

[0042] like Figure 5B As shown, clip 532a may include notch 536, wherein notch 536 may prevent solder from wicking from a source terminal contact (e.g., a solder ball) of semiconductor die 534 toward an edge of die 534 (e.g., during a solder reflow process), wherein such solder wicking may cause quality and reliability issues for device 500 (or other devices).

[0043] See also Figure 5B , the elements of device 500 are arranged in a stacked arrangement (e.g., coupled to each other). As discussed above, at least some of the elements of device 500 can be coupled to each other using a solder reflow process to form an electrical connection, a physical connection, and / or a thermal connection. For example, in device 500, from left to right along axis C1, clip 532a is coupled to semiconductor die 534 (e.g., a source terminal), semiconductor die 534 is coupled to clip 532b, and clip 532b is coupled to conductive pad 510. Figure 5B From left to right along axis C2, device 500 includes clip 532a, molding compound 540, semiconductor die 534, and conductive pad 510. Along axis C3, device 500 includes clip 532a, signal lead 520 (eg, contact surface 521), and molding compound 540.

[0044] Fig. 6A and Figure 6B 6 is a schematic diagram showing a semiconductor device package (device) 600 . Fig. 6A is a schematic diagram showing a planar X-ray view of device 600 . Figure 6BIt is shown along Fig. 6A 6B-6B in FIG. 6B is a schematic diagram of a side cross-sectional view of a semiconductor device package 600. The device 600 includes a conductive pad 610, a signal lead (or multiple signal leads) 620, a multi-piece conductive clip 632, a semiconductor die (including a power MOSFET) 634, and a molding compound 640. The device 600 also includes a signal lead 650 and a wire bond 660.

[0045] In the device 600, the multi-piece conductive clip 632 includes a first conductive clip 632a and a second conductive clip 632b, which can be used to produce a multi-size conductive clip (e.g., the multi-piece clip 632). In some embodiments, the clip 632a can have the same material (sheet) thickness as the clip 632b. Therefore, in such embodiments, the clips 632a and 632b of the multi-piece clip 632 can be formed using a single metal rolling process.

[0046] like Figure 6B As shown, conductive clip 632b can be disposed between semiconductor die 634 and clip 632a. Clip 632a can have surface 631 exposed through molding compound 640, and conductive pad 610 can have surface 611 exposed through molding compound 640 on a side of device 600 opposite to surface 631. Surfaces 611 and 631 can be used to provide double-sided cooling for device 300.

[0047] like Figure 6B As shown, the surface of the die 634 coupled to the clip 632b is not coplanar with the contact surface 621 of the one or more signal leads 620. In the device 600, the clip 632b is formed to contact both the surface of the die 634 (e.g., the source contact) and the contact surface 621. The combination of the piece 632a and the piece 632b of the multi-piece clip 632 allows the semiconductor die 634 (e.g., the source terminal of a MOSFET) to be electrically coupled to the contact surface 621 of the one or more signal leads 620, while also providing (in conjunction with the conductive pad 610) double-sided cooling for the device 600.

[0048] See also Figure 6B , the elements of device 600 are arranged in a stacked arrangement (e.g., coupled to each other). As discussed above, at least some of the elements of device 600 can be coupled to each other using a solder reflow process to form an electrical connection, a physical connection, and / or a thermal connection. For example, in device 600, from left to right along axis C1, clip 632a is coupled to clip 632b, clip 632b is coupled to semiconductor die 634 (e.g., a source terminal), and semiconductor die 634 is coupled to conductive pad 610. Along Figure 6BFrom left to right along axis C2, device 600 includes clip 632b, molding compound 640, semiconductor die 634, and conductive pad 610. Along axis C3, device 600 includes clip 632b, signal lead 620 (eg, contact surface 621), and molding compound 640.

[0049] Fig. 7A and Figure 7B is a schematic diagram showing a semiconductor device package (device) 700 . Fig. 7A is a schematic diagram showing a planar X-ray view of device 700 . Figure 7B It is from Fig. 7A The right side of the device 700 is shown as a schematic diagram of a side X-ray view of the semiconductor device package 700. Figure 3A and Figure 3B Similar to the device 300 of the present invention, the device 700 includes a conductive pad 710, a signal lead (or multiple signal leads) 720, a multi-piece conductive clip 732, a semiconductor die (including a power MOSFET) 734, and a molding compound 740. The device 700 also includes a signal lead 750 and a second conductive clip 760. In some embodiments, the clip 760 can be used to couple (e.g., electrically couple, etc.) the signal lead 750 to a gate terminal 770 of a MOSFET device implemented on the semiconductor die 734. For example, the clip 760 can replace the wire bonds 360, 460, 560, and 660 in the devices 300, 400, 500, and 600 described herein, respectively.

[0050] The clip 760 may be formed using one or more metal working operations. For example, the clip 760 may be formed by forming a metal sheet using a metal (e.g., copper) rolling process. One or more metal stamping processes may then be performed to form the clip 760 from the metal sheet. In some embodiments, a first metal stamping process may be performed to cut the clip 760 from the metal sheet. After the first metal stamping process, a second metal stamping process may be performed to define a stepped arrangement of the clip 760. In some embodiments, a single metal stamping process may be performed to form the clip 760 from a metal sheet (such as a copper sheet). As discussed above, at least some elements of the device 700 may be coupled (e.g., electrically, physically, and / or thermally) to each other using a solder reflow process to form electrical and physical connections so as to couple the clip 760 to the signal lead 750 and the gate terminal 770 of the semiconductor die 734 (e.g., electrically, physically, thermally, etc.).

[0051] In general aspects, a packaged semiconductor device apparatus may include a conductive pad; a semiconductor die coupled to the conductive pad; and a conductive clip, the conductive clip including a first portion having a first thickness and a second portion having a second thickness. The first thickness may be greater than the second thickness. The first portion may be coupled to the semiconductor die. The apparatus may also include a molding compound that encapsulates the semiconductor die and at least partially encapsulates the conductive pad and the conductive clip. The apparatus may also include a signal lead at least partially encapsulated in the molding compound, and the second portion of the conductive clip may be coupled to the signal lead.

[0052] Embodiments can include one or more of the following features. For example, a surface of the conductive pad can be exposed through the molding compound on a first side of the packaged semiconductor device arrangement, and a surface of the conductive clip can be exposed through the molding compound on a second side of the packaged semiconductor device arrangement, the second side being opposite to the first side.

[0053] The conductive clip may be monolithic.

[0054] The conductive clip may include a first piece and a second piece. The first piece of the conductive clip may be disposed between the semiconductor die and the second piece of the conductive clip. The first piece of the conductive clip may be coupled to the semiconductor die, and the second piece of the conductive clip may be coupled to the first piece of the conductive clip. The first portion of the conductive clip may include the first piece of the conductive clip and a first portion of the second piece of the conductive clip. The second portion of the conductive clip may include a second portion of the second piece of the conductive clip.

[0055] The signal lead may be a first signal lead, and the conductive clip may be a first conductive clip. The packaged semiconductor device apparatus may include a second signal lead at least partially encapsulated in a molding compound; and a second conductive clip having a first end coupled to the second signal lead and a second end coupled to the semiconductor die. The semiconductor die may include a metal oxide semiconductor field effect transistor (MOSFET). The conductive pad may be coupled to a drain terminal of the MOSFET. The first conductive clip may be coupled to a source terminal of the MOSFET. The second conductive clip may be coupled to a gate terminal of the MOSFET.

[0056] The first thickness may be at least twice the second thickness.

[0057] In another general aspect, a packaged semiconductor device apparatus may include a conductive pad and a semiconductor die having a first surface coupled to the conductive pad and a second surface disposed in a first plane, the second surface of the semiconductor die being opposite to the first surface. The apparatus may also include a conductive clip including a first portion having a first thickness and a second portion having a second thickness. The first thickness may be greater than the second thickness. The first portion may be coupled to the second surface of the semiconductor die. The apparatus may also include a signal lead having a surface coupled to the second portion of the conductive clip. The surface of the signal lead may be disposed in a second plane parallel to the first plane. The second plane may not be coplanar with the first plane.

[0058] Implementations can include one or more of the following features.For example, the conductive clip can be monolithic.

[0059] The conductive clip may include a first piece and a second piece. The first piece of the conductive clip may be disposed between the semiconductor die and the second piece of the conductive clip. The first piece of the conductive clip may be coupled to the semiconductor die, and the second piece of the conductive clip may be coupled to the first piece of the conductive clip.

[0060] The device may include a molding compound that encapsulates a semiconductor die, at least partially encapsulates a conductive pad, at least partially encapsulates a conductive clip, and at least partially encapsulates a signal lead. A surface of the conductive pad may be exposed through the molding compound on a first side of the packaged semiconductor device device. A first portion of the conductive clip and a second portion of the conductive clip may define a surface of the conductive clip exposed through the molding compound on a second side of the packaged semiconductor device device. The second side may be opposite to the first side.

[0061] The signal lead may be a first signal lead. The packaged semiconductor device arrangement may include a second signal lead and a wire bond having a first end coupled to the second signal lead and a second end coupled to the semiconductor die.

[0062] The first thickness may be at least twice the second thickness.

[0063] In another general aspect, a packaged semiconductor device apparatus may include a conductive pad and a first conductive clip having a first surface coupled to the conductive pad and a second surface opposite to the first surface. The apparatus may also include a semiconductor die having a first surface coupled to the second surface of the first conductive clip and a second surface disposed in a plane. The second surface of the semiconductor die may be opposite to the first surface of the semiconductor die. The apparatus may also include a second conductive clip having a first surface and a second surface opposite to the first surface. A first portion of the first surface of the second conductive clip may be coupled to the second surface of the semiconductor die. The apparatus may further include a signal lead having a surface coupled to the second portion of the first surface of the second conductive clip. The surface of the signal lead may be disposed in a plane of the second surface of the semiconductor die. The apparatus may also include a molding compound encapsulating the semiconductor die, encapsulating the first conductive clip, at least partially encapsulating the conductive pad, at least partially encapsulating the second conductive clip, and at least partially encapsulating the signal lead.

[0064] Embodiments can include one or more of the following features. For example, a surface of the conductive pad can be exposed through the molding compound on a first side of the packaged semiconductor device arrangement. A surface of the second conductive clip can be exposed through the molding compound on a second side of the packaged semiconductor device arrangement. The second side can be opposite to the first side.

[0065] The first conductive clip and the second conductive clip may have the same thickness.

[0066] The signal lead may be a first signal lead. The packaged semiconductor device arrangement may include a second signal lead at least partially encapsulated in a molding compound. The arrangement may include a wire bond having a first end coupled to the second signal lead and a second end coupled to the semiconductor die. The wire bond may be encapsulated in a molding compound.

[0067] The semiconductor die may include a metal oxide semiconductor field effect transistor (MOSFET). The second surface of the first conductive clip may be coupled to a drain terminal of the MOSFET. The first portion of the first surface of the second conductive clip may be coupled to a source terminal of the MOSFET. The wire bond may be coupled to a gate terminal of the MOSFET.

[0068] It should be understood that in the foregoing description, when an element such as a layer, a region or a substrate is mentioned as being on another element, connected to another element, electrically connected to another element, coupled to another element, or electrically coupled to another element, the element may be directly on another element, connected or coupled to another element, or one or more intermediate elements may be present. On the contrary, when an element is mentioned as being directly on another element or layer, directly connected to another element or layer, or directly coupled to another element or layer, there is no intermediate element or layer. Although the term directly on, directly connected to, or directly coupled to may not be used throughout the entire detailed description, an element shown as being directly on, directly connected to, or directly coupled to can be mentioned in this manner. The claims of the present application may be revised to narrate the exemplary relationships described in the specification or shown in the drawings.

[0069] As used in this specification, singular forms may include plural forms unless the context clearly indicates a particular case. Spatially relative terms (e.g., above, above, above, below, below, below, below, at the top, at the bottom, etc.) are intended to cover different orientations of the device in use or operation, in addition to the orientations shown in the drawings. In some embodiments, the relative terms above and below may include vertically above and vertically below, respectively. In some embodiments, the term adjacent can include lateral adjacent or horizontal adjacent.

[0070] Some embodiments may be implemented using various semiconductor processing and / or packaging techniques. Some embodiments may be implemented using various types of semiconductor processing techniques associated with semiconductor substrates, including but not limited to, for example, silicon (Si), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), etc.

[0071] Although certain features of the described embodiments have been described as described herein, many modifications, alternatives, variations, and equivalents will now occur to those skilled in the art. Therefore, it should be understood that the appended claims are intended to cover all such modifications and variations that fall within the scope of the embodiments. It should be understood that these modifications and variations are presented only by way of example, not limitation, and that various changes in form and detail may be made. In addition to mutually exclusive combinations, any part of the apparatus and / or method described herein may be combined in any combination. The embodiments described herein can include various combinations and / or sub-combinations of the functions, components, and / or features of the different embodiments described.

Claims

1. A packaged semiconductor device apparatus, comprising: Conductive pads; a semiconductor die coupled to the conductive pad, the conductive pad having a surface coupled to the semiconductor die; a conductive clip comprising a first portion having a first thickness and a second portion having a second thickness, the first thickness being greater than the second thickness, the first portion being coupled to the semiconductor die; a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive pad and the conductive clip; as well as a signal lead at least partially encapsulated in the molding compound, The conductive clip comprises: a first sheet included in said first portion of said conductive clip; as well as a second sheet having a first portion contained in the first portion of the conductive clip and having a second portion contained in the second portion of the conductive clip, wherein the signal lead has a surface coupled to the second sheet at the second portion of the conductive clip, The first piece of the conductive clip is disposed between the semiconductor die and the second piece of the conductive clip, the first piece of the conductive clip is coupled to the semiconductor die, and the second piece of the conductive clip is coupled to the first piece of the conductive clip.

2. The packaged semiconductor device arrangement according to claim 1, wherein: The surface of the conductive pad coupled to the semiconductor die is disposed in a first plane; The surface of the signal lead coupled to the second portion of the conductive clip is disposed in a second plane; The second plane is parallel to and non-coplanar with the first plane; and The second plane does not intersect the semiconductor die.

3. A packaged semiconductor device apparatus according to claim 1, wherein a surface of the conductive pad is exposed through the molding compound on a first side of the packaged semiconductor device apparatus, and a surface of the conductive pad is exposed through the molding compound on a second side of the packaged semiconductor device apparatus, the second side of the packaged semiconductor device apparatus being opposite to the first side of the packaged semiconductor device apparatus. 4 . The packaged semiconductor device arrangement of claim 1 , wherein the first thickness is at least twice the second thickness.

5. A packaged semiconductor device apparatus, comprising: Conductive pads; a semiconductor die having a first surface coupled to the conductive pad and having a second surface, the second surface of the semiconductor die being opposite to the first surface, the conductive pad having a surface coupled to the first surface of the semiconductor die; a conductive clip, the conductive clip comprising a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness, the first thickness being greater than the second thickness and greater than the third thickness, the second thickness being greater than the third thickness, the first portion being coupled to the second surface of the semiconductor die, The conductive clip comprises: a first sheet included in the first portion of the conductive clip; and a second sheet, the second sheet having a first portion contained in the first portion of the conductive clip and the second sheet having a second portion contained in the second portion of the conductive clip, The first piece of the conductive clip is disposed between the semiconductor die and the second piece of the conductive clip, the first piece of the conductive clip is coupled to the semiconductor die, and the second piece of the conductive clip is coupled to the first piece of the conductive clip; and A signal lead has a surface coupled to the second sheet at the second portion of the conductive clip.

6. The packaged semiconductor device arrangement of claim 5, wherein: The packaged semiconductor device arrangement includes a molding compound encapsulating the semiconductor die, at least partially encapsulating the conductive pad, at least partially encapsulating the conductive clip, and at least partially encapsulating the signal lead; A surface of the conductive clip is exposed through the molding compound on a first side of the packaged semiconductor device arrangement, the surface of the conductive clip exposed through the molding compound comprising a surface of the first portion of the conductive clip, a surface of the second portion of the conductive clip, and a surface of the third portion of the conductive clip; and A surface of the conductive pad is exposed through the molding compound on a second side of the packaged semiconductor device arrangement, the second side of the packaged semiconductor device arrangement being opposite to the first side of the packaged semiconductor device arrangement.

7. The packaged semiconductor device arrangement of claim 5, wherein: The signal lead is a first signal lead, and the packaged semiconductor device apparatus further comprises: a second signal lead; and A wire bond has a first end coupled to the second signal lead and a second end coupled to the semiconductor die.

8. The packaged semiconductor device arrangement of claim 5, wherein the first thickness is at least twice the second thickness.

9. A packaged semiconductor device arrangement, comprising: Conductive pads; a semiconductor die coupled to the conductive pad, the conductive pad having a surface coupled to the semiconductor die; a conductive clip comprising a first portion having a first thickness and a second portion having a second thickness, the first thickness being greater than the second thickness, the first portion being coupled to the semiconductor die; a molding compound encapsulating the semiconductor die of the package and at least partially encapsulating the conductive pad and the conductive clip, and a signal lead at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled to the signal lead, the signal lead having a surface coupled to the second portion of the conductive clip, The signal lead is a first signal lead, and the conductive clip is a first conductive clip, and the packaged semiconductor device apparatus further includes: a second signal lead at least partially encapsulated in the molding compound; as well as a second conductive clip having a first end coupled to the second signal lead and a second end coupled to the semiconductor die, The surface of the conductive pad is exposed through the molding compound on the first side of the packaged semiconductor device arrangement, and A surface of the first conductive clip is exposed through the molding compound on a second side of the packaged semiconductor device arrangement, the second side being opposite to the first side.

10. The packaged semiconductor device arrangement of claim 9, wherein: The first thickness is at least twice the second thickness; The surface of the conductive pad coupled to the semiconductor die is disposed in a first plane; The surface of the signal lead coupled to the second portion of the conductive clip is disposed in a second plane; The second plane is parallel to and non-coplanar with the first plane; and The second plane does not intersect the semiconductor die.