A method for directly growing SOI

Abstract

The present invention provides a method for directly growing SOI. The method includes: oxidizing a predetermined silicon wafer; using diethoxymethylsilane as a carbon source to deposit amorphous carbon on the oxide layer of the predetermined silicon wafer to obtain a silicon wafer with an amorphous carbon layer; performing a high-temperature annealing reduction treatment on the silicon wafer with the amorphous carbon layer to cause a chemical reaction between the oxide layer and the amorphous carbon layer to generate single-crystalline silicon and carbon monoxide, thereby obtaining a silicon wafer with a top layer of single-crystalline silicon; wherein, an inert gas is used for protection during the treatment process; putting the silicon wafer with the top layer of single-crystalline silicon into an epitaxial device to epitaxially grow the thickness of the top layer of single-crystalline silicon to a predetermined thickness to obtain SOI. The method for directly growing SOI according to the present invention can simplify the preparation process flow, and has low production cost and high production capacity.

Description

Technical Field

[0001] The present invention relates to the field of microelectronics technology, and particularly to a method for directly growing SOI. Background Art

[0002] Silicon-On-Insulator (SOI) is a new type of silicon-based semiconductor material with a unique "Si / insulating layer / Si" three-layer structure. The SOI technology introduces an insulating buried layer (i.e., buried oxide layer) between the top silicon and the back substrate, and realizes the full dielectric isolation of the device and the substrate through the insulating buried layer (usually silicon dioxide SiO2).

[0003] Therefore, by forming a semiconductor thin film on an insulator, the SOI material has advantages that bulk silicon cannot match: (1) It can achieve the dielectric isolation of components in an integrated circuit, and completely eliminate the parasitic latching effect in bulk silicon CMOS circuits; (2) The integrated circuit made of SOI has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short-channel effect, and is especially suitable for low-voltage and low-power circuits. Therefore, SOI will be widely used in low-voltage and low-power integrated circuits in deep sub-micron; (3) SOI can be used to manufacture MEMS (Micro-Electro-Mechanical-System) optical switches.

[0004] Currently, the bonding technology is usually used to prepare SOI, and the thin film SOI usually adopts processes such as implantation, which has the problems of complex preparation process flow and high production cost, and urgent improvement is needed. Summary of the Invention

[0005] The purpose of the present invention is to provide a method for directly growing SOI, which can simplify the preparation process flow, have low production cost and high production capacity.

[0006] The present invention provides a method for directly growing SOI, the method comprising: oxidizing a predetermined silicon wafer; using diethoxymethylsilane as a carbon source to deposit amorphous carbon on the oxide layer of the predetermined silicon wafer to obtain a silicon wafer with an amorphous carbon layer; performing a high-temperature annealing reduction treatment on the silicon wafer with the amorphous carbon layer to cause a chemical reaction between the oxide layer and the amorphous carbon layer to generate single-crystalline silicon and carbon monoxide, and obtaining a silicon wafer with top single-crystalline silicon; wherein, an inert gas is used for protection during the treatment process; putting the silicon wafer with top single-crystalline silicon into an epitaxial device to grow the thickness of the top single-crystalline silicon to a predetermined thickness to obtain SOI; wherein, the middle layer of the SOI is the remaining oxide layer after the high-temperature annealing reduction treatment, and the top silicon of the SOI is the top single-crystalline silicon with a predetermined thickness.

[0007] Optionally, the conditions for oxidation are: oxygen flow rate of 100 - 3000 sccm, pressure of 100 - 1060 torr, and temperature of 850 - 1150 °C; the flow rate of the carbon source is 1 - 5 g / s, and the deposition temperature is 300 - 950 °C; the conditions for the high-temperature annealing reduction treatment are: annealing pressure of 0.1 - 10 torr, annealing temperature of 1200 - 1400 °C, and annealing time of 1 - 6 h; the conditions for epitaxial growth are: temperature of 900 - 1150 °C, pressure of 10 - 1060 torr, and flow rate of dichlorosilane of 10 - 1000 sccm; wherein, the thickness of the oxide layer is 0.5 - 3.5 μm, the thickness of the amorphous carbon layer is 30 - 300 Å, and the predetermined thickness is 10 - 1500 nm.

[0008] Optionally, the conditions for oxidation are: oxygen flow rate of 500 sccm, pressure of 230 torr, and temperature of 900 °C; the flow rate of the carbon source is 1.5 g / s, and the deposition temperature is 400 °C; the conditions for the high-temperature annealing reduction treatment are: annealing pressure of 5 torr, annealing temperature of 1400 °C, and annealing time of 5 h; the conditions for epitaxial growth are: temperature of 1100 °C, pressure of 1060 torr, and flow rate of dichlorosilane of 1000 sccm; wherein, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 50 Å, and the predetermined thickness is 500 nm.

[0009] Optionally, the conditions for oxidation are: oxygen flow rate of 900 sccm, pressure of 460 torr, and temperature of 950 °C; the flow rate of the carbon source is 4.5 g / s, and the deposition temperature is 550 °C; the conditions for the high-temperature annealing reduction treatment are: annealing pressure of 0.8 torr, annealing temperature of 1300 °C, and annealing time of 6 h; the conditions for epitaxial growth are: temperature of 1000 °C, pressure of 760 torr, and flow rate of dichlorosilane of 500 sccm; wherein, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 70 Å, and the predetermined thickness is 500 nm.

[0010] Optionally, the conditions for oxidation are: oxygen flow rate of 1900 sccm, pressure of 760 torr, and temperature of 1000 °C; the flow rate of the carbon source is 3 g / s, and the deposition temperature is 750 °C; the conditions for the high-temperature annealing reduction treatment are: annealing pressure of 5 torr, annealing temperature of 1400 °C, and annealing time of 6 h; the conditions for epitaxial growth are: temperature of 1000 °C, pressure of 550 torr, and flow rate of dichlorosilane of 800 sccm; wherein, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 100 Å, and the predetermined thickness is 500 nm.

[0011] Optionally, the conditions for oxidation are: oxygen flow rate of 2300 sccm, air pressure of 900 torr, and temperature of 1100 °C; the flow rate of the carbon source is 1.5 g / s, and the deposition temperature is 550 °C; the conditions for the high-temperature annealing and reduction treatment are: annealing pressure of 1 torr, annealing temperature of 1400 °C, and annealing time of 2 h; the conditions for epitaxial growth are: temperature of 1150 °C, pressure of 760 torr, and flow rate of dichlorosilane of 1000 sccm; wherein, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 30 Å, and the predetermined thickness is 500 nm.

[0012] Optionally, the predetermined silicon wafer is a P-type silicon wafer with a resistivity of 8.5 - 11.5 ohm·cm and a <100> crystal orientation.

[0013] Optionally, chemical vapor deposition is used to deposit amorphous carbon on the oxide layer of the predetermined silicon wafer.

[0014] Optionally, the uniformity of the amorphous carbon layer is less than 5%.

[0015] The method for directly growing SOI according to the present invention prepares SOI through oxidation, chemical vapor deposition, high-temperature annealing and reduction treatment, and epitaxial growth, effectively simplifying the preparation process flow, thereby reducing the preparation risk of SOI and significantly improving the reliability and production capacity of SOI. Moreover, the method of the present invention can save consumables, effectively reduce production costs, and can meet large-scale production applications. Description of the Drawings

[0016] Through the following detailed description in conjunction with the drawings, the above and other objects, features, and advantages of the present invention will become clearer, wherein:

[0017] Figure 1 is a flowchart of the method for directly growing SOI according to an embodiment of the present invention;

[0018] Figure 2 is a schematic diagram of a silicon wafer with an amorphous carbon layer according to an embodiment of the present invention;

[0019] Figure 3 is a schematic diagram of a silicon wafer with a top single-crystalline silicon layer according to an embodiment of the present invention;

[0020] Figure 4 is a schematic diagram of SOI according to an embodiment of the present invention;

[0021] Figure 5 is a TEM image of the single-crystalline silicon obtained by the high-temperature annealing and reduction treatment according to an embodiment of the present invention. Detailed Embodiments

[0022] Now, different exemplary embodiments will be described more fully with reference to the accompanying drawings, in which some exemplary embodiments are shown in the drawings.

[0023] The following refers to Figures 1 to 5 Describe the method for directly growing SOI of the embodiments of the present invention.

[0024] Embodiment 1

[0025] Refer to Figures 1 to 4 , in step S10, oxidize the predetermined silicon wafer 100.

[0026] Preferably, the predetermined silicon wafer 100 is a P-type silicon wafer with a resistivity of 8.5 - 11.5 ohm·cm and a <100> crystal orientation.

[0027] As an example, the predetermined silicon wafer 100 can be oxidized by dry oxygen and / or wet oxygen oxidation.

[0028] Preferably, under the oxidation conditions of an oxygen flow rate of 500 sccm, a pressure of 230 torr, and a temperature of 900 °C, the predetermined silicon wafer 100 is oxidized to obtain a silicon wafer with an oxide layer 102 having a thickness of 1 μm.

[0029] In step S20, use diethoxymethylsilane (DEMS) as the carbon source (i.e., C source) to deposit amorphous carbon on the oxide layer 102 of the predetermined silicon wafer 100, obtaining a silicon wafer with an amorphous carbon layer 104.

[0030] Preferably, under the deposition conditions of a carbon source flow rate of 1.5 g / s and a deposition temperature of 400 °C, a silicon wafer with an amorphous carbon layer 104 having a thickness of 50 Å (angstroms) is obtained.

[0031] Preferably, the uniformity of the amorphous carbon layer 104 is less than 5%.

[0032] As an example, the amorphous carbon is deposited on the oxide layer 102 of the predetermined silicon wafer 100 by chemical vapor deposition (CVD) method, but the present invention is not limited thereto.

[0033] In step S30, perform a high-temperature annealing reduction treatment on the silicon wafer with the amorphous carbon layer 104, causing a chemical reaction between the oxide layer 102 and the amorphous carbon layer 104 to generate single-crystalline silicon and carbon monoxide, obtaining a silicon wafer with a top single-crystalline silicon layer 106.

[0034] The high-temperature annealing reduction treatment process is protected by an inert gas (i.e., noble gas).

[0035] As an example, the inert gas is helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), radon (Rn).

[0036] Preferably, the silicon wafer with the amorphous carbon layer 104 is placed in a high-temperature furnace, and under the conditions of high-temperature annealing reduction treatment with an annealing pressure of 5 torr, an annealing temperature of 1400 °C, and an annealing time of 5 h, with argon as the protective gas and an argon flow rate of 10000 sccm / s, a chemical reaction occurs between the silicon dioxide SiO2 in the oxide layer 102 and the C atoms in the amorphous carbon layer 104 to generate single-crystalline silicon Si and carbon monoxide CO, thereby obtaining a silicon wafer with a top-layer single-crystalline silicon 106.

[0037] Specifically, the chemical reaction formula is as follows:

[0038] SiO2 + C → Si + CO

[0039] Since C atoms are smaller than Si atoms and have reducibility, the ordered SiO2 on the surface of the oxide layer 102 can be reduced to single-crystalline silicon Si. This chemical reaction is carried out under a vacuum pressure of 0.1 - 100 torr, which is beneficial to the timely discharge of carbon monoxide, leaving the reduced single-crystalline silicon on the surface of the silicon wafer. In addition, the chemical reaction proceeds in the forward direction to promote the complete reaction of C as soon as possible, and there is an inert gas protection, and the annealing time should be long enough to ensure the complete reaction of C.

[0040] In addition, the thickness of the amorphous carbon layer 104 should be appropriate. If the deposited thickness of C is too thin, the thickness of the reduced Si will also be very thin, and then a natural oxide layer will be quickly formed after the silicon wafer is taken out. If the natural oxide layer consumes the previously reduced Si, the preparation will fail. If the deposited C is too thick, it will lead to incomplete reaction of C, resulting in the problem that single-crystalline silicon cannot grow epitaxially. In this embodiment, the thickness of the amorphous carbon layer 104 is 50 Å, and the thickness of the oxide layer 102 is 1 μm, which can ensure the complete reaction of C and an appropriate thickness of the generated single-crystalline silicon during the high-temperature annealing reduction treatment.

[0041] Figure 5 is the TEM image of the single-crystalline silicon obtained by high-temperature annealing reduction treatment. It can be Figure 5 seen that the crystallization quality of the top-layer Si is a perfect single crystal.

[0042] In step S40, the silicon wafer with the top-layer single-crystalline silicon 106 is placed in an epitaxial device, and the thickness of the top-layer single-crystalline silicon 106 is epitaxially grown to a predetermined thickness to obtain SOI.

[0043] Specifically, the intermediate layer of SOI is the remaining oxide layer 108 after the high-temperature annealing reduction treatment, and the top-layer silicon 110 of SOI is the top-layer single-crystalline silicon with a predetermined thickness.

[0044] That is to say, the total thickness of the top-layer silicon 110 of SOI is made to be the predetermined thickness by means of epitaxial growth.

[0045] As an example, under the epitaxial growth conditions of a temperature of 1100 °C, a pressure of 1060 torr, and a flow rate of dichlorosilane (SiCl2H2) of 1000 sccm, the thickness of the top single-crystalline silicon 106 is epitaxially grown to a predetermined thickness of 500 nm, thereby obtaining an SOI product that meets the requirements.

[0046] Currently, existing SOI preparation methods usually require multiple cumbersome process steps such as oxidation, cleaning, particle testing, bonding, grinding and polishing, implantation, dicing, epitaxy, chemical mechanical polishing (CMP), etc. to prepare an SOI product that meets the requirements; moreover, these process steps consume a large amount of time and consumables, so the production capacity is low and the production cost is high. In addition, the requirements for cleaning during bonding are very high. Once the particle performance fluctuates, it will directly affect the bonding quality. For example, it will cause voids or poor bonding, resulting in tearing of the top silicon. For existing thin-film SOIs, ion implantation brings many defects that are difficult to completely eliminate, and the subsequent dicing process has very high requirements for equipment. Slight fluctuations in the equipment will have an adverse impact on the SOI product.

[0047] The method for directly growing SOI according to the embodiments of the present invention prepares SOI through oxidation, chemical vapor deposition, high-temperature annealing and reduction treatment, and epitaxial growth, without using existing processes such as bonding, implantation, dicing, and grinding and polishing, effectively simplifying the preparation process flow, thereby making the production window of the product larger; and there is no need to use particle machines, cleaning machines, chemical mechanical polishing machines, etc., effectively reducing the preparation risk of SOI and significantly improving the reliability and production capacity of SOI. For example, the method of this embodiment does not require bonding and ion implantation, so there will be no edge non-SOI structure. At the same time, if there is a problem in the production line, the preparation method of this embodiment can be used to more conveniently troubleshoot the problem. Moreover, the method of this embodiment can save consumables, effectively reduce the production cost, and can meet large-scale production applications.

[0048] Example Two

[0049] This embodiment provides a method for directly growing SOI, including:

[0050] Under the oxidation conditions of an oxygen flow rate of 900 sccm, a gas pressure of 460 torr, and a temperature of 950 °C, the predetermined silicon wafer 100 is oxidized to obtain a silicon wafer with an oxide layer 102 having a thickness of 1 μm.

[0051] Under the deposition conditions of a carbon source flow rate of 4.5 g / s and a deposition temperature of 550 °C, amorphous carbon is deposited on the oxide layer 102 of the predetermined silicon wafer 100 by chemical vapor deposition to obtain a silicon wafer with an amorphous carbon layer 104 having a thickness of 70 Å.

[0052] Put the silicon wafer with the amorphous carbon layer 104 into a high-temperature furnace. Under the conditions of high-temperature annealing and reduction treatment with an annealing pressure of 0.8 torr, an annealing temperature of 1300 °C, and an annealing time of 6 h, using helium as the protection and a helium flow rate of 9000 sccm / s, cause a chemical reaction between the oxide layer 102 and the amorphous carbon layer 104 to generate single-crystalline silicon and carbon monoxide, thereby obtaining a silicon wafer with a top-layer single-crystalline silicon 106.

[0053] Under the epitaxial growth conditions of a temperature of 1000 °C, a pressure of 760 torr, and a dichlorosilane flow rate of 500 sccm, the thickness of the top-layer single-crystalline silicon 106 is epitaxially grown to a predetermined thickness of 500 nm, thereby obtaining a qualified SOI product.

[0054] It should be understood that the parts identical to those in Embodiment 1 in this embodiment will not be described in detail.

[0055] Embodiment 3

[0056] This embodiment provides a method for directly growing SOI, including:

[0057] Under the oxidation conditions of an oxygen flow rate of 1900 sccm, an air pressure of 760 torr, and a temperature of 1000 °C, oxidize the predetermined silicon wafer 100 to obtain a silicon wafer with an oxide layer 102 having a thickness of 1 um.

[0058] Under the deposition conditions of a flow rate of the carbon source of 3 g / s and a deposition temperature of 750 °C, deposit amorphous carbon on the oxide layer 102 of the predetermined silicon wafer 100 by chemical vapor deposition to obtain a silicon wafer with an amorphous carbon layer 104 having a thickness of 100 Å.

[0059] Put the silicon wafer with the amorphous carbon layer 104 into a high-temperature furnace. Under the conditions of high-temperature annealing and reduction treatment with an annealing pressure of 5 torr, an annealing temperature of 1400 °C, and an annealing time of 6 h, using helium as the protection and a helium flow rate of 9000 sccm / s, cause a chemical reaction between the oxide layer 102 and the amorphous carbon layer 104 to generate single-crystalline silicon and carbon monoxide, thereby obtaining a silicon wafer with a top-layer single-crystalline silicon 106.

[0060] Under the epitaxial growth conditions of a temperature of 1000 °C, a pressure of 550 torr, and a dichlorosilane flow rate of 800 sccm, the thickness of the top-layer single-crystalline silicon 106 is epitaxially grown to a predetermined thickness of 500 nm, thereby obtaining a qualified SOI product.

[0061] It should be understood that the parts identical to those in Embodiment 1 in this embodiment will not be described in detail.

[0062] Embodiment 4

[0063] This embodiment provides a method for directly growing SOI, including:

[0064] Under the oxidation conditions of an oxygen flow rate of 2300 sccm, a pressure of 900 torr, and a temperature of 1100 °C, the predetermined silicon wafer 100 is oxidized to obtain a silicon wafer with an oxide layer 102 having a thickness of 1 μm.

[0065] Under the deposition conditions of a carbon source flow rate of 1.5 g / s and a deposition temperature of 550 °C, amorphous carbon is deposited on the oxide layer 102 of the predetermined silicon wafer 100 by chemical vapor deposition to obtain a silicon wafer with an amorphous carbon layer 104 having a thickness of 30 Å.

[0066] The silicon wafer having the amorphous carbon layer 104 is placed in a high-temperature furnace. Under the high-temperature annealing reduction treatment conditions of an annealing pressure of 1 torr, an annealing temperature of 1400 °C, and an annealing time of 2 h, with helium as the protection and a helium flow rate of 9000 sccm / s, a chemical reaction occurs between the oxide layer 102 and the amorphous carbon layer 104 to generate single-crystalline silicon and carbon monoxide, thereby obtaining a silicon wafer having a top-layer single-crystalline silicon 106.

[0067] Under the epitaxial growth conditions of a temperature of 1150 °C, a pressure of 760 torr, and a dichlorosilane flow rate of 1000 sccm, the thickness of the top-layer single-crystalline silicon 106 is epitaxially grown to a predetermined thickness of 500 nm, thereby obtaining an SOI product that meets the requirements.

[0068] It should be understood that the parts that are the same as those in the first embodiment in this embodiment will not be described in detail.

[0069] Although the present invention has been specifically shown and described with reference to its exemplary embodiments, those skilled in the art should understand that various changes in form and detail can be made without departing from the spirit and scope of the present invention as defined by the claims.

Claims

1. A method for directly growing SOI, characterized in that, The method includes: Oxidizing a predetermined silicon wafer; Using diethoxymethylsilane as a carbon source to deposit amorphous carbon on the oxide layer of the predetermined silicon wafer to obtain a silicon wafer with an amorphous carbon layer; Performing a high-temperature annealing reduction treatment on the silicon wafer with the amorphous carbon layer, causing a chemical reaction between the oxide layer and the amorphous carbon layer to generate single-crystalline silicon and carbon monoxide, and obtaining a silicon wafer with a top layer of single-crystalline silicon; wherein, an inert gas is used for protection during the treatment process; Placing the silicon wafer with the top layer of single-crystalline silicon into an epitaxial device to grow the thickness of the top layer of single-crystalline silicon to a predetermined thickness to obtain SOI; Wherein, the intermediate layer of the SOI is the remaining oxide layer after the high-temperature annealing reduction treatment, and the top layer silicon of the SOI is the top layer of single-crystalline silicon with a predetermined thickness.

2. The method according to claim 1, wherein The conditions for the oxidation are: oxygen flow rate of 100 - 3000 sccm, air pressure of 100 - 1060 torr, and temperature of 850 - 1150 °C; The flow rate of the carbon source is 1 - 5 g / s, and the deposition temperature is 300 - 950 °C; The conditions for the high-temperature annealing reduction treatment are: annealing pressure of 0.1 - 10 torr, annealing temperature of 1200 - 1400 °C, and annealing time of 1 - 6 h; The conditions for the epitaxial growth are: temperature of 900 - 1150 °C, pressure of 10 - 1060 torr, and flow rate of dichlorosilane of 10 - 1000 sccm; Wherein, the thickness of the oxide layer is 0.5 - 3.5 μm, the thickness of the amorphous carbon layer is 30 - 300 Å, and the predetermined thickness is 10 - 1500 nm.

3. The method according to claim 2, characterized in that The conditions for the oxidation are: oxygen flow rate of 500 sccm, air pressure of 230 torr, and temperature of 900 °C; The flow rate of the carbon source is 1.5 g / s, and the deposition temperature is 400 °C; The conditions for the high-temperature annealing reduction treatment are: annealing pressure of 5 torr, annealing temperature of 1400 °C, and annealing time of 5 h; The conditions for the epitaxial growth are: temperature of 1100 °C, pressure of 1060 torr, and flow rate of dichlorosilane of 1000 sccm; Wherein, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 50 Å, and the predetermined thickness is 500 nm.

4. The method according to claim 2, wherein The conditions for the oxidation are: oxygen flow rate of 900 sccm, air pressure of 460 torr, and temperature of 950 °C; The flow rate of the carbon source is 4.5 g / s, and the deposition temperature is 550 °C; The conditions for the high-temperature annealing reduction treatment are: annealing pressure of 0.8 torr, annealing temperature of 1300 °C, and annealing time of 6 h; The conditions for the epitaxial growth are: temperature of 1000 °C, pressure of 760 torr, and flow rate of dichlorosilane of 500 sccm; Wherein, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 70 Å, and the predetermined thickness is 500 nm.

5. The method according to claim 2, characterized in that, The conditions for the oxidation are: oxygen flow rate of 1900 sccm, air pressure of 760 torr, and temperature of 1000 °C; The flow rate of the carbon source is 3 g / s, and the deposition temperature is 750 °C; The conditions for the high-temperature annealing reduction treatment are: annealing pressure of 5 torr, annealing temperature of 1400 °C, and annealing time of 6 h; The conditions for the epitaxial growth are as follows: temperature 1000 °C, pressure 550 torr, and flow rate of dichlorosilane 800 sccm; Among them, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 100 Å, and the predetermined thickness is 500 nm.

6. The method according to claim 2, wherein The conditions for the oxidation are as follows: oxygen flow rate 2300 sccm, gas pressure 900 torr, and temperature 1100 °C; The flow rate of the carbon source is 1.5 g / s, and the deposition temperature is 550 °C; The conditions for the high-temperature annealing reduction treatment are as follows: annealing pressure 1 torr, annealing temperature 1400 °C, and annealing time 2 h; The conditions for the epitaxial growth are as follows: temperature 1150 °C, pressure 760 torr, and flow rate of dichlorosilane 1000 sccm; Among them, the thickness of the oxide layer is 1 μm, the thickness of the amorphous carbon layer is 30 Å, and the predetermined thickness is 500 nm.

7. The method according to any one of claims 1 to 6, characterized in that The predetermined silicon wafer is a P-type silicon wafer with a resistivity of 8.5 - 11.5 ohm·cm and a <100> crystal orientation.

8. The method according to any one of claims 1 to 6, characterized in that Amorphous carbon is deposited on the oxide layer of the predetermined silicon wafer by chemical vapor deposition.

9. The method according to any one of claims 1 to 6, characterized in that, The uniformity of the amorphous carbon layer is less than 5%.

Images