Light receiving element, distance measuring module, and electronic device

Abstract

A light-receiving element, a distance measuring module, and an electronic device are disclosed. The light-receiving element includes an on-chip lens, a wiring layer, and a semiconductor layer provided between the on-chip lens and the wiring layer. The semiconductor layer includes a photodiode, a first transfer transistor that transfers electric charges generated in the photodiode to a first charge storage portion, a second transfer transistor that transfers electric charges generated in the photodiode to a second charge storage portion, and a pixel separation portion that separates semiconductor layers of adjacent pixels from each other for at least a part in a depth direction of the semiconductor layer. The wiring layer has at least one layer including a light-blocking member. The light-blocking member is provided so as to overlap the photodiode in a plan view. The distance measuring module includes the light-receiving element, a light source, and a light emission controller. The electronic device includes the distance measuring module. According to the present application, it is possible to improve the characteristics of a sensor.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of Japanese patent application JP2018-135395, filed on July 18, 2018, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This technology relates to a light-receiving element, a ranging module, and an electronic device, and more particularly, to a light-receiving element, a ranging module, and an electronic device designed to improve their characteristics. Background Technology

[0004] Ranging systems using the indirect time-of-flight (ToF) method are well-known. In such systems, signal charges obtained by receiving reflected light from active light emitted at a specific phase from a light-emitting diode (LED) or laser and reflected by an object are rapidly distributed to different areas. Therefore, sensors capable of this distribution are required.

[0005] In view of this, for example, a technique has been proposed that enables high-speed modulation of a wide region in the substrate of a sensor by directly applying voltage to the substrate and thus generating current in the substrate (see, for example, Patent Document 1). Such a sensor is also called a current-assisted photonic demodulator (CAPD) sensor.

[0006] Reference List

[0007] Patent documents

[0008] Patent Document 1 JP 2011-86904 A Summary of the Invention

[0009] Technical issues

[0010] However, it is difficult to obtain a CAPD sensor with sufficient characteristics using the above-mentioned techniques.

[0011] For example, the CAPD sensor described above is a surface illumination type sensor, in which wiring is provided on the surface of the substrate on the side that receives light from the outside.

[0012] To ensure a sufficient photoelectric conversion area, it is desirable to avoid wiring or other obstructions that could block the light path of the incident light on the light-receiving side of the photodiode (PD) or the photoelectric conversion section. However, in surface-illuminated CAPD sensors, depending on the structure, wiring for charge extraction, various control lines, and signal lines are provided on the light-receiving side of the PD. As a result, the photoelectric conversion area is limited. In other words, it is difficult to ensure a sufficient photoelectric conversion area, and characteristics such as pixel sensitivity may deteriorate.

[0013] Furthermore, when CAPD sensors are used in applications subject to external light illumination, the external light component becomes the noise component in the indirect Time-of-Flight (ToF) method, where active light is used for ranging. Therefore, to ensure a sufficient signal-to-noise ratio (SN) and obtain distance information, a sufficient saturation signal quantity (Qs) must be ensured. However, in surface-illuminated CAPD sensors, wiring layout is limited; therefore, measures must be taken to use techniques that do not involve wiring capacitors, such as providing additional transistors to ensure capacitance.

[0014] In many cases, near-infrared light with a wavelength of approximately 940 nm (corresponding to the window of sunlight) is used as the light source. Due to the low absorption coefficient of silicon, which forms the semiconductor layer, near-infrared light exhibits low quantum efficiency. Therefore, it is necessary to increase the thickness of the silicon forming the photoelectric conversion region. With thicker silicon, the photoelectric converted charge takes a long time to reach the electrodes used to attract the charge. After switching distribution, in some cases, some charge reaches the electrodes, resulting in erroneous signals. Consequently, ranging accuracy may decrease. In other words, the sensor's characteristics may deteriorate.

[0015] This technology was developed in view of the above circumstances, and it improves the characteristics of ToF sensors.

[0016] Solution to the problem

[0017] The light-receiving element according to the first aspect of this technology includes:

[0018] On-chip lens;

[0019] Wiring layer; and

[0020] A semiconductor layer is disposed between the on-chip lens and the wiring layer.

[0021] The semiconductor layer includes:

[0022] Photodiode;

[0023] A first transfer transistor transfers the charge generated in the photodiode to a first charge storage unit;

[0024] The second transfer transistor transfers the charge generated in the photodiode to the second charge storage unit; and

[0025] The inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction.

[0026] The wiring layer has at least one layer including a light-shielding member, and

[0027] The light-shielding member is arranged to overlap with the photodiode in a plan view.

[0028] In a first aspect of this technology, an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer are provided. The semiconductor layer includes: a photodiode; a first transfer transistor that transfers charge generated in the photodiode to a first charge storage portion; a second transfer transistor that transfers charge generated in the photodiode to a second charge storage portion; and an inter-pixel separation portion that separates the semiconductor layers of adjacent pixels from each other for at least a portion in the depth direction of the semiconductor layer. The wiring layer has at least one layer including a light-shielding member, and the light-shielding member is arranged to overlap with the photodiode in a planar view.

[0029] The ranging module according to the second aspect of this technology includes:

[0030] Light-receiving element;

[0031] A light source that emits illumination light with periodically varying brightness; and

[0032] A light-emitting controller that controls the timing of emitting the illumination light.

[0033] The light-receiving element includes:

[0034] On-chip lens;

[0035] Wiring layer; and

[0036] A semiconductor layer is disposed between the on-chip lens and the wiring layer.

[0037] The semiconductor layer includes:

[0038] Photodiode;

[0039] A first transfer transistor transfers the charge generated in the photodiode to a first charge storage unit;

[0040] The second transfer transistor transfers the charge generated in the photodiode to the second charge storage unit; and

[0041] The inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction.

[0042] The wiring layer has at least one layer including a light-shielding member, and

[0043] The light-shielding member is arranged to overlap with the photodiode in a plan view.

[0044] In a second aspect of this technology, a light-receiving element is provided; a light source that emits illumination light having periodically varying brightness; and a light-emitting controller that controls the timing of emitting the illumination light. The light-receiving element includes an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer. The semiconductor layer includes: a photodiode; a first transfer transistor that transfers charge generated in the photodiode to a first charge storage unit; a second transfer transistor that transfers charge generated in the photodiode to a second charge storage unit; and an inter-pixel separation portion that separates the semiconductor layers of adjacent pixels from each other for at least a portion in the depth direction of the semiconductor layer. The wiring layer has at least one layer including a light-shielding member, and the light-shielding member is arranged to overlap with the photodiode in a planar view.

[0045] The electronic device according to a third aspect of the present technology includes:

[0046] The ranging module includes:

[0047] Light-receiving element;

[0048] A light source that emits illumination light with periodically varying brightness; and

[0049] A light-emitting controller that controls the timing of emitting the illumination light.

[0050] The light-receiving element includes:

[0051] On-chip lens;

[0052] Wiring layer; and

[0053] A semiconductor layer is disposed between the on-chip lens and the wiring layer.

[0054] The semiconductor layer includes:

[0055] Photodiode;

[0056] A first transfer transistor transfers the charge generated in the photodiode to a first charge storage unit;

[0057] The second transfer transistor transfers the charge generated in the photodiode to the second charge storage unit; and

[0058] The inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction.

[0059] The wiring layer has at least one layer including a light-shielding member, and

[0060] The light-shielding member is arranged to overlap with the photodiode in a plan view.

[0061] In a third aspect of this technology, a ranging module is provided, comprising: a light-receiving element; a light source emitting illumination light having periodically varying brightness; and a light-emitting controller controlling the timing of emitting the illumination light. The light-receiving element includes an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer. The semiconductor layer includes: a photodiode; a first transfer transistor that transfers charge generated in the photodiode to a first charge storage unit; a second transfer transistor that transfers charge generated in the photodiode to a second charge storage unit; and an inter-pixel separation unit that separates the semiconductor layers of adjacent pixels from each other for at least a portion in the depth direction of the semiconductor layer. The wiring layer has at least one layer including a light-shielding member, and the light-shielding member is arranged to overlap with the photodiode in a planar view.

[0062] Advantages of the present invention

[0063] According to the first to third aspects of this technology, the characteristics can be improved.

[0064] Note that the effects of this technology are not limited to those described herein, and may include any effects described in this disclosure. Attached Figure Description

[0065] Figure 1 This is a block diagram schematically illustrating an example construction of a light-receiving element in an embodiment of which the present technology is applied.

[0066] Figure 2 This is a cross-sectional view showing the first example construction of the pixels.

[0067] Figure 3 It is shown Figure 2 The diagram shows the example circuit construction for each pixel.

[0068] Figure 4 It is shown Figure 3 A plan view of an example of the arrangement of pixel circuits.

[0069] Figure 5It is shown Figure 2 A diagram showing another example circuit construction for each pixel.

[0070] Figure 6 It is shown Figure 5 A plan view of an example of the arrangement of pixel circuits.

[0071] Figure 7 This diagram is used to illustrate the effect of the back-illuminated type.

[0072] Figure 8 This diagram is used to illustrate the effect of the back-illuminated type.

[0073] Figure 9 This diagram is used to illustrate the effect of the back-illuminated type.

[0074] Figure 10 This diagram is used to illustrate the effect of the back-illuminated type.

[0075] Figure 11 This diagram is used to illustrate the effect of the back-illuminated type.

[0076] Figure 12 This is a cross-sectional view showing a second example construction of the pixels.

[0077] Figure 13 This is a cross-sectional view showing a third example construction of pixels.

[0078] Figure 14 This is a cross-sectional view showing the fourth example construction of the pixel.

[0079] Figure 15 This is a cross-sectional view showing the fifth example construction of the pixel.

[0080] Figure 16A and 16B This is a perspective view showing an example construction of a moth's eye structure.

[0081] Figure 17A and 17B This is a perspective view showing another example construction of the moth's eye structure.

[0082] Figure 18A and 18B This is a perspective view showing other examples of the construction of a moth's eye structure.

[0083] Figure 19 This is a cross-sectional view showing the sixth example construction of the pixel.

[0084] Figures 20A to 20F This is a diagram used to illustrate the manufacturing method of the sixth example construction.

[0085] Figure 21 This is a diagram illustrating an example of a four-part pixel structure.

[0086] Figure 22 This is a block diagram illustrating an example construction of a ranging module applying this technology.

[0087] Figure 23 This is a block diagram illustrating an example construction of a smartphone as an embodiment of the present technology.

[0088] Figure 24 This is a block diagram schematically illustrating an example construction of a vehicle control system.

[0089] Figure 25 This is an illustrative diagram showing an example of the mounting location of the external information detector and imaging unit. Detailed Implementation

[0090] The following is a description of the methods used to implement this technology (hereinafter referred to as embodiments). Note that the description will be presented in the following order.

[0091] 1. Example construction of a light-receiving element

[0092] 2. Cross-sectional view constructed from the first example of a pixel.

[0093] 3. Example circuit construction for a pixel

[0094] 4. Pixel planar diagram

[0095] 5. Another example circuit construction for a pixel

[0096] 6. Pixel planar diagram

[0097] 7. Effects of back-illuminated type

[0098] 8. Cross-sectional view of the second example construction of pixels.

[0099] 9. Cross-sectional view of the third example construction of pixels.

[0100] 10. Cross-sectional view of the fourth example construction of pixels.

[0101] 11. Cross-sectional view of the fifth example construction of pixels.

[0102] 12. Cross-sectional view of the sixth example construction of pixels.

[0103] 13. Example of a four-part pixel structure

[0104] 14. Example Construction of a Ranging Module

[0105] 15. Example Construction of Electronic Devices

[0106] 16. Example application of moving objects

[0107] <1. Example Construction of a Light-Receiving Element>

[0108] Figure 1 This is a block diagram schematically illustrating an example construction of a light-receiving element to which this technology is applied.

[0109] Figure 1 The light-receiving element 1 shown is a component that outputs ranging information according to the indirect ToF method.

[0110] The light-receiving element 1 receives light (reflected light) emitted from a predetermined light source, incident on an object, and then reflected back by the object, and outputs a depth image that stores information representing the distance to the object as a depth value. Note that the illumination light emitted from the light source is infrared light with a wavelength of 780nm to 1000nm, and is, for example, pulsed light that is repeatedly turned on and off at predetermined intervals.

[0111] The light-receiving element 1 includes: a pixel array unit 21 formed on a semiconductor substrate (not shown); and a peripheral circuit unit integrated on the same semiconductor substrate as the pixel array unit 21. For example, the peripheral circuit unit is formed by a vertical driving unit 22, a column processing unit 23, a horizontal driving unit 24, and a system control unit 25.

[0112] The light-receiving element 1 also includes a signal processing unit 26 and a data storage unit 27. Note that the signal processing unit 26 and the data storage unit 27 can be mounted on the same substrate as the light-receiving element 1, or they can be arranged on a substrate in a different module than the light-receiving element 1.

[0113] Pixel array unit 21 generates a charge corresponding to the amount of received light, and pixels 10 for outputting a signal corresponding to the charge are arranged in a matrix in a two-dimensional manner along the row and column directions. In other words, pixel array unit 21 has multiple pixels 10 for photoelectric conversion of incident light, and pixel array unit 21 outputs a signal corresponding to the resulting charge. (See below for further details.) Figure 2 Pixel 10 is described in detail in the following figures.

[0114] Here, row direction refers to the horizontal arrangement of pixels 10, and column direction refers to the vertical arrangement of pixels 10. Row direction is the horizontal direction in the diagram, and column direction is the vertical direction.

[0115] In the matrix-like pixel array of pixel array unit 21, pixel driving lines 28 are arranged along the row direction for each pixel row, and two vertical signal lines 29 are arranged along the column direction for each pixel column. For example, the pixel driving lines 28 transmit driving signals, which are used to perform driving when reading signals from pixel 10. Note that in Figure 1In the diagram, although each pixel driving line 28 is shown as a wiring, it is not necessarily a single wiring. One end of each pixel driving line 28 is connected to the output terminal of the vertical driving unit 22 corresponding to each row.

[0116] The vertical drive unit 22 is formed by a shift register and an address decoder, and drives each pixel 10 in the pixel array unit 21 either generally or row by row. In other words, the vertical drive unit 22, together with the system control unit 25 for controlling the vertical drive unit 22, forms a drive unit for controlling the operation of each pixel 10 in the pixel array unit 21.

[0117] The detection signals output from each pixel 10 in the pixel row according to the drive control executed by the vertical drive unit 22 are input to the column processing unit 23 via the vertical signal line 29. The column processing unit 23 performs predetermined signal processing on the detection signals output from each pixel 10 via the vertical signal line 29 and temporarily stores the signal-processed detection signals. Specifically, the column processing unit 23 performs noise removal processing and analog-to-digital (AD) conversion processing as signal processing.

[0118] The horizontal driving unit 24 is formed by a shift register and an address decoder, and sequentially selects the unit circuits corresponding to the pixel columns of the column processing unit 23. Through this selective scanning performed by the horizontal driving unit 24, detection signals that have undergone signal processing by the column processing unit 23 for each unit circuit are sequentially output.

[0119] The system control unit 25 includes a timing generator for generating various timing signals, and the system control unit 25 performs drive control on the vertical drive unit 22, column processing unit 23 and horizontal drive unit 24 based on the various timing signals generated by the timing generator.

[0120] The signal processing unit 26 has at least arithmetic processing capabilities, and performs various signal processing operations, such as arithmetic processing, based on the detection signal output from the slave processing unit 23. The data storage unit 27 temporarily stores the data required for the signal processing to be performed by the signal processing unit 26.

[0121] The light-receiving element 1 constructed as described above outputs a depth image, wherein information representing the distance to an object is stored as a depth value in the pixel values. The light-receiving element 1 is mounted, for example, on a vehicle, and can be mounted to an in-vehicle system for measuring the distance to objects outside the vehicle, or to a gesture recognition device for measuring the distance to an object (e.g., a user's hand) and recognizing the user's gesture based on the measurement results, etc.

[0122] <2. Cross-sectional view constructed from the first example of a pixel>

[0123] Figure 2 This is a cross-sectional view showing a first example configuration of pixels 10 arranged in pixel array unit 21.

[0124] The light-receiving element 1 includes a semiconductor substrate 41 and a multilayer wiring layer 42 formed on the front surface side (the lower side in the figure).

[0125] The semiconductor substrate 41 is formed of silicon (Si), for example, and its thickness is, for example, 1 μm to 6 μm. In the semiconductor substrate 41, for example, N-type (second conductivity type) semiconductor regions 52 are formed pixel-by-pixel in P-type (first conductivity type) semiconductor regions 51, such that the photodiode PD is formed on a pixel-by-pixel basis. The P-type semiconductor regions 51 disposed on the front and back surfaces of the semiconductor substrate 41 also serve as hole charge storage regions for suppressing dark current.

[0126] The upper surface of the semiconductor substrate 41 (i.e., on) Figure 2 The upper side of the semiconductor substrate 41 is the back surface and the light incident surface into which light enters. An anti-reflection film 43 is formed on the upper surface of the back side of the semiconductor substrate 41.

[0127] The antireflective film 43 has a layered structure, wherein, for example, a fixed-charge film and an oxide film are stacked, and a high-k dielectric thin film formed by atomic layer deposition (ALD) can be used, for example, as the antireflective film 43. Specifically, hafnium oxide (HfO2), aluminum oxide (Al2O3), titanium oxide (TiO2), or strontium titanium oxide (STO) can be used. Figure 2 In the example shown, the antireflective film 43 is formed by stacking hafnium oxide film 53, aluminum oxide film 54 and silicon oxide film 55.

[0128] An inter-pixel light-shielding film 45 is formed on the upper surface of the anti-reflective film 43 and at the boundary portion 44 (hereinafter also referred to as pixel boundary portion 44) between adjacent pixels 10 in the semiconductor substrate 41 to prevent incident light from entering the adjacent pixels. For example, the material of the inter-pixel light-shielding film 45 can be any material that blocks light, and metal materials such as tungsten (W), aluminum (Al) or copper (Cu) can be used.

[0129] On the upper surface of the antireflective film 43 and the upper surface of the inter-pixel light-shielding film 45, a planarization film 46 is formed, for example, an insulating film made of silicon oxide (SiO2), silicon nitride (SiN) or silicon oxynitride (SiON), or an organic material such as resin.

[0130] Furthermore, on-chip lenses 47 are formed on the upper surface of the planarization film 46 for each pixel. For example, the on-chip lenses 47 are formed of resin materials such as styrene resin, acrylic resin, styrene-acrylic copolymer resin, or siloxane resin. The light focused by the on-chip lenses 47 effectively enters the photodiode PD.

[0131] Furthermore, at the pixel boundary portion 44 on the back side of the semiconductor substrate 41, an inter-pixel separation portion 61 for separating adjacent pixels from each other is formed in the depth direction of the semiconductor substrate 41, extending from the back side of the semiconductor substrate 41 (on the side of the on-chip lens 47) to a predetermined depth along the substrate depth direction. The bottom and outer peripheral portions of the inter-pixel separation portion 61 are covered by a hafnium oxide film 53 (which is part of the anti-reflective film 43). The inter-pixel separation portion 61 prevents incident light from reaching adjacent pixels 10 and confines the incident light within its respective pixel. The inter-pixel separation portion 61 also prevents incident light from leaking from adjacent pixels 10.

[0132] exist Figure 2 In the example shown, the silicon oxide film 55 (which serves as the material of the uppermost layer of the anti-reflective film 43) is embedded in a trench (groove) carved out from the back side, such that the silicon oxide film 55 and the inter-pixel separation portion 61 are formed simultaneously. Therefore, the silicon oxide film 55 (which is part of the laminated film used as the anti-reflective film 43) is formed from the same material as the inter-pixel separation portion 61, but not necessarily from the same material. For example, the material to be embedded as the inter-pixel separation portion 61 in the trench (groove) carved out from the back side can be a metallic material such as tungsten (W), aluminum (Al), titanium (Ti), or titanium nitride (TiN).

[0133] Meanwhile, on the front surface of the semiconductor substrate 41 on which a multilayer wiring layer 42 is formed, two transmission transistors TRG1 and TRG2 are formed for each photodiode PD formed in each pixel 10. Furthermore, on the front surface of the semiconductor substrate 41, floating diffusion regions FD1 and FD2, which serve as charge storage sections for temporarily holding the charge transferred from the photodiode PD, are formed from high-concentration N-type semiconductor regions (N-type diffusion regions).

[0134] The multilayer wiring layer 42 includes multiple metal films M and interlayer insulating films 62 between the metal films M. Figure 2 The following example is shown, in which the metal film M comprises three layers: a first metal film M1 to a third metal film M3.

[0135] In the multiple metal films M of the multilayer wiring layer 42, the region of the first metal film M1 closest to the semiconductor substrate 41 and located below the formation region of each photodiode PD, or the region that overlaps with at least a portion of the formation region of each photodiode PD in the plan view, has metal wiring such as copper or aluminum formed as a light-shielding member 63.

[0136] The light-shielding member 63 uses the first metal film M1 closest to the semiconductor substrate 41 to block infrared light that enters the semiconductor substrate 41 from the light incident surface via the on-chip lens 47 and passes through the semiconductor substrate 41 without undergoing photoelectric conversion. This prevents the infrared light from reaching the second metal film M2 and the third metal film M3 located below the first metal film M1. This light-shielding function prevents infrared light that has not undergone photoelectric conversion in the semiconductor substrate 41 from being scattered by the metal film M below the first metal film M1 and entering adjacent pixels. Therefore, erroneous light detection at adjacent pixels can be prevented.

[0137] Furthermore, the light-shielding member 63 also has the function of reflecting infrared light that enters the semiconductor substrate 41 from the light incident surface via the on-chip lens 47 and passes through the semiconductor substrate 41 without undergoing photoelectric conversion, allowing the infrared light to re-enter the semiconductor substrate 41. Therefore, the light-shielding member 63 can also be considered a reflective member. Utilizing this reflective function, the amount of infrared light to be photoelectricly converted in the semiconductor substrate 41 can be increased, and the quantum efficiency (QE) of the pixel 10's sensitivity to infrared light can be improved.

[0138] Note that the light-shielding component 63 can also be formed into a structure that uses polycrystalline silicon or oxide film other than metallic materials to reflect or block light.

[0139] Furthermore, for example, each light-shielding member 63 may not be formed by a single metal film M, but may be formed by multiple metal films M, such as a grid structure formed by a first metal film M1 and a second metal film M2.

[0140] Among the multiple metal films M of the multilayer wiring layer 42, a predetermined metal film M, such as a second metal film M2, has a wiring capacitor 64, which, for example, has a pattern formed in a comb shape. The light-shielding member 63 and the wiring capacitor 64 can be formed in the same layer (metal film M). However, when the light-shielding member 63 and the wiring capacitor 64 are formed in different layers, the wiring capacitor 64 is formed in a layer further away from the semiconductor substrate 41 than the light-shielding member 63. In other words, the light-shielding member 63 is formed closer to the semiconductor substrate 41 than the wiring capacitor 64.

[0141] As described above, the light-receiving element 1 has a back-illuminated structure, in which a semiconductor substrate 41, which serves as a semiconductor layer, is arranged between an on-chip lens 47 and a multilayer wiring layer 42, and incident light enters the photodiode PD from the back side on which the on-chip lens 47 is formed.

[0142] In addition, each pixel 10 includes two transmission transistors TRG1 and TRG2 for a photodiode PD disposed in the pixel, and the pixel 10 is designed to distribute the charge (electrons) generated by photoelectric conversion performed by the photodiode PD to the floating diffusion region FD1 or FD2.

[0143] Furthermore, in the first example configuration, pixel 10 has an inter-pixel separation portion 61 formed at the pixel boundary portion 44 to prevent incident light from reaching adjacent pixels 10, and to prevent incident light from leaking from adjacent pixels 10 while confining the incident light within their respective pixels. Then, a light-shielding member 63 is formed in the metal film M below the formation area of ​​the photodiode PD, such that infrared light passing through the semiconductor substrate 41 without photoelectric conversion in the semiconductor substrate 41 is reflected back by the light-shielding member 63 and re-enters the semiconductor substrate 41.

[0144] Using the above structure, the amount of infrared light to be photoelectrically converted in the semiconductor substrate 41 can be increased, and the quantum efficiency (QE) of the pixel 10 in response to infrared light can be improved.

[0145] <3. Example Circuit Construction for a Pixel>

[0146] Figure 3 The circuit structure of each pixel 10 arranged in two dimensions in pixel array unit 21 is shown.

[0147] Pixel 10 includes a photodiode PD as a photoelectric conversion element. Pixel 10 also includes two sets of transmission transistors TRG, a floating diffusion region FD, an additional capacitor FDL, a switching transistor FDG, an amplifying transistor AMP, a reset transistor RST, and a selection transistor SEL. Pixel 10 also includes a charge discharge transistor OFG.

[0148] Here, when the two sets of transmission transistors TRG, floating diffusion region FD, additional capacitor FDL, switching transistor FDG, amplifying transistor AMP, reset transistor RST, and selection transistor SEL in pixel 10 are distinguished from each other, as follows: Figure 3As shown, these transistors are referred to as transport transistors TRG1 and TRG2, floating diffusion regions FD1 and FD2, additional capacitors FDL1 and FDL2, switching transistors FDG1 and FDG2, amplifying transistors AMP1 and AMP2, reset transistors RST1 and RST2, and selection transistors SEL1 and SEL2.

[0149] For example, the transfer transistor TRG, the switching transistor FDG, the amplifying transistor AMP, the selection transistor SEL, the reset transistor RST, and the charge discharge transistor OFG include N-type MOS transistors.

[0150] When the transfer drive signal TRG1g supplied to the gate of transfer transistor TRG1 enters the active state, transfer transistor TRG1 enters the conducting state to transfer the charge accumulated in photodiode PD to floating diffusion region FD1. When the transfer drive signal TRG2g supplied to the gate of transfer transistor TRG2 enters the active state, transfer transistor TRG2 enters the conducting state to transfer the charge accumulated in photodiode PD to floating diffusion region FD2.

[0151] The floating diffusion regions FD1 and FD2 are charge storage sections that temporarily hold the charge transferred from the photodiode PD.

[0152] When the FD drive signal FDG1g supplied to the gate of switching transistor FDG1 is activated, switching transistor FDG1 turns on to connect the additional capacitor FDL1 to the floating diffusion region FD1. When the FD drive signal FDG2g supplied to the gate of switching transistor FDG2 is activated, switching transistor FDG2 turns on to connect the additional capacitor FDL2 to the floating diffusion region FD2. The additional capacitors FDL1 and FDL2 are... Figure 2 The wiring capacitor 64 shown is formed.

[0153] When the reset drive signal RSTg supplied to the gate of reset transistor RST1 is activated, reset transistor RST1 turns on to reset the potential of the floating diffusion region FD1. When the reset drive signal RSTg supplied to the gate of reset transistor RST2 is activated, reset transistor RST2 turns on to reset the potential of the floating diffusion region FD2. Note that when reset transistors RST1 and RST2 are activated, switching transistors FDG1 and FDG2 are also activated simultaneously, and additional capacitors FDL1 and FDL2 are reset.

[0154] For example, under high illuminance conditions with a large amount of incident light, the vertical drive unit 22 activates the switching transistors FDG1 and FDG2 to connect the floating diffusion region FD1 and the additional capacitor FDL1, and connect the floating diffusion region FD2 and the additional capacitor FDL2. Therefore, more charge can be accumulated under high illuminance.

[0155] On the other hand, in low-light conditions with low incident light intensity, the vertical drive unit 22 deactivates the switching transistors FDG1 and FDG2 to disconnect the additional capacitors FDL1 and FDL2 from the floating diffusion regions FD1 and FD2, respectively. Therefore, the conversion efficiency can be increased.

[0156] When the discharge drive signal OFG1g provided to the gate of the charge discharge transistor OFG enters the active state, the charge discharge transistor OFG enters the conduction state to discharge the charge accumulated in the photodiode PD.

[0157] When the source of amplifying transistor AMP1 is connected to vertical signal line 29A via select transistor SEL1, amplifying transistor AMP1 is connected to a constant current source (not shown) to form a source follower circuit. When the source of amplifying transistor AMP2 is connected to vertical signal line 29B via select transistor SEL2, amplifying transistor AMP2 is connected to a constant current source (not shown) to form a source follower circuit.

[0158] The select transistor SEL1 is connected between the source of the amplifier transistor AMP1 and the vertical signal line 29A. When the select signal SEL1g supplied to the gate of the select transistor SEL1 enters the active state, the select transistor SEL1 enters the conduction state, so that the detection signal VSL1 output from the amplifier transistor AMP1 is output to the vertical signal line 29A.

[0159] The select transistor SEL2 is connected between the source of the amplifier transistor AMP2 and the vertical signal line 29B. When the select signal SEL2g supplied to the gate of the select transistor SEL2 is activated, the select transistor SEL2 is turned on to output the detection signal VSL2 from the amplifier transistor AMP2 to the vertical signal line 29B.

[0160] The transmission transistors TRG1 and TRG2, the switching transistors FDG1 and FDG2, the amplification transistors AMP1 and AMP2, the selection transistors SEL1 and SEL2, and the charge discharge transistor OFG of pixel 10 are controlled by the vertical drive unit 22.

[0161] exist Figure 2In the pixel circuit shown, the additional capacitors FDL1 and FDL2, as well as the switching transistors FDG1 and FDG2 used to control the connections of the additional capacitors FDL1 and FDL2, can be omitted. However, because the additional capacitor FDL is provided and is used appropriately according to the amount of incident light, a high dynamic range can be ensured.

[0162] Below is a brief explanation of how to operate pixel 10.

[0163] First, before light reception begins, a reset operation is performed in all pixels to reset the charge in pixel 10. Specifically, the charge discharge transistor OFG, reset transistors RST1 and RST2, and switching transistors FDG1 and FDG2 are turned on, and the charge stored in photodiode PD, floating diffusion regions FD1 and FD2, and additional capacitors FDL1 and FDL2 is discharged.

[0164] After the stored charge is discharged, light reception begins in all pixels.

[0165] During the light receiving period, transmission transistors TRG1 and TRG2 are driven alternately. Specifically, in the first period, control is executed to turn on transmission transistor TRG1 and turn off transmission transistor TRG2. During the first period, the charge generated in photodiode PD is transferred to floating diffusion region FD1. In the second period following the first period, control is executed to turn off transmission transistor TRG1 and turn on transmission transistor TRG2. During the second period, the charge generated in photodiode PD is transferred to floating diffusion region FD2. As a result, the charge generated in photodiode PD is distributed to floating diffusion regions FD1 and FD2 and accumulates in floating diffusion regions FD1 and FD2.

[0166] Here, the transfer transistor TRG and the floating diffusion region FD from which the charge (electrons) obtained through photoelectric conversion are read out are also called active taps. Conversely, the transfer transistor TRG and the floating diffusion region FD from which the charge obtained through photoelectric conversion is not read out are also called inactive taps.

[0167] When the light receiving period ends, each pixel 10 in the pixel array unit 21 is selected in row order. In the selected pixel 10, selection transistors SEL1 and SEL2 are turned on. As a result, the charge accumulated in the floating diffusion region FD1 is output as a detection signal VSL1 to the column processing unit 23 via the vertical signal line 29A. The charge accumulated in the floating diffusion region FD2 is output as a detection signal VSL2 to the column processing unit 23 via the vertical signal line 29B.

[0168] Complete one optical receiving operation in the manner described above, and then execute the next optical receiving operation starting from the reset operation.

[0169] The reflected light to be received by pixel 10 is delayed from the time the light source emits, based on the distance to the object. Since the distribution ratio between the charges accumulated in the two floating diffusion regions FD1 and FD2 varies according to the delay time corresponding to the distance to the object, the distance to the object can be calculated based on the distribution ratio between the charges accumulated in the two floating diffusion regions FD1 and FD2.

[0170] <4. Pixel Planar View>

[0171] Figure 4 It is shown Figure 3 A plan view of an example arrangement in the pixel circuit shown.

[0172] Figure 4 The horizontal direction in the middle corresponds to Figure 1 The horizontal direction in the middle corresponds to the vertical direction. Figure 1 The column direction (vertical direction) in the text.

[0173] like Figure 4 As shown, the photodiode PD is formed by an N-type semiconductor region 52 in the central region of the rectangular pixel 10.

[0174] Outside the photodiode PD, a transmission transistor TRG1, a switching transistor FDG1, a reset transistor RST1, an amplifying transistor AMP1, and a selection transistor SEL1 are linearly arranged along a predetermined side of the four sides of the rectangular pixel 10, and a transmission transistor TRG2, a switching transistor FDG2, a reset transistor RST2, an amplifying transistor AMP2, and a selection transistor SEL2 are linearly arranged along the other side of the four sides of the rectangular pixel 10.

[0175] In addition, a charge discharge transistor OFG is arranged on two different sides of a transmission transistor TRG, a switching transistor FDG, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL formed along the line with pixel 10.

[0176] Notice, Figure 3 The arrangement of the pixel circuit shown is not limited to this example and can be some other arrangements.

[0177] <5. Another example of a pixel's circuit construction>

[0178] Figure 5 Another example circuit construction for each pixel 10 is shown.

[0179] exist Figure 5 In, with Figure 3 The component shown is equivalent to the component made by and Figure 3 The same reference numerals used in the drawings are used to denote the parts, and the description of the parts will not be repeated below.

[0180] Pixel 10 includes a photodiode PD as a photoelectric conversion element. Pixel 10 also includes two sets of first transmission transistors TRGa, second transmission transistors TRGb, memory MEM, floating diffusion region FD, reset transistor RST, amplification transistor AMP, and selection transistor SEL.

[0181] Here, when the two sets of first transmission transistors TRGa, second transmission transistors TRGb, memory MEM, floating diffusion region FD, reset transistor RST, amplification transistor AMP, and selection transistor SEL in pixel 10 are distinguished from each other, as follows: Figure 5 As shown, these transistors are referred to as first transfer transistors TRGa1 and TRGa2, second transfer transistors TRGb1 and TRGb2, transfer transistors TRG1 and TRG2, memory MEM1 and MEM2, floating diffusion regions FD1 and FD2, amplification transistors AMP1 and AMP2, and selection transistors SEL1 and SEL2.

[0182] therefore, Figure 5 Pixel circuits and Figure 3 The difference in the pixel circuit is that the transmission transistor TRG is replaced by two transmission transistors, TRGa as the first transmission transistor and TRGb as the second transmission transistor, and a memory MEM is added. In addition, the additional capacitor FDL and the switching transistor FDG are omitted.

[0183] For example, the first transfer transistor TRGa, the second transfer transistor TRGb, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL include N-type MOS transistors.

[0184] exist Figure 3 In the pixel circuit shown, the charge generated in the photodiode PD is transferred to and held in the floating diffusion regions FD1 and FD2. On the other hand, in Figure 5 In the pixel circuit, the charge generated in the photodiode PD is transferred to and stored in the memory MEM1 and MEM2, which are provided as charge storage units.

[0185] Specifically, when the first transmission drive signal TRGa1g supplied to the gate of the first transmission transistor TRGa1 enters the activated state, the first transmission transistor TRGa1 enters the conducting state to transfer the charge accumulated in the photodiode PD to the memory MEM1. When the first transmission drive signal TRGa2g supplied to the gate of the first transmission transistor TRGa2 enters the activated state, the first transmission transistor TRGa2 enters the conducting state to transfer the charge accumulated in the photodiode PD to the memory MEM2.

[0186] Furthermore, when the second transfer drive signal TRGb1g supplied to the gate of the second transfer transistor TRGb1 is activated, the second transfer transistor TRGb1 is turned on to transfer the charge accumulated in the memory MEM1 to the floating diffusion region FD1. When the second transfer drive signal TRGb2g supplied to the gate of the second transfer transistor TRGb2 is activated, the second transfer transistor TRGb2 is turned on to transfer the charge accumulated in the memory MEM2 to the floating diffusion region FD2.

[0187] When the reset drive signal RST1g supplied to the gate of reset transistor RST1 is activated, reset transistor RST1 turns on to reset the potential of the floating diffusion region FD1. When the reset drive signal RST2g supplied to the gate of reset transistor RST2 is activated, reset transistor RST2 turns on to reset the potential of the floating diffusion region FD2. Note that when reset transistors RST1 and RST2 are activated, the second transmission transistors TRGb1 and TRGb2 are also activated simultaneously, and in addition, memories MEM1 and MEM2 are reset.

[0188] exist Figure 5 In the pixel circuit, the charge generated in the photodiode PD is distributed to and accumulated in the memories MEM1 and MEM2. Upon readout, the charge stored in the memories MEM1 and MEM2 is transferred to the floating diffusion regions FD1 and FD2, respectively, and output from the pixel 10.

[0189] <6. Pixel Planar Image>

[0190] Figure 6 It is shown Figure 5 A plan view of an example arrangement in the pixel circuit shown.

[0191] Figure 6 The horizontal direction in the middle corresponds to Figure 1 The row direction (horizontal direction) and the vertical direction correspond to Figure 1 The column direction (vertical direction) in the text.

[0192] like Figure 6 As shown, the photodiode PD is formed by an N-type semiconductor region 52 in the central region of the rectangular pixel 10.

[0193] Outside the photodiode PD, a first transmission transistor TRGa1, a second transmission transistor TRGb1, a reset transistor RST1, an amplification transistor AMP1, and a selection transistor SEL1 are linearly arranged along predetermined sides of the four sides of the rectangular pixel 10, and a first transmission transistor TRGa2, a second transmission transistor TRGb2, a reset transistor RST2, an amplification transistor AMP2, and a selection transistor SEL2 are linearly arranged along the other side of the four sides of the rectangular pixel 10. For example, memories MEM1 and MEM2 are formed by buried N-type diffusion regions.

[0194] Notice, Figure 5 The arrangement of the pixel circuit shown is not limited to this example and can be some other arrangements.

[0195] <7. Effects of Back-Illumination>

[0196] The following effects can be achieved by using the light-receiving element 1 described above.

[0197] First, since the light-receiving element 1 is a back-illuminated type, the quantum efficiency (QE) × aperture ratio (fill factor (FF)) can be maximized, and the ranging characteristics of the light-receiving element 1 can be improved.

[0198] For example, such as Figure 7 As shown by arrow W11, a typical surface illumination type image sensor has the following structure, wherein wiring 102 and wiring 103 are formed on the light incident surface side, and light from the outside enters PD 101, which serves as a photoelectric conversion unit, through the light incident surface side.

[0199] Therefore, as shown by arrows A21 and A22, a portion of the light entering PD 101 from the outside at a certain angle may be blocked by wiring 102 or wiring 103 and will not enter PD 101.

[0200] On the other hand, for example, as shown by arrow W12, a back-illuminated image sensor has the following structure, wherein wiring 105 and wiring 106 are formed on the surfaces opposite to the light incident surface, and light from the outside enters the PD 104, which serves as a photoelectric conversion unit, through the light incident surface.

[0201] Therefore, compared to surface-illuminated types, sufficient aperture ratio can be ensured. Specifically, for example, as shown by arrows A23 and A24, light incident on PD 104 at a certain angle enters PD 104 from the outside without being blocked by any wiring. Therefore, a larger amount of light can be received, and pixel sensitivity can be improved.

[0202] By utilizing the light-receiving element, which is also a back-illuminated ToF sensor, it is possible to achieve the pixel sensitivity improvement effect achieved by this back-illuminated type.

[0203] Specifically, as shown by arrow W13, in the structure of a surface-illuminated ToF sensor, wiring 112 and wiring 113 are formed on the light incident surface side of PD 111, which serves as a photoelectric conversion unit. Therefore, as shown by arrows A25 and A26, a portion of the light entering PD 111 from the outside at a certain angle may be blocked by wiring 112 or wiring 113 and will not enter PD 111.

[0204] On the other hand, for example, as shown by arrow W14, a back-illuminated ToF sensor has a structure in which a transfer transistor for reading out charge is formed on the surface opposite to the light incident surface of the PD 115, which serves as a photoelectric conversion unit. Furthermore, wiring 117 and wiring 118 are formed on the surfaces opposite to the light incident surface of the PD 115. With this arrangement, as shown by arrows A28 and A29, for example, light incident at a certain angle onto the PD 115 enters the PD 115 without being blocked by any wiring.

[0205] Therefore, in back-illuminated ToF sensors, sufficient aperture ratio can be ensured compared to surface-illuminated ToF sensors. This allows for maximization of quantum efficiency (QE) × aperture ratio (FF) and improved ranging characteristics.

[0206] Figure 8 Cross-sectional views of pixels in a surface-illuminated ToF sensor and pixels in a back-illuminated ToF sensor are shown.

[0207] exist Figure 8 In the surface-illuminated ToF sensor on the left, the upper side of the substrate 141 is the light incident surface, and a wiring layer 152 including multiple wirings, an inter-pixel light-shielding film 153, and an on-chip lens 154 are stacked on the light incident surface side of the substrate 141.

[0208] exist Figure 8In the back-illuminated ToF sensor on the right, a wiring layer 152 including multiple wirings is formed on the lower side of the light incident surface of the substrate 142 in the figure, and an inter-pixel light-shielding film 153 and an on-chip lens 154 are stacked on the upper side of the substrate 142 that serves as the light incident surface.

[0209] Note that in Figure 8 In the image, each shadow trapezoidal shape represents an area with high light intensity due to the infrared light being focused by the on-chip lens 154.

[0210] For example, in a surface-illuminated ToF sensor, there exists a region R11 where charge readout transfer transistors TG1 and TG2 are located on the light-incident surface side of the substrate 141. In a surface-illuminated ToF sensor, because the intensity of infrared light is high in region R11 near the light-incident surface of the substrate 141, the probability of photoelectric conversion of infrared light in region R11 is high. That is, because the amount of infrared light entering the region near the ineffective tap is large, the number of signal carriers not detected by the effective tap increases, and the charge separation efficiency decreases.

[0211] On the other hand, in a back-illuminated ToF sensor, there is a region R12 in which effective and ineffective taps are formed at positions away from the light incident surface of the substrate 142, or near the surface on the opposite side of the light incident surface. The substrate 142 corresponds to... Figure 2 The semiconductor substrate 41 shown.

[0212] Region R12 is located on the surface portion opposite to the light incident surface of substrate 142, and region R12 is also located away from the light incident surface. Therefore, the intensity of incident infrared light is relatively low in the vicinity of region R12.

[0213] In regions with high infrared light intensity (such as the area near the center of substrate 142 or the area near the light incident surface), the signal carrier obtained by photoelectric conversion is guided to the effective tap by the electric field gradient formed by the effective tap and the ineffective tap, and is detected in the floating diffusion region FD of the effective tap.

[0214] On the other hand, in the region R12, which includes the invalid tap, the intensity of the incident infrared light is relatively low, and therefore the probability of photoelectric conversion of infrared light in region R12 is low. In other words, the amount of infrared light entering the region near the invalid tap is small. Therefore, the number of signal carriers (electrons) generated by photoelectric conversion near the invalid tap and moving to the floating diffusion region FD of the invalid tap becomes smaller, thus improving charge separation efficiency. As a result, ranging characteristics can be improved.

[0215] Furthermore, in the back-illuminated type light-receiving element 1, the thickness of the semiconductor substrate 41 can be reduced, thereby improving the efficiency of extracting electrons (charges) as signal carriers.

[0216] For example, in surface-illuminated ToF sensors, it is difficult to ensure a sufficient aperture ratio. Therefore, in order to ensure high quantum efficiency and prevent a decrease in quantum efficiency × aperture ratio, such as Figure 9 As indicated by arrow W31, the thickness of substrate 171 needs to be increased to a specific value.

[0217] As a result, for example, in the region near the surface on the opposite side of the light incident surface in substrate 171, or in region R21, the potential gradient becomes lower, and the electric field in the direction perpendicular to substrate 171 becomes substantially weaker. In this case, the moving speed of the signal carrier becomes slower, and therefore, the time elapsed from photoelectric conversion to transmission of the signal carrier to the floating diffusion region FD of the effective tap becomes longer. Note that in Figure 9 In the diagram, the arrows in substrate 171 indicate the electric field in substrate 171 in a direction perpendicular to substrate 171.

[0218] Furthermore, when the substrate 171 is thicker, the signal carrier travels a longer distance from a position in the substrate 171 away from the effective tap to the floating diffusion region FD of the effective tap. Therefore, at positions far from the effective tap, the time elapsed from photoelectric conversion to the transmission of the signal carrier to the floating diffusion region FD of the effective tap becomes longer. Consequently, after the switching of the transmission transistor TG is completed, some signal carriers may reach the effective tap and become erroneous signals.

[0219] Figure 10 The relationship between the position of the substrate 171 in the thickness direction and the moving speed of the signal carrier is shown. Region R21 corresponds to the diffusion current region.

[0220] When the substrate 171 is thicker as described above, at high driving frequencies, or when switching between effective and ineffective taps is performed at high speeds, for example, electrons generated at locations far from the effective tap (such as region R21) are not fully attracted to the floating diffusion region FD of the effective tap. In other words, when the effective tap time is short, some electrons (charges) generated in regions such as R21 are not detected in the floating diffusion region FD of the effective tap, and the electron extraction efficiency becomes low.

[0221] On the other hand, in back-illuminated ToF sensors, a sufficient aperture ratio can be ensured. Therefore, for example, even when... Figure 9 As indicated by arrow W32, making the substrate 172 thinner also ensures sufficient quantum efficiency × aperture ratio. Here, substrate 172 corresponds to... Figure 2 The semiconductor substrate 41 in the substrate 172, and the arrow in the substrate 172 indicates the electric field in the direction perpendicular to the substrate 172.

[0222] Figure 11 The relationship between the position of the substrate 172 in the thickness direction and the moving speed of the signal carrier is shown.

[0223] When the thickness of substrate 172 is reduced in this manner, the electric field perpendicular to substrate 172 becomes substantially stronger, and only electrons (charges) in the drift current region (where the signal carrier moves at a high speed) are used, instead of electrons in the diffusion current region (where the signal carrier moves at a low speed). Since only electrons (charges) in the drift current region are used, the time elapsed from photoelectric conversion to detection of the signal carrier in the floating diffusion region FD of the effective tap becomes shorter. Furthermore, when the thickness of substrate 172 becomes smaller, the travel distance of the signal carrier from the floating diffusion region FD of the effective tap also becomes shorter.

[0224] In view of the above facts, in the back-illuminated ToF sensor, even when the driving frequency is high, the signal carriers (electrons) generated in each region of the substrate 172 can be sufficiently attracted to the floating diffusion region FD of the effective tap, thus improving the electron extraction efficiency.

[0225] Furthermore, by reducing the thickness of the substrate 172, sufficient electron extraction efficiency can be ensured even at high driving frequencies, and resistance to high-speed driving can be increased.

[0226] In particular, sufficient aperture ratio can be obtained in back-illuminated ToF sensors. Therefore, pixel miniaturization is possible, and the miniaturization tolerance of pixels can be increased.

[0227] Furthermore, since the light-receiving element 1 is a back-illuminated type, it allows for greater freedom in the design of the back end of line (BEOL), thereby increasing the freedom in setting the saturation signal quantity (Qs).

[0228] <8. Cross-sectional view of the second example construction of pixels>

[0229] Figure 12 This is a cross-sectional view showing a second example construction of pixel 10.

[0230] exist Figure 12 In, with Figure 2 The first example shown constructs an equivalent component consisting of... Figure 2 The same reference numerals used in the drawings indicate these parts, and it is unnecessary to describe them again.

[0231] In addition to the following aspects Figure 12 The second example construction and Figure 2 The first example is constructed in the same way: the pixel separation portion 61 is replaced by the pixel separation portion 211 that penetrates the semiconductor substrate 41. The pixel separation portion 61 is a deep trench isolation (DTI) formed by excavating from the back side (on-chip lens 47 side) of the semiconductor substrate 41.

[0232] The inter-pixel separation portion 211 is formed by forming a trench from the back side (on the side of the on-chip lens 47) or the front surface side of the semiconductor substrate 41 to the substrate surface on the opposite side, and filling the trench with a silicon oxide film 55, which is the material of the uppermost layer of the anti-reflective film 43. In addition to an insulating film such as silicon oxide film 55, the material to be embedded in the trench as the inter-pixel separation portion 211 can be, for example, a metal material such as tungsten (W), aluminum (Al), titanium (Ti), or titanium nitride (TiN).

[0233] Because of the formation of this inter-pixel separation section 211, adjacent pixels can be completely electrically separated from each other. As a result, the inter-pixel separation section 211 prevents incident light from reaching adjacent pixels 10 and confines the incident light within its respective pixel. The inter-pixel separation section 211 also prevents incident light from leaking from adjacent pixels 10.

[0234] Since the second example structure is also a back-illuminated pixel structure, it can ensure a sufficient aperture ratio compared to the surface-illuminated structure. Therefore, it is possible to maximize the quantum efficiency (QE) × aperture ratio (FF).

[0235] Furthermore, among the multiple metal films M in the multilayer wiring layer 42, the first metal film M1 closest to the semiconductor substrate 41 has a light-shielding member (reflective member) 63 in the region below the formation area of ​​the photodiode PD. This allows infrared light that has passed through the semiconductor substrate 41 without undergoing photoelectric conversion to be reflected by the light-shielding member 63 and re-enter the semiconductor substrate 41. This arrangement further increases the amount of infrared light to be photoelectric converted in the semiconductor substrate 41 and improves the quantum efficiency (QE) of the pixel 10's sensitivity to infrared light. Furthermore, it prevents infrared light that has passed through the semiconductor substrate 41 without undergoing photoelectric conversion from being scattered by the metal film M and entering adjacent pixels. Therefore, erroneous light detection at adjacent pixels can be prevented.

[0236] <9. Cross-sectional view of the third example construction of pixels>

[0237] Figure 13 This is a cross-sectional view showing a third example construction of pixel 10.

[0238] exist Figure 13 In, with Figure 2 The first example shown constructs an equivalent component by using... Figure 2 The same reference numerals used in the drawings indicate these parts, and it is unnecessary to describe them again.

[0239] exist Figure 13 In the third example configuration, the upper region 223 of the PD located above the formation region of the photodiode PD in the semiconductor substrate 41 (P-type semiconductor region 51) all have a moth-eye structure, in which tiny bumps and depressions are formed. Furthermore, consistent with the moth-eye structure in the upper region 223 of the PD in the semiconductor substrate 41, the anti-reflective film 221 formed on the upper surface of the semiconductor substrate 41 also has a moth-eye structure. Similar to the first example configuration, the anti-reflective film 221 is formed by a stack of hafnium oxide film 53, aluminum oxide film 54, and silicon oxide film 55.

[0240] As described above, since the upper region 223 of the PD of the semiconductor substrate 41 has a moth-eye structure, the sharp change in refractive index at the substrate interface can be mitigated, and the influence of reflected light can be reduced.

[0241] Note that in Figure 13 In, with Figure 2 Compared to the first example of the inter-pixel separation portion 61, the inter-pixel separation portion 61 formed by DTI (which is formed by excavating from the back side (on-chip lens 47 side) of the semiconductor substrate 41) is formed to a slightly deeper location. The depth in the substrate thickness direction where the inter-pixel separation portion 61 is formed can be set to any depth as described above.

[0242] In other respects, the third example construction is the same as the first example construction.

[0243] <10. Cross-sectional view of the fourth example construction of pixels>

[0244] Figure 14 This is a cross-sectional view showing the fourth example construction of pixel 10.

[0245] exist Figure 14 In this document, components equivalent to the first to third example constructions described above are indicated by the same reference numerals used above, and it is unnecessary to repeat the description of these components.

[0246] Figure 14 The fourth example construction and Figure 13 The third example shown shares the same feature that the upper region 223 of the PD includes a substrate interface with a moth-eye structure and an anti-reflective film 221.

[0247] Figure 14 The fourth example construction and Figure 12 The second example shown shares the same feature as the inclusion of an inter-pixel separation section 211 that extends through the entire semiconductor substrate 41.

[0248] in other words, Figure 14 The fourth example configuration includes both the inter-pixel separation portion 211 of the second example configuration and the semiconductor substrate 41 and the anti-reflective film 221 with a moth-eye structure of the third example configuration. In other respects, the fourth example configuration is the same as the second or third example configuration.

[0249] Since the third and fourth example structures are also back-illuminated pixel structures, sufficient aperture ratio can be ensured compared to the surface-illuminated structure. Therefore, quantum efficiency (QE) × aperture ratio (FF) can be maximized.

[0250] Furthermore, by providing a light-shielding member (reflective member) 63 in the predetermined metal film M of the multilayer wiring layer 42, the sensitivity of the pixel 10 to infrared light can be increased, and erroneous light detection at adjacent pixels can be prevented.

[0251] <11. Cross-sectional view of the fifth example construction of pixels>

[0252] Figure 15 This is a cross-sectional view showing the fifth example construction of pixel 10.

[0253] exist Figure 15 In this document, components equivalent to the first to fourth example constructions described above are indicated by the same reference numerals used above, and it is unnecessary to repeat the description of these components.

[0254] In the first to fourth example configurations described above, the inter-pixel separation portion 61 or inter-pixel separation portion 211 provided in the pixel boundary portion 44 can be omitted.

[0255] For example, if the inter-pixel separation portion 61 of the third example construction or the inter-pixel separation portion 211 of the fourth example construction described above is omitted, then the following is obtained: Figure 15 The structure shown.

[0256] Figure 15 The fifth example configuration has a configuration that omits the inter-pixel separation portion 61 of the third example configuration or the inter-pixel separation portion 211 of the fourth example configuration. In the fifth example configuration, the anti-reflective film 221 is formed as a flat film in each pixel boundary portion 44. In other respects, the fifth example configuration is the same as the third or fourth example configuration.

[0257] <Perspective view of moth eye structure>

[0258] Figure 16AThis is a perspective view of the moth-eye structure formed in the upper region 223 of the PD on the semiconductor substrate 41.

[0259] In the moth-eye structure of the semiconductor substrate 41, for example, as Figure 16A As shown, multiple quadrangular pyramidal regions with essentially the same shape and size and having vertices are regularly arranged on the side of the semiconductor substrate 41 (in a grid pattern).

[0260] Note that in Figure 16A In the middle, the upper side of the semiconductor substrate 41 is the light incident side, which is the side of the on-chip lens 47.

[0261] A moth-eye structure is formed on the light-incident surface side of the semiconductor substrate 41, and the moth-eye structure has an inverted pyramid structure in which multiple quadrangular pyramidal regions with vertices on the photodiode PD side are regularly arranged. The base surface of each quadrangular pyramid has a square shape, and the semiconductor substrate 41 is cut out such that each quadrangular pyramidal region protrudes on the photodiode PD side. Figure 16A In the example, the portion indicated by arrow W51 is the recess at the vertex of each quadrangular pyramid region on the photodiode (PD) side. For example, the recess indicated by arrow W51 has curvature and a circular shape.

[0262] Note that not only can the corresponding concave portions of each tetrapod in the moth-eye structure have a certain curvature, but also the inclined portions of each tetrapod region (i.e., Figure 16B The shaded portion (in the image) can also have a certain curvature. Since the inclined portion also has curvature, the effect of suppressing uneven formation and peeling of the planarization film 46 can be further improved.

[0263] Figure 17A and 17B This is a perspective view showing another example of a moth-eye structure in semiconductor substrate 41.

[0264] In reference Figure 16A and 16B In the above example, the moth-eye structure is an inverted pyramid structure, which is formed by a four-cornered pyramidal region with a vertex on the photodiode (PD) side. However, for example, as... Figure 17A and 17B As shown, the moth's eye structure can be a right-side-up pyramid structure.

[0265] Specifically, such as Figure 17A As shown, the moth-eye structure is formed on the light-incident side surface of the semiconductor substrate 41. Furthermore, the moth-eye structure is a positive pyramid structure in which multiple quadrangular pyramidal regions with vertices on the side of the on-chip lens 47 (i.e., the light-incident side) are arranged in a grid pattern.

[0266] exist Figure 17A In the process, multiple pyramidal regions also have substantially the same shape and substantially the same size, and the base surface of each pyramid has a square shape. In addition, the semiconductor substrate 41 is excavated to form the pyramidal regions, such that each pyramidal region protrudes on the opposite side of the photodiode PD.

[0267] For example, the portion indicated by arrow W71 is the recess at the base of each quadrangular pyramidal region on the photodiode PD side. The recess indicated by arrow W71 has a portion that protrudes on the photodiode PD side when viewed in a cross-section substantially parallel to the direction from the light incident side of the semiconductor substrate 41 toward the photodiode PD. Figure 16A and 16B The example shown is the same; the convex part has curvature and a circular shape.

[0268] exist Figure 17B In this case, the shaded portion formed by the base of each quadrangular pyramid with a vertex on the upper side can be formed to have curvature. With Figure 16A and 16B The example shown is the same, which can suppress uneven formation and peeling of the planarization film 46 formed on the semiconductor substrate 41.

[0269] Figure 18A and 18B This is a perspective view showing another example of a moth-eye structure in semiconductor substrate 41.

[0270] In the eye structure of a moth, for example, as Figure 18A As shown, the slightly uneven bottom surface can have a rectangular shape.

[0271] Figure 18A The moth-eye structure shown is formed on the light incident surface side of the semiconductor substrate 41, and the moth-eye structure has a long linear recess in the longitudinal (vertical direction) or transverse (horizontal direction) direction of the pixel 10.

[0272] More specifically, when in relation to Figures 13 to 15 When viewed from a cross-section in the same direction as the cross-section diagram, Figure 18A The moth-eye structure shown has a serrated shape and the following shape: multiple triangular prisms of basically the same shape and size are arranged in one direction, and at the same time, one vertex of each triangle and one rectangular surface of each triangular prism face the photodiode PD.

[0273] exist Figure 18AIn the diagram, for example, the portion indicated by arrow W91 is a recess, and the portion indicated by arrow W92 is a convex portion. The shaded portion of each recess is a circular shape with a predetermined curvature. Therefore, in this example, uneven formation and peeling of the planarization film 46 formed on the semiconductor substrate 41 can also be suppressed.

[0274] In addition to the regularly arranged quadrangular pyramidal structures of basically the same size, the moth-eye structure in the semiconductor substrate 41 can also be the following structure: wherein, as Figure 18B As shown, four-cornered pyramids of different sizes can be arranged irregularly.

[0275] Figure 18B The example shown is a regular pyramid structure in which the quadrangular pyramidal regions with vertices on the side of lens 47 are irregularly arranged. Furthermore, the dimensions of the multiple quadrangular pyramidal regions are not identical. In other words, the size and arrangement of the pyramids are random.

[0276] For example, the portions indicated by arrows W93 and W94 are recesses, and these recesses have curvature and a circular shape. This arrangement helps to suppress uneven formation and peeling of the planarization film 46 formed on the semiconductor substrate 41.

[0277] Figure 18B A moth-eye structure with a positive pyramidal structure is shown, in which multiple quadrangular pyramidal regions with vertices on the side of the on-plate lens 47 are randomly arranged. However, Figure 16A and 16B The inverted pyramid structure shown can of course be structured as follows: the size and arrangement of multiple quadrangular pyramidal regions are random.

[0278] For example, the moth-eye structure of the semiconductor substrate 41 formed in the upper region 223 of the PD can be formed to have Figures 16A to 18B The shape can be any of the shapes shown. This mitigates the abrupt change in refractive index at the substrate interface and reduces the impact of reflected light.

[0279] Note that in the third to fifth example constructions using the moth-eye structure, the anti-reflective film 221 on it can be omitted if the anti-reflective effect of the moth-eye structure is sufficient.

[0280] <12. Cross-sectional view of the sixth example construction of pixels>

[0281] Figure 19 This is a cross-sectional view showing the sixth example construction of pixel 10.

[0282] exist Figure 19In this document, components equivalent to the first to fifth example constructions described above are indicated by the same reference numerals used above, and it is unnecessary to repeat the description of these components.

[0283] In the first to fifth example configurations described above, the light-receiving element 1 is formed from a single semiconductor substrate, or solely from semiconductor substrate 41. However, in Figure 19 In the sixth example configuration, the light-receiving element 1 is formed from two semiconductor substrates: semiconductor substrate 41 and semiconductor substrate 301. In the following description, for ease of understanding, semiconductor substrate 41 and semiconductor substrate 301 will also be referred to as the first substrate 41 and the second substrate 301, respectively.

[0284] Figure 19 The sixth example construction and Figure 2 The sixth example is similar in that the inter-pixel light-shielding film 45, the planarization film 46, and the on-chip lens 47 are formed on the light-incident surface side of the first substrate 41. Figure 2 The first example is similar in that the pixel separation portion 61 is formed in the pixel boundary portion 44 on the back side of the first substrate 41.

[0285] The sixth example structure is similar to the first example structure in that photodiodes PD, which are photoelectric conversion units, are formed in the first substrate 41 for their respective pixels, and transmission transistors TRG1 and TRG2, as well as floating diffusion regions FD1 and FD2, which are charge storage units, are formed on the front surface side of the first substrate 41.

[0286] On the other hand, with Figure 2 The first example differs in that the insulating layer 313 of the wiring layer 311 on the front surface side of the first substrate 41 is bonded to the insulating layer 312 of the second substrate 301.

[0287] The wiring layer 311 of the first substrate 41 includes at least one metal film M, and the light-shielding member 63 is formed by the metal film M in the region located below the formation region of the photodiode PD.

[0288] Pixel transistors Tr1 and Tr2 are formed at the interface on opposite sides of insulating layer 312, which is the bonding surface side of the second substrate 301. For example, pixel transistors Tr1 and Tr2 are an amplifying transistor AMP and a selecting transistor SEL.

[0289] In other words, in the first to fifth example configurations that include only a single semiconductor substrate 41 (first substrate 41), all pixel transistors, including the transmission transistor TRG, the switching transistor FDG, the amplifying transistor AMP, and the selection transistor SEL, are formed in the semiconductor substrate 41. On the other hand, in the light-receiving element 1 of the sixth example configuration that includes a stacked structure of two semiconductor substrates, the pixel transistors other than the transmission transistor TRG, or the switching transistor FDG, the amplifying transistor AMP, and the selection transistor SEL, are formed in the second substrate 301.

[0290] A multilayer wiring layer 321 comprising at least two metal films M is formed on the side of the second substrate 301 opposite to the side of the first substrate 41. The multilayer wiring layer 321 comprises a first metal film M11, a second metal film M12, and an interlayer insulating film 333.

[0291] The transmission drive signal TRG1g for controlling the transmission transistor TRG1 is provided from the first metal film M11 of the second substrate 301 through a through silicon via (TSV) 331-1 to the gate of the transmission transistor TRG1 on the first substrate 41. The transmission drive signal TRG2g for controlling the transmission transistor TRG2 is provided from the first metal film M11 of the second substrate 301 through a TSV 331-2 to the gate of the transmission transistor TRG2 on the first substrate 41.

[0292] Similarly, the charge accumulated in the floating diffusion region FD1 is transferred from the first substrate 41 side to the first metal film M11 of the second substrate 301 through the TSV 332-1 passing through the second substrate 301. The charge accumulated in the floating diffusion region FD2 is transferred from the first substrate 41 side to the first metal film M11 of the second substrate 301 through the TSV 332-2 passing through the second substrate 301.

[0293] A wiring capacitor 64 is formed in a region of the first metal film M11 or the second metal film M12 (not shown). The metal film M in which the wiring capacitor 64 is formed is designed to have a high wiring density for forming the capacitor, and the metal film M connected to the gate of the transmission transistor TRG, the switching transistor FDG, etc., is designed to have a low wiring density to reduce induced current. The wiring layer (metal film M) connected to the gate can vary for each pixel transistor.

[0294] As described above, the pixel 10 of the sixth example can be formed by stacking two semiconductor substrates, a first substrate 41 and a second substrate 301. Pixel transistors, except for the transmission transistor TRG, are formed in the second substrate 301, which is different from the first substrate 41, which includes the photoelectric conversion unit. Furthermore, the vertical driving unit 22 for controlling the driving of the pixel 10, the pixel driving line 28, and the vertical signal line 29 for transmitting detection signals are also formed in the second substrate 301. Therefore, pixel miniaturization is possible, and the design freedom of the back-end line (BEOL) is increased.

[0295] Since the sixth example structure is also a back-illuminated pixel structure, it can ensure a sufficient aperture ratio compared to the surface-illuminated structure. Therefore, it is possible to maximize the quantum efficiency (QE) × aperture ratio (FF).

[0296] Furthermore, the region of the wiring layer 311 closest to the first substrate 41 and overlapping with the formation region of the photodiode PD includes a light-shielding member (reflective member) 63, such that infrared light that has not undergone photoelectric conversion in the semiconductor substrate 41 and has passed through the semiconductor substrate 41 is reflected by the light-shielding member 63 and re-enters the semiconductor substrate 41. This arrangement further increases the amount of infrared light undergoing photoelectric conversion in the semiconductor substrate 41 and improves the quantum efficiency (QE) of the pixel 10's sensitivity to infrared light. Additionally, it prevents infrared light that has not undergone photoelectric conversion in the semiconductor substrate 41 and has passed through the semiconductor substrate 41 from entering the second substrate 301 side.

[0297] <Sixth Example Construction Method>

[0298] Below, refer to Figures 20A to 20F This explains the manufacturing method of the sixth example.

[0299] First, such as Figure 20A As shown, after a photodiode PD and a floating diffusion region FD, which serve as photoelectric conversion units, are formed pixel by pixel in a predetermined area of ​​the first substrate 41, the gate 351 of the transmission transistor TRG is formed.

[0300] Next, as Figure 20B As shown, after an insulating film 361 is formed on the gate 351 of the transmission transistor TRG and the upper surface of the first substrate 41, a light-shielding member 63 corresponding to the area of ​​the photodiode PD is formed as a pattern.

[0301] Next, as Figure 20CAs shown, an insulating film is further stacked on the light-shielding member 63 and the insulating film 361 to form an insulating layer 313, and a wiring layer 311 is formed as the front surface side of the first substrate 41. Then, the insulating layer 312 on the back side of the second substrate 301 is bonded to the insulating layer 313 of the first substrate 41. Pixel transistors Tr1 and Tr2, such as amplifying transistors AMP and selection transistors SEL, are pre-formed in the second substrate 301.

[0302] Next, as Figure 20D As shown, after forming an insulating layer 362 on the upper surface of the second substrate 301, trenches 371-1 and 371-2 are formed for contacting the gates of pixel transistors Tr1 and Tr2. Furthermore, trenches 372-1, 372-2, 373-1, and 373-2 are formed through the second substrate 301 at portions required for electrically connecting the first substrate 41 and the second substrate 301 (such as the gates of transmission transistors TRG1 and TRG2, and floating diffusion regions FD1 and FD2).

[0303] Next, as Figure 20E As shown, trenches 371-1 and 371-2, as well as trenches 372-1, 372-2, 373-1, and 373-2, are filled with a metallic material such as tungsten (W). As a result, TSVs 331-1, 331-2, 332-1, and 332-2 are formed.

[0304] Next, as Figure 20F As shown, a first metal film M11, a second metal film M12, and an insulating layer are formed on the insulating layer 362, thus forming a multilayer wiring layer 321.

[0305] exist Figure 20F Next, an anti-reflective film 43 and an on-chip lens 47 are formed on the back side, which serves as the light incident surface of the first substrate 41. This completes the process. Figure 19 The light-receiving element 1 in the middle.

[0306] Notice, Figure 19 The sixth example construction shown is achieved by... Figure 2 The first example shown is a structure formed by transforming a stacked structure of two semiconductor substrates. However, it is of course possible to use a structure formed by transforming any of the second to fifth example structures into a stacked structure of two semiconductor substrates.

[0307] <13. Example of a four-part pixel structure>

[0308] Each pixel 10 in the first to sixth example configurations is a so-called dual-junction pixel structure, which has two transmission transistors TRG1 and TRG2 as transmission gates for a photodiode PD, two floating diffusion regions FD1 and FD2 as charge storage regions, and distributes the charge generated in the photodiode PD to the two floating diffusion regions FD1 and FD2.

[0309] On the other hand, pixel 10 can be a so-called quad-junction pixel structure, which has four transmission transistors TRG1 to TRG4 for a photodiode PD and floating diffusion regions FD1 to FD4, and distributes the charge generated in the photodiode PD to the four floating diffusion regions FD1 to FD4.

[0310] Figure 21 This is a planar view of pixel 10 in the case of a four-part pixel structure.

[0311] Pixel 10 includes four groups of first transmission transistor TRGa, second transmission transistor TRGb, reset transistor RST, amplification transistor AMP, and selection transistor SEL.

[0312] Outside the photodiode PD, a set of first transmission transistor TRGa, second transmission transistor TRGb, reset transistor RST, amplification transistor AMP, and selection transistor SEL are arranged linearly along each of the four sides of the rectangular pixel 10.

[0313] exist Figure 21 In this context, a group of first transmission transistors TRGa, second transmission transistors TRGb, reset transistors RST, amplification transistors AMP, and selection transistors SEL, arranged along one of the four sides of rectangular pixel 10, is represented by one of the numbers 1 to 4, thereby distinguishing this group from other groups.

[0314] As described above, pixel 10 can have the following structure: a structure that distributes the charge generated in the photodiode PD to two taps, or a structure that distributes the charge to four taps. Pixel 10 does not necessarily have a dual-tap structure, and can have a structure with three or more taps.

[0315] For example, when pixel 10 has a dual-tap structure, a drive is executed to distribute the generated charge to two floating diffusion regions FD by shifting the phase (light reception timing) by 180° between the first and second taps. Conversely, when pixel 10 has a quad-tap structure, a drive can be executed to distribute the generated charge to four floating diffusion regions FD by shifting the phase (light reception timing) by 90° between every two taps from the first to the fourth taps. The distance to the object can then be determined based on the distribution ratio of the accumulated charge in the four floating diffusion regions FD.

[0316] <14. Example Construction of a Ranging Module>

[0317] Figure 22 This is a block diagram illustrating an example construction of a ranging module that outputs ranging information using the aforementioned light-receiving element 1.

[0318] The ranging module 500 includes a light-emitting unit 511, a light-emitting controller 512, and a light-receiving unit 513.

[0319] The light-emitting unit 511 has a light source that emits light of a predetermined wavelength, and the light-emitting unit 511 emits illumination light with periodically varying brightness onto the object. For example, the light-emitting unit 511 has a light-emitting diode that emits infrared light with a wavelength of 780nm to 1000nm as a light source, and the light-emitting unit 511 emits illumination light synchronously with the square wave light emission control signal CLKp provided from the light emission controller 512.

[0320] Note that although the light emission control signal CLKp does not necessarily have to be square, it must be a periodic signal. For example, the light emission control signal CLKp can be a sine wave.

[0321] The light-emitting controller 512 provides the light-emitting control signal CLKp to the light-emitting unit 511 and the light-receiving unit 513, and controls the timing of the emitted illumination light. For example, the frequency of the light-emitting control signal CLKp is 20 MHz. Note that the frequency of the light-emitting control signal CLKp is not necessarily 20 MHz, and can be 5 MHz, etc.

[0322] The light receiving unit 513 receives light reflected from the object, calculates distance information for each pixel based on the light receiving result, and generates and outputs a depth image. In the depth image, the depth value corresponding to the distance to the object (subject) is stored as the pixel value.

[0323] The light-receiving element 1, having a pixel structure as described in any of the first to sixth example configurations, is used as the light-receiving unit 513. For example, the light-receiving element 1, as the light-receiving unit 513, calculates distance information for each pixel based on the light emission control signal CLKp and the signal intensity corresponding to the charge of the floating diffusion regions FD1 or FD2 of each pixel 10 already allocated to the pixel array unit 21. Note that, as described above, the number of taps for each pixel 10 can be four, etc.

[0324] As described above, the light-receiving element 1 having a pixel structure of any of the first to sixth example configurations can be incorporated as a light-receiving unit 513 into the ranging module 500, which is used to calculate and output information representing the distance to the object using an indirect ToF method. Therefore, the ranging characteristics of the ranging module 500 can be improved.

[0325] <15. Example Construction of Electronic Devices>

[0326] Note that the light-receiving element 1 can be applied to the ranging module as described above, and can also be applied to various electronic devices, such as imaging devices with ranging functions, such as digital cameras or digital camcorders, and smartphones with ranging functions.

[0327] Figure 23 This is a block diagram illustrating an example structure of a smartphone as an electronic device applying this technology.

[0328] like Figure 23 As shown, the smartphone 601 includes a ranging module 602, an imaging device 603, a display 604, a speaker 605, a microphone 606, a communication module 607, a sensor unit 608, a touch panel 609, and a control unit 610, which are connected via a bus 611. Furthermore, in the control unit 610, the CPU executes programs to perform the functions of an application processing unit 621 and an operating system processing unit 622.

[0329] Will Figure 22 The ranging module 500 is applied to the ranging module 602. For example, the ranging module 602 is arranged on the front surface of the smartphone 601 and performs ranging for the user of the smartphone 601 to output the depth value of the surface shape of the user's face, hand or fingers as a measurement value.

[0330] Imaging device 603 is disposed on the front surface of smartphone 601 and acquires an image representing the user by imaging the user of smartphone 601, which is the subject of the image. Note that, although not shown, imaging device 603 may also be disposed on the back of smartphone 601.

[0331] The display 604 displays the operation screen where the application processing unit 621 and the operating system processing unit 622 perform processing, images captured by the imaging device 603, etc. For example, when a voice call is made using the smartphone 601, the speaker 605 and the microphone 606 output voice from the other end and collect the user's voice.

[0332] The communication module 607 performs network communication via a communication network, such as the Internet, public telephone network, wide area communication networks for wireless mobile devices (such as so-called 4G or 5G networks), wide area networks (WANs), local area networks (LANs), or short-range wireless communication (such as Bluetooth or near field communication). The sensor unit 608 senses speed, acceleration, and proximity, and the touch panel 609 acquires touch operations performed by the user on the operation screen displayed on the display 604.

[0333] Application processing unit 621 performs processing to provide various services through smartphone 601. For example, application processing unit 621 can perform processing to create a face by virtually reproducing the user's facial expressions using computer graphics based on depth values ​​provided from ranging module 602 and display the face on display 604. Application processing unit 621 can also perform processing to create three-dimensional shape data of a three-dimensional object, for example, based on depth values ​​provided from ranging module 602.

[0334] The operating system processing unit 622 performs processing to implement the basic functions and operations of the smartphone 601. For example, the operating system processing unit 622 can perform processing to verify the user's face and unlock the smartphone 601 based on the depth value provided from the ranging module 602. Furthermore, for example, the operating system processing unit 622 performs processing to recognize the user's gesture based on the depth value provided from the ranging module 602, and then performs processing to input various operations based on the gesture.

[0335] In the smartphone 601 constructed as described above, the aforementioned ranging module 500 is used as a ranging module 602, thereby enabling, for example, the measurement and display of the distance to a predetermined object, or the creation and display of three-dimensional shape data of the predetermined object.

[0336] <16. Example Applications of Moving Bodies>

[0337] The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein can be implemented as a device mounted on any type of mobile body, such as: motor vehicles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, or robots, etc.

[0338] Figure 24 This is a block diagram schematically illustrating an example construction of a vehicle control system, which is an example of a mobile body control system capable of applying the technology according to this disclosure.

[0339] The vehicle control system 12000 includes multiple electronic control units connected via a communication network 12001. Figure 24 In the example shown, the vehicle control system 12000 includes: a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an overall control unit 12050. Also shown are a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface (I / F) 12053, which are functional components of the overall control unit 12050.

[0340] The drive system control unit 12010 controls the operation of equipment related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 functions as a control device for: a drive force generating device such as an internal combustion engine or drive motor for generating the vehicle's driving force; a drive force transmission mechanism for transmitting the driving force to the wheels; a steering mechanism for adjusting the vehicle's steering angle; and a braking device for generating the vehicle's braking force.

[0341] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for: keyless entry system; smart key system; power windows; or various lights such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 can receive radio waves or signals from portable devices that replace keys, or from various switches. The body system control unit 12020 receives these radio wave or signal inputs and controls the vehicle's door locking devices, power windows, and lights, etc.

[0342] The exterior information detection unit 12030 detects external information of the vehicle on which the vehicle control system 12000 is installed. For example, an imaging unit 12031 is connected to the exterior information detection unit 12030. The exterior information detection unit 12030 causes the imaging unit 12031 to capture images of the exterior of the vehicle and receives the captured images. Based on the received images, the exterior information detection unit 12030 can perform object detection processing for detecting pedestrians, vehicles, obstacles, signs, road markings, etc., or perform distance detection processing.

[0343] Imaging unit 12031 is an optical sensor for receiving light and outputting an electrical signal corresponding to the amount of light received. Imaging unit 12031 can output the electrical signal as an image or as distance measurement information. Furthermore, the light received by imaging unit 12031 can be visible light or non-visible light such as infrared light.

[0344] The in-vehicle information detection unit 12040 detects information related to the interior of the vehicle. For example, a driver state detector 12041 for detecting the driver's state is connected to the in-vehicle information detection unit 12040. The driver state detector 12041 includes, for example, a camera for capturing images of the driver, and based on the detection information input from the driver state detector 12041, the in-vehicle information detection unit 12040 can calculate the driver's level of fatigue or concentration, or determine whether the driver is dozing off.

[0345] Based on external / internal information acquired by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can calculate the control target values ​​for the drive force generating device, steering mechanism, or braking device, and can output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control to implement the functions of an advanced driver assistance system (ADAS), including: collision avoidance or mitigation, following distance based on vehicle distance, speed maintenance, collision warning, or lane departure warning, etc.

[0346] Furthermore, the microcomputer 12051 can also control the drive force generating device, steering mechanism, or braking device based on information about the vehicle's surrounding environment (which has been acquired by the external information detection unit 12030 or the internal information detection unit 12040), thereby performing cooperative control for achieving autonomous driving and the like, which does not depend on the driver's operation.

[0347] The microcomputer 12051 can also output control commands to the vehicle system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 controls the headlights based on the position of the vehicle in front or oncoming vehicle detected by the external information detection unit 12030, and performs coordinated control to achieve anti-glare effects, etc., by switching from high beams to low beams.

[0348] The audio / image output unit 12052 sends audio output signals and / or image output signals to an output device that can visually or audibly notify passengers inside the vehicle or outside the vehicle of information. Figure 24 In the example shown, audio speaker 12061, display unit 12062, and instrument panel 12063 are shown as output devices. For example, display unit 12062 may include an on-board display and / or a head-up display.

[0349] Figure 25 This is a diagram showing an example of the mounting location of the imaging unit 12031.

[0350] exist Figure 25 In the vehicle 12100, imaging units 12101, 12102, 12103, 12104 and 12105 are included as imaging units 12031.

[0351] Imaging units 12101, 12102, 12103, 12104, and 12105 are positioned, for example, at the front edge of vehicle 12100, side mirrors, rear bumper, rear door, and the upper part of the windshield inside the vehicle. Imaging unit 12101, positioned at the front edge, and imaging unit 12105, positioned at the upper part of the windshield inside the vehicle, primarily capture images of the front of vehicle 12100. Imaging units 12102 and 12103, positioned at the side mirrors, primarily capture images of the sides of vehicle 12100. Imaging unit 12104, positioned at the rear bumper or rear door, primarily captures images of the rear of vehicle 12100. The front images acquired by imaging units 12101 and 12105 are primarily used to detect vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes traveling in front of vehicle 12100.

[0352] Notice, Figure 25An example of the imaging range of imaging units 12101 to 12104 is shown. Imaging range 12111 represents the imaging range of imaging unit 12101 located on the front edge, imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103 located on their respective side mirrors, and imaging range 12114 represents the imaging range of imaging unit 12104 located on the rear bumper or rear door. For example, by superimposing the image data captured by imaging units 12101 to 12104, a top-down image of the vehicle 12100 as viewed from above can be obtained.

[0353] At least one of the imaging units 12101 to 12104 may have the function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including multiple imaging devices, or may be an imaging device having pixels for phase difference detection.

[0354] For example, the microcomputer 12051 calculates the distance to each three-dimensional object within the imaging range 12111 to 12114 and the temporal variation of the distance (relative to the speed of the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. In this way, a three-dimensional object that is closest to the vehicle 12100 on its travel path and is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) can be extracted as a vehicle traveling in front of the vehicle 12100. Furthermore, the microcomputer 12051 can preset the vehicle-to-vehicle distance to be maintained in front of the vehicle 12100 and can perform automatic braking control (including following stop control) and automatic acceleration control (including following start control), etc. In this way, cooperative control for achieving autonomous driving, etc., that does not depend on the driver's operation, can be performed.

[0355] For example, microcomputer 12051 can extract three-dimensional object data related to three-dimensional objects in categories such as two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and utility poles based on distance information obtained from imaging units 12101 to 12104, and can use this three-dimensional object data when automatically avoiding obstacles. For example, microcomputer 12051 classifies obstacles near vehicle 12100 into obstacles visible to the driver of vehicle 12100 and obstacles that are visually difficult to identify. Then, microcomputer 12051 determines the collision risk, which represents the degree of danger of colliding with each obstacle. If the collision risk is greater than or equal to a set value and there is a possibility of collision, microcomputer 12051 outputs a warning to the driver through audio speaker 12061 and display unit 12062, or can perform driving assistance to avoid collision by performing forced deceleration or evasive steering through drive system control unit 12010.

[0356] At least one of the imaging units 12101 to 12104 can be an infrared camera for detecting infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian exists in the images captured by the imaging units 12101 to 12104. For example, this pedestrian identification is performed by: extracting feature points from the images captured by the imaging units 12101 to 12104, which are infrared cameras; and performing pattern matching on a series of feature points representing the outline of an object and determining whether a pedestrian exists. If the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 to display, in a superimposed manner, a rectangular outline for emphasizing the identified pedestrian. The sound / image output unit 12052 can also control the display unit 12062 to display, for example, an icon representing a pedestrian at a desired location.

[0357] Examples of vehicle control systems that can be applied according to the technology of this disclosure have been described above. In the above configuration, the technology of this disclosure can be applied to the external information detection unit 12030 and the imaging unit 12031. Specifically, the light-receiving element 1 or the ranging module 500 can be applied to the distance detection processing block of the external information detection unit 12030 or the imaging unit 12031. Since the technology of this disclosure is applied to the external information detection unit 12030 or the imaging unit 12031, the distance to objects (e.g., people, cars, obstacles, road signs, or characters on the road surface) can be measured with high precision. Using the obtained distance information, driver fatigue can be reduced and the safety of the driver and the vehicle can be improved.

[0358] The embodiments of this technology are not limited to the above embodiments, and various modifications can be made to them without departing from the scope of this technology.

[0359] Furthermore, in the aforementioned light-receiving element 1, an example of using electrons as signal carriers has already been described. However, holes generated through photoelectric conversion can also be used as signal carriers.

[0360] For example, a combination of all or some of the embodiments of the light-receiving element 1 described above can be used.

[0361] Furthermore, the beneficial effects described in this specification are merely examples, and the beneficial effects of this technology are not limited to them and may include other effects.

[0362] Note that this technology can also be embodied in the following constructions. (1)

[0364] A light-receiving element, comprising:

[0365] On-chip lens;

[0366] Wiring layer; and

[0367] A semiconductor layer is disposed between the on-chip lens and the wiring layer.

[0368] The semiconductor layer includes:

[0369] Photodiode;

[0370] A first transfer transistor transfers the charge generated in the photodiode to a first charge storage unit;

[0371] The second transfer transistor transfers the charge generated in the photodiode to the second charge storage unit; and

[0372] The inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction.

[0373] The wiring layer has at least one layer including a light-shielding member, and

[0374] The light-shielding member is arranged to overlap with the photodiode in a plan view. (2)

[0376] According to the light-receiving element described in (1),

[0377] The pixel separation portion penetrates the semiconductor layer in the depth direction. (3)

[0379] According to the light-receiving element described in (1) or (2),

[0380] The semiconductor layer further includes:

[0381] First additional capacitor;

[0382] A first switching transistor connects the first additional capacitor to the first charge storage unit;

[0383] A second additional capacitor; and

[0384] The second switching transistor connects the second additional capacitor to the second charge storage unit. (4)

[0386] According to the light-receiving element described in (3),

[0387] The first additional capacitor and the second additional capacitor include the wiring capacitors in the wiring layer. (5)

[0389] According to the light-receiving element described in (4),

[0390] The wiring layer includes a layer in which the light-shielding member is formed and a layer in which the wiring capacitor is formed.

[0391] The wiring capacitor is formed in a layer that is further away from the semiconductor layer than the light-shielding member. (6)

[0393] According to any one of (1) to (5), the light-receiving element,

[0394] The light-shielding component comprises two layers. (7)

[0396] The light-receiving element according to any one of (1) to (6) further includes:

[0397] An inter-pixel light-shielding film is located at the pixel boundary portion of the semiconductor layer. (8)

[0399] According to any one of (1) to (7),

[0400] The region of the semiconductor layer above the photodiode has a moth-eye structure, in which tiny bumps and depressions are formed. (9)

[0402] According to any one of (1) to (8), the light-receiving element,

[0403] The semiconductor layer comprises a second semiconductor layer and the wiring layer bonded together with each other. The second semiconductor layer is another semiconductor layer.

[0404] The second semiconductor layer includes at least an amplifying transistor and a selecting transistor. (10)

[0406] A ranging module, comprising:

[0407] Light-receiving element;

[0408] A light source that emits illumination light with periodically varying brightness; and

[0409] A light-emitting controller that controls the timing of emitting the illumination light.

[0410] The light-receiving element includes:

[0411] On-chip lens;

[0412] Wiring layer; and

[0413] A semiconductor layer is disposed between the on-chip lens and the wiring layer.

[0414] The semiconductor layer includes:

[0415] Photodiode;

[0416] A first transfer transistor transfers the charge generated in the photodiode to a first charge storage unit;

[0417] The second transfer transistor transfers the charge generated in the photodiode to the second charge storage unit; and

[0418] The inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction.

[0419] The wiring layer has at least one layer including a light-shielding member, and

[0420] The light-shielding member is arranged to overlap with the photodiode in a plan view. (11)

[0422] An electronic device, comprising:

[0423] The ranging module includes:

[0424] Light-receiving element;

[0425] A light source that emits illumination light with periodically varying brightness; and

[0426] A light-emitting controller that controls the timing of emitting the illumination light.

[0427] The light-receiving element includes:

[0428] On-chip lens;

[0429] Wiring layer; and

[0430] A semiconductor layer is disposed between the on-chip lens and the wiring layer.

[0431] The semiconductor layer includes:

[0432] Photodiode;

[0433] A first transfer transistor transfers the charge generated in the photodiode to a first charge storage unit;

[0434] The second transfer transistor transfers the charge generated in the photodiode to the second charge storage unit; and

[0435] The inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction.

[0436] The wiring layer has at least one layer including a light-shielding member, and

[0437] The light-shielding member is arranged to overlap with the photodiode in a plan view.

[0438] Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors, as long as they are within the scope of the appended claims or their equivalents.

[0439] List of reference numerals

[0440] 1. Light receiving element

[0441] 10 pixels

[0442] PD photodiode

[0443] RST reset transistor

[0444] SEL selects transistors

[0445] TRG Transmission Transistor

[0446] FD floating diffusion region

[0447] FDG switching transistor

[0448] FDL Additional Capacitor

[0449] M metal film

[0450] MEM memory

[0451] OFG charge discharge transistor

[0452] 21-pixel array unit

[0453] 41 Semiconductor substrate (first substrate)

[0454] 42 Multilayer Wiring

[0455] 43 Anti-reflective film

[0456] 44-pixel boundary region (boundary region)

[0457] 45-pixel inter-pixel light-blocking film

[0458] 47 On-plate lenses

[0459] 61-pixel separation section

[0460] 63. Light-shielding components (reflective components)

[0461] 64. Wiring capacitors

[0462] 211 Pixel Separation Section

[0463] 221 Anti-reflective film

[0464] 223 PD upper area

[0465] 301 Semiconductor Substrate (Second Substrate)

[0466] 321 Multilayer Wiring

[0467] 500 ranging module

[0468] 511 light-emitting units

[0469] 512 Lighting Controller

[0470] 513 light-receiving units

[0471] 601 Smartphone

[0472] 602 Distance Measuring Module

Claims

1. A light-receiving element, comprising: On-chip lens; Wiring layer; as well as A semiconductor layer is disposed between the on-chip lens and the wiring layer. The semiconductor layer includes: Photodiode; A first transfer transistor, which transfers the charge generated in the photodiode to a first charge storage unit; A second transfer transistor, which transfers the charge generated in the photodiode to a second charge storage unit; and An inter-pixel separation section separates the semiconductor layers of adjacent pixels from each other, targeting at least a portion of the semiconductor layer in the depth direction. The wiring layer has at least one layer including a light-shielding member, and The light-shielding member is arranged to overlap with the photodiode in a plan view.

2. The light-receiving element according to claim 1, in, The pixel separation portion penetrates the semiconductor layer in the depth direction.

3. The light-receiving element according to claim 1, in, The wiring layer has at least two layers including light-shielding members.

4. The light-receiving element according to claim 3, in, The semiconductor layer further includes: First additional capacitor; A first switching transistor connects the first additional capacitor to the first charge storage unit; A second additional capacitor; and The second switching transistor connects the second additional capacitor to the second charge storage unit.

5. The light-receiving element according to claim 4, in, The first and second additional capacitors include the wiring capacitors in the wiring layer.

6. The light-receiving element according to claim 5, in, The wiring layer includes a layer in which the light-shielding member is formed and a layer in which the wiring capacitor is formed. The wiring capacitor is formed in a layer that is further away from the semiconductor layer than the light-shielding member.

7. The light-receiving element according to claim 3, in, The light-shielding component comprises two layers.

8. The light-receiving element according to claim 1, further comprising: An inter-pixel light-shielding film is located at the pixel boundary portion of the semiconductor layer.

9. The light-receiving element according to claim 1, in, The region of the semiconductor layer above the photodiode has a moth-eye structure, in which tiny bumps and depressions are formed.

10. The light-receiving element according to any one of claims 1-9, in, The semiconductor layer has a second semiconductor layer and the wiring layer bonded to each other, the second semiconductor layer being another semiconductor layer, and The second semiconductor layer includes at least an amplifying transistor and a selecting transistor.

11. A ranging module, comprising: The light-receiving element according to any one of claims 1-10; A light source that emits illumination light with periodically varying brightness; as well as A light-emitting controller that controls the timing of emitting the illumination light.

12. An electronic device comprising: The ranging module according to claim 11.

Images