Imaging devices and electronic devices

Abstract

The imaging device of the present invention includes: a pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups is one of i) a normal pixel group including only normal pixels or ii) a mixed pixel group including at least one normal pixel and at least one phase difference detection pixel, wherein the pixel array unit includes at least one normal pixel group and at least one mixed pixel group. For each normal pixel group, the normal pixel receives light transmitted through a color filter of the same color. For each mixed pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel and receives light transmitted through a color filter of the same color as the at least one other phase difference detection pixel.

Description

Technical Field

[0001] The present disclosure relates to an imaging device (eg, a solid-state imaging device) and an electronic device, and in particular, to an imaging device and an electronic device in which more appropriate phase difference pixels can be provided. Background Art

[0002] In recent years, solid-state imaging devices provided with pixels for phase difference detection (hereinafter referred to as phase difference pixels) are used to increase the speed of autofocusing. Examples of the structure of this type of phase difference pixel include a known technique disclosed in Patent Document 1.

[0003] Furthermore, examples of the arrangement pattern of a plurality of pixels two-dimensionally arranged in the pixel array unit include a known arrangement pattern in which shared pixels are regularly arranged, in which adjacent pixels of the same color (four (2×2) pixels of the same color) share a pixel circuit.

[0004] [Citation list]

[0005] [Patent Document]

[0006] Patent Document 1: JP 2016-15430A Summary of the invention

[0007] [Technical issues]

[0008] Incidentally, in the case of adopting an arrangement pattern in which shared pixels including pixels having adjacent same colors are regularly arranged, when arranging phase difference pixels to a pixel array of the shared pixels, a technique for arranging more appropriate phase difference pixels is desired.

[0009] The present disclosure has been made in view of this situation, and enables setting of more appropriate phase difference pixels.

[0010] [Solution to the problem]

[0011] According to an aspect of the present disclosure, a first imaging device is an imaging device as follows, the imaging device comprising: a pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group including only normal pixels or ii) a mixed pixel group including at least one normal pixel and at least one phase difference detection pixel. For each normal pixel group, the normal pixel receives light transmitted through a color filter of the same color. For each mixed pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel, and receives light transmitted through a color filter of the same color as the at least one other phase difference detection pixel.

[0012] According to an aspect of the present disclosure, a first imaging device includes: each of the plurality of pixel groups includes four pixels in a 2×2 array, and for the mixed pixel group, the four pixels include the at least one phase difference detection pixel. The at least one phase difference detection pixel includes a first phase difference detection pixel, the at least one other phase difference detection pixel includes a second phase difference detection pixel, and the first phase difference detection pixel and the second phase difference detection pixel are adjacent to each other and belong to different mixed pixel groups. A contact of the first phase difference detection pixel and a contact of the second phase difference detection pixel are electrically connected to the same drive line. A contact of a common pixel in each of the plurality of pixel groups is electrically connected to a corresponding drive line to control an exposure time for each common pixel. A contact of the first phase difference detection pixel and a contact of the second phase difference detection pixel are electrically connected to the same drive line, so that the first phase difference detection pixel and the second phase difference detection pixel have the same exposure time. The imaging device also includes a plurality of floating diffusion regions, each of which is used for a corresponding pixel group. The imaging device also includes a plurality of pixel circuits, each of which is used for a corresponding pixel group. The plurality of pixel groups are arranged in a matrix, and the mixed pixel groups are configured at predetermined intervals in the row direction and the column direction. Each of the plurality of pixel groups includes four pixels arranged in a 2×2 array, and the at least one phase difference detection pixel includes a first phase difference detection pixel. The at least one other phase difference detection pixel includes a second phase difference detection pixel, and the first and second phase difference detection pixels have the same exposure time. The four pixels include a first common pixel having a first exposure time and a second common pixel having a second exposure time shorter than the first exposure time, and the same exposure time of the first phase difference detection pixel and the second phase difference detection pixel is between the first exposure time and the second exposure time. The four pixels include a first common pixel having a first exposure time and a second common pixel having a second exposure time shorter than the first exposure time, and the same exposure time of the first phase difference detection pixel and the second phase difference detection pixel is the first exposure time. The first phase difference detection pixel and the second phase difference detection pixel are connected to different floating diffusion regions. The plurality of pixel groups are arranged in a matrix. Each of the plurality of pixel groups includes first, second, third, and fourth pixels arranged in a 2×2 array. Each first pixel includes a first contact, each second pixel includes a second contact, each third pixel includes a third contact, and each fourth pixel includes a fourth contact. The first contacts are aligned with each other in row and column directions, the second contacts are aligned with each other in row and column directions, the third contacts are aligned with each other in row and column directions, and the fourth contacts are aligned with each other in row and column directions.Each first contact is connected to the same first drive line, each second contact is connected to the same second drive line, each third contact is connected to the same third drive line, and each fourth contact is connected to the same fourth drive line. The normal pixel, the first phase difference detection pixel, and the second phase difference detection pixel are red pixels, green pixels, or blue pixels according to red, green, and blue color filters. The arrangement pattern of the pixel group is a Bayer array pattern. The first phase difference detection pixel and the second phase difference detection pixel are green pixels, and the first phase difference detection pixel is included in a mixed pixel group having a normal pixel as a blue pixel, and the second phase difference detection pixel is included in other mixed pixel groups having a normal pixel as a green pixel.

[0013] According to an aspect of the present disclosure, a second imaging device is an imaging device as follows, the imaging device comprising: a pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group including only normal pixels or ii) a mixed pixel group including at least one normal pixel and a first phase difference detection pixel whose incident light is partially blocked. For each normal pixel group, the normal pixel receives light transmitted through a color filter of the same color. For each mixed pixel group, the first phase difference detection pixel has a single corresponding on-chip lens.

[0014] According to an aspect of the present disclosure, a second imaging device includes: each pixel group includes four pixels configured in a 2×2 array. Each mixed pixel group includes a second phase difference detection pixel whose incident light is partially blocked. For each mixed pixel group, the first phase difference detection pixel and the second phase difference detection pixel are diagonal to each other and have the same exposure time. For each mixed pixel group, when viewed from the light incident side, the first and second phase difference detection pixels are partially shielded from light on the left area or the right area. The multiple pixel groups are arranged in a matrix, and the mixed pixel groups are configured at predetermined intervals in the row and column directions. Some of the mixed pixel groups include the first and second phase difference detection pixels that are shielded from light on the left area, and other pixel groups in the mixed pixel groups include the first and second phase difference detection pixels that are shielded from light on the right area.

[0015] An electronic device according to one aspect of the present disclosure is an electronic device including a solid-state imaging device, the imaging device including: a pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group including only normal pixels or ii) a mixed pixel group including at least one normal pixel and at least one phase difference detection pixel. For each normal pixel group, the normal pixel receives light transmitted through a color filter of the same color. For each mixed pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel, and receives light transmitted through a color filter of the same color as the at least one other phase difference detection pixel. The electronic device includes a control unit, which performs automatic focusing control based on the output of at least one phase difference detection pixel in each mixed pixel group.

[0016] An electronic device according to an aspect of the present disclosure may include one or more features of the first and / or second imaging devices.

[0017] [Beneficial Effects of the Invention]

[0018] According to aspects of the present disclosure, more appropriate phase difference pixels may be set.

[0019] Note that the beneficial effects described here may not be limited, and the beneficial effects may be any beneficial effects described in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 : is a block diagram showing a configuration example of an embodiment of a solid-state imaging device according to the disclosed technology.

[0021] Figure 2 A plan layout of a plurality of pixels arranged in a pixel array unit is shown.

[0022] Figure 3 The configuration is shown in which phase difference pixels are arranged in adjacent pixel groups.

[0023] Figure 4 is a cross-sectional view showing the structure of a plurality of pixels arranged in a pixel array unit.

[0024] Figure 5 is a circuit diagram showing a first connection manner of four pixels included in a pixel group.

[0025] Figure 6 is a circuit diagram showing a second connection method of four pixels included in a pixel group.

[0026] Figure 7 Yes Description Figure 5 and Figure 6 Plot of the exposure time for each pixel in .

[0027] Figure 8 is a timing diagram illustrating AD conversion using correlated double sampling (CDS).

[0028] Fig. 9 2 is a diagram for explaining the details of the driving operation of the pixel in the second period.

[0029] Fig.10 2 is a diagram for explaining the details of the driving operation of the pixel in the third period.

[0030] Fig.11 The arrangement of the contacts when the phase difference pixels (L, R) are read separately is shown.

[0031] Fig.12 The configuration of the contacts when the phase difference pixels (L, R) are read simultaneously is shown.

[0032] Fig.13 An example of arrangement of contacts in the case of having two driving lines is shown.

[0033] Fig.14 An example of arrangement of contacts in the case of three driving lines is shown.

[0034] Fig.15 Yes Description Fig.13 and Fig.14 Plot of the exposure time for each pixel in .

[0035] Fig.16 A plan layout of a plurality of pixels arranged in a pixel array unit is shown.

[0036] Fig.17 An example of the structure of the left light-shielding pixel and the right light-shielding pixel is shown.

[0037] Fig.18 is a cross-sectional view showing the structure of a plurality of pixels arranged in a pixel array unit.

[0038] Fig.19 A plan layout of a plurality of pixels arranged in a pixel array unit is shown.

[0039] Fig. 20 is a cross-sectional view showing the structure of a plurality of pixels arranged in a pixel array unit.

[0040] Fig.21 Another structure of a plurality of pixels arranged in a pixel array unit is shown.

[0041] Fig. 22 Still another structure of a plurality of pixels arranged in a pixel array unit is shown.

[0042] Fig.23is a circuit diagram showing a first connection manner of four pixels included in a pixel group.

[0043] Fig.24 is a circuit diagram showing a second connection method of four pixels included in a pixel group.

[0044] Fig.25 The configuration in which phase difference pixels are arranged in adjacent pixel groups in the case of two types of exposure is shown.

[0045] Fig.26 The configuration in which light-shielding pixels are arranged in pixel groups in the case of two types of exposure is shown.

[0046] Fig. 27 A configuration example in which phase difference pixels are arranged in adjacent B and G pixel groups and in adjacent R and G pixel groups is shown.

[0047] Fig.28 : is a block diagram showing a configuration example of an electronic device including a solid-state imaging device according to the disclosed technology.

[0048] Fig.29 A usage example of the solid-state imaging device according to the disclosed technology is shown.

[0049] Fig.30 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0050] Fig.31 : is an explanatory diagram showing an example of installation positions of the external information detection unit and the imaging unit. DETAILED DESCRIPTION

[0051] Hereinafter, embodiments of the technology according to the present disclosure (the present technology) will be described with reference to the drawings. Note that the embodiments will be described in the following order.

[0052] 1. Configuration of solid-state imaging device

[0053] 2. Implementation Methods of the Technology

[0054] (1) First implementation: 2×1 OCL structure

[0055] (2) Second Embodiment: Structure of Light-Shielding Pixel

[0056] (3) Third embodiment: Method for producing CF

[0057] (4) Fourth embodiment: Other structural examples

[0058] 3. Modifications

[0059] 4. Composition of electronic equipment

[0060] 5. Example of using solid-state imaging device

[0061] 6. Application examples for mobile objects

[0062] <1. Configuration of Solid-State Imaging Device>

[0063] (Configuration Example of Solid-State Imaging Device)

[0064] Figure 1 : is a block diagram showing a configuration example of an embodiment of a solid-state imaging device according to the disclosed technology.

[0065] Figure 1 The CMOS image sensor 10 is an example of a solid-state imaging device using CMOS (Complementary Metal Oxide Semiconductor). The CMOS image sensor 10 receives incident light (image light) from a subject through an optical lens system (not shown), converts the amount of incident light imaged on an imaging surface into an electrical signal in units of pixels, and outputs the electrical signal as a pixel signal.

[0066] exist Figure 1 In FIG. 1 , the CMOS image sensor 10 includes a pixel array unit 11 , a vertical drive circuit 12 , a column signal processing circuit 13 , a horizontal drive circuit 14 , an output circuit 15 , a control circuit 16 , and an input-output terminal 17 .

[0067] A plurality of pixel groups 200 are arranged two-dimensionally (in a matrix) in the pixel array unit 11. The pixel group 200 includes four pixels 100 (four (2×2) pixels) of the same color.

[0068] The four pixels 100 of the same color of each pixel group 200 include red (R) pixels, green (G) pixels or blue (B) pixels according to red (R), green (G) or blue (B) color filters. In addition, the pixel group 200 is configured as a shared pixel, in which a pixel circuit is shared by the four pixels 100 of the same color.

[0069] In the pixel group 200, each pixel 100 of the same color includes a photodiode (PD) and a transfer transistor TR-Tr as a photoelectric conversion element. In addition, in the pixel group 200, the reset transistor RST-Tr, the amplifier transistor AMP-Tr and the selection transistor SEL-Tr as pixel circuits are shared by four pixels 100 of the same color.

[0070] Although described in detail later, phase difference pixels as the pixels 100 included in the pixel group 200 are dispersed (in a repeated pattern) and arranged in the pixel array unit 11. In addition, the phase difference pixels are pixels for phase difference detection and are also called PDAF (Phase Detection Auto Focus) pixels or the like.

[0071] For example, the vertical drive circuit 12 includes a shift register. The vertical drive circuit 12 selects a predetermined pixel drive line 21 and supplies a drive signal (pulse) for driving the pixel 100 or the pixel group 200 to the selected pixel drive line 21, thereby driving the pixel 100 or the pixel group 200 in units of rows.

[0072] More specifically, the vertical drive circuit 12 sequentially selects and scans each pixel 100 or each pixel group 200 of the pixel array unit 11 in the vertical direction in units of rows, and supplies a pixel signal based on the charge (signal charge) generated according to the amount of light received in the photodiode of each pixel 100 to the column signal processing circuit 13 via the vertical signal line 22.

[0073] The column signal processing circuit 13 is configured for each column of the pixel group 200. For each pixel column, the column signal processing circuit 13 performs signal processing such as noise removal on a signal output from the pixel group 200 of one row. For example, the column signal processing circuit 13 performs signal processing such as correlated double sampling (CDS) for removing fixed pattern noise inherent to pixels and AD (analog-to-digital) conversion.

[0074] For example, the horizontal drive circuit 14 includes a shift register, and sequentially outputs horizontal scanning pulses to sequentially select the respective column signal processing circuits 13 , thereby causing the respective column signal processing circuits 13 to output pixel signals to the horizontal signal lines 23 .

[0075] The output circuit 15 performs signal processing on the signals sequentially supplied from the column signal processing circuits 13 via the horizontal signal line 23 and outputs the signals. Note that, for example, the output circuit 15 may perform only buffering, or may perform black level adjustment, column variation correction, various types of digital signal processing, or the like.

[0076] The control circuit 16 controls the operation of each component of the CMOS image sensor 10 .

[0077] In addition, the control circuit 16 generates a clock signal or a control signal as a reference for the operation of the vertical drive circuit 12, the column signal processing circuit 13, the horizontal drive circuit 14, etc. based on the vertical synchronization signal, the horizontal synchronization signal, and the main clock signal. The control circuit 16 outputs the generated clock signal or control signal to the vertical drive circuit 12, the column signal processing circuit 13, the horizontal drive circuit 14, etc.

[0078] The input-output terminal 17 exchanges signals with the outside.

[0079] Constructed in this way Figure 1The CMOS image sensor 10 is a so-called column AD type CMOS image sensor, in which a column signal processing circuit 13 that performs CDS processing and AD conversion processing is configured for each pixel column. In addition, for example, Figure 1 The CMOS image sensor 10 may be a back-illuminated CMOS image sensor.

[0080] <2. Implementation of the present technology>

[0081] (1) First Implementation Method

[0082] (Pixel layout)

[0083] Figure 2 Shown is the arrangement Figure 1 FIG. 1 is a planar layout of a plurality of pixels 100 in a pixel array unit 11 .

[0084] Figure 2 Among the plurality of pixels 100 two-dimensionally arranged in the pixel array unit 11 , pixels 100 in an area of ​​32 rows and 32 columns arranged in the upper left area when viewed from the light incident side are shown.

[0085] Note that Figure 2 In FIG. 1 , the i-row and j-column of the pixel 100 arranged in the pixel array unit 11 is labeled as pixel 100 (i, j), and the k-row and l-column of the pixel group 200 including four adjacent pixels (2×2 pixels) of the same color is labeled as pixel group 200 (k, l). Figure 2 In the planar layout, for ease of understanding, the row and column numbers corresponding to the i row and j column of the pixel 100 are shown in the left and lower areas, and the row and column numbers corresponding to the k row and l column of the pixel group 200 are shown in the right and upper areas.

[0086] In addition, in the following description, an R pixel indicates a pixel in which a red (R) color filter is provided as a color filter and a charge corresponding to red (R) component light is obtained from light passing through the R color filter. In addition, a G pixel indicates a pixel in which a charge corresponding to green (G) component light is obtained from light passing through a green (G) color filter. In addition, a B pixel indicates a pixel in which a charge corresponding to blue (B) component light is obtained from light passing through a blue (B) color filter.

[0087] For example, in Figure 2 In the pixel array of 32 rows and 32 columns (pixel group array of 16 rows and 16 columns) within the pixel array unit 11 shown, when the configuration position of the upper left pixel 100 is represented as pixel 100(1,1), the R pixel group 200(1,2) includes four red (R) pixels (shared pixels) including R pixel 100(1,3), R pixel 100(1,4), R pixel 100(2,3) and R pixel 100(2,4).

[0088] In addition, the G pixel group 200 (1, 1) includes four green (G) pixels (shared pixels) including the G pixel 100 (1, 1), the G pixel 100 (1, 2), the G pixel 100 (2, 1), and the G pixel 100 (2, 2). In addition, the G pixel group 200 (2, 2) includes four green (G) pixels (shared pixels) including the G pixel 100 (3, 3), the G pixel 100 (3, 4), the G pixel 100 (4, 3), and the G pixel 100 (4, 4).

[0089] In addition, the B pixel group 200 ( 2 , 1 ) includes four blue (B) pixels (shared pixels) including the B pixel 100 ( 3 , 1 ), the B pixel 100 ( 3 , 2 ), the B pixel 100 ( 4 , 1 ) and the B pixel 100 ( 4 , 2 ).

[0090] In this way, in the pixel array unit 11, R pixel groups 200 each including four red (R) pixels (2×2 pixels), G pixel groups 200 each including four green (G) pixels (2×2 pixels), and B pixel groups 200 each including four blue (B) pixels (2×2 pixels) are regularly arranged to form a Bayer array.

[0091] Note that the Bayer array is an arrangement pattern including G pixels of green (G) arranged in a checkerboard pattern and including R pixels of red (R) and B pixels of blue (B) arranged alternately column by column in the remaining portion.

[0092] In the pixel group 200 configured in the Bayer array, the exposure time is adjusted for each pixel 100. Here, in the case where the exposure time is adjusted in three stages of T1, T2 and T3 (T1>T2>T3), the long exposure time (T1) is called the long accumulation exposure time, the short exposure time (T3) is called the short accumulation exposure time, and the exposure time (T2) with a length in between is called the medium accumulation exposure time.

[0093] For example, in the R pixel group 200 (1, 2), the R pixel (1, 3) is a long accumulation pixel (L) having a long accumulation exposure time (T1), the R pixel (1, 4) and the R pixel (2, 3) are medium accumulation pixels (M) having a medium accumulation exposure time (T2), and the R pixel (2, 4) is a short accumulation pixel (S) having a short accumulation exposure time (T3).

[0094] Furthermore, since the four R pixels 100 of the R pixel group 200 are configured as shared pixels of a shared pixel circuit, pixel signals (analog signals) obtained from the four R pixels 100 are added in a floating diffusion region (FD: Floating Diffusion) and an R component signal (R pixel signal) is generated.

[0095] In this case, as the R pixel 100 constituting the shared pixel, the R pixel group 200 includes a long accumulation pixel (L), a medium accumulation pixel (M) and a short accumulation pixel (S), and the R pixel signal is an HDR (high dynamic range) pixel signal obtained by adding the long accumulation pixel signal, the medium accumulation pixel signal and the short accumulation pixel signal (pixel addition).

[0096] In addition, for example, in the G pixel group 200 (1, 1), the G pixel 100 (1, 1) is a long accumulation pixel (L), the G pixel 100 (1, 2) and the G pixel 100 (2, 1) are medium accumulation pixels (M), and the G pixel 100 (2, 2) is a short accumulation pixel (S). Similarly, in the G pixel group 200 (2, 2), the G pixel 100 (3, 3) is a long accumulation pixel (L), the G pixel 100 (3, 4) and the G pixel 100 (4, 3) are medium accumulation pixels (M), and the pixel 100 (4, 4) is a short accumulation pixel (S).

[0097] In addition, since the four G pixels 100 of the G pixel group 200 are configured as shared pixels, the pixel signals obtained from the four G pixels 100 are added and a G pixel signal is generated. In this case, as the G pixels 100 constituting the shared pixels, the G pixel group 200 includes a long accumulation pixel (L), a medium accumulation pixel (M), and a short accumulation pixel (S), and the G pixel signal is a pixel signal of HDR obtained by adding the long accumulation pixel signal, the medium accumulation pixel signal, and the short accumulation pixel signal.

[0098] In addition, for example, in the B pixel group 200 (2, 1), the B pixel 100 (3, 1) is a long accumulation pixel (L), the B pixel 100 (3, 2) and the B pixel 100 (4, 1) are medium accumulation pixels (M), and the B pixel 100 (4, 2) is a short accumulation pixel (S).

[0099] In addition, since the four B pixels 100 of the B pixel group 200 are configured as shared pixels, the pixel signals obtained from the four B pixels 100 are added and a B pixel signal is generated. In this case, as the B pixels 100 constituting the shared pixels, the B pixel group 200 includes a long accumulation pixel (L), a medium accumulation pixel (M), and a short accumulation pixel (S), and the B pixel signal is a pixel signal of HDR obtained by adding the long accumulation pixel signal, the medium accumulation pixel signal, and the short accumulation pixel signal.

[0100] In this way, in the pixel group 200 configured in the Bayer array, an R pixel signal of HDR as the sum of pixel signals of four pixels is obtained from the R pixel group 200. A G pixel signal of HDR as the sum of pixel signals of four pixels is obtained from the G pixel group 200, and a B pixel signal of HDR as the sum of pixel signals of four pixels is obtained from the B pixel group 200.

[0101] Note that in the following description, in the R pixel 100, the G pixel 100, and the B pixel 100, the long accumulation pixel (L), the medium accumulation pixel (M), and the short accumulation pixel (S) are distinguished by the subscripts "L", "M", and "S". For example, in the R pixel 100, the long accumulation pixel (L) will be denoted as R L Pixel 100, the accumulated pixel (M) will be marked as R M Pixel 100, and short accumulation pixel (S) will be marked as R S 100 pixels.

[0102] Here, focus on Figure 2 In the pixel array unit 11 of FIG. 1 , a region where a B pixel group 200 (2, 5) and a G pixel group 200 (2, 6) are provided is assumed that the B pixel group (2, 5) includes only the B pixel 100. However, here, instead of the B S Pixel 100(4,10), equipped with G M Pixel 100 (4, 10). Three of the four pixels are B pixels 100, and the remaining one pixel is a G pixel 100.

[0103] More specifically, if Figure 3 As shown, in the case of configuring pixels 100 for phase difference detection (hereinafter, also referred to as phase difference pixels 100L and 100R) for a pixel group 200 configured in a Bayer array, in the case shown, a structure in which a plurality of photoelectric conversion elements such as photodiodes are buried in an on-chip lens (OCL) 111 is adopted as the structure of the phase difference pixels 100L and 100R.

[0104] In this case, among the four pixels of the pixel group 200, the exposure times of two pixels arranged in the row direction are different, and it is difficult to set the on-chip lens 111 on these two pixels (2×1 pixels) due to the characteristics of the phase difference pixel. For example, among the four pixels (2×2 pixels) of the pixel group 200, in the first row, the exposure times of the long accumulation pixel (L) and the medium accumulation pixel (M) are different, and in the second row, the exposure times of the medium accumulation pixel (M) and the short accumulation pixel (S) are different.

[0105] Therefore, in order to set the on-chip lens 111 on two pixels (2×1 pixel) in the row direction, the on-chip lens 111 can be configured to span the adjacent left and right pixel groups 200. The adjacent left and right pixels 100 including one of the two photodiodes formed on the on-chip lens 111 can include a color filter of the same color, and the exposure time can be the same.

[0106] Here, if Figure 3 As shown in A, for the B pixel group 200 (2, 5) included in the B pixel group S The photodiode of the pixel 100 (4, 10) and the G included in the G pixel group 200 (2, 6) M When the photodiode of the pixel 100 (4, 11) is provided with an on-chip lens 111, the structure is as follows: Figure 3 As shown in B.

[0107] More specifically, during manufacturing, the B color filter included in the B pixel group 200 (2, 5) is replaced with the B color filter. S The color filter of the pixel 100 (4, 10) is set to a G color filter, and forms a G M Pixel 100(4,10). In addition, although B S Pixel 100 (4, 10) is a short accumulation pixel (S), but here, in G M In pixel 100(4,10), G M The configuration of the contacts of the pixel 100 ( 4 , 10 ) is changed, and the exposure time is set to a medium accumulation exposure time to form a medium accumulation pixel (M).

[0108] As a result, setting G M Pixel 100(4,10) and G M The pixel 100 (4, 11) is a pixel 100 including a photodiode disposed on an on-chip lens 111, and G M Pixel 100 includes the same G color filter and has the same medium cumulative exposure time. M The pixel 100 (4, 10) is configured as a phase difference pixel 100L (4, 10), and G M The pixel 100 (4, 11) is configured as a phase difference pixel 100R (4, 11). As a result, the phase difference between two images can be detected based on the pixel signals obtained from the phase difference pixels 100L and 100R.

[0109] Although in the B pixel group 200 (2, 5), when the lower right B S Pixel 100(4,10) becomes G M There is no short accumulation pixel (S) at pixel 100 (4, 10), but for example, the lower left B MPixel 100(4,9) becomes B S Pixel 100 (4, 9), and the four pixels include a short accumulation pixel (S) as well as a long accumulation pixel (L) and a medium accumulation pixel (M).

[0110] In addition, Figure 2 In the pixel array unit 11, the B pixel group 200 (2, 13) and the G pixel group 200 (2, 14), the B pixel group 200 (4, 1) and the G pixel group 200 (4, 2), the B pixel group 200 (4, 9) and the G pixel group 200 (4, 10), the B pixel group 200 (6, 7) and the G pixel group 200 (6, 8), the B pixel group 200 (6, 15) and the G pixel group 200 (6, 16), the B pixel group 200 (8, 3) and the G pixel group 200 (8, 4), and the B pixel group 200 (8, 11) and the G pixel group 200 (8, 12) are constructed similarly to the B pixel group 200 (2, 5) and the G pixel group 200 (2, 6), and include a phase difference pixel 100L and a phase difference pixel 100R.

[0111] Similarly, in Figure 2 In the pixel array unit 11, the B pixel group 200 (10, 5) and the G pixel group 200 (10, 6), the B pixel group 200 (10, 13) and the G pixel group 200 (10, 14), the B pixel group 200 (12, 1) and the G pixel group 200 (12, 2), the B pixel group 200 (12, 9) and the G pixel group 200 (12, 10), the B pixel group 200 (14, 7) and the G pixel group 200 (1 4,8), B pixel group 200(14,15) and G pixel group 200(14,16), B pixel group 200(16,3) and G pixel group 200(16,4), and B pixel group 200(16,11) and G pixel group 200(16,12) are constructed similarly to B pixel group 200(2,5) and G pixel group 200(2,6), and include phase difference pixel 100L and phase difference pixel 100R.

[0112] In this manner, the phase difference pixels 100L included in the B pixel group 200 and the phase difference pixels 100R included in the G pixel group 200 are regularly arranged at predetermined pixel intervals in the row direction and the column direction. Figure 2 In the pixel array unit 11. Figure 2 and Figure 3It should be understood that the pixel array unit 11 may include a normal pixel group and a mixed pixel group. A normal pixel group may be a pixel group including only normal pixels (e.g., a 2×2 array of four pixels that receive light through a color filter of the same color). A mixed pixel group may be a pixel group including at least one normal pixel (e.g., 100(4,9)) and at least one phase difference detection pixel (e.g., 100(4,10)). In addition, for each mixed pixel group, at least one phase difference detection pixel shares an on-chip lens 111 with at least one other phase difference detection pixel, and receives light transmitted through a color filter of the same color as at least one other phase difference detection pixel.

[0113] (Cross-sectional structure of a pixel)

[0114] Figure 4 is shown in the arrangement Figure 2 sectional view of the structure of a plurality of pixels 100 in the pixel array unit 11.

[0115] Figure 4 The X1 - X1 ′ cross section of the pixels 100 in the fourth row is shown as a cross section of the pixel group 200 including the phase difference pixels 100L and 100R. Figure 4 Also shown is a cross section X2 - X2 ′ of the pixels 100 of the seventh row, which is a cross section of the pixel group 200 excluding the phase difference pixels 100L and 100R.

[0116] Here, when the arrangement position of the upper left pixel 100 is represented as pixel 100 (1, 7), the objects of the X1-X1' cross section include G M Pixel 100(4,7), G S Pixel 100(4,8), B S Pixel 100(4,9), G M Pixel 100(4,10), G M Pixel 100(4,11), G S Pixel 100(4,12), B M Pixel 100(4,13) and B S Pixel 100(4,14).

[0117] Here, G M Pixel 100(4,7) and G S The pixel 100 (4, 8) is included in the G pixel group 200 (2, 4), and the B S Pixel 100(4,9) and G M The pixel 100 (4, 10) is included in the B pixel group 200 (2, 5). M Pixel 100(4,11) and G SThe pixel 100 (4, 12) is included in the G pixel group 200 (2, 6), and the B M Pixel 100(4,13) and B S The pixel 100 (4, 14)) is included in the B pixel group 200 (2, 7).

[0118] like Figure 4 As shown in the X1-X1' cross section, in each pixel 100, a photodiode 112 is formed directly below the on-chip lens 111, and a color filter 113 and a light shielding portion 114 are provided in a region between the on-chip lens 111 and the silicon layer in which the photodiode 112 is provided.

[0119] The G color filter 113 is formed on the G M Pixel 100(4,7) and G S In pixel 100(4,8), in G M In pixel 100(4,10) and in G M Pixel 100(4,11) and G S In pixel 100 (4, 12), B color filter 113 is formed on B S In pixel 100(4,9) and in B M Pixel 100(4,13) and B S In pixel 100(4,14).

[0120] That is, although due to G M The pixel 100 ( 4 , 10 ) is included in the B pixel group 200 ( 2 , 5 ) and it is assumed that the B color filter 113 is formed to configure the B pixel 100 , but here, the G color filter 113 is formed to configure the G pixel 100 .

[0121] As a result, for one on-chip lens 111A, a lens disposed at G M The photodiode 112L on the pixel 100 (4, 10) and the photodiode 112L provided on the G M Photodiode 112R on pixel 100(4,11). M The pixel 100(4, 10) is configured as a phase difference pixel 100L(4, 10), and G M The pixel 100(4, 11) is configured as a phase difference pixel 100R(4, 11). In this case, G M Pixel 100(4,10) and G M The pixels 100 ( 4 , 11 ) are both G pixels 100 including a G color filter 113 , and are medium accumulation pixels (M) having a medium accumulation exposure time.

[0122] Note that the light shielding portion 114 arranged in a grid shape is viewed from the light incident side. MThe pixel 100 (4, 7) is shielded from light by adjacent pixels. The light shielding portion 114 is formed of a metal such as tungsten (W) and aluminum (Al).

[0123] As G M As in pixel 100 (4, 7), the light shielding portion 114 arranged in a grid shape is also in G S Pixel 100(4,8), B S Pixel 100(4,9), G M Pixel 100(4,10), G M Pixel 100(4,11), G S Pixel 100(4,12), B M Pixel 100(4,13) and B S The pixel 100 (4, 14) is shielded from light by adjacent pixels.

[0124] On the other hand, the object of the X2-X2' section is G L Pixel 100(7,7), G M Pixel 100(7,8), B L Pixel 100(7,9), B M Pixel 100(7,10), G L Pixel 100(7,11), G M Pixel 100(7,12), B L Pixel 100(7,13) and B M Pixel 100(7,14).

[0125] The G color filter 113 is formed on the G L Pixel 100(7,7) and G M In pixel 100(7,8) and in G L Pixel 100(7,11) and G M In pixel 100 (7, 12), B color filter 113 is formed on B L Pixel 100(7,9) and B M In pixel 100(7,10) and in B L Pixel 100(7,13) and B M In pixel 100(7,14).

[0126] When viewed from the light incident side, the light shielding portion 114 arranged in a grid shape is L Pixel 100(7,7), G M Pixel 100(7,8), B L Pixel 100(7,9), B M Pixel 100(7,10), G L Pixel 100(7,11), GM Pixel 100(7,12), B L Pixel 100(7,13) and B M The pixel 100 (7, 14) is shielded from light by adjacent pixels.

[0127] (Example of pixel reading)

[0128] Next, refer to Figures 5 to 7 An example of reading the pixels 100 included in the pixel group 200 arranged in the pixel array unit 11 will be described.

[0129] Despite Figure 5 and Figure 6 The four pixels (2×2 pixels) of the pixel group 200 are not distinguished in FIG. Figure 7 As shown, each of the four pixels (2×2 pixels) may be, for example, one of a long accumulation pixel (L), a medium accumulation pixel (M), and a short accumulation pixel (S).

[0130] In addition, Figure 5 and Figure 6 In FIG. 1 , the circle indicated on the pixel 100 represents the contact C, and the diamond indicated in every four pixels represents the floating diffusion region FD. In addition, the drive line connected to each contact C is included in the vertical drive circuit 12 ( Figure 1 ) connected to the pixel drive line 21 ( Figure 1 )middle.

[0131] Figure 5 It is shown that in the pixel array unit 11 ( Figure 2 ) is provided with a portion of the pixel area of ​​the pixel 100, and four pixels 100 constitute a pixel group 200.

[0132] exist Figure 5 In FIG. 1 , the four pixels 100 of the pixel group 200 share the floating diffusion region FD. Figure 5 In the vertical driving circuit 12 ( Figure 1 ) supplies driving signals (TRG, SEL) for the transmission transistor TR-Tr and the selection transistor SEL-Tr.

[0133] In the pixel group 200, each pixel 100 includes a transfer transistor TR-Tr in addition to the photodiode 112. In each pixel 100, the transfer transistor TR-Tr performs an on / off operation according to a drive signal TRG input to the gate, and transfers the charge (signal charge) photoelectrically converted by the photodiode 112 to a floating diffusion region FD shared by four pixels. In this regard, here, the drive signal TRG is controlled according to the exposure time of each pixel 100.

[0134] The floating diffusion region FD is formed at a connection point between the transfer transistor TR-Tr of each pixel 100 of the pixel group 200, the reset transistor RST-Tr shared by the pixel group 200, and the amplifier transistor AMP-Tr. The reset transistor RST-Tr performs an on / off operation according to a drive signal RST input to a gate, and discharges charges accumulated in the floating diffusion region FD.

[0135] The floating diffusion region FD has a function of accumulating the charge transferred by the transfer transistor TR-Tr of each pixel 100. The potential of the floating diffusion region FD is modulated according to the amount of accumulated charge. The amplifier transistor AMP-Tr operates as an amplifier in which the potential fluctuation of the floating diffusion region FD connected to the gate is processed as an input signal voltage, and the output signal voltage is output to the vertical signal line (VSL) 22 via the selection transistor SEL-Tr.

[0136] The selection transistor SEL-Tr performs an on / off operation according to a drive signal SEL input to a gate, and outputs a voltage signal from the amplification transistor AMP-Tr to a vertical signal line (VSL) 22 .

[0137] In this way, the pixel group 200 shares four pixels, and each pixel 100 includes a photodiode 112 and a transfer transistor TR-Tr. In addition, in the pixel group 200, four pixels (shared pixels) share a floating diffusion region FD, and the pixel circuit of the shared pixel includes a shared transistor including a reset transistor RST-Tr, an amplification transistor AMP-Tr, and a selection transistor SEL-Tr.

[0138] Note that in the pixel array unit 11 , two pixel groups 200 in the column direction also share a shared transistor including a reset transistor RST-Tr, an amplifier transistor AMP-Tr, and a selection transistor SEL-Tr.

[0139] More specifically, in Figure 5 In the pixel array shown, when the configuration position of the upper left pixel 100 is represented as pixel 100 (1, 1), in the pixel groups 200 in the first row and the second row, each pixel group 200 shares a floating diffusion region FD, and the upper and lower pixel groups 200 in the column direction are paired, so that the shared transistor is also shared.

[0140] For example, the G pixel group 200 ( 1 , 1 ) and the R pixel group 200 ( 2 , 1 ) of the first column are paired, and the reset transistor RST-Tr, the amplification transistor AMP-Tr, and the selection transistor SEL-Tr are shared transistors.

[0141] Here, among the four pixels of the G pixel group 200(1,1), in the G pixel 100(1,1), the transfer transistor TR-Tr operates according to the drive signal TRG6 input through the contact C, and transfers the charge generated by the photodiode 112 to the floating diffusion region FD. Similarly, in the G pixel 100(1,2), the G pixel 100(2,1), and the G pixel 100(2,2), according to the drive signal TRG7, the drive signal TRG4, and the drive signal TRG5, the transfer transistor TR-Tr also transfers the charge from the photodiode 112 to the floating diffusion region FD.

[0142] In the floating diffusion region FD shared by the four pixels of the G pixel group 200 (1, 1), the charges transferred from the G pixel 100 (1, 1), the G pixel 100 (1, 2), the G pixel 100 (2, 1), and the G pixel 100 (2, 2) are added (analog addition), and the voltage according to the added charges is input to the amplifier transistor AMP-Tr. Note that the charge addition in the floating diffusion region FD is also referred to as pixel addition or FD addition.

[0143] Furthermore, the potential fluctuation of the floating diffusion region FD shared by four pixels is processed into an input signal voltage of the gate in the amplification transistor AMP-Tr, and an output signal voltage is output to the vertical signal line ( VSL1 ) 22 - 1 via the selection transistor SEL-Tr.

[0144] Note that shared transistors such as the amplification transistor AMP-Tr and the selection transistor SEL-Tr are shared by the R pixel group 200 ( 2 , 1 ) paired with the G pixel group 200 ( 1 , 1 ).

[0145] In addition, in the pixel groups 200 of the first and second rows, the pairing of the B pixel group 200 (1, 2) and the G pixel group 200 (2, 2) of the second column, the pairing of the G pixel group 200 (1, 3) and the R pixel group 200 (2, 3) of the third column, and the pairing of the B pixel group 200 (1, 4) and the G pixel group 200 (2, 4) of the fourth column are constructed similarly to the G pixel group 200 (1, 1) and the R pixel group 200 (2, 1) of the first column.

[0146] In addition, the third and fourth row pixel groups 200 are configured similarly to the first and second row pixel groups 200. The floating diffusion region FD is shared in each pixel group 200, and upper and lower pixel groups 200 in the column direction are paired so that the shared transistor is also shared.

[0147] Here, in Figure 5In the embodiment, the drive signal SEL1 enters the L level, and the selection transistor SEL-Tr shared by the pixel groups 200 of the first and second rows enters the off state. On the other hand, the drive signal SEL0 enters the H level, and the selection transistor SEL-Tr shared by the pixel groups 200 of the third and fourth rows enters the on state. In this way, the pixel groups 200 of the third and fourth rows are selected.

[0148] In this case, if Figure 5 As shown, among the four pixels included in the pixel group 200 in the third row, only the driving signal TRG4 among the driving signals TRG0 to TRG7 is at the H level, and the G pixel of the G pixel group 200 (3, 1) in the first column is at the H level. M The G pixel 100 (6, 1) and the B pixel group 200 (3, 2) in the second column M pixel 100(6,4), G pixel group 200(3,3) in the third column M The pixel 100 (6, 5) and the B pixel group 200 (3, 4) in the fourth column M Each transfer transistor TR-Tr of the pixel 100 (6, 7) enters an on state.

[0149] In this way, the Figure 5 The thick frame surrounded by G M Pixel 100(6,1), G M Pixel 100(6,4), G M Pixel 100(6,5) and B M The charges generated by each photodiode 112 of the pixel 100 (6, 7) are transferred to the corresponding floating diffusion region FD. M Pixel 100(6,1), G M Pixel 100(6,4), G M Pixel 100(6,5) and B M The pixels 100 ( 6 , 7 ) are both medium accumulation pixels (M) and can be driven by the same driving signal TRG4 .

[0150] As a result, G is accumulated in the phase difference pixel 100L(6,4). M The charge on the photodiode 112 of the pixel 100 (6, 4) and the charge accumulated on the G configured as the phase difference pixel 100R (6, 5) are M The charge on the photodiode 112 of the pixel 100 ( 6 , 5 ) is read.

[0151] Then, if Figure 6As shown, the driving signal TRG at the H level is switched from TRG4 to TRG5, and among the four pixels of the pixel group 200 in the third row, the G pixel group 200 (3, 1) in the first column is S pixel 100(6,2), the B pixel group 200(3,2) of the second column S The G pixel 100 (6, 3), the G pixel group 200 (3, 3) in the third column S The pixel 100 (6, 6) and the B pixel group 200 (3, 4) in the fourth column S Each transfer transistor TR-Tr of the pixel 100 (6, 8) enters an on state.

[0152] In this way, the Figure 6 The thick frame surrounded by G S Pixel 100(6,2), B S Pixel 100(6,3), G S Pixel 100(6,6) and B S The charges generated by each photodiode 112 of the pixel 100 (6, 8) are transferred to the corresponding floating diffusion region FD. S Pixel 100(6,2), B S Pixel 100(6,3), G S Pixel 100(6,6) and B S The pixels 100 ( 6 , 8 ) are both short accumulation pixels (S) and can be driven by the same driving signal TRG5 .

[0153] Although not shown, the drive signals TRG6 and TRG7 are similarly switched to the H level, and charges are read from the photodiodes of the four pixels included in each pixel group 200 of the third row, and the charges are transferred to the floating diffusion region FD shared by the four pixels. In the floating diffusion region FD, the charges transferred from the respective photodiodes 112 of the four pixels are added, and a voltage according to the added charges is input to the amplification transistor AMP-Tr.

[0154] In addition, in the pixel group 200 of the third row, in the amplification transistor AMP-Tr, the potential fluctuation of the floating diffusion area FD shared by four pixels is the input signal voltage of the gate, and the output signal voltage is output to the vertical signal line (VSL1, VSL3, VSL5, VSL7) 22 via the selection transistor SEL-Tr.

[0155] Here, the vertical signal line (VSL1) 22-1 is connected to the column signal processing circuit 13 ( Figure 1) is connected to a comparator 210-1 in the vertical signal line (VSL1) 22-1. The comparator 210-1 compares the signal voltage (Vx) from the vertical signal line (VSL1) 22-1 input to the comparator 210-1 with the reference voltage (Vref) of the ramp wave (Ramp) from the DAC 220, and outputs an output signal at a level according to the comparison result.

[0156] In addition, comparators 210-2 to 210-4 are similar to comparator 210-1, except that the signal voltage to be compared with the reference voltage is replaced with a signal voltage from a vertical signal line 22-3 (VSL3), a vertical signal line 22-5 (VSL5) or a vertical signal line 22-7 (VSL7), and an output signal at a level according to the comparison result is output.

[0157] Note that the column signal processing circuit 13 performs AD conversion by counting the reset level or the signal level based on the output signal from the comparator 210. Figures 8 to 10 The details of the column AD method using correlated double sampling (CDS) are described below. Figures 11 to 15 The details of the arrangement of the contacts C of the pixel 100 will be described.

[0158] (Pixel driving example)

[0159] Next, refer to Figures 8 to 10 The details of the column AD method using correlated double sampling (CDS) will be described.

[0160] Figure 8 The timing diagram shows the CMOS image sensor 10 ( Figure 1 ) adopts a column AD method using correlated double sampling (CDS) and the pixels sharing the floating diffusion region (FD) are shared by the photodiodes 112 of four pixels included in the pixel group 200.

[0161] Here, as described above, the DAC 220 ( Figure 5 The ramp wave (Ramp) of the pixel group 200 and the VSL signal from the vertical signal line (VSL) 22 connected to the pixel group 200 are input to the column signal processing circuit 13 ( Figure 1 ) in the comparator 210 ( Figure 5 etc.) and compare them.

[0162] exist Figure 8 The timing diagram of FIG. 1 shows the ramp wave (Ramp) from the DAC 220 and the VSL signal from the vertical signal line (VSL) 22 input to the comparator 210 in chronological order. Figure 8 , the time direction is from left to right.

[0163] Figure 8 The timing diagram also shows a timing diagram of “reset” corresponding to the drive signal RST input to the gate of the reset transistor RST-Tr, “pixel transfer” corresponding to the drive signal TRG input to the gate of the transfer transistor TR-Tr, “transmission” corresponding to the transmission timing of the data after AD conversion, and “Hsync” corresponding to the horizontal synchronization signal of the signal processing pipeline.

[0164] Notice, Figure 8 The “AD conversion” in represents a period of AD conversion performed by the column signal processing circuit 13 , the “horizontal transfer data” represents data transferred according to the timing of “transfer”, and the “data” represents data after the “horizontal transfer data” is sorted.

[0165] At time t10, the reset transistor RST-Tr enters the on state and resets the floating diffusion region (FD) shared by the four pixels of the pixel group 200. As a result, the reset level Srst is read in the period from time t10 to time t12 (hereinafter, referred to as the first period). Here, the period from time t11 to time t12 is the period of AD conversion.

[0166] Next, at time t13, the transfer transistors TR-Tr corresponding to the phase difference pixels 100L and 100R enter the on state, and transfer the pixel signal Sa corresponding to the charge QA accumulated in the photodiode 112 of one of the four pixels included in each pixel group 200 to the floating diffusion region (FD) ( Figure 8 In this case, a potential corresponding to the charge QA is generated in the floating diffusion region (FD), and the amplification transistor AMP-Tr and the selection transistor SEL-Tr output (apply) the potential to the vertical signal line (VSL) 22.

[0167] As a result, the pixel signal level SA according to the charge QA is read in the period from time t12 to time t16 (hereinafter, referred to as the second period). Then, the difference between the pixel signal level SA during the reading of the second period and the reset level Srst during the reading of the first period can be calculated to remove the offset component, thereby obtaining the real signal component Sa.

[0168] Here, the period from time t14 to time t15 is the period of AD conversion of the pixel signal level SA, and the column signal processing circuit 13 performs correlated double sampling (CDS) and obtains a CDS signal of the second period (CDS signal of one pixel) ( Figure 8 of S2).

[0169] Next, at time t16, the transfer transistors TR-Tr of the remaining three pixels enter a conducting state, and transfer pixel signals Sb according to the charges QB accumulated in the photodiodes 112 of the remaining three pixels among the four pixels included in each pixel group 200 to the floating diffusion region (FD) ( Figure 8 In this regard, the charge QB corresponds to the collection of the charges QB1, QB2, and QB3 accumulated in the photodiodes 112 of the remaining three pixels.

[0170] Here, the charge QB from the photodiodes 112 of the remaining three pixels is read without resetting the floating diffusion region (FD) by the reset transistor RST-Tr, and the charge QB is added to the charge QA from the photodiode 112 of one pixel that has been accumulated in the floating diffusion region (FD). In this case, a potential according to the charge amount QAB obtained by synthesizing the charge QA and the charge QB is generated in the floating diffusion region (FD), and the amplifier transistor AMP-Tr and the selection transistor SEL-Tr output (apply) the charge QAB to the vertical signal line (VSL) 22.

[0171] As a result, the pixel signal level SAB according to the charge QAB is read in the period from time t16 to time t19 (hereinafter, referred to as the third period). Then, the difference between the pixel level signal SAB during the reading of the third period and the reset level Srst during the reading of the first period can be calculated to remove the offset component, thereby obtaining the real signal component Sab.

[0172] Note that the pixel signal Sb (real signal component Sb) according to the charge QB from the photodiodes 112 of the remaining three pixels can be obtained by calculating the difference between the synthetic component Sab (real signal component Sab) and the pixel signal Sa (real signal component Sa).

[0173] In this regard, the period from time t17 to time t18 is a period of AD conversion of the pixel level signal SAB, and the column signal processing circuit 13 performs correlated double sampling (CDS) and obtains a CDS signal of the third period (CDS signals of three pixels) ( Figure 8 S4).

[0174] Here, in the column signal processing circuit 13, the comparator 210 performs a comparison operation between the signal voltage Vx of the VSL signal from the vertical signal line (VSL) 22 input to the comparator 210 and the reference voltage Vref based on the slope from the DAC 220, and outputs an output signal Vco at a level according to the comparison result. The output signal Vco from the comparator 210 is counted by a counter (not shown) at a later stage.

[0175] In this manner, in the column AD method using correlated double sampling (CDS), the reset level Srst is read in the first period. A comparison operation of the signal voltage Vx and the reference voltage Vref is performed, and the output signal Vco is counted.

[0176] Furthermore, in the second period, in addition to the reset level Srst, the pixel signal level SA is read. A comparison operation of the signal voltage Vx and the reference voltage Vref is performed, and the output signal Vco is counted. Furthermore, in the third period, in addition to the reset level Srst, the pixel signal level SAB according to the composite charge QAB of the signal charges QA and QB is read. A comparison operation of the signal voltage Vx and the reference voltage Vref is performed, and the output signal Vco is counted.

[0177] The data obtained by AD conversion (dataA of the second period and dataB of the third period) is applied to the signal processing pipeline as horizontal transfer data, and the data is sorted to obtain data of the normal pixel 100 and the phase difference pixels 100L and 100R ( Figure 8 S5).

[0178] Note that when the first AD conversion period from time t10 to time t19 ends, the second AD conversion period from time t19 to time t28 follows. However, the operation performed in the second AD conversion period is similar to that performed in the first AD conversion period, and the description will be omitted.

[0179] By executing Figure 8 In the driving shown in the timing diagram of , correlated double sampling (CDS) can be applied to the charge accumulated in the floating diffusion region (FD) in two stages. More specifically, the phase difference pixels 100L and 100R are read in the first stage, and four pixels (2×2 pixels) are added and read in the second stage.

[0180] In addition, as a result of the driving, the operation in the first period for reading the reset level Srst, the operation in the second period for reading the pixel signal level SA, and the operation in the third period for reading the pixel signal level SAB are sequentially performed in one AD conversion period. Therefore, compared with the case of normal CDS operation, one period for reading the reset level can be eliminated, and the time of correlated double sampling (CDS) can be shortened.

[0181] (Driving Operation of Pixel in Second Period)

[0182] Here, refer to Fig. 9 right Figure 8The details of the driving operation of the pixel 100 in the second period (time t12 to time t16) shown will be described.

[0183] exist Fig. 9 In the pixel array shown, when the configuration position of the upper left pixel 100 is represented as pixel 100 (1, 1), a G pixel group 200 (1, 1), a B pixel group 200 (1, 2), a G pixel group 200 (1, 3) and a B pixel group 200 (1, 4) are configured in the row direction.

[0184] Here, in the B pixel group 200 (1, 2), instead of B S Pixel 100(1,4), equipped with G M pixel 100(1,4). As a result, the G M The pixel 100 (1, 4) is configured as a phase difference pixel 100L (1, 4), and the G pixel group 200 (1, 3) of the G M The pixel 100 (1, 5) is configured as a phase difference pixel 100R (1, 5). Note that the relationship between the pixel 100 and the pixel group 200 will be described later. Fig.10 It is similar in Chinese.

[0185] In the second period, the charge accumulated in the photodiode 112 of one pixel of the four pixels in each pixel group 200 is transferred to the floating diffusion region FD ( Fig. 9 of S1).

[0186] More specifically, for the G pixel group 200 (1, 1) M The pixel 100 (1, 1), the phase difference pixel 100L (1, 4) of the B pixel group 200 (1, 2), the phase difference pixel 100R (1, 5) of the G pixel group 200 (1, 3), and the B pixel group 200 (1, 4) M In the pixel 100 ( 1 , 7 ), the transfer transistor TR-Tr transfers the charge accumulated in the photodiode 112 of each pixel 100 to a different floating diffusion region FD in each pixel group 200 .

[0187] Then, the potential fluctuation of the floating diffusion region FD is processed into an input signal voltage of the gate in the amplification transistor AMP-Tr of each pixel group 200, and the output signal voltage is output to the vertical signal line 22 via the selection transistor SEL-Tr. In this way, the column signal processing circuit 13 performs correlated double sampling (CDS), and obtains a signal (CDS signal) after CDS of the second period ( Fig. 9 of S2).

[0188] However, here, only the CDS signals ( Fig. 9 S3), and not used and discarded from G M Pixel 100(1,1) and B M The CDS signal obtained by pixel 100(1,7) Fig. 9 (marked with an X in the middle).

[0189] More specifically, the G of the B pixel group 200 (1, 2) M The G pixel 100 (1, 4) and the G pixel group 200 (1, 3) M The pixel 100 (1, 5) is configured as a phase difference pixel 100L (1, 4) and a phase difference pixel 100R (1, 5), and holds the CDS signal obtained from the pixel 100. On the other hand, the G pixel group 200 (1, 1) of the G pixel group 200 (1, 1) M The B pixel 100 (1, 1) and the B pixel group 200 (1, 4) M The pixel 100 ( 1 , 7 ) is constructed as a normal pixel 100 , and the CDS signal obtained from the pixel 100 is not used and is discarded.

[0190] (Pixel Driving Operation in the Third Phase)

[0191] Next, refer to Fig.10 right Figure 8 The details of the driving operation of the pixel 100 in the third period (time t16 to time t19) shown will be described.

[0192] In the third period, among the four pixels of each pixel group 200, the charges accumulated in the photodiodes 112 of the other three pixels except the pixel that is the transfer target in the second period are transferred to the floating diffusion region FD ( Fig.10 S4-1~S4-3).

[0193] Note that Fig.10 In, as Fig. 9 A pixel of the transmission object in the second period is indicated by a black rectangle, and in the third stage, G is removed from the transmission object. M Pixel 100(1,1), G M Pixel 100(1,4), G M Pixel 100(1,5) and B M Pixel 100(1,7).

[0194] More specifically, for the G pixel group 200 (1, 1) S Pixel 100(1,2), G L Pixel 100(2,1) and G MThe pixel 100(2,2) and the B pixel group 200(1,2) S Pixel 100(1,3), B L Pixel 100(2,3) and B M In the pixels 100 ( 2 , 4 ), the transfer transistors TR-Tr transfer the charge accumulated in the photodiode 112 of each pixel 100 to a different floating diffusion region FD in each pixel group 200 .

[0195] Similarly, for the G pixel group 200(1,3) S Pixel 100(1,6), G L Pixel 100(2,5) and G M The B pixel 100 (2, 6) and the B pixel group 200 (1, 4) S Pixel 100(1,8), B L Pixel 100(2,7) and B M In the pixel 100 ( 2 , 8 ), the transfer transistor TR-Tr transfers the charge accumulated in the photodiode 112 of each pixel 100 to a different floating diffusion region FD in each pixel group 200 .

[0196] Then, the potential fluctuation of the floating diffusion region FD is processed into an input signal voltage of the gate in the amplifier transistor AMP-Tr of each pixel group 200, and the output signal voltage is output to the vertical signal line 22 via the selection transistor SEL-Tr. In this way, the column signal processing circuit 13 performs correlated double sampling (CDS) and obtains a CDS signal ( Fig.10 S5).

[0197] However, here, the CDS signal ( Fig.10 ), and only the CDS signal obtained from the pixel group 200 including only the normal pixel 100 is used ( Fig.10 S6).

[0198] More specifically, the G of the B pixel group 200 (1, 2) M The G pixel 100 (1, 4) and the G pixel group 200 (1, 3) M The pixel 100 (1, 5) is configured as a phase difference pixel 100L (1, 4) and a phase difference pixel 100R (1, 5), and the CDS signals obtained from the B pixel group 200 (1, 2) and the G pixel group 200 (1, 3) are discarded. On the other hand, the four pixels of the G pixel group 200 (1, 1) and the four pixels of the B pixel group 200 (1, 4) include only the normal pixel 100, and the CDS signals obtained from the G pixel group 200 (1, 1) and the B pixel group 200 (1, 4) are retained.

[0199] In this way, in Fig. 9 In the second period shown, the phase difference signals from the phase difference pixels 100L and 100R are obtained as CDS signals ( Fig. 9 and Fig.10 's S3), and in Fig.10 In the third period shown, the pixel signal from the pixel group 200 including only the normal pixel 100 is obtained as the CDS signal ( Fig.10 Then, one of the phase difference signal and the pixel signal is selected and output.

[0200] (Example of contact arrangement)

[0201] Next, refer to Figures 11 to 15 right Figure 8 An example of the arrangement of contacts of the pixel 100 for driving as shown in the timing diagram of FIG. 1 will be described.

[0202] Fig.11 The arrangement of the contacts when the phase difference pixel 100L and the phase difference pixel 100R are read separately is shown.

[0203] Note that Fig.11 In FIG. 1 , the ellipse indicated on the pixel 100 represents the contact C, and the diamond indicated on every four pixels represents the floating diffusion region FD. In addition, the drive line connected to each contact C is included in the vertical drive circuit 12 ( Figure 1 ) connected to the pixel drive line 21 ( Figure 1 ). The meanings of the ellipse and the diamond are similar in other figures described later.

[0204] exist Fig.11 In the illustrated arrangement of the contacts C, the contacts C of the phase difference pixels 100L included in the G pixel group 200 and the phase difference pixels 100R included in the B pixel group 200 are connected to different driving lines.

[0205] Therefore, the phase difference pixel 100L is individually read in the reading period of the first pixel signal level, and the charge accumulated in the photodiode 112 of the phase difference pixel 100L is transferred to the floating diffusion region FD of each pixel group 200 .

[0206] Next, the phase difference pixel 100R is individually read in the second pixel signal level reading period, and the charge accumulated in the photodiode 112 of the phase difference pixel 100R is transferred to the floating diffusion region FD of each pixel group 200 .

[0207] Then, four pixels (2×2 pixels) of each pixel group 200 are added and read in the third pixel signal level reading period, and the charges accumulated in the photodiodes 112 of the four pixels are transferred to the floating diffusion region FD of each pixel group 200 .

[0208] In this way, in Fig.11 In the configuration of the contacts shown, the phase difference pixel 100L is read in the first stage, the phase difference pixel 100R is read in the second stage, and the four pixels (2×2 pixels) of each pixel group 200 are added and read in the third stage. There is a reading period of three pixel signal levels, and as a result, the time of correlated double sampling (CDS) is long.

[0209] Therefore, in the present technology, the contacts C of the pixel 100 are reconfigured to be configured as follows: Fig.12 The contact C shown in FIG. eliminates the reading period of one pixel signal level, and thus there is a reading period of two pixel signal levels. In this way, the time of correlated double sampling (CDS) can be shortened.

[0210] Fig.12 The arrangement of the contacts when the phase difference pixel 100L and the phase difference pixel 100R are read simultaneously is shown.

[0211] exist Fig.12 In the illustrated arrangement example of the contacts C, the contacts C of the phase difference pixels 100L included in the G pixel group 200 and the phase difference pixels 100R included in the B pixel group 200 are connected to the same driving line.

[0212] Therefore, the phase difference pixel 100L is individually read in the reading period of the first pixel signal level, and the charge accumulated in the photodiode 112 of the phase difference pixel 100L is transferred to the floating diffusion region FD of the G pixel group 200. At the same time, the phase difference pixel 100R is individually read, and the charge accumulated in the photodiode 112 of the phase difference pixel 100R is transferred to the floating diffusion region FD of the B pixel group 200.

[0213] Then, in the second pixel signal level reading period, four pixels (2×2 pixels) of each pixel group 200 are added and read, and the charges accumulated in the photodiodes 112 of the respective pixels in the four pixels are transferred to the floating diffusion region FD of each pixel group 200 .

[0214] In this way, in Fig.12In the configuration example of the contact C shown, the phase difference pixel 100L and the phase difference pixel 100R are read in the first stage, and the four pixels (2×2 pixels) of each pixel group 200 are added and read in the second stage. Therefore, there is only a reading period of two pixel signal levels, and as a result, the time of correlated double sampling (CDS) can be shortened.

[0215] (Example of contact arrangement)

[0216] Next, refer to Figures 13-15 The details of the arrangement example of the contacts C according to the present technique will be described.

[0217] Despite Fig.13 and Fig.14 The four pixels (2×2 pixels) of the pixel group 200 are not distinguished in FIG. Fig.15 As shown, for example, each of four pixels (2×2 pixels) may be one of a long accumulation pixel (L), a medium accumulation pixel (M), and a short accumulation pixel (S).

[0218] (Configuration Example in the Case of Having Two Driving Lines)

[0219] Fig.13 An example of arrangement of the contacts C in the case of having two driving lines is shown.

[0220] Note that Fig.13 In the pixel array of FIG. 1 , the row number and column number corresponding to the i row and j column of the pixel 100 are indicated in the left and lower regions, and the row number and column number corresponding to the k row and l column of the pixel group 200 are indicated in the right and upper regions for easy understanding. Fig.13 In the illustration, an area of ​​a pixel array of 12 rows and 16 columns (a pixel group array of 6 rows and 8 columns) is extracted from the pixel array of the pixel array unit 11.

[0221] In addition, the driving lines connected to the contacts C are included in the pixel driving lines 21 ( Figure 1 ), and the n rows of driving lines in the horizontal direction are denoted as TRG-n. More specifically, for Fig.13 Two driving lines TRG are provided for each row of pixels 100 in the pixel array, and a contact C of each pixel 100 is electrically connected to one of the two driving lines TRG.

[0222] Here, for example, when the arrangement position of the upper left pixel 100 is represented as pixel 100 (1, 1), the upper left G pixel of the four pixels (shared pixels) of the G pixel group 200 (1, 1) is M The contact C of the pixel 100 (1, 1) is connected to the driving line TRG-2, and the upper right G SThe contact C of the pixel 100 (1, 2) is connected to the driving line TRG-1. L The contact C of the pixel 100 (2, 1) is connected to the driving line TRG-4, and the lower right G M The contact C of the pixel 100 ( 2 , 2 ) is connected to the driving line TRG- 3 .

[0223] In this way, in the G and B pixel group 200 of the first row, the contact C of the upper left pixel 100 among the four pixels is connected to the driving line TRG-2, the contact C of the upper right pixel 100 is connected to the driving line TRG-1, the contact C of the lower left pixel 100 is connected to the driving line TRG-4, and the contact C of the lower right pixel 100 is connected to the driving line TRG-3.

[0224] In addition, in the second row of the R and G pixel group 200, the contact C of the upper left pixel 100 among the four pixels is connected to the driving line TRG-6, the contact C of the upper right pixel 100 is connected to the driving line TRG-5, the contact C of the lower left pixel 100 is connected to the driving line TRG-8, and the contact C of the lower right pixel 100 is connected to the driving line TRG-7. The connection relationship is similar to that of the G and B pixel group 200 in the first row.

[0225] Although the description is omitted to avoid repetition, the connection relationship between the G and B pixel groups 200 in the third row, the R and G pixel groups 200 in the fourth row, the G and B pixel groups 200 in the fifth row, and the R and G pixel groups 200 in the sixth row are similar to the connection relationship between the G and B pixel groups 200 in the first row and the R and G pixel groups 200 in the second row.

[0226] Here, in Fig.13 In the pixel array, focus on the area with the B pixel group 200 (1, 6) and the G pixel group 200 (1, 7) in the first row. M The upper left G pixel 100 (1, 12) and the G pixel group 200 (1, 7) M The pixel 100 ( 1 , 13 ) is configured as a phase difference pixel 100L ( 1 , 12 ) and a phase difference pixel 100R ( 1 , 13 ).

[0227] Therefore, the phase difference pixel 100L (1, 12) and the phase difference pixel 100R (1, 13) have G M The photodiode 112 and G of the pixel 100 (1, 12) M The photodiode 112 of the pixel 100 ( 1 , 13 ) is provided on one on-chip lens 111 (2×1 OCL structure).

[0228] In this case, in the B pixel group 200(1,6), as Fig.13 As shown in the black circle, the upper left BS The contact C of the pixel 100 (1, 11) is connected to the driving line TRG-1, and the upper right G M The pixel 100 ( 1 , 12 ) is connected to the driving line TRG- 2 .

[0229] As described above, although it is assumed that the B pixel group 200 includes only the B pixels 100, instead of the upper right B S The pixel 100 (1, 12) is configured with a G pixel in the B pixel group 200 (1, 6). M Pixel 100(1,12) is replaced by phase difference pixel 100L(1,12). M Pixel 100(1,11), B S The pixel 100 ( 1 , 11 ) is configured as the upper left B pixel 100 .

[0230] In this way, among the pixel groups 200 in the first row, the configuration of the pixels based on the exposure type in the B pixel group 200 (1, 6) is different from that of the other B and G pixel groups 200. More specifically, in the other B and G pixel groups 200, the upper left and lower right are medium accumulation pixels (M), the upper right is a short accumulation pixel (S), and the lower left is a long accumulation pixel (L). Only in the B pixel group 200 (1, 6), the upper right and lower right are medium accumulation pixels (M), the upper left is a short accumulation pixel (S), and the lower left is a long accumulation pixel (L).

[0231] Therefore, the contact C is arranged in the B pixel group 200 (1, 6) so that the upper left B S The contact C of the pixel 100 (1, 11) is connected to the driving line TRG-1 instead of the driving line TRG-2, and the upper right G M The contact C of the pixel 100 (1, 12) is connected to the driving line TRG-2 instead of the driving line TRG-1. As a result, the pixel 100 can be driven based on the exposure type in the pixel group 200 of the first row.

[0232] In addition, attention is paid to the area where the B pixel group 200 (5, 2) and the G pixel group 200 (5, 3) in the fifth row are provided. M The upper left G pixel 100 (9, 4) and the G pixel group 200 (5, 3) M The pixel 100 ( 9 , 5 ) is configured as a phase difference pixel 100L ( 9 , 4 ) and a phase difference pixel 100R ( 9 , 5 ).

[0233] In this case, in the configuration of the B pixel group 200 (5, 2), as Fig.13 As shown in the black circle, the upper left B SThe contact C of the pixel 100 (9, 3) is connected to the driving line TRG-17 instead of the driving line TRG-18, and the upper right G M The contact C of the pixel 100 (9, 4) is connected to the driving line TRG-18 instead of the driving line TRG-17. As a result, the pixels 100 can be driven based on the exposure type in the pixel group 200 of the fifth row, as in the pixel group 200 of the first row.

[0234] Note that Fig.13 In the pixel array shown, each floating diffusion region FD is shared by four pixels (2×2 pixels) of each pixel group 200 , and the floating diffusion region FD is also shared by a pair of upper and lower pixel groups 200 in the column direction.

[0235] In this way, in the case where two driving lines TRG are provided for each row of pixels 100, as shown in FIG. Fig.13 As shown in the pixel array, the contact C can be configured (for example, the B of the B pixel group 200 (1,6) can be reconstructed S Pixel 100(1,11) and G M The contact C of the pixel 100 (1, 12) is used to read the phase difference pixel 100L and the phase difference pixel 100R at the same time. Therefore, the time of correlated double sampling (CDS) can be shortened.

[0236] (Configuration Example in the Case of Having Three Driving Lines)

[0237] Fig.14 An example of arrangement of the contacts C in the case of having three driving lines is shown.

[0238] exist Fig.14 In the pixel array, three driving lines TRG are provided for each row of pixels 100, and the contact C of each pixel 100 is electrically connected to one of the three driving lines TRG.

[0239] Here, for example, when the arrangement position of the upper left pixel 100 is represented as pixel 100 (1, 1), the upper left G pixel of the four pixels (shared pixels) included in the G pixel group 200 (1, 1) is M The contact C of the pixel 100 (1, 1) is connected to the driving line TRG-2, and the upper right G S The contact C of the pixel 100 (1, 2) is connected to the driving line TRG-3. L The contact C of the pixel 100 (2, 1) is connected to the driving line TRG-6, and the lower right G M The contact C of the pixel 100 ( 2 , 2 ) is connected to the driving line TRG- 5 .

[0240] In addition, for example, the upper left B pixel of the four pixels (shared pixels) included in the B pixel group 200 (1, 2) M The contact C of the pixel 100 (1, 3) is connected to the driving line TRG-2, and the upper right G S The contact C of the pixel 100 (1, 4) is connected to the driving line TRG-1. L The contact C of the pixel 100 (2, 3) is connected to the driving line TRG-4, and the lower right G M The contact C of the pixel 100 ( 2 , 4 ) is connected to the driving line TRG- 5 .

[0241] In this way, in the G and B pixel group 200 of the first row, the contact C of the upper left pixel 100 among the four pixels is connected to the driving line TRG-2, the contact C of the upper right pixel 100 is connected to the driving line TRG-3 or the driving line TRG-1, the contact C of the lower left pixel 100 is connected to the driving line TRG-6 or the driving line TRG-4, and the contact C of the lower right pixel 100 is connected to TRG-5.

[0242] In addition, in the second row of the R and G pixel group 200, the contact C of the upper left pixel 100 among the four pixels is connected to the driving line TRG-8, the contact C of the upper right pixel 100 is connected to the driving line TRG-9 or the driving line TRG-7, the contact C of the lower left pixel 100 is connected to the driving line TRG-12 or the driving line TRG-10, and the contact C of the lower right pixel 100 is connected to the driving line TRG-11. The connection relationship is similar to that of the G and B pixel group 200 in the first row.

[0243] Although the description is omitted to avoid repetition, the connection relationship between the G and B pixel groups 200 in the third row, the R and G pixel groups 200 in the fourth row, the G and B pixel groups 200 in the fifth row, and the R and G pixel groups 200 in the sixth row are similar to the connection relationship between the G and B pixel groups 200 in the first row and the R and G pixel groups 200 in the second row.

[0244] Here, in Fig.14 In the pixel array, focus on the area with the B pixel group 200 (1, 6) and the G pixel group 200 (1, 7) in the first row. M The upper left G pixel 100 (1, 12) and the G pixel group 200 (1, 7) M The pixel 100 ( 1 , 13 ) is configured as a phase difference pixel 100L ( 1 , 12 ) and a phase difference pixel 100R ( 1 , 13 ).

[0245] In this case, in the B pixel group 200(1,6), as Fig.14 As shown in the black circle, the upper left B SThe contact C of the pixel 100 (1, 11) is connected to the driving line TRG-1, and the upper right G M The pixel 100 ( 1 , 12 ) is connected to the driving line TRG- 2 .

[0246] As described above, the reason is as follows. In the pixel group 200 of the first row, the configuration of the pixels based on the exposure type in the B pixel group 200 (1, 6) is different from the configuration of the other B pixel groups 200. More specifically, in the other B pixel groups 200, the upper left and lower right are medium accumulation pixels (M), the upper right is a short accumulation pixel (S), and the lower left is a long accumulation pixel (L). Only in the B pixel group 200 (1, 6), the upper right and lower right are medium accumulation pixels (M), the upper left is a short accumulation pixel (S), and the lower left is a long accumulation pixel (L).

[0247] Therefore, in the B pixel group 200 (1, 6), the contacts C are arranged so that the upper left B S The contact C of the pixel 100 (1, 11) is connected to the driving line TRG-1 instead of the driving line TRG-2, and the upper right G M The contact C of the pixel 100 (1, 12) is connected to the driving line TRG-2 instead of the driving line TRG-1. As a result, the pixel 100 can be driven based on the exposure type in the pixel group 200 of the first row.

[0248] In addition, attention is paid to the area where the B pixel group 200 (5, 2) and the G pixel group 200 (5, 3) in the fifth row are provided. M The upper left G pixel 100 (9, 4) and the G pixel group 200 (5, 3) M The pixel 100 ( 9 , 5 ) is configured as a phase difference pixel 100L ( 9 , 4 ) and a phase difference pixel 100R ( 9 , 5 ).

[0249] In this case, in the B pixel group 200(5,2), as Fig.14 As shown in the black circle in FIG, the contact C is configured so that the upper left B S The contact C of the pixel 100 (9, 3) is connected to the driving line TRG-25 instead of the driving line TRG-26, and the upper right G M The pixel 100 (9, 4) is connected to the driving line TRG-26 instead of the driving line TRG-25. As a result, the pixel 100 can be driven based on the exposure type in the pixel group 200 of the fifth row as in the pixel group 200 of the first row.

[0250] In this way, in the case where three driving lines TRG are provided for each row of pixels 100, as shown in FIG. Fig.14 As shown in the pixel array, the contact C can be configured (for example, the B of the B pixel group 200 (1,6) can be reconstructed SPixel 100(1,11) and G M The contact C of the pixel 100 (1, 12) is used to read the phase difference pixel 100L and the phase difference pixel 100R at the same time. Therefore, the time of correlated double sampling (CDS) can be shortened.

[0251] Notice, Fig.13 and Fig.14 The configuration of the contacts C shown is an example, and other configurations may be employed. Fig.13 and Fig.14 In the above case, a part of the contacts C of the pixel 100 included in the pixel group 200 including the phase difference pixel 100L is reconstructed, but a part of the contacts C of the pixel 100 included in the pixel group 200 including the phase difference pixel 100R may be reconstructed. In addition, a part of the contacts C of the pixel 100 may be reconstructed in both the pixel group 200 including the phase difference pixel 100R and the pixel group 200 including the phase difference pixel 100L.

[0252] The first embodiment has been described. In the arrangement pattern adopted in the first embodiment, the pixel groups 200 each including four pixels (shared pixels) of the same color are regularly arranged. When the exposure time is adjusted for each of the four pixels in the pixel group 200, when the phase difference pixels 100L and 100R are set for the pixel array of the pixels 100 included in the pixel group 200, higher phase difference detection accuracy can be achieved.

[0253] The reason is as follows. More specifically, in the case where the phase difference pixels 100L and 100R are arranged on the pixel group 200 arranged in the Bayer array in the pixel array unit 11, a structure (2×1 OCL structure) in which the photodiode 112 of the phase difference pixel L and the photodiode 112 of the phase difference pixel 100R are arranged on one on-chip lens 111 can be adopted to improve the performance under low light intensity. For example, in the case of adopting the 2×1 OCL structure, the sensitivity of the phase difference pixel is basically twice the sensitivity in the case of using a light-shielding type phase difference pixel.

[0254] On the other hand, in the case of a structure in which each pixel group 200 includes four pixels 100 (four (2×2) pixels) of the same color, the exposure time can be adjusted for each pixel 100 to obtain a pixel signal of HDR (high dynamic range). However, in the four pixels 100 (four (2×2) pixels), different types of exposure are performed on two pixels in the row direction, so the 2×1 OCL structure cannot be adopted. Therefore, in the case of using a light-shielding phase difference pixel, the sensitivity of the phase difference pixel is reduced.

[0255] More specifically, in the case of adopting a 2×1 OCL structure, when different types of exposure are performed on two pixels in the row direction, the accuracy of phase difference detection using the phase difference signal obtained from the phase difference pixels 100L and 100R deteriorates. Therefore, it is difficult to adopt a 2×1 OCL structure for two pixels with different exposure types. In addition, in the case of using a light-shielding type (a type in which 1 / 2 of the light incident surface is shielded), the sensitivity of the phase difference pixel is basically 1 / 2, and the performance of phase difference detection using the phase difference signal obtained from the phase difference pixel deteriorates.

[0256] Therefore, in the case of a structure in which each pixel group 200 includes four pixels (shared pixels) of the same color, when the exposure time is adjusted for each pixel 100, the phase difference pixel 100L and the phase difference pixel 100R are pixels 100 of the same color adjacent to each other and are included in adjacent different pixel groups 200, so a 2×1 OCL structure is implemented in the present technology. In this way, a 2×1 OCL structure can be implemented to improve the sensitivity of the phase difference pixel, and higher phase difference detection accuracy can be achieved.

[0257] Note that in the description of the first embodiment, the exposure time is adjusted for each pixel 100 in the pixel group 200, and the pixel 100 is set to, for example, one of the long accumulation pixel (L), the medium accumulation pixel (M), and the short accumulation pixel (S) to obtain the pixel signal of HDR. However, the exposure time may not be changed for each pixel 100, and the exposure time may be the same.

[0258] Although the pixel signal of HDR cannot be obtained in the case of adopting this configuration, the phase difference pixels 100L and 100R of the 2×1 OCL structure are included in adjacent different pixel groups 200, and the configuration remains unchanged, wherein, for example, one pixel among four pixels of the G pixel group 200 is expanded to one of the B pixel group 200 or the R pixel group 200. Therefore, this configuration has the following advantages, for example.

[0259] That is, without adjusting the exposure time for each pixel 100 in the pixel group 200, there is the following advantage: the phase difference pixels 100L and 100R, which are pixels that are difficult to use to obtain image information, can be dispersed into multiple pixel groups 200 (for example, G pixel group 200 and B pixel group 200 or G pixel group 200 and R pixel group 200).

[0260] In addition, despite the Figures 8 to 15 , a driving method for pixels for performing pixel addition in the case where pixels sharing a floating diffusion region (FD) are shared is described, but when the driving method is applied, it is not necessary to adjust the exposure time for each pixel 100 in the pixel group 200.

[0261] (2) Second Implementation Method

[0262] (Pixel layout)

[0263] Fig.16 Shown is the arrangement Figure 1 FIG. 1 is a planar layout of a plurality of pixels 100 in a pixel array unit 11 .

[0264] Fig.16 Among the plurality of pixels 100 two-dimensionally arranged in the pixel array unit 11 , pixels 100 in an area of ​​32 rows and 32 columns arranged in the upper left area when viewed from the light incident side are shown.

[0265] exist Fig.16 In the pixel array unit 11, R pixel groups 200 each including four red (R) pixels (2×2 pixels), G pixel groups 200 each including four green (G) pixels (2×2 pixels), and B pixel groups 200 each including four blue (B) pixels (2×2 pixels) are regularly arranged to form a Bayer array.

[0266] In addition, the four pixels 100 of the pixel group 200 configured in the Bayer array are configured as a shared pixel, and pixel signals obtained from the four pixels 100 are added to generate a pixel signal.

[0267] In this case, the exposure time is adjusted for each pixel 100 in the pixel group 200, and the pixels 100 constituting the shared pixel include a long accumulation pixel (L), a medium accumulation pixel (M), and a short accumulation pixel (S). Therefore, the pixel signal obtained here is a pixel signal of HDR obtained by adding the long accumulation pixel signal, the medium accumulation pixel signal, and the short accumulation pixel signal.

[0268] Here, we focus on the area where the pixel group 200 (2, 3) is located, and replace B M Pixel 100(3,6) and B M The pixel 100 ( 4 , 5 ) is configured with a left light-shielded pixel 100L ( 3 , 6 ) and a left light-shielded pixel 100L ( 4 , 5 ).

[0269] like Fig.17 As shown in A, when viewed from the light incident side, the left area ( Fig.17 Note that each of the left light-shielded pixel 100L(3,6) and the left light-shielded pixel 100L(4,5) is provided with a G color filter 113 and is configured such that G M 100 pixels.

[0270] Return to Fig.16In the pixel array unit 11, in the pixel group 200 (2, 11), the pixel group 200 (6, 5), the pixel group 200 (6, 13), the pixel group 200 (10, 7), the pixel group 200 (10, 15), the pixel group 200 (10, 7), the pixel group 200 (14, 1) and the pixel group 200 (14, 9), ...) and the pixel group M Of the pixels 100 , the left light-shielded pixel 100L is arranged as the upper right and lower left pixels among four pixels, as in the pixel group 200 ( 2 , 3 ).

[0271] In addition, focus on the area where the pixel group 200 (4, 1) is located, and replace B M Pixel 100(7,2) and B M The pixel 100 ( 8 , 1 ) is configured with a right light-shielded pixel 100R ( 7 , 2 ) and a right light-shielded pixel 100R ( 8 , 1 ).

[0272] like Fig.17 As shown in B, when viewed from the light incident side, the right area ( Fig.17 Note that each of the right light-shielded pixel 100R(7,2) and the right light-shielded pixel 100R(8,1) is provided with a G color filter 113 and is configured such that G M 100 pixels.

[0273] Return to Fig.16 In the pixel array unit 11, in the pixel group 200 (4, 9), the pixel group 200 (8, 3), the pixel group 200 (8, 11), the pixel group 200 (12, 5), the pixel group 200 (12, 13), the pixel group 200 (16, 7) and the pixel group 200 (16, 15), B is replaced M Of the pixels 100 , the right light-shielded pixel 100R is arranged as the upper right and lower left pixels among four pixels, as in the pixel group 200 ( 4 , 1 ).

[0274] In this way, in the pixel array unit 11, R pixel groups 200 each including four (2×2) R pixels 100, G pixel groups 200 each including four (2×2) G pixels 100, and B pixel groups 200 each including four (2×2) B pixels 100 are arranged in a Bayer array, and a part of the pixels of the B pixel group 200 (the upper right and lower left pixels among the four pixels) are replaced with left-shielded pixels 100L or right-shielded pixels 100R.

[0275] Here, the left light shielding pixel 100L and the right light shielding pixel 100R having left-right symmetrical light shielding areas are paired as pixels for phase difference detection (phase difference pixels). Based on the left light shielding pixel signal and the right light shielding pixel signal obtained by the left light shielding pixel and the right light shielding pixel, an image for phase difference detection is generated, and the phase difference is detected.

[0276] For example, in the pixel array unit 11, a group of left-shielded pixels 100L of pixel group 200 (2, 3) and right-shielded pixels 100R of pixel group 200 (4, 1), a group of left-shielded pixels 100L of pixel group 200 (2, 11) and right-shielded pixels 100R of pixel group 200 (4, 9), and the like can be pairs of phase difference pixels.

[0277] (Cross-sectional structure of a pixel)

[0278] Fig.18 is shown in the arrangement Fig.16 sectional view of the structure of a plurality of pixels 100 in the pixel array unit 11.

[0279] Fig.18 The X1 - X1 ′ cross section of the fourth row is shown as a cross section of the pixel group 200 including the left light-shielded pixel 100L as a phase difference pixel. Fig.18 Also shown is a cross section X2 - X2 ′ of the pixels 100 of the seventh row as a cross section of the pixel group 200 excluding the phase difference pixels.

[0280] Here, when the arrangement position of the upper left pixel 100 is represented as pixel 100 (1, 3), the objects of the X1-X1' cross section include G M Pixel 100(4,3), G S Pixel 100(4,4), left light shielding pixel 100L(4,5), B S Pixel 100(4,6), G M Pixel 100(4,7), G S Pixel 100(4,8), B M Pixel 100(4,9) and B S Pixel 100(4,10).

[0281] Here, G M Pixel 100(4,3) and G S The pixel 100(4,4) is included in the G pixel group 200(2,2), and the left light shielding pixel 100L(4,5) and the B S The pixel 100 (4, 6) is included in the B pixel group 200 (2, 3). M Pixel 100(4,7) and G SThe pixel 100(4,8) is included in the G pixel group 200(2,4), while the B M Pixel 100(4,9) and B S The pixel 100 ( 4 , 10 ) is included in the B pixel group 200 ( 2 , 5 ).

[0282] like Fig.18 As shown in the X1-X1' section, in G M Pixel 100(4,3) and G S In the pixel 100(4,4), in the left light shielded pixel 100L(4,5), and in the G M Pixel 100(4,7) and G S A G color filter 113 is formed in the pixel 100 (4, 8). S In pixel 100(4,6) and in B M Pixel 100(4,9) and B S A B color filter 113 is formed in the pixel 100 ( 4 , 10 ).

[0283] That is, although it is assumed that the B color filter 113 is formed to configure the B pixel group 200 (2, 3) because the left light-shielded pixel 100L (4, 5) is included in the B pixel group 200 (2, 3), M Pixel 100, but here, a G color filter 113 is formed to construct a G M Pixel 100. Although in the description here, the light-shielded pixels such as the left light-shielded pixel 100L (4, 5) are G pixels provided with a G color filter, M Pixel 100, however, may not be provided with a color filter, and the light-shielded pixel may be configured as a white (W) pixel.

[0284] Furthermore, in the left light-shielded pixel 100L(4,5), the light-shielding portion 114 not only shields light between the left light-shielded pixel 100L(4,5) and the adjacent pixel, but also shields light to the left region of the left light-shielded pixel 100L(4,5). Therefore, the light-shielding portion 114 extends toward the light incident surface, and the incident surface of the light incident on the photodiode 112 is narrower than that of other pixels. As a result, Fig.17 As shown in A, when viewed from the light incident side, the left area of ​​the left light-shielded pixel 100L(4, 5) is shielded from light by the light-shielding portion 114.

[0285] On the other hand, the object of the X2-X2' section is G L Pixel 100(7,3), G M Pixel 100(7,4), B L Pixel 100(7,5), B M Pixel 100(7,6), G L Pixel 100(7,7), G M Pixel 100(7,8), BL Pixel 100(7,9) and B M Pixel 100(7,10).

[0286] The G color filter 113 is formed on the G L Pixel 100(7,3) and G M Pixel 100(7,4) and G L Pixel 100(7,7) and G M In pixel 100 (7, 8), B color filter 113 is formed on B L Pixel 100(7,5) and B M In pixel 100(7,6) and B L Pixel 100(7,9) and B M In pixel 100(7,10).

[0287] Although not shown, in the cross section of the right light-shielded pixel 100R, as in the left light-shielded pixel 100L, in the right light-shielded pixel 100R, the light-shielding portion 114 not only shields light between it and the adjacent pixel, but also extends toward the light incident surface. The incident surface of light incident on the photodiode 112 becomes narrower, and the right side area of ​​the right light-shielded pixel 100R is shielded. As a result, Fig.17 As shown in FIG. 1B , when viewed from the light incident side, the right side region of the right light-shielded pixel 100R is shielded from light by the light-shielding portion 114 .

[0288] The second embodiment has been described. In the arrangement pattern adopted in the second embodiment, pixel groups 200 each including four pixels (shared pixels) of the same color are regularly arranged. In the case where the exposure time is adjusted for each of the four pixels in the pixel group 200, in the structure of the phase difference pixel included in the pixel group 200, a light shielding pixel is configured for two pixels in the oblique direction (two pixels on the same diagonal line) among the four pixels.

[0289] In this way, a structure using a light-shielding pixel as a phase difference pixel is adopted, and the sensitivity of the phase difference pixel is lower than that in the first embodiment. However, it is not necessary to change the accumulation time (exposure time) of the pixel as the light-shielding pixel from the original structure, and there is an advantage that the CMOS image sensor 10 can be easily manufactured.

[0290] (3) Third Implementation Plan

[0291] Incidentally, in the 2×1 OCL structure described in the first embodiment, in the B pixel group 200, instead of the lower right B S Pixel 100, equipped with G M pixel 100, and the lower right G of the B pixel group 200 M Pixel 100 and the lower right GM The lower left G pixel of the G pixel group 200 adjacent to the pixel 100 and on the right side thereof M The pixel 100 is configured as a phase difference pixel 100L and a phase difference pixel 100R.

[0292] In this case, the color filter of the lower right pixel 100 of the B pixel group 200 is the G color filter 113 instead of the B color filter 113 , and the G pixel 100 is arranged instead of the B pixel 100 .

[0293] Here, if Fig.19 As shown, in the 2×1 OCL structure, in the B pixel group 200 (2,5), the lower right B S Pixel 100(4,10), equipped with G M Pixel 100 (4, 10). Therefore, in the entire pixel array of the pixel array unit 11, the number of G pixels 100 increases by one, while the number of B pixels 100 decreases by one.

[0294] In addition, for example, instead of the B pixel 100, the G pixel 100 is also configured in the B pixel group 200 (2,13), the B pixel group 200 (4,1), the B pixel group 200 (4,9), the B pixel group 200 (6,7), the B pixel group 200 (6,15), the B pixel group 200 (8,3), the B pixel group 200 (8,11), the B pixel group 200 (10,5), the B pixel group 200 (10,13), the B pixel group 200 (12,1), the B pixel group 200 (12,9), the B pixel group 200 (14,7), the B pixel group 200 (14,15), the B pixel group 200 (16,3) and the B pixel group 200 (16,11).

[0295] Therefore, in the entire pixel array of the pixel array unit 11 , the number of G pixels 100 is the largest, the number of R pixels 100 is the second largest, and the number of B pixels 100 is the smallest.

[0296] More specifically, the pixel array is a Bayer array in the pixel array unit 11, and the G pixel groups 200 (2×2 pixels) are arranged in a checkerboard pattern. The R pixel groups 200 (2×2 pixels) and the B pixel groups 200 (2×2 pixels) are arranged alternately column by column in the remaining portion. Therefore, the number of R pixels 100 and the number of B pixels 100 are the same, and the number of G pixels 100 is twice the number of B pixels 100. As a result, when the G pixels 100 are arranged instead of the B pixels 100, the number of B pixels 100 is less than the number of R pixels 100.

[0297] Here, in the case where normal pixels are arranged in a Bayer array, the G color filter may be formed first to prevent (or alternatively, alleviate) the color filter formed in each pixel from being easily peeled off when the color filter is formed in each pixel.

[0298] In the 2×1 OCL structure according to the present technology, the G color filter 113 may also be formed first to prevent (or, alternatively, mitigate) the color filter 113 formed on each pixel 100 from being easily peeled off when the color filter 113 is formed. In this case, the color filter to be formed after the G color filter 113 may be, for example, the R color filter 113 and the B color filter 113 arranged in descending order of pixels.

[0299] Fig. 20 Depicted is a diagram showing the arrangement of Fig.19 A cross-sectional view of the structure of a plurality of pixels 100 in a pixel array unit 11. Fig. 20 In the embodiment, although the X1-X1′ cross section includes the phase difference pixels 100L and 100R, the X2-X2′ cross section does not include the phase difference pixels 100L and 100R.

[0300] Here, if Fig. 20 As shown in the X1-X1' section and the X2-X2' section of FIG. 1 , the color filter 113 is formed in the following order.

[0301] First, a G color filter 113 is formed in the G pixel 100. M Pixel 100(4,7) and G S In pixel 100(4,8), in G M Pixel 100(4,10) Medium, G M Pixel 100(4,11) and G S In pixel 100(4,12), in G L Pixel 100(7,7) and G M In pixel 100(7,8) and in G L Pixel 100(7,11) and G M Pixel 100(7,12) Medium.

[0302] Next, the R color filter 113 is formed in the R pixel 100 .

[0303] Finally, a B color filter 113 is formed in the B pixel 100, as shown in FIG. S In pixel 100(4,9), in B M Pixel 100(4,13) and B S In pixel 100(4,14), in B L Pixel 100(7,9) and B M In pixel 100(7,10) and in BL Pixel 100(7,13) and B M Pixel 100(7,14) Medium.

[0304] The step of forming the color filter 113 in the pixel array including the pixel of the 2×1 OCL structure of the first embodiment (including the manufacturing method of the step) has been described in the third embodiment. In the step of forming the color filter 113 in the pixel array including the pixel of the 2×1 OCL structure in the third embodiment, the color filter 113 is formed in the order of, for example, the G filter 113, the R filter 113, and the B filter 113, and the G filter 113 is formed first. This can prevent (or, alternatively, reduce) the color filter 113 from being easily peeled off.

[0305] (4) Fourth Implementation Plan

[0306] Incidentally, although the phase difference pixels 100L and 100R are arranged in a 2×1 OCL structure in the pixel array described in the first embodiment, a structure other than the 2×1 OCL structure may be adopted. Here, examples of structures that can be adopted include a structure in which one on-chip lens 111 is arranged for four (2×2) pixels (photodiodes 112 of pixels) included in each pixel group 200 (hereinafter, also referred to as a 2×2 OCL structure) and a structure in which a 2×1 OCL structure is arranged in a row direction (hereinafter, also referred to as a 2×1 OCL×2 structure).

[0307] Therefore, a case where a 2×2 OCL structure and a 2×1 OCL×2 structure are adopted as examples of other structures of the phase difference pixels 100L and 100R will be described in the fourth embodiment.

[0308] (2×2OCL structure)

[0309] Fig.21 Shown is the arrangement Figure 1 Another structure of the plurality of pixels 100 in the pixel array unit 11 is shown.

[0310] Fig.21 Shows Fig.21 The plan layout of the plurality of pixels 100 on the left side and shows Fig.21 A cross section of a plurality of pixels 100 on the right side of FIG. Fig.21 In Figure 4 As in FIG. 1 , the configuration position of the upper left pixel 100 is represented as pixel 100 (1, 7).

[0311] Here, a 2×2 OCL structure is adopted as the structure of the phase difference pixels 100L and 100R, and in the G pixel group including the B pixel group 200 (2, 5), MG pixel 100 (4, 10), G pixel group 200 (2, 6) M G pixel 100 (4, 11), G pixel group 200 (3, 5) M The G pixel 100 (5, 10) and the R pixel group 200 (3, 6) M One on-chip lens 111A is provided on four pixels of the pixel 100 (5, 11).

[0312] Fig.21 As cross sections of the pixel group 200 including the phase difference pixels 100L and 100R, an X1-X1′ cross section of the pixels 100 in the fourth row and an X2-X2′ cross section of the pixels 100 in the fifth row are shown. Fig.21 Also shown is a cross section X3 - X3 ′ of the pixels 100 of the seventh row, which is a cross section of the pixel group 200 excluding the phase difference pixels 100L and 100R.

[0313] like Fig.21 As shown in the X1-X1' section, in G M Pixel 100(4,7) and G S In pixel 100(4,8), in G M In pixel 100(4,10) and in G M Pixel 100(4,11) and G S A G color filter 113 is formed in the pixel 100 (4, 12), and a B color filter 113 is formed in the pixel 100 (4, 12). S In pixel 100(4,9), in B M Pixel 100(4,13) and B S A B color filter 113 is formed in the pixel 100 ( 4 , 14 ).

[0314] That is, although due to G M The pixel 100 (4, 10) is included in the B pixel group 200 (2, 5) and it is assumed that the B color filter 113 is formed to construct the B S Pixel 100, but here, a G color filter 113 is formed to change the configuration of the contacts, thereby constructing a G M 100 pixels.

[0315] Note that in the B pixel group 200(2,5), the lower left B M Pixel 100(4,9) becomes B S Pixel 100 (4, 9), and the four pixels include a short accumulation pixel (S) as well as a long accumulation pixel (L) and a medium accumulation pixel (M).

[0316] In addition, Fig.21 In the X2-X2' section, at R L Pixel 100(5,7) and R MIn pixel 100(5,8) and in R L The pixel 100 (5, 12) is provided with an R color filter 113, and a G color filter 114 is provided. L Pixel 100(5,9) and G M In pixel 100(5,10), in G M In pixel 100(5,11) and in G L Pixel 100(5,13) and G M A G color filter 113 is formed in the pixel 100 ( 5 , 14 ).

[0317] That is, although due to G M The pixel 100 (5, 11) is included in the R pixel group 200 (3, 6) and it is assumed that an R color filter 113 is formed to configure the R L Pixel 100, but here, a G color filter 113 is formed to change the configuration of the contacts, thereby constructing a G M 100 pixels.

[0318] Note that in the R pixel group 200(3,6), the upper right R M Pixel 100(5,12) becomes R L Pixel 100 (5, 12), and the four pixels include a long accumulation pixel (L) as well as a short accumulation pixel (S) and a medium accumulation pixel (M).

[0319] In this manner, a G pixel is provided at the lower right of the B pixel group 200 (2, 5) for one on-chip lens 111A. M The photodiode 112L provided on the pixel 100 (4, 10) U , at the lower left G of the G pixel group 200(2,6) M The photodiode 112R provided on the pixel 100 (4, 11) U , in the upper right G of the G pixel group 200 (3,5) M The photodiode 112L provided on the pixel 100 (5, 10) D And in the upper left G of the R pixel group 200 (3,6) M The photodiode 112R provided on the pixel 100 (5, 11) D , to construct a 2×2 OCL structure.

[0320] In addition, in the pixel array unit 11, G M Pixel 100(4,10) and G M The pixel 100 (5, 10) is configured as a phase difference pixel 100L, and G M Pixel 100(4,11) and G MThe pixel 100 (5, 11) is configured as a phase difference pixel 100R. Therefore, the phase difference between two images can be detected based on the pixel signals obtained from the phase difference pixels 100L and 100R.

[0321] Notice, Fig.21 The X3-X3' section shown is Figure 4 The X2-X2' section shown is similar and its description is omitted here.

[0322] (2×1OCL×2 structure)

[0323] Fig. 22 Shown is the arrangement Figure 1 Another structure of the plurality of pixels 100 in the pixel array unit 11 is shown.

[0324] like Fig.21 Same as in Fig. 22 Shows Fig. 22 The plan layout of the plurality of pixels 100 on the left side and shows Fig. 22 A cross section of a plurality of pixels 100 on the right side.

[0325] Here, a 2×1 OCL×2 structure is adopted as the structure of the phase difference pixels 100L and 100R, and for the G pixel group including the B pixel group 200 (2, 5), M The G pixel 100 (4, 10) and the G pixel group 200 (2, 6) M One on-chip lens 111A is provided for two pixels of the pixel 100 (4, 11). In the column below the on-chip lens 111A, a lens 111A is provided for the G pixel group 200 (3, 5) including the G pixel group 200 (3, 5). M The G pixel 100 (5, 10) and the R pixel group 200 (3, 6) M One on-chip lens 111B is provided for two pixels of the pixel 100 (5, 11).

[0326] Fig. 22 As cross sections of the pixel group 200 including the phase difference pixels 100L and 100R, an X1-X1′ cross section of the pixels 100 in the fourth row and an X2-X2′ cross section of the pixels 100 in the fifth row are shown. Fig. 22 Also shown is a cross section X3 - X3 ′ of the pixels 100 of the seventh row, which is a cross section of the pixel group 200 excluding the phase difference pixels 100L and 100R.

[0327] although Fig. 22 The X1-X1' section and the X2-X2' section shown have similar Fig.21 The structure of the X1-X1' cross section and the X2-X2' cross section shown in the figure, but for one on-chip lens 111A, there is a G lens at the lower right of the B pixel group 200 (2, 5). MThe photodiode 112L provided on the pixel 100 (4, 10) and the lower left G pixel of the G pixel group 200 (2, 6) M The photodiode 112R provided on the pixel 100 (4, 11) is configured to Fig. 22 The upper 2×1 OCL structure.

[0328] In addition, a G pixel group 200 (3, 5) is provided on the one on-chip lens 111B at the upper right G pixel group 200 (3, 5). M The photodiode 112L provided on the pixel 100 (5, 10) and the upper left G of the R pixel group 200 (3, 6) M The photodiode 112R provided on the pixel 100 (5, 11) is configured to Fig. 22 The upper 2×1 OCL structure and the lower 2×1 OCL structure constitute a 2×1 OCL×2 structure.

[0329] In addition, in the pixel array unit 11, the upper G M Pixel 100(4,10) and Lower G M The pixel 100 (5, 10) is configured as a phase difference pixel 100L, with the upper G M Pixel 100(4,11) and Lower G M The pixel 100 (5, 11) is configured as a phase difference pixel 100R. Therefore, the phase difference between two images can be detected based on the pixel signals obtained from the phase difference pixels 100L and 100R.

[0330] Notice, Fig. 22 The X3-X3' section shown is similar to Figure 4 The X2-X2' section shown is omitted here.

[0331] (Example of pixel reading)

[0332] Next, refer to Fig.23 and Fig.24 In adopting Fig.21 An example of reading the pixel 100 in the case of the 2×2 OCL structure shown will be described.

[0333] like Figure 5 Same as in Fig.23 FIG. 2 shows a partial area of ​​a pixel area arranged in the pixel array unit 11, and the pixel group 200 includes four pixels 100. Figure 5 In the description, Fig.23 , the configuration position of the upper left pixel 100 is represented as pixel 100(1,1), but Fig.23 Corresponding to the adoption Fig.21 The pixel array of the case of a 2×2 OCL structure is shown.

[0334] exist Fig.23 In Figure 5 As in the example, the four pixels 100 included in the pixel group 200 share the floating diffusion region FD, and are driven from the vertical drive circuit 12 ( Figure 1 ) supplies driving signals (TRG, SEL) for the transmission transistor TR-Tr and the selection transistor SEL-Tr.

[0335] Because in Fig.23 In this case, a 2×2 OCL structure is used instead of a 2×1 OCL structure, so not only the lower right B pixel of the B pixel group 200 (3, 2) S Pixel 100(6,4) is constructed as G M Pixel 100, and the upper left R of R pixel group 200 (4, 3) L Pixel 100(7,5) is also configured as G M Pixel 100. Note that in the B pixel group 200 (3, 2), the lower left B pixel 100 is a B S Pixel 100(6,3). In addition, in the R pixel group 200(4,3), the upper right R pixel 100 is R L Pixel 100(7,6).

[0336] Therefore, in the B pixel group 200(3,2), the lower left B S The contact C-63 of the pixel 100 (6, 3) is connected to the driving line TRG5 instead of the driving line TRG4. M The contact C-64 of the pixel 100 (6, 4) is connected to the driving line TRG4 instead of the driving line TRG5. In addition, in the R pixel group 200 (4, 3), the upper left G M The contact C-75 of the pixel 100(7,5) is connected to the driving line TRG3 instead of the driving line TRG2, and the upper right R L Contact C-76 of pixel 100(7,6) is connected to drive line TRG2 instead of drive line TRG3.

[0337] The contact C may be configured (the contact C may be reconfigured) in this manner to drive the pixels 100 based on the exposure type in the pixel group 200 of the third and fourth rows including the phase difference pixels 100L and 100R of the 2×2 OCL structure.

[0338] More specifically, in Fig.23In the embodiment, the drive signal SEL1 enters the L level, and the selection transistor SEL-Tr shared by the pixel groups 200 of the first and second rows enters the off state. On the other hand, the drive signal SEL0 enters the H level, and the selection transistor SEL-Tr shared by the pixel groups 200 of the third and fourth rows enters the on state. In this way, the pixel group 200 of the third row or the fourth row is selected.

[0339] In this case, if Fig.23 As shown, only the driving signal TRG4 among the driving signals TRG0 to TRG7 is at the H level, and among the four pixels included in the pixel group 200 in the third row, the G pixel group 200 (3, 1) in the first column is at the H level. M The G pixel 100 (6, 1) and the B pixel group 200 (3, 2) in the second column M pixel 100(6,4), G pixel group 200(3,3) in the third column M The pixel 100 (6, 5) and the B pixel group 200 (3, 4) in the fourth column M Each transfer transistor TR-Tr of the pixel 100 (6, 7) enters an on state.

[0340] In this way, the Fig.23 The thick frame surrounded by G M Pixel 100(6,1), G M Pixel 100(6,4), G M Pixel 100(6,5) and B M The charges generated by each photodiode 112 of the pixel 100 (6, 7) are transferred to the corresponding floating diffusion region FD. M Pixel 100(6,1), G M Pixel 100(6,4), G M Pixel 100(6,5) and B M The pixels 100 ( 6 , 7 ) are both medium accumulation pixels (M) and can be driven by the same driving signal TRG4 .

[0341] As a result, the G of the phase difference pixel 100L(6,4) is read. M The charge accumulated in the photodiode 112 of the pixel 100 (6, 4) and the charge accumulated in the G configured as the phase difference pixel 100R (6, 5) M The charge accumulated in the photodiode 112 of the pixel 100 (6, 5).

[0342] Then, if Fig.24As shown, the driving signal TRG at the H level is switched from TRG4 to TRG5, and among the four pixels of the pixel group 200 in the third row, the G pixel group 200 (3, 1) in the first column is S pixel 100(6,2), the B pixel group 200(3,2) of the second column S The G pixel 100 (6, 3), the G pixel group 200 (3, 3) in the third column S The pixel 100 (6, 6) and the B pixel group 200 (3, 4) in the fourth column S Each transfer transistor TR-Tr of the pixel 100 (6, 8) enters a conductive state.

[0343] In this way, the Fig.24 The thick frame surrounded by G S Pixel 100(6,2), B S Pixel 100(6,3), G S Pixel 100(6,6) and B S The charges generated by each photodiode 112 of the pixel 100 (6, 8) are transferred to the corresponding floating diffusion region FD. S Pixel 100(6,2), B S Pixel 100(6,3), G S Pixel 100(6,6) and B S The pixels 100 ( 6 , 8 ) are both short accumulation pixels (S) and can be driven by the same driving signal TRG5 .

[0344] Similarly, the drive signals TRG6 and TRG7 are sequentially switched to the H level, and charges are read from the photodiodes of the four pixels included in each pixel group 200 of the third row, and the charges are transferred to the floating diffusion region FD shared by the four pixels. In addition, the charges transferred from the respective photodiodes 112 of the four pixels are added in the floating diffusion region FD, and a voltage according to the added charges is input to the amplifier transistor AMP-Tr. The subsequent processing performed by the column signal processing circuit 13 is the same as that described above with reference to FIG. Figures 8 to 10 The details are similar and are omitted here.

[0345] In addition, although not shown, only the driving signal TRG2 among the driving signals TRG0 to TRG7 similarly enters the H level, and among the four pixels included in the pixel group 200 of the fourth row, the R pixel group 200 (4, 1) of the first column is turned on. L pixel 100(7,1), G pixel group 200(4,2) in the second column L The R pixel 100 (7, 3) and the R pixel group 200 (4, 3) in the third column LThe G pixel 100 (7, 6) and the G pixel group 200 (4, 4) in the fourth column L Each transfer transistor TR-Tr of the pixel 100 ( 7 , 7 ) enters an on state.

[0346] In this way, R L Pixel 100(7,1), G L Pixel 100(7,3), R L Pixel 100(7,6) and G L The charges generated by each photodiode 112 of the pixel 100 (7, 7) are transferred to the corresponding floating diffusion region FD. L Pixel 100(7,1), G L Pixel 100(7,3), R L Pixel 100(7,6) and G L The pixels 100 ( 7 , 7 ) are both long accumulation pixels (L) and can be driven by the same driving signal TRG2 .

[0347] Subsequently, although not shown, the driving signal TRG at the H level is similarly switched from TRG2 to TRG3, and among the four pixels included in the pixel group 200 of the fourth row, the R pixel group 200 (4, 1) of the first column is turned on. M pixel 100(7,2), G pixel group 200(4,2) in the second column M The G pixel 100 (7, 4) and the R pixel group 200 (4, 3) in the third column M The G pixel 100 (7, 5) and the G pixel group 200 (4, 4) in the fourth column M Each transfer transistor TR-Tr of the pixel 100 (7, 8) enters an on state.

[0348] In this way, R M Pixel 100(7,2), G M Pixel 100(7,4), G M Pixel 100(7,5) and G M The charges generated by each photodiode 112 of the pixel 100 (7, 8) are transferred to the corresponding floating diffusion region FD. M Pixel 100(7,2), G M Pixel 100(7,4), G M Pixel 100(7,5) and G M The pixels 100 ( 7 , 8 ) are both medium accumulation pixels (M) and can be driven by the same driving signal TRG3 .

[0349] Despite Fig.23 and Fig.24 The use of Fig.21 An example of reading a pixel 100 in the case of a 2×2 OCL structure shown in FIG. Fig. 22 In the case of the 2×1 OCL×2 structure shown, the pixel 100 can also be read similarly.

[0350] <3. Modifications>

[0351] (Other examples of exposure time)

[0352] In the above case, the exposure time is adjusted based on three types of exposures including three stages of T1, T2 and T3, and a long accumulation pixel signal, a medium accumulation pixel signal and a short accumulation pixel signal are obtained. However, the number of stages in the adjustment of the exposure time is not limited to three, as long as there are two or more. For example, two types of exposures including two stages of T1 and T3 can be adjusted, and a long accumulation pixel signal and a short accumulation pixel signal can be obtained.

[0353] Fig.25 In the case of two types of exposure, a configuration example in which the phase difference pixel 100L and the phase difference pixel 100R are arranged in the adjacent pixel group 200 is shown.

[0354] exist Fig.25 There are two types of exposure in , and four pixels (2×2 pixels) of the pixel group 200 configured in the Bayer array include two long accumulation pixels (L) and two short accumulation pixels (S) arranged on the same diagonal line.

[0355] Here, if Fig.25 As shown in A, for the lower right B included in the lower left B pixel group 200 S The photodiode 112 of the pixel 100 and the lower left G pixel group 200 included in the lower right G pixel group 200 L When the photodiode 112 of the pixel 100 is provided with an on-chip lens 111, its structure is as follows: Fig.25 As shown in B.

[0356] More specifically, during manufacturing, the lower right B filter 113 included in the lower left B pixel group 200 is replaced with the B color filter 113. S The color filter of the pixel 100 is set to be a G filter 113, and forms a G L Pixel 100. In addition, here, although B S Pixel 100 is a short accumulation pixel (S), but for example, in G L In the pixel 100 , the arrangement of the contacts C is changed, and the exposure time is set to a long accumulation exposure time to form a long accumulation pixel (L).

[0357] As a result, the G pixels included in the lower left B pixel group 200 are L The pixel 100 and the G pixel group 200 included in the lower right G pixel group L The pixel 100 is configured as a pixel 100 including a photodiode provided on one on-chip lens 111, and G L The pixel 100 includes a G color filter 113 and has a long cumulative exposure time. L The pixel 100 is configured as a phase difference pixel 100L and a phase difference pixel 100R.

[0358] In the configuration described here, although there are two types of exposure instead of the three types of exposure in the case of the 2×1 OCL structure described in the first embodiment, the case of the shading pixel described in the second embodiment is similarly not limited to three types of exposure, and for example, there may be two types of exposure.

[0359] Fig.26 The configuration in which light-shielding pixels are arranged on the pixel group 200 in the case of two types of exposure is shown.

[0360] exist Fig.26 There are two types of exposure in , and the four pixels (2×2 pixels) of the pixel group 200 configured in the Bayer array include two long accumulation pixels (L) and two short accumulation pixels (S) arranged on the same diagonal line.

[0361] Here, the upper right B pixel group 200 is included in the lower left B pixel group 200. L Pixel 100 and lower left B L When the pixel 100 is a left light shielding pixel 100L, the structure is as follows: Fig.26 shown.

[0362] More specifically, during manufacturing, the upper right B filter 113 included in the lower left B pixel group 200 is replaced with the B color filter 113. L Pixel 100 and lower left B L The color filter of the pixel 100 is set to be a G filter 113, and forms a G L Pixel 100. In this case, with B L Pixel 100 similar, G L The pixel 100 is a long accumulation pixel (L), and it is not necessary to adjust the exposure time.

[0363] In this manner, when viewed from the light incident side, the G pixels arranged at the upper right and lower left of the lower left B pixel group 200 are L The left area of ​​pixel 100 is shielded from light, and G L The pixel 100 is configured as a left light shielding pixel 100L. As a result, the upper right and lower left G pixels of the four pixels of the lower left B pixel group 200 are LThe pixel 100 is a left light-shielded pixel 100L.

[0364] Although the case where the left light-shielded pixels 100L are arranged on the B pixel group 200 is described here, for example, instead of the B light-shielded pixels 100L arranged on the upper right and lower left of the B pixel group 200, L The pixel 100 may be configured similarly as the right light-shielding pixel 100R.

[0365] (Other Configuration Examples of Phase Difference Pixels)

[0366] In the case shown in the first embodiment, Figure 2 In the 2×1 OCL structure of the pixel array unit 11, the phase difference pixel 100L and the phase difference pixel 100R are included in the adjacent B pixel group 200 and the G pixel group 200. However, the phase difference pixel 100L and the phase difference pixel 100R may be included in other pixel groups 200. For example, in addition to the adjacent B pixel group 200 and the G pixel group 200, the phase difference pixel 100L and the phase difference pixel 100R may also be included in the adjacent R pixel group 200 and the G pixel group 200.

[0367] Fig. 27 The configuration example is shown in which the phase difference pixels 100L and the phase difference pixels 100R are arranged in the adjacent R pixel group 200 and the G pixel group 200 , respectively, in addition to the adjacent B pixel group 200 and the G pixel group 200 .

[0368] like Figure 2 Same as in Fig. 27 Among the plurality of pixels 100 two-dimensionally arranged in the pixel array unit 11 , the pixels 100 arranged in an area of ​​32 rows and 32 columns in the upper left area when viewed from the light incident side are shown.

[0369] exist Fig. 27 In the pixel array unit 11 , the combination of the B pixel group 200 and the G pixel group 200 is as follows, wherein the lower right phase difference pixel 100L of the B pixel group 200 and the lower left phase difference pixel 100R of the G pixel group 200 have a 2×1 OCL structure.

[0370] That is, each combination of the B pixel group 200 (2, 5) and the G pixel group 200 (2, 6), the B pixel group 200 (2, 13) and the G pixel group 200 (2, 14), the B pixel group 200 (6, 7) and the G pixel group 200 (6, 8), the B pixel group 200 (6, 15) and the G pixel group 200 (6, 16), the B pixel group 200 (10, 5) and the G pixel group 200 (10, 6), the B pixel group 200 (10, 13) and the G pixel group 200 (10, 14), the B pixel group 200 (14, 7) and the G pixel group 200 (14, 8), and the B pixel group 200 (14, 15) and the G pixel group 200 (14, 16) has a 2×1 OCL structure.

[0371] In these B pixel groups 200, instead of the lower right B S Pixel 100, equipped with G M pixel 100, and the lower right G of the B pixel group 200 M Pixel 100 and the lower right G M The lower left G pixel of the G pixel group 200 adjacent to the pixel 100 and on the right side thereof M The pixel 100 is configured as a phase difference pixel 100L and a phase difference pixel 100R.

[0372] In addition, Fig. 27 In the pixel array unit 11 , the combination of the R pixel group 200 and the G pixel group 200 is as follows, wherein the lower right phase difference pixel 100L of the R pixel group 200 and the lower left phase difference pixel 100R of the G pixel group 200 have a 2×1 OCL structure.

[0373] That is, each combination of the R pixel group 200 (3, 2) and the G pixel group 200 (3, 3), the R pixel group 200 (3, 10) and the G pixel group 200 (3, 11), the R pixel group 200 (7, 4) and the G pixel group 200 (7, 5), the R pixel group 200 (7, 12) and the G pixel group 200 (7, 13), the R pixel group 200 (11, 2) and the G pixel group 200 (11, 3), the R pixel group 200 (11, 10) and the G pixel group 200 (11, 11), the R pixel group 200 (15, 4) and the G pixel group 200 (15, 5), and the R pixel group 200 (15, 12) and the G pixel group 200 (15, 13) has a 2×1 OCL structure.

[0374] In these R pixel groups 200, instead of the lower right R S Pixel 100, equipped with G M Pixel 100, and the lower right G of the R pixel group 200 M Pixel 100 and the lower right G M The lower left G pixel of the G pixel group 200 adjacent to the pixel 100 and on the right side thereofM The pixel 100 is configured as a phase difference pixel 100L and a phase difference pixel 100R.

[0375] Notice, Figure 2 , Fig. 27 The arrangement pattern of the pixel array unit 11 shown in FIG. 1 is an example of the arrangement of the phase difference pixels 100L and the phase difference pixels 100R dispersedly arranged in a repeated pattern in the first embodiment, and the phase difference pixels 100L and the phase difference pixels 100R may be arranged in other patterns as long as a plurality of phase difference pixels 100L and the phase difference pixels 100R are arranged side by side at a certain interval. In addition, although the case where the color pixel groups 200 are regularly arranged in the Bayer array in the pixel array unit 11 is described in the example of the first embodiment, other arrangement patterns may be adopted.

[0376] In addition, in the description of the first embodiment, although the phase difference pixel 100L and the phase difference pixel 100R in the 2×1 OCL structure are adjusted to the same exposure time, that is, the medium accumulation exposure time, the phase difference pixel 100L and the phase difference pixel 100R can be adjusted to other exposure times, such as long accumulation and short accumulation exposure times. In addition, although the exposure time of the phase difference pixel 100L and the phase difference pixel 100R is preferably the same, the exposure time may be different.

[0377] In the case shown in the second embodiment, Fig.16 In the structure of the light-shielded pixels in the pixel array unit 11, a part of the pixels of the B pixel group 200 (for example, the upper right and lower left pixels among the four pixels) are replaced with the left light-shielded pixels 100L or the right light-shielded pixels 100R. However, a part of the pixels of the R pixel group 200 or the G pixel group 200 can be replaced with the left light-shielded pixels 100L or the right light-shielded pixels 100R.

[0378] In addition, instead of the same color pixel group 200, the left light-shielded pixel 100L and the right light-shielded pixel 100R may be configured on different color pixel groups 200. For example, in the case where the left light-shielded pixel 100L is configured as a part of the pixel of the B pixel group 200, the right light-shielded pixel 100R may be configured as a part of the pixel of the G pixel group 200.

[0379] Notice, Fig.16The arrangement pattern of the pixel array unit 11 shown is an example of the arrangement of the left light-shielding pixels 100L and the right light-shielding pixels 100R dispersedly arranged in a repeating pattern in the second embodiment, and the left light-shielding pixels 100L and the right light-shielding pixels 100R may be arranged in other patterns as long as a plurality of left light-shielding pixels 100L and right light-shielding pixels 100R are arranged side by side at a certain interval. In addition, although the case where the color pixel groups 200 are regularly arranged in the Bayer array in the pixel array unit 11 is described in the example of the second embodiment, other arrangement patterns may be adopted.

[0380] (Other examples of phase difference pixels)

[0381] Note that in the above description, the phase difference pixel 100L and the phase difference pixel 100R as two (2×1) pixels included in each of the left and right pixel groups 200 adjacent to each other are described as a 2×1 OCL structure, a 2×2 OCL structure, or a 2×1 OCL×2 structure. However, two pixels configured as a phase difference pixel are not limited to a combination of left and right pixels 100 adjacent to each other in the row direction.

[0382] For example, there may be a combination of a phase difference pixel 100U and a phase difference pixel 100D which are two (1×2) pixels included in each pixel group 200 adjacent to each other in the column direction. In this case, the photodiode 112 of the phase difference pixel 100U and the photodiode 112 of the phase difference pixel 100D are arranged on one on-chip lens 111 in a structure (which can be said to be a 1×2 OCL structure).

[0383] (Other examples of shading pixels)

[0384] In addition, in the above description, the left light-shielded pixel 100L as a pixel whose left area is shaded and the right light-shielded pixel 100R as a pixel whose right area is shaded are described as light-shielded pixels. However, the light-shielded pixels are not limited to the combination of light-shielded pixels having left-right symmetrical light-shielded areas, as long as the light-shielded pixels are shaded in the same direction. For example, for the light-shielded pixels, a combination of an upper light-shielded pixel 100U as a pixel whose upper area is shaded and a lower light-shielded pixel 100D as a pixel whose lower area is shaded can be used as a light-shielded pixel having a light-shielded area that is symmetrical up and down.

[0385] (Other Examples of Solid-State Imaging Devices)

[0386] In addition, in the example described in the embodiment, the present technology is applicable to a CMOS image sensor including pixels arranged in two dimensions. However, the present technology can be applied not only to CMOS image sensors, but also to solid-state imaging devices such as CCD (charge coupled device) image sensors that generally include pixels arranged in two dimensions.

[0387] In addition, the present technology can be applied not only to solid-state imaging devices that capture images by detecting the distribution of the incident light amount of visible light, but also to solid-state imaging devices that generally capture images of the distribution of the incident light amount of infrared rays, X-rays, particles, etc.

[0388] Although the pixel group 200 includes adjacent pixels 100 (four pixels) of the same color in the above description, the pixel group including four pixels (shared pixel) can be regarded as a pixel including four divided pixels (shared pixel). When the present technology is applied, the pixel group including four pixels and the pixel including four divided pixels have substantially the same meaning.

[0389] <4. Composition of electronic equipment>

[0390] Fig.28 : is a block diagram showing a configuration example of an electronic device including a solid-state imaging device according to the disclosed technology.

[0391] The electronic device 1000 is an electronic device having an imaging function, for example, an imaging device such as a digital camera or a video camera, and a mobile terminal device such as a smartphone or a tablet terminal.

[0392] The electronic device 1000 includes a lens unit 1011, an imaging unit 1012, a signal processing unit 1013, a control unit 1014, a display unit 1015, a recording unit 1016, an operation unit 1017, a communication unit 1018, a power supply unit 1019, and a driving unit 1020. In addition, in the electronic device 1000, the signal processing unit 1013, the control unit 1014, the display unit 1015, the recording unit 1016, the operation unit 1017, the communication unit 1018, and the power supply unit 1019 are connected to each other via a bus 1021.

[0393] The lens unit 1011 includes a zoom lens, a focus lens, and the like, and condenses light from a subject. The light condensed by the lens unit 1011 (subject light) enters the imaging unit 1012 .

[0394] The imaging unit 1012 includes an image sensor such as an image sensor according to the technology of the present disclosure (e.g., Figure 1 The image sensor as the imaging unit 1012 photoelectrically converts the light (subject light) received through the lens unit 1011 into an electrical signal, and supplies the signal obtained as a result of the photoelectric conversion to the signal processing unit 1013.

[0395] Note that the pixel array unit of the image sensor includes a plurality of pixels regularly arranged in a predetermined arrangement pattern, including pixels (normal pixels) that generate signals for forming a captured image based on subject light and pixels (phase difference pixels) that generate signals for performing phase difference detection.

[0396] For example, in the above-mentioned CMOS image sensor 10 ( Figure 1 ), normal pixels are equivalent to R pixels 100 (R pixel group 200), G pixels 100 (G pixel group 200) and B pixels 100 (B pixel group 200), and phase difference pixels are equivalent to phase difference pixels (phase difference pixels 100L and 100R) and shading pixels (left shading pixel 100L and right shading pixel 100R).

[0397] The signal processing unit 1013 is a signal processing circuit that processes the signal supplied from the imaging unit 1012. For example, the signal processing unit 1013 includes a DSP (Digital Signal Processor) circuit or the like.

[0398] The signal processing unit 1013 processes the signal from the imaging unit 1012 to generate image data of a still image or a moving image, and supplies the image data to the display unit 1015 or the recording unit 1016. The signal processing unit 1013 generates data for detecting a phase difference (data for phase difference detection) based on the signal from the imaging unit 1012 (phase difference pixels of the image sensor), and supplies the data to the control unit 1014.

[0399] For example, the control unit 1014 includes a CPU (Central Processing Unit), a microprocessor, etc. The control unit 1014 controls the operation of each component of the electronic device 1000 .

[0400] The display unit 1015 includes, for example, a display device such as a liquid crystal panel and an organic EL (Electro Luminescence) panel, etc. The display unit 1015 processes image data supplied from the signal processing unit 1013 , and displays a still image or a moving image captured by the imaging unit 1012 .

[0401] The recording unit 1016 includes, for example, a recording medium such as a semiconductor memory and a hard disk. The recording unit 1016 records the image data supplied from the signal processing unit 1013. The recording unit 1016 also provides recorded image data according to control from the control unit 1014.

[0402] For example, the operation unit 1017 includes physical buttons and a touch panel combined with the display unit 1015. The operation unit 1017 outputs operation instructions regarding various functions of the electronic device 1000 according to user operations. The control unit 1014 controls the operation of each component based on the operation instructions supplied from the operation unit 1017.

[0403] For example, the communication unit 1018 includes a communication interface circuit, etc. The communication unit 1018 exchanges data with an external device through wireless communication or wired communication according to a predetermined communication standard.

[0404] The power supply unit 1019 appropriately supplies various power sources as operation power sources of the signal processing unit 1013 , the control unit 1014 , the display unit 1015 , the recording unit 1016 , the operation unit 1017 , and the communication unit 1018 to these supply targets.

[0405] The control unit 1014 also detects the phase difference between the two images based on the data for phase difference detection supplied from the signal processing unit 1013. Then, based on the detection result of the phase difference, the control unit 1014 determines whether the object as the focus target (the object to be focused) is focused. In the case where the focus target is not focused, the control unit 1014 calculates the focus offset amount (defocus amount) and supplies the amount to the drive unit 1020.

[0406] For example, the driving unit 1020 includes a motor and the like, and drives the lens unit 1011 including a zoom lens, a focus lens, and the like.

[0407] The drive unit 1020 calculates the drive amount of the focus lens of the lens unit 1011 based on the defocus amount supplied from the control unit 1014, and moves the focus lens according to the drive amount. Note that the drive unit 1020 maintains the current position of the focus lens when the object to be focused is focused.

[0408] The electronic device 1000 is constructed in this manner.

[0409] As described above, the present technology is applicable to an imaging unit 1012 such as an image sensor. Specifically, the CMOS image sensor 10 ( Figure 1 ) can be applied to the imaging unit 1012. By applying the present technology to the imaging unit 1012 such as an image sensor, for the pixels arranged in the pixel array unit, an arrangement pattern is adopted in which pixel groups (including shared pixels of four pixels sharing FD) each including adjacent pixels of the same color are regularly arranged. In the case of adjusting the exposure time for each pixel in the pixel group (shared pixel), when the phase difference pixel is set on the pixel array of the pixel included in the pixel group, a more appropriate phase difference pixel can be set.

[0410] <5. Example of use of solid-state imaging device>

[0411] Fig.29 A usage example of the solid-state imaging device according to the disclosed technology is shown.

[0412] For example, the CMOS image sensor 10 ( Figure 1 ) can be used for various situations where light such as visible light, infrared light, ultraviolet light or X-rays is sensed, as described below. More specifically, as Fig.29 As shown, for example, the CMOS image sensor 10 can be used not only in the appreciation field in which images to be used for appreciation are captured, but also in devices used in the fields of transportation, home appliances, health care, security, beauty, sports, agriculture, etc.

[0413] Specifically, in the field of appreciation, for example, the CMOS image sensor 10 can be used in a device for photographing an image to be used for appreciation (for example, Fig.28 electronic devices 1000), such as digital cameras, smart phones, and mobile phones with camera functions.

[0414] In the field of transportation, for example, the CMOS image sensor 10 can be used in devices used for transportation, such as vehicle-mounted sensors that capture images of the front, rear, surroundings, and interior of a car, surveillance cameras that monitor moving vehicles or roads, and ranging sensors that measure the distance between vehicles, etc., for safe driving such as automatic parking or for identifying the driver's condition.

[0415] In the field of home appliances, for example, the CMOS image sensor 10 can be used in devices used as home appliances that capture images of user's gestures to perform device operations according to the gestures, such as televisions, refrigerators, and air conditioners. In addition, in the field of medical care, for example, the CMOS image sensor 10 can be used in devices used for medical treatment or health care, such as endoscopes and devices that capture images of blood vessels by receiving infrared light.

[0416] In the field of security, for example, the CMOS image sensor 10 can be used in devices for security, such as surveillance cameras for crime prevention and cameras for personal identification, etc. In addition, in the field of beauty, for example, the CMOS image sensor 10 can be used in devices for beauty, such as a skin measurement meter that takes an image of the skin and a microscope that takes an image of the scalp, etc.

[0417] In the field of sports, for example, the CMOS image sensor 10 can be used in devices for sports, such as sports cameras and wearable cameras for sports, etc. In addition, in the field of agriculture, for example, the CMOS image sensor 10 can be used in devices for agriculture, such as cameras for monitoring the conditions of farms or agricultural products, etc.

[0418] <6. Application example of mobile body>

[0419] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device installed on a mobile body such as a car, an electric car, a hybrid electric car, a motorcycle, a bicycle, a personal mobile device, an airplane, a drone, a ship, and a robot.

[0420] Fig.30 : is a block diagram showing a schematic configuration example of a vehicle control system as an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0421] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. Fig.30 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a main body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio and video output unit 12052, and an in-vehicle network I / F (interface) 12053 are shown.

[0422] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 serves as a control device for a drive force generating device such as an internal combustion engine and a drive motor for generating a drive force of the vehicle, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, and the like.

[0423] The main body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the main body system control unit 12020 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a taillight, a brake light, a turn signal light, and a fog light. In this case, a radio wave transmitted from a portable device instead of a key or a signal of various switches may be input to the main body system control unit 12020. The main body system control unit 12020 receives the input of the radio wave or the signal and controls the door lock device, the power window device, the light, etc. of the vehicle.

[0424] The vehicle exterior information detection unit 12030 detects information outside the vehicle provided with the vehicle control system 12000. For example, the imaging unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the vehicle exterior and receive the captured image. The vehicle exterior information detection unit 12030 can perform object detection processing or distance detection processing on a person, a car, an obstacle, a sign, or text on a road, etc. based on the received image.

[0425] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or output the electrical signal as distance measurement information. In addition, the light received by the imaging unit 12031 may be visible light or may be invisible light such as infrared rays.

[0426] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 that detects the state of the driver. For example, the driver state detection unit 12041 includes a camera that images the driver, and based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue or concentration, or can determine whether the driver is dozing off.

[0427] The microcomputer 12051 can calculate the control target value of the driving force generation device, the steering mechanism or the braking device based on the information inside and outside the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and can output a control instruction to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control to achieve the functions of an ADAS (Advanced Driver Assistance System) including collision avoidance or collision mitigation of vehicles, tracking driving based on the distance between vehicles, driving at a constant speed, vehicle collision warning, lane departure warning of vehicles, etc.

[0428] The microcomputer 12051 can also control the driving force generating device, steering mechanism, braking device, etc. based on the information about the vehicle surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040 to perform coordinated control, aiming to achieve automatic driving such as autonomous driving without relying on the driver's operation.

[0429] The microcomputer 12051 can also output a control instruction to the main system control unit 12020 based on the information outside the vehicle obtained by the vehicle exterior information detection unit 12030. For example, based on the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030, the microcomputer 12051 can control the headlights to perform coordinated control for preventing glare such as switching the high beam to the low beam.

[0430] The audio and image output unit 12052 transmits an output signal of at least one of audio and image to an output device capable of visually or auditorily conveying information to a vehicle occupant or outside the vehicle. Fig.30 In the example of FIG. 1 , as output devices, an audio speaker 12061, a display unit 12062, and a dashboard 12063 are shown. For example, the display unit 12062 may include at least one of an in-vehicle display and a head-up display.

[0431] Fig.31 An example of the installation position of the imaging unit 12031 is shown.

[0432] exist Fig.31 In the figure, as the imaging unit 12031, imaging units 12101, 12102, 12103, 12104 and 12105 are provided.

[0433] Imaging units 12101, 12102, 12103, 12104, and 12105 are disposed at locations such as the front of the vehicle 12100, the side mirrors, the rear bumper, the rear door, the upper side of the windshield in the vehicle, etc. The imaging unit 12101 installed at the front of the vehicle and the imaging unit 12105 installed at the upper side of the windshield in the vehicle mainly obtain images in front of the vehicle 12100. The imaging units 12102 and 12103 installed at the side mirrors mainly obtain images on the sides of the vehicle 12100. The imaging unit 12104 installed at the rear bumper or the rear door mainly obtains images at the rear of the vehicle 12100. The imaging unit 12105 installed at the upper side of the windshield in the vehicle is mainly used to detect vehicles in front, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0434] Notice, Fig.31Examples of imaging ranges of imaging units 12101 to 12104 are shown. Imaging range 12111 represents the imaging range of imaging unit 12101 disposed at the front of the vehicle. Imaging ranges 12112 and 12113 respectively represent the imaging ranges of imaging units 12102 and 12103 disposed at side mirrors. Imaging range 12114 represents the imaging range of imaging unit 12104 disposed at the rear bumper or rear door. For example, multiple pieces of image data imaged by imaging units 12101 to 12104 are superimposed on each other, thereby obtaining a bird's-eye view image when viewed from above vehicle 12100.

[0435] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element including pixels for phase difference detection.

[0436] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each solid object within the imaging range 12111 to 12114 and the time change of the distance (relative to the speed of the vehicle 12100). As a result, in particular, the microcomputer 12051 can extract the closest solid object located on the driving route of the vehicle 12100 and traveling at a predetermined speed (for example, 0 km / h or more) in the same direction as the vehicle 12100 as the front vehicle. The microcomputer 12051 can also set a pre-secured distance to the front vehicle to perform automatic braking control (including tracking travel stop control), automatic acceleration control (including tracking travel start control), etc. In this way, the microcomputer 12051 can perform coordinated control aimed at, for example, autonomous driving that is autonomous and does not rely on the driver's operation.

[0437] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data of the three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and can extract data to automatically avoid obstacles using the data. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that can be visually identified by the driver of the vehicle 12100 and obstacles that are difficult to visually identify. Then, the microcomputer 12051 can determine the collision risk indicating the degree of danger of collision with each obstacle. When the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 can output a warning to the driver via the audio speaker 12061 or the display unit 12062 or perform forced deceleration or evasive steering via the drive system control unit 12010, thereby supporting the drive for avoiding the collision.

[0438] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may determine whether a pedestrian exists in the captured images of the imaging units 12101 to 12104 to identify the pedestrian. For example, the pedestrian is identified by extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras and performing pattern matching processing on a series of feature points indicating the outline of the object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the captured images of the imaging units 12101 to 12104 and identifies the pedestrian, the audio image output unit 12052 controls the display unit 12062 to display and superimpose a rectangular contour line on the identified pedestrian, thereby emphasizing the pedestrian. The audio image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired location, etc.

[0439] This completes the description of an example of a vehicle control system to which the technology of the present disclosure can be applied. The technology of the present disclosure can be applied to the imaging unit 12031 in the above-mentioned components. Specifically, Figure 1 The CMOS image sensor 10 can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, automatic focus control based on phase difference detection can be performed. In addition, in the technology according to the present disclosure, for example, a higher phase difference detection accuracy can be achieved by setting a more suitable phase difference pixel. Therefore, a higher quality captured image can be obtained, thereby more accurately identifying obstacles such as pedestrians.

[0440] Note that the embodiments of the present technology are not limited to the above-described embodiments, and various changes can be made without departing from the scope of the present technology.

[0441] Furthermore, the present technology can be configured as follows.

[0442] (1) A solid-state imaging device comprising:

[0443] A pixel array unit comprising a plurality of pixels arranged two-dimensionally, wherein

[0444] The pixel array unit has an arrangement pattern including regularly arranged pixel groups, each pixel group including adjacent pixels of the same color, and

[0445] Among the plurality of pixels, pixels for phase difference detection each including one of the plurality of photoelectric conversion elements formed on one on-chip lens are pixels of the same color adjacent to each other included in adjacent different pixel groups.

[0446] (2) The solid-state imaging device according to (1), wherein

[0447] The pixel group includes four pixels of 2×2, and

[0448] The pixel for phase difference detection is one pixel among four pixels included in the pixel group.

[0449] (3) The solid-state imaging device according to one or more of (1) to (2), wherein

[0450] The phase difference detection pixels include a first phase difference pixel and a second phase difference pixel which are two pixels of 2×1 each included in left and right pixel groups adjacent to each other.

[0451] (4) The solid-state imaging device according to one or more of (1) to (3), wherein

[0452] adjusting the exposure time for each pixel included in the pixel group, and

[0453] The first phase difference pixel and the second phase difference pixel are adjusted to have the same exposure time.

[0454] (5) The solid-state imaging device according to one or more of (1) to (4), wherein

[0455] The pixel group includes a shared pixel that shares a pixel circuit with an adjacent pixel and shares a floating diffusion region.

[0456] (6) The solid-state imaging device according to one or more of (1) to (5), wherein

[0457] In the pixel array unit,

[0458] The plurality of pixels are arranged in a matrix, and

[0459] The first phase difference pixels and the second phase difference pixels are regularly arranged at predetermined pixel intervals in the row direction and the column direction.

[0460] (7) The solid-state imaging device according to one or more of (1) to (6), wherein

[0461] The first phase difference pixel and the second phase difference pixel are pixels among the plurality of pixels adjusted to the same exposure time among the four pixels included in the pixel group.

[0462] (8) The solid-state imaging device according to one or more of (1) to (7), wherein

[0463] The four pixels included in the pixel group include a first pixel adjusted to a first exposure time, a second pixel adjusted to a second exposure time shorter than the first exposure time, and a third pixel adjusted to a third exposure time having a length between the first exposure time and the second exposure time, and

[0464] When there are a plurality of third pixels, both the first phase difference pixel and the second phase difference pixel are third pixels.

[0465] (9) The solid-state imaging device according to one or more of (1) to (8), wherein

[0466] The four pixels included in the pixel group include a first pixel adjusted to a first exposure time and a second pixel adjusted to a second exposure time shorter than the first exposure time, and

[0467] When there are a plurality of first pixels, both the first phase difference pixel and the second phase difference pixel are first pixels.

[0468] (10) The solid-state imaging device according to one or more of (1) to (9), wherein

[0469] The phase difference detection pixels include a first phase difference pixel and a second phase difference pixel, and

[0470] The charges accumulated in the photoelectric conversion element of the first phase difference pixel and the charges accumulated in the photoelectric conversion element of the second phase difference pixel are simultaneously transferred to different floating diffusion regions.

[0471] (11) The solid-state imaging device according to one or more of (1) to (10), wherein

[0472] The contact of the first phase difference pixel and the contact of the second phase difference pixel are electrically connected to the same driving line.

[0473] (12) The solid-state imaging device according to one or more of (1) to (11), wherein

[0474] In the pixel array unit,

[0475] The plurality of pixels are arranged in a matrix.

[0476] The pixel group includes four pixels of 2×2,

[0477] The contacts of the four pixels included in the pixel group are arranged in the same connection manner in the row direction and the column direction, and

[0478] Contacts of four pixels included in the first pixel group including the first phase difference pixel correspond to contacts of four pixels included in other pixel groups in the same row, and are arranged and connected to the same driving line according to exposure time of each pixel.

[0479] (13) The solid-state imaging device according to one or more of (1) to (12), wherein

[0480] In the pixel array unit

[0481] The plurality of pixels are arranged in a matrix.

[0482] The pixel group includes four pixels of 2×2,

[0483] The contacts of the four pixels included in the pixel group are arranged in the same connection manner as the pixel group of the same color in the row direction and the column direction, and

[0484] The contacts of four pixels included in the first pixel group including the first phase difference pixel correspond to the contacts of four pixels included in other pixel groups of the same color in the same row, and are arranged and connected to the same driving line according to the exposure time of each pixel.

[0485] (14) The solid-state imaging device according to one or more of (1) to (13), wherein

[0486] The plurality of pixels include red (R) pixels, green (G) pixels, and blue (B) pixels according to red (R), green (G), and blue (B) color filters, and

[0487] The first phase difference pixel and the second phase difference pixel are pixels selected from among red (R), green (G), and blue (B).

[0488] (15) The solid-state imaging device according to one or more of (1) to (14), wherein

[0489] The array pattern is a Bayer array.

[0490] (16) The solid-state imaging device according to one or more of (1) to (15), wherein

[0491] The first phase difference pixel and the second phase difference pixel are green (G) pixels,

[0492] The first phase difference pixel is included in a blue (B) pixel group, and the second phase difference pixel is included in a green (G) pixel group, and

[0493] At the time of manufacturing, the color filters are formed in the order of a green (G) color filter, a red (R) color filter, and a blue (B) color filter.

[0494] (17) A solid-state imaging device comprising:

[0495] A pixel array unit comprising a plurality of pixels arranged two-dimensionally, wherein

[0496] The pixel array unit has an arrangement pattern including regularly arranged pixel groups, each pixel group including adjacent pixels of the same color,

[0497] adjusting the exposure time for each pixel included in the pixel group, and

[0498] A specific pixel group among the plurality of pixel groups arranged in the arrangement pattern includes light-shielded pixels in which a part of the light incident side is shielded as pixels for phase difference detection.

[0499] (18) The solid-state imaging device according to (17), wherein

[0500] The pixel group includes four pixels of 2×2, and

[0501] In the specific pixel group, when viewed from the light incident side, two pixels on the same diagonal line adjusted to the same exposure time are first shielded pixels as pixels shielded from light in the left area or second shielded pixels as pixels shielded from light in the right area.

[0502] (19) The solid-state imaging device according to one or more of (17) to (18), wherein

[0503] In the pixel array unit,

[0504] The plurality of pixels are arranged in a matrix.

[0505] The first pixel group including the first light-shielding pixel is regularly arranged at a predetermined pixel interval in a row direction,

[0506] The second pixel group including the second light-shielding pixel is regularly arranged at a predetermined pixel interval in the row direction, and

[0507] The first pixel group and the second pixel group are regularly arranged at a predetermined pixel interval in a column direction.

[0508] (20) An electronic device comprising:

[0509] An imaging unit including a solid-state imaging device, the solid-state imaging device including

[0510] A pixel array unit including a plurality of pixels arranged two-dimensionally,

[0511] The pixel array unit has an arrangement pattern including regularly arranged pixel groups, each pixel group including adjacent pixels of the same color, and

[0512] The phase difference detection pixels are pixels of the same color adjacent to each other included in adjacent different pixel groups, wherein each of the plurality of pixels includes one of a plurality of photoelectric conversion elements formed on one on-chip lens, and

[0513] A control unit that performs automatic focus control based on a result of phase difference detection obtained from the output of the pixel for phase difference detection.

[0514] (21) An imaging device comprising:

[0515] A pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group including only normal pixels or ii) a mixed pixel group including at least one normal pixel and at least one phase difference detection pixel, wherein

[0516] For each group of common pixels, the common pixels receive light transmitted through a color filter of the same color, and

[0517] For each hybrid pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel, and receives light transmitted through a color filter of the same color as the at least one other phase difference detection pixel.

[0518] (22) The imaging device according to (21), wherein

[0519] Each pixel group of the plurality of pixel groups includes a 2×2 array of four pixels, and

[0520] For the mixed pixel group, the four pixels include the at least one phase difference detection pixel.

[0521] (23) The imaging device according to one or more of (21) to (22), wherein

[0522] The at least one phase difference detection pixel includes a first phase difference detection pixel, the at least one other phase difference detection pixel includes a second phase difference detection pixel, and the first phase difference detection pixel and the second phase difference detection pixel are adjacent to each other and belong to different mixed pixel groups.

[0523] (24) The imaging device according to one or more of (21) to (23), wherein

[0524] The contact of the first phase difference detection pixel and the contact of the second phase difference detection pixel are electrically connected to the same driving line.

[0525] (25) The imaging device according to one or more of (21) to (24), wherein

[0526] The contacts of the common pixels in each pixel group of the plurality of pixel groups are electrically connected to the corresponding driving lines to control the exposure time for each common pixel, and

[0527] The contact of the first phase difference detection pixel and the contact of the second phase difference detection pixel are electrically connected to the same driving line, so that the first phase difference detection pixel and the second phase difference detection pixel have the same exposure time.

[0528] (26) The imaging device according to one or more of (21) to (25), further comprising:

[0529] a plurality of floating diffusion regions, each floating diffusion region being used for a corresponding pixel group; and

[0530] A plurality of pixel circuits, each pixel circuit being used for a corresponding pixel group.

[0531] (27) The imaging device according to one or more of (21) to (26), wherein

[0532] The plurality of pixel groups are arranged in a matrix, and

[0533] The mixed pixel groups are arranged at predetermined intervals in the row direction and the column direction.

[0534] (28) The imaging device according to one or more of (21) to (27), wherein

[0535] Each pixel group of the plurality of pixel groups includes four pixels arranged in a 2×2 array,

[0536] The at least one phase difference detection pixel includes a first phase difference detection pixel,

[0537] The at least one other phase difference detection pixel includes a second phase difference detection pixel, and

[0538] The first and second phase difference detection pixels have the same exposure time.

[0539] (29) The imaging device according to one or more of (21) to (28), wherein

[0540] The four pixels include a first normal pixel having a first exposure time and a second normal pixel having a second exposure time shorter than the first exposure time, and

[0541] The same exposure time of the first phase difference detection pixel and the second phase difference detection pixel is between the first exposure time and the second exposure time.

[0542] (30) The imaging device according to one or more of (21) to (29), wherein

[0543] The four pixels include a first normal pixel having a first exposure time and a second normal pixel having a second exposure time shorter than the first exposure time, and

[0544] The same exposure time of the first phase difference detection pixel and the second phase difference detection pixel is a first exposure time.

[0545] (31) The imaging device according to one or more of (21) to (30), wherein

[0546] The first phase difference detection pixel and the second phase difference detection pixel are coupled to different floating diffusion regions.

[0547] (32) The imaging device according to one or more of (21) to (31), wherein

[0548] The plurality of pixel groups are arranged in a matrix.

[0549] Each pixel group of the plurality of pixel groups includes first, second, third and fourth pixels arranged in a 2×2 array,

[0550] each first pixel comprises a first contact, each second pixel comprises a second contact, each third pixel comprises a third contact, and each fourth pixel comprises a fourth contact,

[0551] The first contacts are aligned with each other in the row direction and the column direction, the second contacts are aligned with each other in the row direction and the column direction, the third contacts are aligned with each other in the row direction and the column direction, and the fourth contacts are aligned with each other in the row direction and the column direction, and

[0552] Each first contact is connected to the same first driving line, each second contact is connected to the same second driving line, each third contact is connected to the same third driving line, and each fourth contact is connected to the same fourth driving line.

[0553] (33) The imaging device according to one or more of (21) to (32), wherein

[0554] The normal pixel, the first phase difference detection pixel, and the second phase difference detection pixel are red pixels, green pixels, or blue pixels according to red, green, and blue color filters.

[0555] (34) The imaging device according to one or more of (21) to (33), wherein

[0556] The pixel groups are arranged in a Bayer array pattern.

[0557] (35) The imaging device according to one or more of (21) to (34), wherein

[0558] The first phase difference detection pixel and the second phase difference detection pixel are green pixels, and

[0559] The first phase difference detection pixel is included in a mixed pixel group having a normal pixel as a blue pixel, and the second phase difference detection pixel is included in the other mixed pixel group having a normal pixel as a green pixel.

[0560] (36) An imaging device comprising:

[0561] A pixel array unit comprising a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group comprising only normal pixels or ii) a mixed pixel group comprising at least one normal pixel and a first phase difference detection pixel whose incident light is partially blocked, wherein

[0562] For each group of common pixels, the common pixels receive light transmitted through a color filter of the same color, and

[0563] For each hybrid pixel group, the first phase difference detection pixel has a single corresponding on-chip lens.

[0564] (37) The imaging device according to (36), wherein

[0565] Each pixel group includes four pixels arranged in a 2×2 array,

[0566] Each hybrid pixel group includes a second phase difference detection pixel whose incident light is partially blocked.

[0567] For each mixed pixel group, the first phase difference detection pixel and the second phase difference detection pixel are diagonal to each other and have the same exposure time, and

[0568] For each mixed pixel group, when viewed from the light incident side, the first and second phase difference detection pixels are partially shielded from light on the left area or the right area.

[0569] (38) The imaging device according to one or more of (36) to (37), wherein

[0570] The plurality of pixel groups are arranged in a matrix, and

[0571] The mixed pixel groups are arranged at predetermined intervals in the row direction and the column direction.

[0572] (39) An imaging device according to one or more of (36) to (38), wherein some of the mixed pixel groups include first and second phase difference detection pixels that are shielded from light on the left area, and other pixel groups in the mixed pixel groups include first and second phase difference detection pixels that are shielded from light on the right area.

[0573] (40) An electronic device comprising:

[0574] An imaging device, comprising:

[0575] A pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group including only normal pixels or ii) a mixed pixel group including at least one normal pixel and at least one phase difference detection pixel, wherein

[0576] For each group of common pixels, the common pixels receive light transmitted through a color filter of the same color, and

[0577] For each hybrid pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel and receives light transmitted through a color filter of the same color as the at least one other phase difference detection pixel; and

[0578] A control unit performs automatic focus control based on an output of at least one phase difference detection pixel in each mixed pixel group.

[0579] [reference numerals list]

[0580] 10 CMOS Image Sensor

[0581] 11 Pixel Array Unit

[0582] 12 Vertical drive circuit

[0583] 21 pixel drive lines

[0584] 22 vertical signal lines

[0585] 100 pixels

[0586] 100L,100R phase difference pixels

[0587] 100L Left shading pixel

[0588] 100R right shading pixel

[0589] 111 On-chip lens

[0590] 112 Photodiode

[0591] 113 Color Filters

[0592] 114 Shading part

[0593] 200 pixel group

[0594] 210 Comparator

[0595] 220 DAC

[0596] 1000 Electronic equipment

[0597] 1012 Imaging Unit

[0598] 1014 Control Unit

[0599] 1020 Driver

[0600] 12031 Imaging Unit

Claims

1. An imaging device, comprising: A pixel array unit comprising a plurality of pixel groups, wherein the plurality of pixel groups comprise a normal pixel group and a mixed pixel group, wherein the normal pixel group comprises only normal pixels, and the mixed pixel group comprises at least one normal pixel and at least one phase difference detection pixel, wherein For each group of common pixels, the common pixels receive light transmitted through a color filter of the same color, For each hybrid pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel adjacent to the at least one phase difference detection pixel, and receives light transmitted through a color filter of the same color as the at least one other phase difference detection pixel, and The pixels in the common pixel group have different exposure times; and The floating diffusion region, whose potential is modulated according to the amount of accumulated charge, Each pixel group of the plurality of pixel groups includes four pixels arranged in a 2×2 array, For the mixed pixel group, the four pixels include the at least one phase difference detection pixel, The at least one phase difference detection pixel includes a first phase difference detection pixel, the at least one other phase difference detection pixel includes a second phase difference detection pixel, and the first phase difference detection pixel and the second phase difference detection pixel are adjacent to each other, belong to different mixed pixel groups, and have the same exposure time.

2. The imaging device according to claim 1, wherein The contact of the first phase difference detection pixel and the contact of the second phase difference detection pixel are electrically connected to the same driving line.

3. The imaging device according to claim 1, wherein The contacts of the common pixels in each pixel group of the plurality of pixel groups are electrically connected to the corresponding driving lines to control the exposure time for each common pixel, and The contact of the first phase difference detection pixel and the contact of the second phase difference detection pixel are electrically connected to the same driving line, so that the first phase difference detection pixel and the second phase difference detection pixel have the same exposure time.

4. The imaging device according to claim 1, further comprising: A plurality of pixel circuits, each pixel circuit being used for a corresponding pixel group, wherein The floating diffusion regions are used for corresponding pixel groups.

5. The imaging device according to claim 3, wherein The plurality of pixel groups are arranged in a matrix, and The mixed pixel groups are arranged at predetermined intervals in the row direction and the column direction.

6. The imaging device according to claim 1, wherein The four pixels include a first normal pixel having a first exposure time and a second normal pixel having a second exposure time shorter than the first exposure time, and The same exposure time of the first phase difference detection pixel and the second phase difference detection pixel is between the first exposure time and the second exposure time.

7. The imaging device according to claim 1, wherein The four pixels include a first normal pixel having a first exposure time and a second normal pixel having a second exposure time shorter than the first exposure time, and The same exposure time of the first phase difference detection pixel and the second phase difference detection pixel is a first exposure time.

8. The imaging device according to claim 4, wherein The first phase difference detection pixel and the second phase difference detection pixel are coupled to different floating diffusion regions.

9. The imaging device according to claim 1, wherein The plurality of pixel groups are arranged in a matrix. Each pixel group of the plurality of pixel groups includes first, second, third and fourth pixels arranged in a 2×2 array, each first pixel comprises a first contact, each second pixel comprises a second contact, each third pixel comprises a third contact, and each fourth pixel comprises a fourth contact, The first contacts are aligned with each other in the row direction and the column direction, the second contacts are aligned with each other in the row direction and the column direction, the third contacts are aligned with each other in the row direction and the column direction, and the fourth contacts are aligned with each other in the row direction and the column direction, and Each first contact is connected to the same first driving line, each second contact is connected to the same second driving line, each third contact is connected to the same third driving line, and each fourth contact is connected to the same fourth driving line.

10. The imaging device according to claim 1, wherein The normal pixel, the first phase difference detection pixel, and the second phase difference detection pixel are red pixels, green pixels, or blue pixels according to red, green, and blue color filters.

11. The imaging device according to claim 10, wherein The pixel groups are arranged in a Bayer array pattern.

12. The imaging device according to claim 11, wherein The first phase difference detection pixel and the second phase difference detection pixel are green pixels, and The first phase difference detection pixel is included in a mixed pixel group having a normal pixel as a blue pixel, and the second phase difference detection pixel is included in the other mixed pixel group having a normal pixel as a green pixel.

13. An imaging device, comprising: A pixel array unit comprising a plurality of pixel groups, wherein the plurality of pixel groups include a normal pixel group and a mixed pixel group, wherein the normal pixel group includes only normal pixels, and the mixed pixel group includes at least one normal pixel and a first phase difference detection pixel whose incident light is partially blocked, wherein For each group of common pixels, the common pixels receive light transmitted through a color filter of the same color, For each hybrid pixel group, the first phase difference detection pixel has a single corresponding on-chip lens, and The pixels in the common pixel group have different exposure times; and The floating diffusion region, whose potential is modulated according to the amount of accumulated charge, Each pixel group includes four pixels arranged in a 2×2 array, Each mixed pixel group includes a second phase difference detection pixel whose incident light is partially blocked, and for each mixed pixel group, the first phase difference detection pixel and the second phase difference detection pixel are diagonally opposite to each other and have the same exposure time, and For each mixed pixel group, when observed from the light incident side, some of the mixed pixel groups include the first phase difference detection pixels and the second phase difference detection pixels that are shielded on the left area, and other pixel groups in the mixed pixel group include the first phase difference detection pixels and the second phase difference detection pixels that are shielded on the right area.

14. The imaging device according to claim 13, wherein The plurality of pixel groups are arranged in a matrix, and The mixed pixel groups are arranged at predetermined intervals in the row direction and the column direction.

15. An electronic device, comprising: An imaging device, the imaging device being the imaging device according to claim 1; and A control unit performs automatic focus control based on an output of at least one phase difference detection pixel in each mixed pixel group.

Images