Lead frame, semiconductor package and method

Abstract

A lead frame, a semiconductor package, and a method are disclosed. In an embodiment, the lead frame includes: a first conductive portion and a second conductive portion, each of the first conductive portion and the second conductive portion having an outer surface and an inner surface, the outer surface being arranged to provide a substantially coplanar outer contact area having a footprint, the inner surface being opposite to the outer surface, the first portion being separated from the second portion by a gap; a first recess being arranged in the inner surface of the first portion; a second recess being arranged in the inner surface of the second portion; and a first conductive insert being arranged in and extending between the first recess and the second recess and bridging the gap between the first portion and the second portion.

Description

Background Art

[0001] A semiconductor package may include one or more semiconductor devices in a housing. The package may include a substrate or lead frame that includes external contacts that are used to mount the electronic component on a redistribution board such as a printed circuit board. The package also includes internal electrical connections from the semiconductor device to the substrate or lead frame. The housing may include a plastic molding compound that covers the semiconductor device and the internal electrical connections. Summary of the invention

[0002] In an embodiment, the lead frame includes: a first conductive portion and a second conductive portion, each of the first conductive portion and the second conductive portion having an external surface and an internal surface, the external surface being arranged to provide a substantially coplanar external contact area having a footprint, the internal surface being opposite to the external surface, and the first portion being separated from the second portion by a gap; a first recess being arranged in the internal surface of the first portion; a second recess being arranged in the internal surface of the second portion; and a first conductive insert being arranged in the first recess and the second recess and extending between the first recess and the second recess, and bridging the gap between the first portion and the second portion.

[0003] In an embodiment, a semiconductor package includes a first semiconductor device and a lead frame, the lead frame including a first conductive portion and a second conductive portion, each of the first conductive portion and the second conductive portion having an outer surface and an inner surface, the outer surface being arranged to provide a substantially coplanar outer contact area having a footprint, the inner surface being opposite to the outer surface, the first portion being separated from the second portion by a gap, a first recess being arranged in the inner surface of the first portion, a second recess being arranged in the inner surface of the second portion, and a first conductive insert being arranged in and extending between the first recess and the second recess and bridging the gap between the first portion and the second portion. The insert forms a portion of an inner conductive redistribution structure between the first semiconductor device and the outer contact area of ​​the lead frame.

[0004] In an embodiment, a method for preparing a semiconductor package includes: providing a conductive lead frame, the conductive lead frame including: a first part and a second part, each of the first part and the second part having an external surface and an internal surface, the external surface providing an external contact area, the internal surface opposite to the external surface, the first part being separated from the second part by a gap; a first recess, arranged in the internal surface of the first part; and a second recess, arranged in the internal surface of the second part; inserting a conductive insert into the first recess and the second recess so that it extends from the first recess to the second recess and bridges the gap between the first part and the second part; mechanically attaching the insert to the first recess and the second recess; and mounting a first semiconductor device on the first part of the lead frame.

[0005] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The elements of the drawings are not necessarily to scale with respect to each other. The same reference numerals designate corresponding similar parts. The features of the various illustrated embodiments may be combined unless they exclude each other. Exemplary embodiments are depicted in the drawings and are detailed in the subsequent description.

[0007] Figure 1 illustrates a cross-sectional view of a lead frame for a semiconductor package;

[0008] Figure 2 illustrates a cross-sectional view of a lead frame and a conductive insert for use in a semiconductor package;

[0009] Figure 3 illustrates a cross-sectional view of a lead frame, a conductive insert, and a semiconductor device;

[0010] Figure 4 illustrates a bond between a portion of a lead frame and a conductive insert;

[0011] Figure 5 A flow chart illustrating a method for preparing a lead frame;

[0012] Figure 6 A flow chart illustrating a method for preparing a semiconductor package;

[0013] Figure 7 illustrating a perspective view of a lead frame and a plurality of conductive inserts;

[0014] Figure 8 illustrates a plan view of a semiconductor package including a lead frame, a plurality of inserts, and three semiconductor devices;

[0015] Figure 9 includes 9A to 9H , illustrating the method for preparing Figure 8 A method for semiconductor packaging. DETAILED DESCRIPTION

[0016] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof and in which are shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terms are used with reference to the orientation of the (multiple) figures being described, such as "top", "bottom", "front", "rear", "head", "tail", etc. descriptions. Because the components of the embodiments can be positioned in many different orientations, the directional terms are used for illustrative purposes rather than limiting. It should be understood that other embodiments may be utilized and that structural or logical changes may be made without departing from the scope of the invention. The following detailed description of the invention should not be viewed in a limiting sense, and the scope of the invention is defined by the appended claims.

[0017] A number of exemplary embodiments will be explained below. In this case, identical structural features are identified by identical or similar reference symbols in the various figures. In the context of this description, "lateral" or "lateral direction" should be understood to mean a direction or extent generally parallel to the lateral extent of the semiconductor material or semiconductor carrier. The lateral direction therefore generally extends parallel to these surfaces or sides. In contrast, the term "vertical" or "vertical direction" is understood to mean a direction generally perpendicular to these surfaces or sides and therefore perpendicular to the lateral direction. The vertical direction therefore runs in the thickness direction of the semiconductor material or semiconductor carrier.

[0018] As used in this specification, when an element such as a layer, region, or substrate is referred to as being "on" or "extending onto" another element, it may be directly on or directly extend onto the other element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "extending directly onto" another element, there are no intervening elements.

[0019] As used in this specification, when an element is referred to as being "connected to" or "coupled to" another element, it may be directly connected or coupled to the other element, or there may be intervening elements. Conversely, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements.

[0020] A lead frame and a semiconductor package are provided, the lead frame including an additional conductive component, and the semiconductor package includes a lead frame having an additional conductive component. The additional separated conductive component can be used as a part of the internal redistribution structure provided by the lead frame, and can bridge the gap between the parts of the lead frame. By using additional components attached to the upper surface of the lead frame, the internal redistribution structure can be decoupled from the layout of the lead frame on its lower surface. The additional flexibility of the internal redistribution structure can be used to provide additional functions for the package, such as current sensing or source sensing. The conductive component can also be positioned on a portion of the lead of the lead frame to increase the available area on which a bonding connection can be formed. This makes it possible to optimize the position of the bonding wiring within the package to better avoid the intersection and edge of the device within the package. The package reliability can be improved.

[0021] Figure 1 A cross-sectional view of a lead frame 10 for a semiconductor package according to an embodiment is illustrated. In the cross-sectional view, a first conductive portion 11 and a second conductive portion 12 of the lead frame 10 can be seen. The first portion 11 is separated from the second portion 12 by a gap 13. The first portion 11 has an outer surface 14 and an inner surface 17 and the second portion 12 has an outer surface 15 and an inner surface 18, the outer surfaces 14, 15 being arranged to provide a substantially coplanar outer contact area 16 having a footprint, the inner surfaces 17, 18 being opposite the outer surfaces 14, 15. The inner surfaces 17, 18 of one or both of the portions 11 and 12 may be used to support a semiconductor device and may be a die pad, or one or both of the portions may provide one or more leads of the lead frame 10. The lead frame 10 includes a first recess 19 arranged in the inner surface 17 of the first portion 11 and a second recess 20 arranged in the inner surface 18 of the second portion 12.

[0022] The first recess 19 extends to the side 21 of the first part 11 of the lead frame so that the recess 19 has a bottom 28 and an open side 23, and provides a terrace or tread of the step. The first recess 19 is bounded on the remaining three sides 24 by side walls formed by the first part 11. The second recess 20 has a similar shape and extends to the side 22 of the second part 12 of the lead frame so that the second recess 20 has a bottom 29 and an open side 25, and is bounded on the remaining three sides 26 by side walls formed from the second part 12. The open sides 23, 25 of the recesses 19, 20 face each other.

[0023] The first recess 19 may have a depth D1 that is substantially the same as a depth D2 of the second recess 20. The thickness of the first lead frame portion 11 and the second lead frame portion 12 is reduced in a region below the first recess 19 and the second recess 20 compared to a region outside the first recess 19 and the second recess 20. However, the outer surfaces 14, 15 of the first portion 11 and the second portion 12 are substantially planar.

[0024] In other embodiments, the first recess 19 and / or the second recess 20 may be open on both sides and may be formed in a corner region of a substantially square or rectangular portion of the lead frame 10. The first recess 19 and / or the second recess 20 may be open on three sides by extending across the width of the first portion or the second portion, respectively.

[0025] Figure 2 A cross-sectional view of two parts 11, 12 of a lead frame 10 and an additional conductive insert 27 is shown, which is arranged between and extends between the first recess 19 and the second recess 20 and bridges the gap 13 between the first part 11 and the second part 12 of the lead frame 10. Opposite ends of the insert 27 are attached to the bottoms 28, 29 of the first recess 11 and the second recess 12, respectively. The insert 27 is attached to the recesses 19, 20 by an adhesive layer 30. The insert 27 has the shape of a substantially rectangular plate.

[0026] The insert portion 27 is separated from the lead frame and has a lateral dimension that is greater than the minimum distance of the gap 13 between the first part 11 and the second part 12, so that when it is positioned in the first recess 19 of the first part 11 and the second recess 20 of the second part 12, the insert portion 27 can bridge the gap 13 between the first part 11 and the second part 12.

[0027] The first recess 19 and the second recess 20 are separated by a gap 13 , and together they can be considered to form a depression in the surface of the lead frame 10 having a size and shape suitable for accommodating the insertion portion 27 .

[0028] Insert 27 may have a thickness that is slightly less than the thickness compared to the depth D1, D2 of recesses 19, 20 so that an upper surface 31 of insert 27 is substantially coplanar with interior surface 17, 18 of first portion 11 of lead frame 10 and interior surface 12 of second portion 12 of lead frame 10 when material 30 is taken into account between lower surface 33 of insert 27 and bottom 28, 29 of recesses 19, 20.

[0029] The first portion 11 and the second portion 12 of the lead frame 10 may be made of a metal plate (e.g., copper). The insert 27 may also be made of a metal sheet or a metal plate and may include the same metal as the lead frame (e.g., copper) or a metal or alloy different from the metal or alloy of the first portion 11 and the second portion 12.

[0030] The positioned lead frame 10 includes conductive internal surfaces, which include the internal surface 17 of the first part 11, the upper surface 31 of the insert 27 and the internal surface 18 of the second part 12. The conductive internal surfaces are substantially coplanar and have a lateral arrangement that is different from the lateral arrangement of the footprint provided by the external surfaces 14, 15 of the first part 11 and the second part 12 of the lead frame 10.

[0031] The conductive insert 27 may be used as part of an internal rewiring structure of a semiconductor package including the lead frame 10. For example, the insert 27 may form part of a conductive redistribution structure from a semiconductor device mounted on a portion of the lead frame 10 (e.g., the first portion 11) to one or more further portions of the lead frame 10 (e.g., the second portion 12), or between any other two or more portions of the lead frame 10 that are separated from each other (wherein a gap between the two or more portions is bridged by the insert 27).

[0032] In some embodiments, the conductive insert 27 is electrically connected to one or both of the first portion 11 and the second portion 12 by using a conductive material 30, such as a conductive adhesive or solder, such as soft solder. In other embodiments, the conductive insert 27 may be electrically insulated from one or both of the first portion 11 and the second portion 12.

[0033] If the conductive insert 27 is electrically connected to both the first portion 11 and the second portion 12 , the conductive insert electrically connects the first portion 11 to the second portion 12 .

[0034] If the conductive insert 27 is electrically insulated from both the first part 11 and the second part 12, the insert 27 can provide a purely mechanical or physical connection between the two parts 11, 12 of the lead frame 10 and at the same time provide an electrical connection between two further components of the package, for example between a semiconductor device and a lead of the lead frame.

[0035] In an embodiment in which a conductive connection is to be formed between the insert and the lead frame, the recess in which the insert is to be accommodated may include a conductive coating. The insert may also include a conductive coating, for example at least in the area to be in contact with the adhesive or solder and to be accommodated in the recess. The conductive coating(s) may act as an adhesion promoter and improve the electrical connection between the material of the lead frame and / or the insert and the material of the adhesive or solder. Each of the conductive coating(s) may include two or more sublayers.

[0036] If conductive insert 27 is electrically connected to one portion (eg first portion 11 ) and electrically insulated from second portion 12 , insert 27 may be used to provide a conductive path from first portion 11 to further portions of the semiconductor package (eg leads of a leadframe).

[0037] Figure 3 A cross-sectional view of a lead frame 10 according to an embodiment is shown, in which the lead frame 10 includes a first portion 11 having a first recess 19 and a second portion 12 having a second recess 20, whereby a gap 13 between the first recess 19 and the second recess 20 is bridged by a conductive insert 27. In this embodiment, the insert 27 is mechanically attached to and electrically connected to the second portion 12 of the lead frame 10 by a conductive material 30 disposed between an underside 33 of the insert 27 and a bottom 29 of the second recess 20. The insert 27 is mechanically attached to the first recess 19 of the first portion 11, yet is electrically insulated from the first recess 19 and the first portion 11.

[0038] Figure 4 Show Figure 3 An enlarged view of the connection between the insert 27 and the first recess 19 of the first part 11. Figure 3 and Figure 4 In the embodiment illustrated in FIG, the first recess 19 is lined with an electrically insulating layer 32, which may cover the bottom 28 and sides 24 of the first recess 19. The electrically insulating layer 32 may also extend over the sides 21 of the first portion 11 and an adjacent portion of the interior surface 17 of the first portion 11. In some embodiments, the underside 33 and sides 35 of the insert 27 may also be covered by a layer 34 of electrically insulating material.

[0039] The insert 27 is mechanically attached to the first part 11 by means of an adhesive material 36 located between the electrically insulating layers 32, 34, such that a first distal end 37 of the insert 27 is mechanically attached in a first recess 19 in the first part 11 and is electrically insulated from the first part 11 by means of the insulating layers 32, 34. The adhesive material 30 may be electrically insulating or electrically conductive.

[0040] The second distal end portion 38 of the insert 27 is mechanically attached to the second recess 20 and is electrically connected to the second portion 12 by a conductive material such as an adhesive or solder. The second distal end portion 38 of the insert 27 is not covered by an electrically insulating material and has a conductive surface for providing a conductive connection between the insert 27 and the second portion 12 of the lead frame 10. The upper surface 31 of the insert 27 is substantially coplanar with the interior surface 17 of the first portion of the lead frame 10 and the interior surface 18 of the second portion of the lead frame 10.

[0041] In this embodiment, a semiconductor device 40 is provided, which is a vertical MOSFET device, including a source contact pad 41 and a gate contact pad 42 on a first side 43, and a drain contact pad 44 on a second side 45 opposite to the first side 43. The semiconductor device 40 is arranged with respect to the inner surface 17 of the first portion 11 so that the source contact pad 41 faces and is mounted on the inner surface 17 of the first portion 11 and so that the gate contact pad 42 faces and is mounted on the upper surface 31 of the insert 27. The drain electrode 44 faces away from the lead frame 10 upward.

[0042] The source contact pad 41 is electrically connected to the first part 11 by a layer of conductive material 46, which may be, for example, a conductive adhesive or a soft solder. The gate electrode 42 is electrically connected to the insert 27 by an adhesive 47, which may include, for example, a conductive adhesive or a soft solder. The body of the semiconductor device 40 extends between and is located above the first part 11, the first recess 19 and the insert 27. The gate pad 42 is electrically connected to the insert 27 and, because the insert 27 is conductive, is electrically connected to the second part 12 and is electrically connected to the second recess 20 in the second part 12 by the conductive material 30. However, the gate electrode 42 is electrically insulated from the first part 11 of the lead frame 10 and the source of the transistor device 40 by the electrically insulating layers 32, 34 that ensure an electrically insulating connection between the insert 27 and the first recess 19 of the first part 11.

[0043] In this embodiment, the insert 27 provides part of an internal conductive redistribution structure between the semiconductor device 40 (particularly the gate pad 42) and the second portion 12 of the lead frame 10. The internal conductive redistribution structure is substantially planar. The lower surface 33 of the insert 27 is located within the semiconductor package because it is supported on the recesses 19, 20 formed in the internal surfaces 17, 20 and does not form part of the footprint of the lead frame 10 provided by the external contact surface 16 on the opposite side of the lead frame 10.

[0044] The drain pad 44 facing upward is electrically connected to the lead frame 10 at Figure 3 The one or more further leads may be substantially coplanar with the first and second parts 11, 12, so that the underside of the leads is substantially coplanar with the lower surfaces 14, 15 of the first and second parts 11, 12 and may form an external contact area 16 of the footprint. For example, the electrical connection may be formed by one or more bonding wires or contact clips.

[0045] Figure 5 A flow chart 50 illustrating a method for preparing a lead frame is shown. In box 51, a conductive lead frame for a semiconductor package is provided. The lead frame includes a first portion and a second portion, each of the first portion and the second portion having an external surface, the external surface being arranged to provide a substantially coplanar external contact area having a footprint, and each of the first portion and the second portion having an internal surface. The first portion is separated from the second portion by a gap. The lead frame can provide a lead frame for a single semiconductor package, and can be provided as part of a lead frame strip including a plurality of lead frames, each of the plurality of lead frames being used for a semiconductor package, the plurality of lead frames being held together in the strip by a connecting strip.

[0046] In block 52, portions of the interior surfaces of the first and second portions of the lead frame are removed to create a first recess in the first portion and a second recess in the second portion. In block 53, at least one lead frame portion is provided having a thickness less than or equal to a depth of the first recess and a depth of the second recess. The lead frame portion has a lateral dimension such that when arranged in the first recess and the second recess, the lead frame portion can extend from the first recess to the second recess and bridge a gap between the first portion and the second portion.

[0047] The lead frame portion is thus separate from the lead frame and has a lateral dimension that is larger than the minimum distance of the gap between the first portion and the second portion so that when it is positioned in the first recess of the first portion and the second recess of the second portion, it can bridge the gap between the first portion and the second portion. The lead frame portion can be considered as an insert.

[0048] Portions of the interior surfaces of the first and second portions of the lead frame may be removed by etching (eg, chemical etching) or milling.

[0049] The method may further comprise applying an electrically insulating coating to at least one of the first recess and the second recess.An electrically conductive coating may also be applied to the major surface of the leadframe portion and optionally to the sides of the leadframe portion.

[0050] In order to provide an electrically insulated connection between the lead frame portion and the recess in the portion of the lead frame, one or both of the recess and the lead frame portion can be coated with an electrically insulating material. In some embodiments, the lead frame portion is partially coated with the electrically insulating material so that the area of ​​the lead frame portion where the conductive connection is to be formed is not coated with the electrically insulating coating.

[0051] The lead frame and lead frame portion may be supplied as a component kit for subsequent assembly during the preparation of the semiconductor package. Alternatively, the lead frame portion may be attached to the lead frame and in particular to the first and second recesses, for example, by an adhesive or by solder, the adhesive being either conductive or electrically insulating.

[0052] Figure 6 A flow chart 60 is illustrated for a method of preparing a semiconductor package. In box 61, a conductive lead frame is provided, the conductive lead frame including a first portion and a second portion, each of the first portion and the second portion having an outer surface providing an external contact area and an inner surface opposite the outer surface. The first portion is separated from the second portion by a gap, and the first recess is arranged in the inner surface of the first portion, and the second recess is arranged in the inner surface of the second portion. In box 62, a conductive insert is inserted into the first recess and into the second recess so that it extends from the first recess to the second recess and bridges the gap between the first portion and the second portion. In box 63, the insert is mechanically attached to the first recess and the second recess. In box 64, a first semiconductor device is mounted on the first portion of the lead frame.

[0053] The insert may be mechanically attached to the first and second recesses by an adhesive, which may be electrically conductive or electrically insulating, or by solder.

[0054] The method may further include electrically connecting the insert to at least one of the first portion and the second portion or electrically insulating the insert from at least one of the first portion and the second portion.

[0055] The insert can be electrically connected to at least one of the first and second parts by using a conductive material such as solder or a conductive adhesive such as silver epoxy, which is used to mechanically attach the insert to the first recess and the second recess. For example, the insert can be electrically connected to the first and second parts. In this embodiment, the insert acts as a conductive plane redistribution structure from the first part to the second part of the lead frame and electrically connects the first and second parts. Because the insert is attached to the first recess and the second recess formed in the internal surfaces of the first and second parts, respectively, the insert is not located in the same plane as the external surface of the lead frame, and therefore does not form an external contact of the lead frame.

[0056] The arrangement of the conductive surfaces provided by the leadframe portions and one or more inserts at the inner side of the leadframe is different from the arrangement of the conductive surfaces at the outer side of the leadframe providing the external contact areas and the leadframe footprint. The inserts and recesses in the inner side of the leadframe can be used to provide different internal redistribution structures for the same footprint or similar footprints.

[0057] In order to electrically insulate the insert from at least one of the first part and the second part, the insert and / or the recess may be coated with an electrically insulating material. The adhesive used to attach the insert in the recess may be conductive or electrically insulating, since electrical insulation is provided by the coating. In embodiments in which the insert is electrically insulated from both the first part and the second part, the insert may form part of a conductive redistribution structure between two or more further parts of the semiconductor package (e.g. between a semiconductor device and a third part of the semiconductor package, the third part of the semiconductor package being, for example, a lead of a lead frame or a further insert or a further semiconductor device).

[0058] In some embodiments, the insert is electrically connected to the first portion and electrically insulated from the second portion, or vice versa. In this embodiment, the insert can act as a conductive redistribution structure from the first portion to a third portion (e.g., a lead of a semiconductor package). The mechanical attachment of the insert to the second portion can be used to provide mechanical stability to the insert.

[0059] In some embodiments, the conductive insert further includes a conductive coating on a lower surface of the conductive insert and optionally on a side surface, the lower surface facing the interior surface of the first and second parts of the lead frame. At least one of the first recess and the second recess may be coated with a conductive coating. The conductive coating may be used to improve the electrical connection between the material of the adhesive or solder and the material of the lead frame and / or the insert, for example, by promoting adhesion and / or by providing a contactable surface that is less susceptible to oxidation.

[0060] The first semiconductor device can be electrically coupled to the insert portion by one or more bonding wires. The first semiconductor device can be electrically connected to the insert portion by attaching the contact pad of the semiconductor device to the insert portion using a conductive layer. In other words, the contact pad can be mounted on the insert portion. This embodiment can be used, for example, for transistor devices with a source-down arrangement so that a source contact pad or a gate contact pad can be mounted on the insert portion. The insert portion can be used as a lateral redistribution structure from the contact pad facing downward to the lateral adjacent portion of the lead frame.

[0061] Figure 7A perspective view of a conductive leadframe 70 and a plurality of conductive inserts is shown. The plurality of inserts may be used to provide an internal redistribution structure to the leadframe that is independent of the footprint provided by the leadframe. Figure 7 In the embodiment illustrated in , the lead frame 70 is used in a semiconductor package including a half-bridge circuit with two switching devices (such as two semiconductor transistor devices) and a driver chip. The package may also include further functions such as source sensing.

[0062] Lead frame 70 includes: three parts 75, 76, 77, which are separated from each other and configured to each support a semiconductor device; four separate inserts 71, 72, 73, 74 and leads 78, which are positioned laterally adjacent to each part 75, 76, 77. Some leads 78 extend from each part 75, 76, 77 and are integrated with each part 75, 76, 77, and other leads 78b are separated from each part 75, 76, 77 and separated from each part 75, 76, 77. Leads 78 and each part 75, 76, 77 are substantially coplanar and have substantially coplanar inner surfaces 79 and substantially coplanar outer surfaces 80, and provide external contacts with a predetermined footprint. Lead frame 70 can have a substantially square shape in a plan view and include leads 78 along each edge.

[0063] Each of the first portion 75 and the third portion 77 of the lead frame 70 has a substantially square shape in a plan view and is arranged adjacent to one side of the second portion 76 having a substantially rectangular shape in a plan view. A first recess 81 is arranged in the inner surface 79 of the first portion 75 and is positioned in the inwardly facing side edge of the first portion 75. The recess 81 extends along the entire length of the inwardly facing side edge of the first portion 75 facing the second portion 76 and forms a mesa at the edge of the first portion 75.

[0064] The second recess 82 and the third recess 83 are arranged in the inner surface 79 of the second part 76. The second recess 82 and the third recess 83 extend from the inwardly facing side of the second part 76 to form two terraces facing the first recess 81. The third recess 83 is larger than the second recess 82 in the lateral direction and has a greater length so that the inner surface 79 of the second part 76 has a stepped shape in a plan view. The third recess 83 is located in one corner and is further toward the outermost edge of the lead frame than the second recess 82. The gap 87 between the first part 75 and the second part 76 is narrower in the area between the first recess 81 and the second recess 82 than in the area between the first recess 81 and the third recess 83.

[0065] Lead frame 70 further includes lead 85 disposed adjacent to and spaced apart from the outwardly facing side of second portion 76. Lead 85 includes fourth recess 86 in interior surface 79. Fourth recess 86 faces third recess 83 and second recess 82.

[0066] The recesses 81, 82, 83, 86 together form a depression or common recess having a size and shape for accommodating all four inserts 71, 72, 73, 74. Each of the recesses 81, 82, 83, 86 has a depth that is substantially the same and slightly greater than the thickness of the inserts 71, 72, 73, 74.

[0067] The first insertion portion 71 and the second insertion portion 72 have a substantially rectangular shape in a plan view and have approximately the same length. The second insertion portion 72 has a greater width than the first insertion portion 71. Each of the first insertion portion 71 and the second insertion portion 72 has a length capable of bridging a gap 87 between the first recess 81 in the first portion 75 and the second recess 82 in the second portion 76.

[0068] The third insertion portion 73 has a T-profile shape in a plan view. The cross section of the T-profile has a length that can bridge the gap 87 between the first recess 81 in the first part 75 and the third recess 83 in the second part 76, wherein the upright portion of the T-profile faces the edge of the package. The fourth insertion portion 74 has an L-profile shape, and can have a lateral dimension so that the vertically longer arm can be positioned adjacent to the upright portion and one side of the third insertion portion 73 of the T-profile, and the horizontally shorter arm of the L-profile can be positioned adjacent to the width side of the one side of the third insertion portion 73 of the T-profile. The fourth insertion portion 74 is positioned in the third recess 83 and the fourth recess 86 and bridges the gap 88 between the second part 76 and the lead 85.

[0069] Figure 8 The diagram shows a plan view of a semiconductor package including a lead frame 70, wherein four inserts 71, 72, 73, 74 are inserted into and accommodated in recesses 81, 82, 83, 86, and wherein three semiconductor devices 91, 92, 93 are arranged on a first portion 75, a second portion 76, and a third portion 77 of the lead frame 70, respectively. In an embodiment, the first semiconductor device 91 is a driver chip, and the second semiconductor device 92 and the third semiconductor device 93 are transistor devices. The upper surfaces of the four inserts 71, 72, 73, 74 are substantially coplanar with the inner surfaces 79 of the first portion 75 and the second portion 76.

[0070] The first insertion portion 71 and the second insertion portion 72 are arranged to be adjacent to each other in the lateral direction and extend from the first recess 81 to the second recess 82. The third insertion portion 73 extends between the first recess 81 and the third recess 83 and the fourth recess 86 so that the cross portion of the T extends between the first recess 81 and the third recess 83 and the upright portion of the T is positioned in the fourth recess 86. The fourth insertion portion 74 extends between the third recess 83 and the fourth recess 86. The fourth insertion portion 74 is arranged toward the side edges of the third recess 83 and the fourth recess 86 so that it is separated from the third insertion portion 73. All four insertion portions 71, 72, 73, 74 are separated from each other.

[0071] The first semiconductor device 91 is arranged on the first portion 75 and may partially overlap with a portion of the first insertion portion 71 , the second insertion portion 72 , and the third insertion portion 73 arranged in the first recess 81 .

[0072] The second semiconductor device 92 is mounted on the second portion 76 and is arranged adjacent to the second recess 82 and above the third recess 83, and also above portions of the third insertion portion 73 and the fourth insertion portion 74 arranged in the third recess 83. The second semiconductor device 92 is a transistor device having a drain contact pad 94 on its upper surface and a source contact pad 95 on its lower surface mounted on and electrically connected to the inner surface 79 of the second portion 76. The second semiconductor device 92 also has a gate contact pad 96 arranged on the lower surface and located above, mounted on and electrically connected to the third insertion portion 73. The source pad 92 or an additional source sense pad may be arranged above and mounted on the fourth insertion portion 74 in a position above the third recess 83.

[0073] The third semiconductor device 93 may also be a transistor device having a source pad 97 and a gate pad 98 on its upper surface and a drain pad 99 on its lower surface. The drain pad 99 is mounted on the inner surface 79 of the third portion 77 of the lead frame 70 and is electrically connected to the third portion 77. The two transistor devices 92, 93 may be coupled to form a half-bridge arrangement in a completed semiconductor package.

[0074] The plurality of inserting parts 71, 72, 73, 74 can provide different functions. Figure 7 In the embodiment illustrated in FIG. 9 , four inserts 71 , 72 , 73 , 74 provide various conductive redistribution structures inside the semiconductor package.

[0075] The first insert 71 is conductively connected to the first recess 81 and the second recess 82, and is therefore conductively connected to the first portion 75 and the second portion 76 of the lead frame 70. Because the source pad 95 of the transistor device 92 is mounted on the second portion 76 and is electrically coupled to the second portion 76, the first insert 71 is electrically coupled to the source pad 95 of the transistor 92, and is therefore electrically coupled to a low voltage potential such as ground. Because the first insert 71 extends between the second recess 82 and the first recess 81 and is also electrically coupled to the first portion 75, the first portion 75 is also coupled to the same low voltage connection. The first semiconductor device 91 is electrically coupled to the first insert 71 by one or more bonding wires 100, which can be used to provide a ground connection for the first semiconductor device 91.

[0076] In contrast to the first insert 71, the second insert 72 is electrically insulated from the first recess 81 and the second recess 82, and thus from the first and second portions 75 and 76 of the lead frame. The second insert 72 provides a conductive portion of a redistribution structure from the first semiconductor device 91 to the leads 85 of the lead frame 70 and to the fourth insert 74 by means of one or more bonding wires 101 coupling the first semiconductor device 91 to the second insert 72 and by one or more bonding wires 102 electrically connecting the second insert 72 to the fourth insert 74 and the leads 85. The bonding wires 102 are arranged to be adjacent to the corners of the transistor device 92 in the lateral direction and can be positioned independently of the position of the contact pads on the upper surface of the first semiconductor chip 91 relative to the leads 85. Because the bonding wires 102 from the first semiconductor device 91 are connected to the fourth insert 74 (which is electrically connected to the leads 85 below), the fourth insert 74 provides a larger area for wire bonding than the leads 85.

[0077] The third insert 73 is electrically insulated from the first recess 81 and the third recess 83 but is conductively connected to the portion of the fourth recess 86 located on the lead 103. The gate contact pad 96 of the transistor device 92 is mounted on the third insert 73 and is electrically connected to the third insert 73, but is electrically insulated from the portion of the third recess 83 in the inner surface 79 of the second portion 76 below and the first recess 81 in the inner surface 79 of the first portion 75, and is therefore electrically insulated from the first portion 75 and the second portion 76 of the lead frame 70. However, due to the conductive connection between the upright portion of the T-shaped insert 73 and the lead 103, the gate pad 96 is electrically connected to the lead 103 by means of the third insert 73. Therefore, the third insert 73 is mechanically supported by the first recess 81 and the third recess 83, and acts as a lateral conductive rewiring structure between the downward-facing gate pad 96 and the gate lead 103 of the lead frame 70.

[0078] The fourth insertion portion 74 is electrically insulated from the third recess 83 and is conductively connected to the fourth recess 86 and the lead 85. The source pad 95 on the lower surface of the transistor device 92 is mounted on the fourth insertion portion 74 and is conductively connected to the fourth insertion portion 74, so that the fourth insertion portion 74 acts as a lateral conductive rewiring structure from the downward-facing source pad 95 to the contact 85. The fourth insertion portion 74 and the lead 85 can be used to provide source sensing. The fourth insertion portion 74 is electrically insulated from the third recess 83, and is therefore electrically insulated from the second portion 76 on which the source pad 95 is mounted, and thus enables a source sensing function independent of the potential of the second portion 76.

[0079] To create an electrically insulating connection between the insert formed of a conductive material and the lead frame 70 also formed of a conductive material, an electrically insulating material is applied to one or both of the insert and the recess where an electrically insulating connection is desired.

[0080] exist Figure 7 In the embodiment illustrated in FIG. 9 , the third recess 83 is coated with an electrically insulating material, and the first recess 81 and the second recess 82 are coated with an electrically insulating material in the area to be used to support the second insert 72, the third insert 73 and the fourth insert 74. The lower surface 89 and the side 90 of the second insert 72, the traversing T-profile portion of the third insert 73 and the shorter arm of the L-profile fourth insert 74 are also coated with an electrically insulating material. The upright portion of the T-profile third insert 73, the longer arm of the L-profile fourth insert 74 and the first insert 71 are not coated and have a conductive outer surface.

[0081] Figure 9 includes 9A to 9H , illustrating a method for preparing a Figure 8 1. A method of semiconductor packaging of a semiconductor package 110 is shown in FIG. The preparation of a single semiconductor package 110 is shown. However, typically many packages are prepared in the same process, wherein the lead frame 70 is one of many lead frame positions of a lead frame strip. Similarly, inserts 71, 72, 73, 74 of the lead frame position may be provided to be connected to the frame and take the form of a lead frame strip having a plurality of lead frame positions.

[0082] As in Fig.9AAs illustrated in FIG. 1 , a lead frame 70 including portions 75, 76, 77 and leads 78 is provided. The lead frame 70 includes four recesses, a first recess 81 in the inner surface of the first portion 75, a second recess 82 in the inner surface of the second portion 76, a third recess 83 in the inner surface of the second portion 76, and a fourth recess 86 formed in portions of some of the leads 85, 103 positioned adjacent to the third recess 83. In this embodiment, the recesses may be considered to form a common recess into which the four inserts 71, 72, 73, 74 may be accommodated.

[0083] For Figure 8 For the semiconductor package 110 shown in FIG. 1 , the first recess 81 and the second recess 82 are located closest to the third portion 77 of the lead frame 70, and the fourth recess 86 accommodates the conductive connection between the first insertion portion 71 and the first portion 75 and the second portion 76 below, the conductive connection between the third insertion portion 73 and the lead 103, and the conductive connection between the fourth insertion portion and the lead 85. As shown in FIG. Fig. 9B As illustrated in FIG. 1 , these areas of the first recess 81 , the second recess 82 and the fourth recess 86 include conductive surfaces. The remaining portions of the first recess 81 , the second recess 82 and the third recess 83 are coated with an electrically insulating material.

[0084] At least the distal end of the shorter arm of the fourth insert 74 and at least the distal end of the cross portion of the third insert 73 and at least the distal end of the second insert 72 are also coated with an electrically insulating material on the lower surface 89 (and optionally, the side 90). In contrast, the first insert 71, the upright portion of the third insert 73 received in the fourth recess 86, and the long arm portion of the fourth insert 74 received in the fourth recess 86 remain uncoated and include a conductive lower surface 89 and are used to form an electrically conductive connection.

[0085] exist Fig. 9C, a conductive adhesive is applied to the first recess 81, the second recess 82, the third recess 83, and the fourth recess 86. The first insertion portion 71, the second insertion portion 72, the third insertion portion 73, and the fourth insertion portion 74 are placed on the lead frame 70 so that the first insertion portion 71 is arranged in and supported by the first recess 81 and the second recess 82, and bridges the gap 87 between the first portion 75 and the second portion 76 of the lead frame 70. The second insertion portion 72 is arranged in and supported by the first recess 81 and the second recess 82, so that it also bridges the gap 87 between the first portion 75 and the second portion 76. The third insertion portion 73 extends between the portions of the first recess 81, the third recess 83, and the fourth recess 86 arranged on the lead 103. The fourth insertion portion 74 is placed in the third recess 83 and the fourth recess 86 so that it is arranged near the distal end portion and extends to the upright portion of the T of the third insertion portion 73. The four insertion portions 71, 72, 73, 74 are spaced apart from each other in the lateral direction. Fig.9D The adhesive is cured as shown in the figure.

[0086] An electrically conductive adhesive may be used to create an electrically conductive connection. The electrically insulating coating on the inserts 72, 73, 74 and recesses 81, 82, 83, 86 is used to prevent, for example, electrical connections from being formed between the second insert 72 and the first and second parts 75, 76 even when an electrically conductive adhesive is used.

[0087] For example, for embodiments where the insert forms an electrically conductive connection with a portion of the lead frame below, solder may be used instead of a conductive adhesive. For embodiments where the insert is not required to form an electrically conductive connection with the lead frame, an electrically insulating adhesive may be used. In some embodiments, a conductive adhesive material may be used for a conductive connection and an electrically insulating adhesive material may be used for an electrically insulating connection.

[0088] As in Fig.9E As shown in the figure, solder 84 (e.g., solder paste) is then distributed onto the inner surfaces of the first portion 75, the second portion 76, and the third portion 77 of the lead frame 70 on which the semiconductor devices 91, 92, and 93 are to be mounted. Solder 84 is also distributed onto the distal ends of the third insertion portion 73 and the fourth insertion portion 74 located in the third recess 83 on which the gate pad 96 and the source pad 95 of the transistor 92 are to be mounted.

[0089] As in Fig.9FAs illustrated in FIG. 1 , the first semiconductor device 91 is mounted on the inner surface 79 of the first portion 75 and is substantially positioned adjacent to the first recess 81. The first semiconductor device 91 may overlap the distal ends of the first, second and third inserts 71, 72 and 73 located in the first recess 81. The transistor device 92 is mounted in a source-down arrangement so that the source pad 95 is mounted on and electrically connected to the inner surface of the second portion 76, and so that the gate pad 96 is located above and mounted on and electrically connected to the third insert 73 and is therefore connected to the lead 103, and so that the source pad 95 or a further source sense pad is located above and mounted on and electrically connected to the fourth insert 74 and is electrically connected to the lead 85.

[0090] Second transistor device 93 is mounted with its drain pad 99 facing downward and mounted on and electrically connected to third portion 77 of lead frame 70 and with its source pad 97 and gate pad 98 facing upward. Fig.9F It is also illustrated that a bonding wiring 100 is prepared between the first semiconductor device 91 and the first insertion part 71, a bonding wiring 101 is prepared between the first semiconductor device 91 and the second insertion part 72, a bonding wiring 102 is prepared between the second insertion part 72 and the fourth insertion part 74, a bonding wiring 105 is prepared between the first semiconductor device 91 and the second transistor device 93, a bonding wiring 106 is prepared between the first semiconductor device 91 and the lead 78, and a bonding wiring 104 is prepared between the gate pad 98 of the second transistor device 93 and the lead 107 of the lead frame 70.

[0091] As in Figure 9G As shown in the figure, in order to form a half-bridge circuit between two transistor devices 92, 93, solder 84 is placed on the upward-facing source pad 97 of the second transistor device 93, the upward-facing drain pad 94 of the transistor device 92, and a collection of leads 108 that form an output node arranged adjacent to the side of the second portion 76 of the lead frame 70.

[0092] As in Figure 9HAs shown in FIG. 1 , a contact clip 109 is attached to the source pad 97 of the transistor 93, the drain pad 94 of the transistor device 92, and the lead 108. The contact clip 109 electrically connects the source pad 97 of the transistor 93, the drain pad 94 of the transistor device 92, and the lead 108. The arrangement may be subjected to a solder reflow process to form a solder connection between the semiconductor devices 91, 92, 93, the lead frame 70, and the contact clip 109. The interior surface 79 of the lead frame 70, the semiconductor devices 91, 92, 93, the contact clip 109, and the bonding wires may then be embedded in a not shown molding composition to produce a semiconductor package 110.

[0093] By using additional conductive components separated from the lead frame, the internal redistribution structure provided by the lead frame can be decoupled from the layout of the lead frame on its lower surface. The use of recesses in the upper surface of the lead frame located within the package housing or molding enables the conductive components to be accommodated within the thickness of the lead frame and form an insert, and also enables the upper surface of the conductive components to be substantially coplanar with the upper surface of the rest of the lead frame. The conductive components can be positioned on portions of the leads of the lead frame to increase the available area on which bonding connections can be formed. Further, the position of the bonding wiring within the package can be optimized to better avoid crossing and edges of devices within the package. The package reliability can be improved and the additional flexibility in the internal redistribution structure can be used to provide additional functionality to the package, such as current sensing or source sensing.

[0094] Spatially relative terms such as "below", "below", "lower", "above", and "upper" are used for ease of description to explain the positioning of one element relative to a second element. These terms are intended to cover different orientations of the device in addition to those different orientations compared to those depicted in the various figures. Further, terms such as "first", "second", etc. are also used to describe various elements, regions, sections, etc. and are also not intended to be limiting. The same terms refer to the same elements throughout the description.

[0095] As used herein, the terms "having," "comprising," "including," and "containing" and the like are open-ended terms that indicate the presence of stated elements or features but do not exclude additional elements or features. Unless the context clearly indicates otherwise, the quantifiers "a," "an," and the pronoun "the" are intended to include the plural as well as the singular. It is to be understood that the features of the various embodiments described herein may be combined with each other unless specifically indicated otherwise.

[0096] Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that various replacements and / or equivalent implementations may replace the specific embodiments shown and described without departing from the scope of the present invention. The present application is intended to cover any adaptation or variation of the specific embodiments discussed herein. Therefore, it is intended that the present invention be limited only by the claims and their equivalents.

Claims

1. A lead frame, comprising: a first conductive portion and a second conductive portion, each of the first conductive portion and the second conductive portion having an outer surface and an inner surface, the outer surface being arranged to provide a substantially coplanar outer contact area having a footprint, the inner surface being opposite the outer surface, the first portion being separated from the second portion by a gap; a first recess disposed in an interior surface of the first portion; a second recess disposed in the interior surface of the second portion; The first conductive insert is arranged in and extends between the first recess and the second recess, and bridges a gap between the first portion and the second portion. 2 . The lead frame of claim 1 , wherein an upper surface of the insert portion is substantially coplanar with inner surfaces of the first and second portions of the lead frame.

3. A lead frame according to claim 1 or claim 2, wherein the conductive insert further includes an electrically insulating coating on a lower surface of the conductive insert and optionally on a side of the conductive insert, the lower surface facing the inner surface of the first and second parts of the lead frame. 4 . The lead frame according to claim 1 , wherein at least one of the first recess and the second recess is coated with an electrically insulating coating.

5. The lead frame according to any one of claims 1 to 2, wherein: The insert is mechanically attached to and electrically insulated from the first and second portions of the lead frame, or The insert is mechanically attached to the first and second portions of the lead frame and electrically connected to the first and second portions of the lead frame, or The insert is mechanically attached to and electrically insulated from the first portion of the lead frame and is mechanically attached to and electrically connected to the second portion of the lead frame.

6. A semiconductor package, comprising: The lead frame according to any one of claims 1 to 5, and a first semiconductor device, Wherein the interposer is formed as part of the internal conductive redistribution structure between the first semiconductor device and the external contact area of ​​the lead frame. 7 . The semiconductor package according to claim 6 , wherein the first semiconductor device is mounted on the first portion of the lead frame and is mounted on the insert.

8. A semiconductor package according to claim 7, wherein the first semiconductor device is a transistor device having a source contact pad and a gate contact pad, wherein the first insertion portion is mechanically attached to and electrically insulated from a first portion of a lead frame, and is mechanically attached to and electrically connected to a second portion of the lead frame, wherein the source contact pad of the transistor device is mounted on and electrically connected to the first portion of the lead frame, and the gate contact pad of the transistor device is mounted on and electrically connected to the first insertion portion. 9 . The semiconductor package according to claim 6 , further comprising a second semiconductor device, wherein the first semiconductor device is mounted on the first portion of the lead frame, and the second semiconductor device is mounted on the second portion of the lead frame.

10. A semiconductor package according to claim 9, wherein the first insertion portion is mechanically attached to the first part and the second part of the lead frame and is electrically connected to the first part and the second part of the lead frame, and the first semiconductor device is electrically coupled to the first insertion portion through bonding wiring, wherein the second semiconductor device is a transistor device having a source pad, wherein the source pad of the transistor device is mounted on the second part of the lead frame and is electrically coupled to the second part of the lead frame and is electrically coupled to the first insertion portion.

11. A semiconductor package according to claim 6, wherein the first insertion portion is mechanically attached to the first part and the second part of the lead frame and electrically insulated from the first part and the second part of the lead frame, wherein the first semiconductor device is electrically coupled to the first insertion portion through one or more bonding wires, and the first insertion portion is electrically coupled to the third part of the lead frame through one or more bonding wires, and the third part of the lead frame is separated from the first part and the second part of the lead frame.

12. A semiconductor package according to claim 10 or claim 11, wherein the first insertion portion is mechanically attached to the first and second portions of the lead frame and electrically insulated from the first and second portions of the lead frame, and is mechanically attached to and electrically connected to the fourth portion of the lead frame, the fourth portion of the lead frame being separated from the first and second portions of the lead frame.

13. The semiconductor package according to claim 11 further includes a second conductive insert, which is mechanically attached to the second portion of the lead frame and electrically insulated from the second portion of the lead frame, and is mechanically attached to and electrically connected to the fourth portion of the lead frame, the fourth portion of the lead frame being separated from the first portion, the second portion and the third portion of the lead frame, wherein the contact pad of the first semiconductor device is electrically coupled to the second insert and the fourth portion of the lead frame.

14. A method for preparing a semiconductor package, comprising: A conductive lead frame is provided, the conductive lead frame comprising: a first portion and a second portion, each of the first portion and the second portion having an outer surface and an inner surface, the outer surface providing an outer contact area, the inner surface being opposite to the outer surface, the first portion being separated from the second portion by a gap; a first recess arranged in the inner surface of the first portion; and a second recess arranged in the inner surface of the second portion; inserting the conductive insert into the first recess and the second recess such that it extends from the first recess to the second recess and bridges a gap between the first portion and the second portion; mechanically attaching the insert to the first recess and the second recess; A first semiconductor device is mounted on the first portion of the lead frame.

15. The method according to claim 14, further comprising: electrically connecting the insert to at least one of the first portion and the second portion, or The insert is electrically insulated from at least one of the first portion and the second portion.

16. The method according to claim 14 or claim 15, further comprising: A first semiconductor device is mounted on the first portion and electrically connected to the interposer by bonding wires or by attaching contact pads of the first semiconductor device to the interposer using a conductive layer.

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