Dual-die device testing circuit, method and system

Abstract

The present invention relates to a dual-die device test circuit, method and system. The dual-die device test circuit includes a device to be tested, a voltage source and a switch circuit. The first floating voltage source in the voltage source package includes a first driving voltage output terminal, a first inductive voltage output terminal and a first common voltage output terminal, and the second floating voltage source includes a second driving voltage output terminal, a second inductive voltage output terminal and a second common voltage output terminal. The switch circuit includes a plurality of switch tubes, each output terminal is electrically connected to the switch tube in a one-to-one correspondence, the first driving voltage output terminal can be electrically connected to the gate of the first tube core through the switch tube, the first inductive voltage output terminal can be electrically connected to the source of the first tube core and the second common voltage output terminal through the switch tube, the second driving voltage output terminal can be electrically connected to the gate of the second tube core through the switch tube, and the second inductive voltage output terminal can be electrically connected to the source of the second tube core and the first common voltage output terminal through the switch tube.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integrated circuit testing technology, and in particular to a dual-die device testing circuit, method and system. Background Art

[0002] In the field of integrated circuit testing, the testing of conventional MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) wafers requires automatic testing equipment equipped with an analog voltage / current source meter and a special device for loading wafers - a probe station. Two wires are led out from the same point of the chuck, which serve as the driving voltage and sensing voltage signal lines of the MOSFET substrate drain. The top surface of the MOSFET wafer is the source and gate of each die. These electrodes are led out through a probe card, and the probes are set as driving voltage signal and sensing voltage signal probes respectively. However, for the dual-die Dual Gate MOSFET device, the top surface of the device wafer is a dual-die source and gate, and the drain of the device is a thick-film product. There will be a large resistance Rb on the drain surface. There are also factors such as the contact resistance Rc between the drain substrate and the suction cup, and the device process characteristics. If voltage or current is applied from the suction cup to the drain, the voltage and current cannot flow normally to the device end due to Rb and Rc problems. Therefore, conventional test methods cannot be used for overlap. The test parameters are solved using a new test method. The test requires two sets of hardware circuits, and the hardware must be a floating source to implement the test.

[0003] like Figure 1 As shown, the existing technology realizes the connection relationship of Dual Gate test, and only has one set of hardware equipment. Through the switch, the Gate and Source are connected to the Gate and Source signals of the device to be tested, and the Drain output interface of the hardware equipment is connected to the Source signal of the untested device. At the same time, the switch needs to be connected to the Gate and Source signals of the untested device in parallel with a group of batteries to complete the test. If multiple relays are required to switch and perform serial testing when doing multi-station testing, the test time will be longer, so the current multi-station testing cannot improve the test efficiency. Summary of the invention

[0004] Based on this, it is necessary to provide a dual-die testing circuit, method and system to address the problem of being unable to improve the testing efficiency of dual-die devices.

[0005] The present invention provides a dual-die device testing circuit, comprising:

[0006] A device under test, comprising a first die and a second die;

[0007] a voltage source, comprising a first floating voltage source and a second floating voltage source, wherein the first floating voltage source comprises a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source comprises a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal; and

[0008] The switching circuit includes a plurality of switching tubes, each of the output ends is electrically connected to the switching tubes in a one-to-one correspondence, the first driving voltage output end can be electrically connected to the gate of the first tube core through the switching tube, the first induction voltage output end can be electrically connected to the source of the first tube core and the second common voltage output end through the switching tube, the second driving voltage output end can be electrically connected to the gate of the second tube core through the switching tube, and the second induction voltage output end can be electrically connected to the source of the second tube core and the first common voltage output end through the switching tube.

[0009] In one embodiment, the test circuit further includes two auxiliary power supplies, each of which is connected in series between a gate and a source of the die.

[0010] In one embodiment, the switch tube relay

[0011] In one of the embodiments, the switch circuit is an electronic relay selection switch circuit.

[0012] In one embodiment, the switch circuit is an electronic relay selection switch matrix.

[0013] In one embodiment, the test circuit further includes:

[0014] two voltmeters, each of which is connected in series between the gate and source of one of the MOS tubes; and

[0015] An ammeter is connected in series between the source of the first tube core and the source of the second tube core. In one embodiment,

[0016] Based on the same inventive concept, the present invention also provides a dual-die device test system, including a plurality of dual-die device test circuits and a test machine, wherein the dual-die device test circuit includes:

[0017] A test machine, used to carry the device under test;

[0018] The device under test comprises a first tube die and a second tube die, wherein a drain of the first tube die is electrically connected to a drain of the second tube die, and the first tube die is electrically connected to the test machine through a probe;

[0019] a voltage source, comprising a first floating voltage source and a second floating voltage source, wherein the first floating voltage source comprises a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source comprises a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal; and

[0020] The switching circuit includes a plurality of switching tubes, each of the output ends is electrically connected to the switching tubes in a one-to-one correspondence, the first driving voltage output end can be electrically connected to the gate of the first tube core through the switching tube, the first induction voltage output end can be electrically connected to the source of the first tube core and the second common voltage output end through the switching tube, the second driving voltage output end can be electrically connected to the gate of the second tube core through the switching tube, and the second induction voltage output end can be electrically connected to the source of the second tube core and the first common voltage output end through the switching tube.

[0021] In one embodiment, the test circuit further includes two auxiliary power supplies, each of which is connected in series between a gate and a source of the die.

[0022] In one embodiment, the test circuit further includes:

[0023] two voltmeters, each of which is connected in series between the gate and source of one of the MOS tubes; and

[0024] An ammeter is connected in series between the source of the first tube core and the source of the second tube core.

[0025] Based on the same inventive concept, the present invention further provides a dual-die device testing method for testing a dual-die device by the dual-die device testing system described in any of the above embodiments, comprising:

[0026] Load the test program, close the switch tube between the first driving voltage output terminal and the gate of the first tube core, the switch tube between the first sensing voltage output terminal and the source of the first tube core, and the switch tube between the first common voltage output terminal and the gate of the second tube core;

[0027] placing the second die in a specific state according to the parameter to be measured, wherein the specific state includes a short circuit state, an open circuit state and a bias state;

[0028] Testing the first die according to a test specification and outputting test data;

[0029] Close the switch tube between the second driving voltage output terminal and the gate of the second tube core, the switch tube between the second sensing voltage output terminal and the source of the second tube core, and the switch tube between the second common voltage output terminal and the gate of the first tube core;

[0030] Disconnecting the connection between the auxiliary power supply and the gate of the second MOS switch, and providing an auxiliary voltage to the gate of the first MOS switch through the auxiliary power supply;

[0031] placing the first die in the specific state according to the parameter to be measured;

[0032] The second die is tested according to a test specification, and test data is output.

[0033] In summary, the embodiments of the present invention provide a dual-die device test circuit, method and system. The dual-die device test circuit includes a device to be tested, a voltage source and a switch circuit. The device to be tested includes a first die and a second die. The voltage source includes a first floating voltage source and a second floating voltage source, wherein the first floating voltage source includes a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source includes a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal. The switch circuit includes a plurality of switch tubes, each of the output terminals is electrically connected to the switch tube in a one-to-one correspondence, the first driving voltage output terminal can be electrically connected to the gate of the first die through the switch tube, the first sensing voltage output terminal can be electrically connected to the source of the first die and the second common voltage output terminal through the switch tube, the second driving voltage output terminal can be electrically connected to the gate of the second die through the switch tube, and the second sensing voltage output terminal can be electrically connected to the source of the second die and the first common voltage output terminal through the switch tube. In the present invention, the first driving voltage output terminal can be electrically connected to the gate of the first tube core through the switch tube, the first induction voltage output terminal can be electrically connected to the source of the first tube core and the second common voltage output terminal through the switch tube, the second driving voltage output terminal can be electrically connected to the gate of the second tube core through the switch tube, and the second induction voltage output terminal can be electrically connected to the source of the second tube core and the first common voltage output terminal through the switch tube. By controlling the switch tube, when testing one of the MOS tubes, the switch tube is used to put the other MOS tube into a specific state to achieve parameter testing, and after one of the tests is completed, the other MOS tube device in the dual-core tube device is tested in the same way, without rebuilding the test circuit, to achieve rapid testing of the dual-core tube device. In addition, each of the dual-core device test circuits can support the completion of voltage and current parameter testing, so multiple dual-core device test circuits perform parallel testing on multiple dual-core devices, further improving test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1It is a prior art connection method for dual-die devices;

[0035] Figure 2 A schematic diagram of a test circuit for a dual-die device provided by an embodiment of the present invention;

[0036] Figure 3 A schematic diagram of the principle of testing a first die provided by an embodiment of the present invention;

[0037] Figure 4 A schematic diagram of the principle of testing a second die provided by an embodiment of the present invention;

[0038] Figure 5 A schematic diagram of the principle of testing the on-resistance RSS provided by an embodiment of the present invention;

[0039] Figure 6 A schematic diagram of the principle of testing the threshold voltage VTH provided by an embodiment of the present invention;

[0040] Figure 7 A schematic diagram of the electrical structure of a dual-die device testing system provided by an embodiment of the present invention;

[0041] Figure 8 A schematic flow chart of a method for testing a dual-die device provided by an embodiment of the present invention;

[0042] Fig. 9 A schematic flow chart of another method for testing a dual-die device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific implementation disclosed below.

[0044] See also Figure 2, an embodiment of the present invention provides a dual-die device test circuit, method and system. The dual-die device test circuit includes a device under test 100, a voltage source 200 and a switch circuit 300. The device under test 100 includes a first die DIE1 and a second die DIE2. The voltage source 200 includes a first floating voltage source Floating VI_1 and a second floating voltage source Floating VI_2, wherein the first floating voltage source Floating VI_1 includes a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source Floating VI_2 includes a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal. The switching circuit 300 includes a plurality of switching tubes, each of the output ends being electrically connected to the switching tubes in a one-to-one correspondence, the first driving voltage output end being electrically connected to the gate of the first tube core DIE1 through the switching tube, the first induction voltage output end being electrically connected to the source of the first tube core DIE1 and the second common voltage output end through the switching tube, the second driving voltage output end being electrically connected to the gate of the second tube core DIE2 through the switching tube, and the second induction voltage output end being electrically connected to the source of the second tube core DIE2 and the first common voltage output end through the switching tube.

[0045] It can be understood that for a standard Mosfet device, the gate, source and drain signal pins of the device are connected to the corresponding drive voltage signal output terminal, induced voltage signal output terminal and common voltage signal output terminal of the test equipment. When multiple standard Mosfet devices are tested in parallel, the gate and source signal pins of each device are connected to the corresponding pins of the test equipment, and the drain signal pins of each device are connected. However, for the dual-core Dual Gate MOSFET device, there will be a large resistance Rb on the drain surface, and there are also factors such as the contact resistance Rc between the drain substrate and the suction cup. Due to the process characteristics of the device, it is impossible to apply voltage or current to the drain from the suction cup, because it is impossible to perform lap connection according to conventional testing methods.

[0046] In the present invention, by setting a floating voltage source 200 and a switch circuit 300, the first driving voltage output terminal can be electrically connected to the gate of the first tube core DIE1 through the switch tube K12, the first induction voltage output terminal can be electrically connected to the source of the first tube core DIE1 through the switch tube K11 and the second common voltage output terminal can be electrically connected through the switch tubes K11 and K23, the second driving voltage output terminal can be electrically connected to the gate of the second tube core DIE2 through the switch tube K22, the second induction voltage output terminal can be electrically connected to the source of the second tube core DIE2 through the switch tube K21 and the first common voltage output terminal can be electrically connected through the switch tubes K21 and K13, so that by controlling the switch tube, when testing one of the MOS tubes, the other MOS tube is placed in a specific state by using the switch tube to achieve parameter testing, and after one of the tests is completed, the other MOS tube device in the dual-core tube device is tested in the same way, without rebuilding the test circuit, thereby achieving rapid testing of the dual-core tube device. Furthermore, each of the dual-die device test circuits can support the completion of voltage and current parameter tests, so a plurality of the dual-die device test circuits can perform parallel tests on a plurality of dual-die devices, further improving test efficiency.

[0047] In this embodiment, the driving voltage output terminal, the sensing voltage output terminal and the common signal output terminal of the first floating voltage source Floating VI_1 are marked as G1, S1 and D1, and the driving voltage output terminal, the sensing voltage output terminal and the common signal output terminal of the second floating voltage source Floating VI_2 are marked as G2, S2 and D2. The gate and source of the first tube core DIE1 are marked as Gate1 and Source1, the gate, source and drain of the second tube core DIE2 are marked as Gate2 and Source2, and the drain of the first tube core DIE1 is connected to the drain of the second tube core DIE2, and is marked as Drain.

[0048] See also Figure 3 When testing the first die DIE1, G1 is connected to Gate1, S1 is connected to Source1, and D1 is connected to Source2; at the same time, Gate2 of the untested second die DIE2 is connected to G2, and S2 is connected to Source2. At the same time, the untested second die DIE2 needs to be placed in a specific state, such as an open circuit state, a short circuit state, or a bias state. Then, the test is performed according to the test specification to obtain and output the test result of the first die DIE1.

[0049] Further, after the test of the first die DIE1 is completed, the second die DIE2 is tested. Figure 4, connect G2 to Gate2, S2 to Source2, and D2 to Source1; at the same time, connect Gate1 of the untested first die DIE1 to G1, and connect S1 to Source1. At the same time, the untested first die DIE1 needs to be placed in a specific state, such as an open circuit state, a short circuit state, or a bias state. Then, test according to the test specification to obtain and output the test result of the second die DIE2.

[0050] Then, after obtaining the test results of the first tube core DIE1 and the second tube core DIE2 respectively, the data needs to be integrated for judgment. If both parts of the test pass, the device is considered normal. Otherwise, if any one of the DIE test data fails, the device is considered unqualified.

[0051] In one embodiment, the test circuit further includes two auxiliary power supplies, each of which is connected in series between a gate and a source of the die.

[0052] In this embodiment, by adding two auxiliary power supplies, the DIE connected thereto can be placed in a specific state by switching on and off between the auxiliary power supplies and the gate of the DIE and adjusting the size of the auxiliary power supplies, thereby achieving parameter testing.

[0053] In one embodiment, see Figure 5 The test circuit further includes two voltmeters 410 and an ammeter 420. Each of the voltmeters 410 is connected in series between the gate and source of a MOS tube; the ammeter 420 is connected in series between the source of the first tube core DIE1 and the source of the second tube core DIE2.

[0054] The following describes the test circuit in detail by testing the RSS parameter. RSS is a test method for the on-resistance Ron in conventional MOSFETs. Because the Dual Gate device cannot lead out the Drain signal, it is impossible to test each DIE independently, so the Ron of the two DIEs can only be tested separately; the on-resistance RSS of the dual-core device = Ron1 + Ron2, where Ron1 is the on-resistance of DIE1 and Ron2 is the on-resistance of DIE2.

[0055] When testing the first tube core DIE1, the bias voltage is provided to the second tube core DIE2 through the auxiliary power supply. It is necessary to close the switch tubes connected to G1, S1, D1, G2 and S2 respectively. The voltage between the source and source of the first tube core DIE1 and the second tube core is tested using the voltmeter 410. The IS current is accurately tested using the ammeter 420. The tested voltage divided by the IS current is Ron1. Similarly, the Ron2 of the second tube core DIE2 can be measured, and then the on-resistance RSS of the dual-die device can be calculated. The skill of this test method is to use the body diode of one of the devices as a bridge. If the current IS flows into the first tube core DIE1, the body diode of the first tube core DIE1 is used as a bridge. If the current IS flows into the second tube core DIE2, the body diode of the second tube core DIE2 is used as a bridge, thereby improving the test accuracy.

[0056] Furthermore, taking the leakage current IGSS parameter between the gate and source of the dual-core tube device as an example, the working principle of the test circuit is specifically explained. When testing the first tube core DIE1, the gate and source of the second tube core DIE2 are in an open circuit state by controlling the switch tube; Floating VI_1 is connected to the gate G1 and source S1 of DIE1, and the floating ammeter 420 is used to test the current of the gate and source, which is the IGSS result of the first tube core. Similarly, when testing the second tube core DIE2, the gate and source of the first tube core DIE1 are in an open circuit state by controlling the switch tube; Floating VI_2 is connected to the gate and source of DIE2, and the floating voltmeter 410 is used to test the current of the gate and source, which is the IGSS result of the second tube core.

[0057] Furthermore, taking the test of the threshold voltage VTH parameter of the dual-core transistor device as an example, the working principle of the test circuit is specifically explained. It can be understood that the Dual Gate MOSFET product process is a device with two dies packaged together. To test the above parameters of a device, both dies should be tested, that is, the respective threshold voltages VTH of DIE1 and DIE2. When testing each DIE, the test circuit formed by controlling the switch tube is as follows: Figure 6 As shown. To test the VTH parameter, when testing the first die DIE1, short-circuit the gate and source of the second die DIE2; connect Floating VI_1 to the gate and source of DIE1, and use the floating voltmeter 410 to test the gate and source voltages, which is the VTH result of the first die. Similarly, when testing the second die DIE2, short-circuit the gate and source of the first die DIE1; connect Floating VI_2 to the gate and source of DIE2, and use the floating voltmeter 410 to test the gate and source voltages, which is the VTH result of the second die.

[0058] In one embodiment, the switch tube is an electronic relay. It can be understood that when the switch tube is an electronic relay, the switch tube can be turned on and off by using instructions, and the switch tube can be turned on and off automatically by using a pre-set test program to achieve rapid measurement of parameters.

[0059] In one embodiment, the switch circuit 300 is an electronic relay selection switch matrix. When the switch circuit 300 is an electronic relay selection switch matrix, it is beneficial to realize flexible configuration and cascading of various switch resources to form an efficient structure that meets the test requirements.

[0060] Based on the same inventive concept, an embodiment of the present invention also provides a dual-die device testing system. Figure 7 The dual-die device test system includes a plurality of dual-die device test circuits 10 and a test machine 20. The dual-die device test circuit includes a test machine, a device under test 100, a voltage source 200 and a switch circuit 300.

[0061] The test machine is used to carry the device under test 100 .

[0062] The device under test 100 includes a first die DIE1 and a second die DIE2 . The drain of the first die DIE1 and the drain of the second die DIE2 are electrically connected, and the first die DIE1 and the second die DIE2 are electrically connected to the test machine through a probe.

[0063] The voltage source 200 includes a first floating voltage source 200 and a second floating voltage source 200, wherein the first floating voltage source 200 includes a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source 200 includes a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal.

[0064] The switching circuit 300 includes a plurality of switching tubes, each of the output ends being electrically connected to the switching tubes in a one-to-one correspondence, the first driving voltage output end being electrically connected to the gate of the first tube core DIE1 through the switching tube, the first induction voltage output end being electrically connected to the source of the first tube core DIE1 and the second common voltage output end through the switching tube, the second driving voltage output end being electrically connected to the gate of the second tube core DIE2 through the switching tube, and the second induction voltage output end being electrically connected to the source of the second tube core DIE2 and the first common voltage output end through the switching tube.

[0065] In the present invention, by setting a floating voltage source 200 and a switch circuit 300, the first driving voltage output terminal can be electrically connected to the gate of the first tube core DIE1 through the switch tube K12, the first induction voltage output terminal can be electrically connected to the source of the first tube core DIE1 through the switch tube K11 and the second common voltage output terminal can be electrically connected through the switch tubes K11 and K23, the second driving voltage output terminal can be electrically connected to the gate of the second tube core DIE2 through the switch tube K22, the second induction voltage output terminal can be electrically connected to the source of the second tube core DIE2 through the switch tube K21 and the first common voltage output terminal can be electrically connected through the switch tubes K21 and K13, so that by controlling the switch tube, when testing one of the MOS tubes, the other MOS tube is placed in a specific state by using the switch tube to achieve parameter testing, and after one of the tests is completed, the other MOS tube device in the dual-core tube device is tested in the same way, without rebuilding the test circuit, thereby achieving rapid testing of the dual-core tube device. Furthermore, each of the dual-die device test circuits can support the completion of voltage and current parameter tests, so a plurality of the dual-die device test circuits can perform parallel tests on a plurality of dual-die devices, further improving test efficiency.

[0066] In this embodiment, the driving voltage output terminal, the sensing voltage output terminal and the common signal output terminal of the first floating voltage source Floating VI_1 are marked as G1, S1 and D1, and the driving voltage output terminal, the sensing voltage output terminal and the common signal output terminal of the second floating voltage source Floating VI_2 are marked as G2, S2 and D2. The gate and source of the first tube core DIE1 are marked as Gate1 and Source1, the gate, source and drain of the second tube core DIE2 are marked as Gate2 and Source2, and the drain of the first tube core DIE1 is connected to the drain of the second tube core DIE2, and is marked as Drain.

[0067] See also Figure 3 When testing the first die DIE1, G1 is connected to Gate1, S1 is connected to Source1, and D1 is connected to Source2; at the same time, Gate2 of the untested second die DIE2 is connected to G2, and S2 is connected to Source2. At the same time, the untested second die DIE2 needs to be placed in a specific state, such as an open circuit state, a short circuit state, or a bias state. Then, the test is performed according to the test specification to obtain and output the test result of the first die DIE1.

[0068] Further, after the test of the first die DIE1 is completed, the second die DIE2 is tested. Figure 4, connect G2 to Gate2, S2 to Source2, and D2 to Source1; at the same time, connect Gate1 of the untested first die DIE1 to G1, and connect S1 to Source1. At the same time, the untested first die DIE1 needs to be placed in a specific state, such as an open circuit state, a short circuit state, or a bias state. Then, test according to the test specification to obtain and output the test result of the second die DIE2.

[0069] Then, after obtaining the test results of the first tube core DIE1 and the second tube core DIE2 respectively, the data needs to be integrated for judgment. If both parts of the test pass, the device is considered normal. Otherwise, if any one of the DIE test data fails, the device is considered unqualified.

[0070] In one of the embodiments, the test circuit further includes two auxiliary power supplies, each of which is connected in series between a gate and a source of one of the tube cores.

[0071] In this embodiment, by adding two auxiliary power supplies, the DIE connected thereto can be placed in a specific state by switching on and off between the auxiliary power supplies and the gate of the DIE and adjusting the size of the auxiliary power supplies, thereby achieving parameter testing.

[0072] In one embodiment, see Figure 5 The test circuit further includes two voltmeters 410 and an ammeter 420. Each of the voltmeters 410 is connected in series between the gate and source of a MOS tube; the ammeter 420 is connected in series between the source of the first tube core DIE1 and the source of the second tube core DIE2.

[0073] The following describes the test circuit in detail by testing the RSS parameter. RSS is a test method for the on-resistance Ron in conventional MOSFETs. Because the Dual Gate device cannot lead out the Drain signal, it is impossible to test each DIE independently, so the Ron of the two DIEs can only be tested separately; the on-resistance RSS of the dual-core device = Ron1 + Ron2, where Ron1 is the on-resistance of DIE1 and Ron2 is the on-resistance of DIE2.

[0074] When testing the first tube core DIE1, the bias voltage is provided to the second tube core DIE2 through the auxiliary power supply. It is necessary to close the switch tubes connected to G1, S1, D1, G2 and S2 respectively. The voltage between the source and source of the first tube core DIE1 and the second tube core is tested using the voltmeter 410. The IS current is accurately tested using the ammeter 420. The tested voltage divided by the IS current is Ron1. Similarly, the Ron2 of the second tube core DIE2 can be measured, and then the on-resistance RSS of the dual-die device can be calculated. The skill of this test method is to use the body diode of one of the devices as a bridge. If the current IS flows into the first tube core DIE1, the body diode of the first tube core DIE1 is used as a bridge. If the current IS flows into the second tube core DIE2, the body diode of the second tube core DIE2 is used as a bridge, thereby improving the test accuracy.

[0075] Furthermore, taking the leakage current IGSS parameter between the gate and source of the dual-core tube device as an example, the working principle of the test circuit is specifically explained. When testing the first tube core DIE1, the gate and source of the second tube core DIE2 are in an open circuit state by controlling the switch tube; Floating VI_1 is connected to the gate G1 and source S1 of DIE1, and the floating ammeter 420 is used to test the current of the gate and source, which is the IGSS result of the first tube core. Similarly, when testing the second tube core DIE2, the gate and source of the first tube core DIE1 are in an open circuit state by controlling the switch tube; Floating VI_2 is connected to the gate and source of DIE2, and the floating voltmeter 410 is used to test the current of the gate and source, which is the IGSS result of the second tube core.

[0076] Furthermore, taking the test of the threshold voltage VTH parameter of the dual-core transistor device as an example, the working principle of the test circuit is specifically explained. It can be understood that the Dual Gate MOSFET product process is a device with two dies packaged together. To test the above parameters of a device, both dies should be tested, that is, the respective threshold voltages VTH of DIE1 and DIE2. When testing each DIE, the test circuit formed by controlling the switch tube is as follows: Figure 6 As shown. To test the VTH parameter, when testing the first die DIE1, short-circuit the gate and source of the second die DIE2; connect Floating VI_1 to the gate and source of DIE1, and use the floating voltmeter 410 to test the gate and source voltages, which is the VTH result of the first die. Similarly, when testing the second die DIE2, short-circuit the gate and source of the first die DIE1; connect Floating VI_2 to the gate and source of DIE2, and use the floating voltmeter 410 to test the gate and source voltages, which is the VTH result of the second die.

[0077] Based on the same inventive concept, an embodiment of the present invention also provides a dual-die device testing method for testing a dual-die device using a dual-die device testing system provided by any of the above embodiments. Figure 8 and Fig. 9 , the dual-die device testing method comprises:

[0078] Step S810, loading the test program, closing the switch tube K12 between the first driving voltage output terminal and the gate of the first tube core DIE1, the switch tube K11 between the first induction voltage output terminal and the source of the first tube core DIE1, and the switch tube K13 between the first common voltage output terminal and the gate of the second tube core DIE2;

[0079] Step S820, placing the second die DIE2 in a specific state according to the parameters to be measured, wherein the specific state includes a short circuit state, an open circuit state and a bias state;

[0080] Step S830, testing the first die DIE1 according to the test specification, and outputting the test data;

[0081] Step S840, closing the switch tube K22 between the second driving voltage output terminal and the gate of the second tube core DIE2, the switch tube K21 between the second induction voltage output terminal and the source of the second tube core DIE2, and the switch tube K23 between the second common voltage output terminal and the gate of the first tube core DIE1;

[0082] Step S850, placing the first die DIE1 in the specific state according to the parameter to be measured;

[0083] Step S860, testing the second die DIE2 according to the test specification and outputting the test data.

[0084] In the present invention, based on a dual-core device test system that can realize automatic control through a switch tube, when testing one of the MOS tubes, the switch tube is used to put the other MOS tube into a specific state to realize parameter testing, and after one of the tests is completed, the other MOS tube device in the dual-core device is tested in the same way, without the need to rebuild the test circuit, to realize rapid testing of the dual-core device. In addition, each of the dual-core device test circuits can support the completion of voltage and current parameter testing, so multiple dual-core device test circuits can perform parallel testing on multiple dual-core devices, further improving test efficiency.

[0085] In one embodiment, placing the first die DIE1 in a specific state includes:

[0086] electrically connecting the gate of the first die DIE1 to an auxiliary power supply, and providing an auxiliary voltage to the gate of the first die DIE1 through the auxiliary power supply, so that the first die DIE1 is in a bias state; or

[0087] Short-circuit the gate and source of the first die DIE1 by using a probe, so that the first die DIE1 is in a short-circuit state; or

[0088] The loop between the gate and the source of the first die DIE1 is disconnected, so that the first die DIE1 is in an open circuit state.

[0089] The following describes the test circuit in detail by testing the RSS parameter. RSS is a test method for the on-resistance Ron in conventional MOSFETs. Because the Dual Gate device cannot lead out the Drain signal, it is impossible to test each DIE independently, so the Ron of the two DIEs can only be tested separately; the on-resistance RSS of the dual-core device = Ron1 + Ron2, where Ron1 is the on-resistance of DIE1 and Ron2 is the on-resistance of DIE2.

[0090] When testing the first tube core DIE1, the bias voltage is provided to the second tube core DIE2 through the auxiliary power supply. It is necessary to close the switch tubes connected to G1, S1, D1, G2 and S2 respectively. The voltage between the source and source of the first tube core DIE1 and the second tube core is tested using the voltmeter 410. The IS current is accurately tested using the ammeter 420. The tested voltage divided by the IS current is Ron1. Similarly, the Ron2 of the second tube core DIE2 can be measured, and then the on-resistance RSS of the dual-die device can be calculated. The skill of this test method is to use the body diode of one of the devices as a bridge. If the current IS flows into the first tube core DIE1, the body diode of the first tube core DIE1 is used as a bridge. If the current IS flows into the second tube core DIE2, the body diode of the second tube core DIE2 is used as a bridge, thereby improving the test accuracy.

[0091] Furthermore, taking the leakage current IGSS parameter between the gate and source of the dual-core tube device as an example, the working principle of the test circuit is specifically explained. When testing the first tube core DIE1, the gate and source of the second tube core DIE2 are in an open circuit state by controlling the switch tube; Floating VI_1 is connected to the gate G1 and source S1 of DIE1, and the floating ammeter 420 is used to test the current of the gate and source, which is the IGSS result of the first tube core. Similarly, when testing the second tube core DIE2, the gate and source of the first tube core DIE1 are in an open circuit state by controlling the switch tube; Floating VI_2 is connected to the gate and source of DIE2, and the floating voltmeter 410 is used to test the current of the gate and source, which is the IGSS result of the second tube core.

[0092] Furthermore, taking the test of the threshold voltage VTH parameter of the dual-core transistor device as an example, the working principle of the test circuit is specifically explained. It can be understood that the Dual Gate MOSFET product process is a device with two dies packaged together. To test the above parameters of a device, both dies should be tested, that is, the respective threshold voltages VTH of DIE1 and DIE2. When testing each DIE1, the test circuit formed by controlling the switch tube is as follows: Figure 6 As shown. To test the VTH parameter, when testing the first die DIE1, short-circuit the gate and source of the second die DIE2; connect Floating VI_1 to the gate and source of DIE1, and use the floating voltmeter 410 to test the gate and source voltages, which is the VTH result of the first die. Similarly, when testing the second die DIE2, short-circuit the gate and source of the first die DIE1; connect Floating VI_2 to the gate and source of DIE2, and use the floating voltmeter 410 to test the gate and source voltages, which is the VTH result of the second die.

[0093] In addition, before performing parameter testing, the testing method also includes: powering on the dual-die device testing system, then performing a self-test on the test board, and loading a test program after the self-test passes; loading the dual-die device to be tested into the test machine according to the test program, and connecting it through probe pins; then, powering on the board.

[0094] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0095] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A test circuit for a dual-die device, characterized in that: include: A device under test, comprising a first die and a second die; A voltage source, comprising a first floating voltage source and a second floating voltage source, wherein the first floating voltage source comprises a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source comprises a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal; as well as A switching circuit comprises a plurality of switching tubes, each of the output ends being electrically connected to the switching tubes in a one-to-one correspondence, the first driving voltage output end being electrically connected to the gate of the first tube core through the switching tube, the first induction voltage output end being electrically connected to the source of the first tube core through the switching tube, the second common voltage output end being electrically connected to the source of the first tube core through the switching tube, the second driving voltage output end being electrically connected to the gate of the second tube core through the switching tube, the second induction voltage output end being electrically connected to the source of the second tube core through the switching tube, and the first common voltage output end being electrically connected to the source of the second tube core through the switching tube.

2. The test circuit according to claim 1, characterized in that: It also includes two auxiliary power supplies, each of which is connected in series between the gate and the source of a tube core.

3. The test circuit according to claim 1, characterized in that: The switch tube is an electronic relay.

4. The test circuit according to claim 3, characterized in that: The switch circuit is an electronic relay selection switch matrix.

5. The test circuit according to claim 1, characterized in that: Also includes: Two voltmeters, each of which is connected in series between the gate and source of a tube core; and An ammeter is connected in series between the source of the first tube core and the source of the second tube core.

6. A dual-die device testing system, characterized in that: The invention comprises a plurality of dual-die device test circuits and a test machine, wherein the dual-die device test circuit comprises: A test machine, used to carry the device under test and load the test program; The device under test comprises a first tube die and a second tube die, wherein a drain of the first tube die is electrically connected to a drain of the second tube die, and the first tube die is electrically connected to the test machine through a probe; a voltage source, comprising a first floating voltage source and a second floating voltage source, wherein the first floating voltage source comprises a first driving voltage output terminal, a first sensing voltage output terminal and a first common voltage output terminal, and the second floating voltage source comprises a second driving voltage output terminal, a second sensing voltage output terminal and a second common voltage output terminal; and A switching circuit comprises a plurality of switching tubes, each of the output ends being electrically connected to the switching tubes in a one-to-one correspondence, the first driving voltage output end being electrically connected to the gate of the first tube core through the switching tube, the first induction voltage output end being electrically connected to the source of the first tube core through the switching tube, the second common voltage output end being electrically connected to the source of the first tube core through the switching tube, the second driving voltage output end being electrically connected to the gate of the second tube core through the switching tube, the second induction voltage output end being electrically connected to the source of the second tube core through the switching tube, and the first common voltage output end being electrically connected to the source of the second tube core through the switching tube.

7. The test system according to claim 6, characterized in that: The test circuit also includes two auxiliary power supplies, each of which is connected in series between the gate and the source of one of the tube cores.

8. The test system according to claim 6, characterized in that: The test circuit further comprises: two voltmeters, each of which is connected in series between the gate and source of one die; and An ammeter is connected in series between the source of the first tube core and the source of the second tube core.

9. A dual-die device testing method for testing a dual-die device using the dual-die device testing system according to any one of claims 6 to 8, characterized in that: include: Load the test program, close the switch tube between the first driving voltage output terminal and the gate of the first tube core, the switch tube between the first sensing voltage output terminal and the source of the first tube core, and the switch tube between the first common voltage output terminal and the source of the second tube core; placing the second die in a specific state according to the parameter to be measured, wherein the specific state includes a short circuit state, an open circuit state and a bias state; Testing the first die according to a test specification and outputting test data; Close the switch tube between the second driving voltage output terminal and the gate of the second tube core, the switch tube between the second sensing voltage output terminal and the source of the second tube core, and the switch tube between the second common voltage output terminal and the source of the first tube core; placing the first die in the specific state according to the parameter to be measured; The second die is tested according to a test specification, and test data is output.

10. The dual-die device testing method according to claim 9, characterized in that: Placing the first die in the specific state includes: electrically connecting the gate of the first die to an auxiliary power supply, and providing an auxiliary voltage to the gate of the first die through the auxiliary power supply, so that the first die is in a bias state; or Short-circuit the gate and source of the first die by using a probe to put the first die in a short-circuit state; or The loop between the gate and the source of the first die is disconnected to put the first die in an open circuit state.

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