An optional voltage generating circuit

Abstract

An optional voltage generating circuit includes: a boost circuit connected to the MCU of a programmer, receiving an enable signal output by the MCU, the boost circuit connected to a power supply terminal and outputting the voltage to a target single-chip computer after converting the voltage according to a voltage selection signal; a first selection switch connected to the MCU of the programmer, the first selection switch receiving the voltage selection signal from the MCU of the programmer and outputting it to the boost circuit; a second selection switch connected to the MCU of the programmer, the second selection switch receiving the voltage selection signal from the MCU of the programmer and outputting it to the boost circuit. The voltage generating circuit of the present invention controls the boost circuit to output different voltages according to the requirements of the single-chip computer through the selection switch, and provides the single-chip computer with optional write / erase high voltage.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic circuits, and in particular relates to an optional voltage generating circuit for a NOR Flash memory. Background Art

[0002] NOR Flash is a non-volatile flash memory technology with the characteristics of fast reading speed, simple application, no need for special interface circuits, and high transmission efficiency. User programs can run directly on NOR Flash flash memory without relying on the RAM in the microcontroller, thereby reducing the capacity of RAM to reduce costs. NOR Flash memory is currently widely used in microcontrollers for the storage and operation of product user programs. The user program of electronic products is written into the NOR FLASH memory of the microcontroller through an external programmer, but the data writing / erasing of the NOR Flash memory requires the external programmer to provide stable and long-term high voltage to complete, and the design of the microcontroller is different, and the write / erase voltage is also different. Therefore, it is very urgent and necessary to design an optional voltage generation circuit for NOR Flash memory. Summary of the invention

[0003] The object of the present invention is to provide an optional voltage generating circuit for a NOR Flash memory, through which a programmer can provide a stable and optional write / erase voltage for the NOR Flash memory.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] An optional voltage generating circuit includes: a boost circuit connected to the MCU of a programmer, receiving an enable signal output by the MCU, the boost circuit being connected to a power supply terminal and converting a voltage according to a voltage selection signal and outputting it to a target single-chip computer; a first selection switch connected to the MCU of the programmer, the first selection switch receiving a voltage selection signal from the MCU of the programmer and outputting it to the boost circuit; and a second selection switch connected to the MCU of the programmer, the second selection switch receiving a voltage selection signal from the MCU of the programmer and outputting it to the boost circuit.

[0006] Furthermore, the boost circuit is a boost chip, the EN pin of the boost chip is connected to the MCU of the programmer, receives the high-voltage enable signal output by the MCU of the programmer, the EN pin is grounded via a first resistor, the VIN pin of the boost chip is connected to the power supply end and is grounded via a first capacitor, the GND pin is grounded, the SW pin is connected to the power supply end via an inductor and is connected to the positive electrode of the diode, the FB pin is connected to the output end of the first selection switch and the second selection switch; a second resistor is connected between the FB pin and the cathode of the diode, the second resistor is connected in parallel with the second capacitor, the cathode of the diode is connected to the high-voltage output end of the voltage generating circuit, and the high-voltage output end of the voltage generating circuit is grounded via a third capacitor.

[0007] More specifically, the diode is a Schottky diode.

[0008] Furthermore, the first selection switch is a first transistor, the base of the first transistor is connected to the MCU of the programmer, the emitter is grounded, and the collector is connected to the boost circuit via a third resistor.

[0009] Furthermore, the second selection switch is a second transistor, the base of the second transistor is connected to the MCU of the programmer, the emitter is grounded, and the collector is connected to the boost circuit via a fourth resistor.

[0010] More specifically, the boost circuit is a boost chip, the collector of the first transistor is connected to the FB pin of the boost chip via the third resistor, and / or the collector of the second transistor is connected to the FB pin of the boost chip via the fourth resistor.

[0011] Preferably, it also includes an anti-error protection circuit, the input end of which is connected to the MCU of the programmer to receive the voltage selection signal output by the MCU of the programmer, and the output end is connected to the first selection switch circuit and the second selection switch circuit.

[0012] Furthermore, the anti-error protection circuit is a logic chip composed of two NOT gates, the VCC pin of the logic chip is connected to the power supply end, the GND pin is grounded and connected to the power supply end via a fourth capacitor, the first input pin is connected to the MCU of the programmer and connected to the power supply end via a fifth resistor, the second input pin is connected to the first output pin, the first output pin is connected to the second selection switch, and the second output pin is connected to the first selection switch.

[0013] More specifically, the first selection switch is a first transistor, the base of the first transistor is connected to the second output pin of the logic chip, the emitter is grounded, and the collector is connected to the boost circuit via a third resistor; the second selection switch is a second transistor, the base of the second transistor is connected to the first output pin of the logic chip, the emitter is grounded, and the collector is connected to the boost circuit via a fourth resistor.

[0014] Alternatively, the first selection switch and the second selection switch are MOS tubes.

[0015] It can be seen from the above technical solutions that the voltage generating circuit of the present invention controls the boost circuit to output different voltages according to the needs of the single-chip microcomputer by selecting a switch, and provides optional write / erase high voltage for the single-chip microcomputer. In a specific technical solution, the corresponding high voltage can be provided for different single-chip microcomputers by adjusting the resistance value in the circuit according to the actual programming voltage of the single-chip microcomputer. In a preferred technical solution, by setting an anti-misoperation protection circuit, production damage caused by abnormal high voltage output caused by misoperation can be prevented, and the yield of single-chip microcomputers in electronic products in batch programming can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 is a circuit block diagram of an embodiment of the present invention;

[0018] Figure 2 4 is a circuit diagram of an embodiment of the present invention.

[0019] The specific implementation modes of the present invention are further described in detail below with reference to the accompanying drawings. DETAILED DESCRIPTION

[0020] In order to make the above and other purposes, features and advantages of the present invention more obvious, embodiments of the present invention are specifically cited below and described in detail with reference to the accompanying drawings.

[0021] like Figure 1As shown, the voltage generating circuit of the present embodiment includes a boost circuit, a first selection switch and a second selection switch. Among them, the boost circuit is connected to the MCU of the programmer and the target single-chip microcomputer respectively, and the input end of the boost circuit is connected to the +5V power supply end (power supply of the programmer), and the voltage is converted and then output to the target single-chip microcomputer. The first selection switch and the second selection switch are respectively connected to the MCU of the programmer, receive the voltage selection signal from the MCU of the programmer, and output it to the boost circuit, so that the boost circuit outputs a specific voltage. Preferably, in the present embodiment, an anti-mistake protection circuit is set between the MCU of the programmer and the first selection switch and the second selection switch.

[0022] The target single-chip computer of this embodiment is a 16-bit single-chip computer model SWF2G11 produced by Zhuhai Zhonghui Microelectronics Co., Ltd. The single-chip computer has a NOR FLASH memory inside, and the normal working voltage is 2.4V~5.0V. In the programming state, an additional 7V or 7.5V high voltage needs to be provided to the VPP pin of the SWF2G11 chip, that is, the first selection switch of this embodiment is used to output a 7.5V voltage selection signal, and the second selection switch is used to output a 7.0V voltage selection signal.

[0023] like Figure 2 As shown, this embodiment uses a boost chip U1 of model TPS61041DBV as a boost circuit. The maximum output current of the chip is 250mA, the input voltage is 1.8-6V, and the maximum output voltage is 28V. The EN pin of the boost chip U1 is connected to the MCU of the programmer, and receives the high-voltage generation enable signal (FWR CNT) output by the MCU control of the programmer. The EN pin is also grounded through the first resistor R1, and the high-voltage generation enable signal is used to control the working state of the boost chip U1; the VIN pin of the boost chip U1 is connected to the +5V power supply terminal and is also grounded through the first capacitor C1; the GND pin of the boost chip U1 is grounded, the SW pin is connected to the +5V power supply terminal through the inductor L1, and the SW pin is also connected to the positive pole of the diode D1, and the negative pole of the diode D1 is connected to the high-voltage output terminal (HVCC) of the voltage generating circuit, and the voltage generating circuit outputs 7V or 7.5V voltage to the target single-chip computer; the FB pin of the boost chip U1 is connected to the output terminal of the first selection switch and the second selection switch, and a second resistor R2 is connected between the FB pin and the negative pole of the diode D1, and the second capacitor C2 is connected in parallel with the second resistor R2. The high-voltage output terminal of the voltage generating circuit is also grounded through the third capacitor C3. More specifically, the diode D1 of this embodiment adopts a Schottky diode.

[0024] The input end of the anti-error protection circuit is connected to the MCU of the programmer, and receives the voltage selection signal (HVCC_SEL) output by the MCU control. The anti-error protection circuit of this embodiment adopts a logic chip U2 of model SN74LVC2G04DRL, and the logic chip U2 is composed of 2 NOT gates. The VCC pin of the logic chip U2 is connected to the +5V power supply terminal, the GND pin is grounded, and the GND pin is connected to the +5V power supply terminal through the fourth capacitor C4 at the same time. The first input pin (1A) is connected to the MCU of the programmer, and is also connected to the +5V power supply terminal through the fifth resistor R5 at the same time. The second input pin (2A) is connected to the first output pin (1Y), the first output pin is connected to the second selection switch, and the second output pin (2Y) is connected to the first selection switch.

[0025] This embodiment uses a transistor as a selection switch, the first selection switch is the first transistor Q1, and the second selection switch is the second transistor Q2. The base of the first transistor Q1 is connected to the second output pin of the logic chip U2, the emitter is grounded, and the collector is connected to the FB pin of the boost chip U1 through the third resistor R3. The base of the second transistor Q2 is connected to the first output pin of the logic chip U2, the emitter is grounded, and the collector is connected to the FB pin of the boost chip U1 through the fourth resistor R4. Preferably, the second resistor R2, the third resistor R3 and the fourth resistor R4 use high-precision resistors with an accuracy of 0.5% and a temperature characteristic of 50PPM. In other embodiments, the transistor used as a switch can also be replaced by a MOS tube. The internal resistance of the MOS tube is smaller than that of the transistor, the HVCC output voltage is more accurate, and the circuit power consumption is lower.

[0026] The working principle of the voltage generating circuit of the present invention is described below. The following table is a list of logical relationships of the voltage generating circuit.

[0027] PWR CNT (boost enable) HVCC SEL (High Voltage Select) HVCC (high voltage output) Low level Low level No high voltage output Low level High level No high voltage output High level Low level High voltage output 7V High level High level High voltage output 7.5V

[0028] As shown in the table above, when the programmer does not enter the programming state, the programmer controls the MCU to output the FWR CNT low-level signal, the boost chip U1 does not work, the HVCC SEL voltage selection signal is invalid, and the voltage generating circuit HVCC has no high-voltage output. When the programmer enters the programming state, the programmer controls the MCU to output the FWR CNT high-level signal, so that the boost chip U1 starts to work. The programmer detects the specific model of the target microcontroller and outputs the corresponding HVCC SEL voltage selection signal according to the microcontroller model; when HVCC SEL is high, the voltage generating circuit HVCC is controlled to output 7.5V high voltage through the first selection switch, and when HVCCSEL is low, the voltage generating circuit HVCC is controlled to output 7.0V high voltage through the second selection switch, as follows:

[0029] When the output terminal HVCC of the voltage generating circuit needs to output a high voltage of 7.5V, the MCU of the programmer outputs a high level of HVCC SEL to the first input pin (1A) of the logic chip U2, and outputs a low level through the first output pin (1Y) of the logic chip U2, and the second selection switch (second transistor Q2) is closed; at the same time, the first input pin (2A) of the logic chip U2 inputs a low level, the second output pin (2Y) outputs a high level, the first selection switch (first transistor Q1) is opened, and the voltage generating circuit outputs a voltage of 7.5V according to the voltage selection signal.

[0030] When the output terminal HVCC of the voltage generating circuit needs to output a high voltage of 7.0V, the MCU of the programmer outputs a low level of HVCC SEL to the first input pin (1A) of the logic chip U2, and a high level is output through the first output pin (1Y) of the logic chip U2, and the second selection switch is turned on; at the same time, a high level is input to the first input pin (2A) of the logic switch U2, and a low level is output to the second output pin (2Y), the first selection switch is turned off, and the voltage generating circuit outputs a voltage of 7.0V according to the voltage selection signal.

[0031] The voltage value U output by the voltage generating circuit HVCC It is determined by the ratio of the pull-down resistors (R2, R3, R4) connected to the FB pin of the boost chip U1. The specific calculation method is as follows: HVCC =V REF ×(1+R2 / R3) or U HVCC =V REF ×(1+R2 / R4), V REF is the typical value of the reference voltage of the boost chip. In this embodiment, V REF is the typical reference voltage of the TPS61041DBV boost chip, V REF =1.233V, the resistance of the second resistor R2 is 1.1MΩ, the resistance of the third resistor R3 is 215KΩ, and the resistance of the fourth resistor R4 is 237KΩ. By controlling the on and off of the first switch transistor and the second switch transistor, the FB pin of the boost chip U1 is selected to be connected to different pull-down resistors to achieve the purpose of outputting different voltages. Obviously, the resistance values ​​and voltage division ratios of R2, R3, and R4 can also be adjusted according to actual needs to output different high voltages to meet the NOR Flash write / erase requirements of other types of microcontrollers.

[0032] In this embodiment, an anti-error protection circuit is set before the first selection switch and the second selection switch. Compared with the first and second selection switches being directly connected to the MCU of the programmer to receive the voltage selection signal, the anti-error protection short circuit can prevent the first and second selection switches from being opened at the same time due to erroneous operation, resulting in an increase in the output voltage and damaging the target single-chip computer. When the first selection switch and the second selection switch are directly connected to the MCU of the programmer and the control signal is directly output to the selection switch through the I / O pin of the MCU, the output of the MCU pin may be unstable for a short time during the power-on / power-off or program initialization process of the programmer, and the first selection switch and the second selection switch may be opened at the same time. If the first selection switch and the second selection switch are opened at the same time, the third resistor R3 and the fourth resistor R4 are equivalent to two pull-down resistors connected in parallel to the FB pin of the boost chip U1. The resistance value of the equivalent resistor formed by the third resistor R3 and the fourth resistor R4 in parallel is 112.7KΩ. According to U HVCC =1.233V×(1+R2 / 112.7), the output voltage is 13.267V, which is much higher than the 7.0V or 7.5V voltage required by the programmer, and it is very easy to damage the target microcontroller. After adding the anti-error protection circuit before the first selection switch and the second selection switch, the MCU of the programmer only needs to output a control signal (HVCC SEL). When the control signal is high, the voltage generation circuit outputs 7.5V high voltage, and when it is low, it outputs 7.0V high voltage, which avoids the situation that the output voltage rises abnormally due to the instability of the programmer MCU and the opening of the first and second selection switches at the same time, which damages the target programming chip.

[0033] The above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, a person skilled in the art should understand that the specific implementation modes of the present invention can still be modified or replaced by equivalents, and any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be included in the scope of the present invention.

Claims

1. An optional voltage generating circuit, characterized in that: include: A boost circuit connected to the MCU of the programmer receives an enable signal output by the MCU, the boost circuit is connected to the power supply terminal and converts the voltage according to the voltage selection signal and outputs it to the target microcontroller; A first selection switch connected to the MCU of the programmer, wherein the first selection switch receives a voltage selection signal from the MCU of the programmer and outputs the voltage selection signal to the boost circuit; A second selection switch connected to the MCU of the programmer, wherein the second selection switch receives a voltage selection signal from the MCU of the programmer and outputs the voltage selection signal to the boost circuit; An anti-error protection circuit is arranged between the MCU of the programmer and the first selection switch and the second selection switch, the anti-error protection circuit comprises a logic chip composed of two NOT gates, a VCC pin of the logic chip is connected to a power supply terminal, a GND pin is grounded and connected to the power supply terminal via a fourth capacitor, a first input pin is connected to the MCU of the programmer and connected to the power supply terminal via a fifth resistor, a second input pin is connected to a first output pin, a first output pin is connected to the second selection switch, and a second output pin is connected to the first selection switch; When the MCU of the programmer outputs a high level to the first input pin of the logic chip, and the first output pin of the logic chip outputs a low level, the second selection switch is closed, and at the same time, the first input pin of the logic chip inputs a low level, and the second output pin outputs a high level, the first selection switch is opened, and the optional voltage generating circuit outputs a first voltage; When the MCU of the programmer outputs a low level to the first input pin of the logic chip, and outputs a high level through the first output pin of the logic chip, the second selection switch is turned on. At the same time, the first input pin of the logic chip inputs a high level and the second output pin outputs a low level. The first selection switch is closed, and the optional voltage generating circuit outputs a second voltage.

2. The selectable voltage generating circuit according to claim 1, wherein: The boost circuit is a boost chip, the EN pin of the boost chip is connected to the MCU of the programmer, receives the high voltage generation enable signal output by the MCU of the programmer, the EN pin is grounded via a first resistor, the VIN pin of the boost chip is connected to the power supply end and is grounded via a first capacitor, the GND pin is grounded, the SW pin is connected to the power supply end via an inductor and is connected to the positive electrode of the diode, the FB pin is connected to the output end of the first selection switch and the second selection switch; a second resistor is connected between the FB pin and the cathode of the diode, the second resistor is connected in parallel with the second capacitor, the cathode of the diode is connected to the high voltage output end of the voltage generating circuit, and the high voltage output end of the voltage generating circuit is grounded via a third capacitor.

3. The selectable voltage generating circuit according to claim 2, wherein: The diode is a Schottky diode.

4. The selectable voltage generating circuit according to claim 1, wherein: The first selection switch is a first transistor, the base of the first transistor is connected to the MCU of the programmer, the emitter is grounded, and the collector is connected to the boost circuit via a third resistor.

5. The selectable voltage generating circuit according to claim 1, wherein: The second selection switch is a second transistor, the base of the second transistor is connected to the MCU of the programmer, the emitter is grounded, and the collector is connected to the boost circuit via a fourth resistor.

6. The selectable voltage generating circuit according to claim 4, wherein: The boost circuit is a boost chip, and the collector of the first transistor is connected to the FB pin of the boost chip via the third resistor.

7. The selectable voltage generating circuit according to claim 5, wherein: The boost circuit is a boost chip, and the collector of the second transistor is connected to the FB pin of the boost chip via the fourth resistor.

8. The selectable voltage generating circuit according to claim 1, wherein: The first selection switch is a first transistor, the base of which is connected to the second output pin of the logic chip, the emitter is grounded, and the collector is connected to the boost circuit via a third resistor; the second selection switch is a second transistor, the base of which is connected to the first output pin of the logic chip, the emitter is grounded, and the collector is connected to the boost circuit via a fourth resistor.

9. The selectable voltage generating circuit according to claim 1, wherein: The first selection switch and the second selection switch are MOS tubes.

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