Winding surge suppression circuit and instrument

Abstract

The present application provides a winding surge suppression circuit and an instrument, and relates to the field of electrical metering technology. The winding surge suppression circuit includes: a current suppression circuit for connecting two stages of a test input end, the current suppression circuit includes: a varistor, and a first resistor, a first diode, a first capacitor, and a current mutation suppression element connected in series, wherein the current suppression element is used to absorb high-frequency electrical signals, the varistor is connected in parallel with the first capacitor, one end of the varistor is connected to one end of the first resistor, and the other end of the varistor is connected to one end of the current mutation suppression element; one end of the first capacitor is connected to the output end of the first diode, the other end of the first capacitor is connected to the other end of the current mutation suppression element, and one end of the first capacitor is also used to connect the working chip of the electronic instrument. The present invention can achieve the purpose of suppressing surge coupling current.

Description

Technical Field

[0001] The present invention relates to the technical field of electrical measurement, and in particular to a winding surge suppression circuit and an instrument. Background Art

[0002] At present, winding surge testing is required in the instrument industry at home and abroad. The output of the combination wave generator is applied to the voltage loop input end of the electric energy meter being tested. During the test, a surge current of 8 / 20us will be coupled into the electric energy meter loop.

[0003] However, the existing technology cannot effectively suppress the surge coupling current. Summary of the invention

[0004] The object of the present invention is to provide a winding surge suppression circuit and an instrument to achieve the purpose of suppressing surge coupling current in view of the above-mentioned deficiencies in the prior art.

[0005] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0006] In a first aspect, an embodiment of the present application provides a winding surge suppression circuit, which is applied to an electronic instrument, and the circuit includes: a current suppression loop for connecting two stages of a test input terminal;

[0007] The current suppression loop includes: a varistor, and a first resistor, a first diode, a first capacitor and a current mutation suppression element connected in series, wherein the current mutation suppression element is used to absorb high-frequency electrical signals;

[0008] The varistor is connected in parallel with the first capacitor, one end of the varistor is connected to one end of the first resistor, and the other end of the varistor is connected to one end of the current mutation suppression element; one end of the first capacitor is connected to the output end of the first diode, the other end of the first capacitor is connected to the other end of the current mutation suppression element, and one end of the first capacitor is also used to connect to the working chip of the electronic instrument.

[0009] Furthermore, the current sudden change suppression element includes: a magnetic bead or a first inductor.

[0010] Further, it also includes: a second diode;

[0011] One end of the first capacitor is connected to the input end of the second diode, and the output end of the second diode is used to connect to the working chip of the electronic instrument.

[0012] Furthermore, it also includes: a reverse freewheeling circuit;

[0013] The reverse freewheeling loop includes: a third diode; the input end of the third diode is used to connect to the source pin of the working chip of the electronic instrument, and the output end of the third diode is used to connect to the drain pin of the working chip of the electronic instrument.

[0014] Furthermore, the reverse freewheeling circuit further includes: a second resistor and a third resistor;

[0015] One end of the second resistor and the third resistor is connected to the ground terminal of the working chip of the electronic instrument, and the other end of the second resistor and the third resistor is connected to the source pin of the working chip of the electronic instrument.

[0016] Furthermore, the reverse freewheeling loop also includes: a second capacitor; the second capacitor is connected in parallel with the second resistor and the third resistor.

[0017] Furthermore, the reverse freewheeling circuit also includes: a third capacitor and a fourth resistor connected in parallel with the third diode; one end of the third capacitor is connected to the output end of the third diode, the other end of the third capacitor is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the input end of the third diode.

[0018] In a second aspect, an embodiment of the present application further provides an instrument, comprising: a winding surge suppression circuit as described in any one of the first aspects above, and a working chip;

[0019] One end of the first capacitor in the current suppression loop of the winding surge suppression circuit is used to connect to the working chip.

[0020] Furthermore, the current sudden change suppression element of the current suppression loop includes: a magnetic bead or a first inductor.

[0021] Furthermore, the winding surge suppression circuit further includes: a reverse freewheeling circuit;

[0022] The reverse freewheeling loop includes: a third diode; the input end of the third diode is used to connect to the ground end of the working chip of the electronic instrument, and the output end of the third diode is used to connect to the drain pin of the working chip of the electronic instrument.

[0023] The beneficial effect of the present application is: a winding surge suppression circuit and an instrument provided by the embodiment of the present application, by setting a varistor, a first resistor, a first diode, a first capacitor and a current mutation suppression element in the winding surge suppression circuit, when performing a winding surge test, the current mutation suppression element can absorb high-frequency signals, thereby achieving suppression of surge coupling current. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 A schematic diagram of a winding surge suppression circuit provided in an embodiment of the present application;

[0026] Figure 2 A schematic diagram of another winding surge suppression circuit provided in an embodiment of the present application;

[0027] Figure 3 A schematic diagram of another winding surge suppression circuit provided in an embodiment of the present application;

[0028] Figure 4 A schematic diagram of another winding surge suppression circuit provided in an embodiment of the present application;

[0029] Figure 5 A schematic diagram of another winding surge suppression circuit provided in an embodiment of the present application;

[0030] Figure 6 A schematic diagram of another winding surge suppression circuit provided in an embodiment of the present application.

[0031] Icon: 100-winding surge suppression circuit; 10-two stages of test input terminal; 11-ground terminal; 12-varistor; 13-first resistor; 14-first diode; 15-first capacitor; 16-current mutation suppression element; 20-second diode; 21-working chip; 23-working chip ground terminal; 24-fourth capacitor; 25-first inductor; 31-third diode; 32-D pin; 33-S pin; 41-second resistor; 42-third resistor; 51-second capacitor; 61-third capacitor; 62-fourth resistor; 63-fifth capacitor; 64-fifth resistor; 65-sixth capacitor. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0033] Figure 1 A schematic diagram of a winding surge suppression circuit 100 provided in an embodiment of the present application is applied to electronic instruments, such as Figure 1As shown, the winding surge suppression circuit includes: a current suppression loop for connecting two stages 10 of the test input terminal, the current suppression loop includes: a varistor 12, and a first resistor 13, a first diode 14, a first capacitor 15 and a current mutation suppression element 16 connected in series, wherein the current mutation suppression element 16 is used to absorb high electrical frequency signals.

[0034] The varistor 12 is connected in parallel with the first capacitor 15, one end of the varistor 12 is connected to one end of the first resistor 13, and the other end of the varistor 12 is connected to one end of the current mutation suppression element 16; one end of the first capacitor 15 is connected to the output end of the first diode 14, the other end of the first capacitor 15 is connected to the other end of the current mutation suppression element 16, and one end of the first capacitor 15 is also used to connect the working chip of the electronic instrument.

[0035] The working chip may be, for example, an integrated switching power supply chip, and the current suppression circuit is connected to the working chip, so that the surge coupling current can be suppressed during the winding surge test to protect the working chip.

[0036] Specifically, in the winding surge test, the input of the two-stage test input terminal 10 can be an AC signal generated by a combination wave generator, or an AC signal applied by other circuits, which is not limited here. The varistor 12 is used to limit the current in the circuit when the input AC signal changes suddenly; then the input AC signal flows through the first resistor 13, and the first resistor 13 is used to limit the current in the circuit and protect the circuit. When the AC current flows through the first diode 14, the first diode 14 rectifies the AC signal. The winding surge suppression circuit 100 is used to convert the AC signal into a DC signal. The first capacitor 15 is used to filter the high-frequency signal in the circuit. The current mutation suppression element 16 is used to suppress the surge coupling current in the circuit. When the surge current is coupled to the winding surge suppression circuit, the current mutation suppression element 16 will suppress the winding surge coupling current, so that the peak current of each component in the winding surge suppression circuit 100 is greatly reduced, thereby protecting the components in the circuit and preventing the surge coupling current from being too large and burning out the components in the circuit (such as various working chips, etc.).

[0037] In summary, the embodiment of the present application provides a winding surge suppression circuit, which suppresses surge coupling current by providing a current mutation suppression element in a current suppression loop, thereby preventing working chips in electronic instruments from being damaged.

[0038] Optionally, the current mutation suppression element 16 in the winding surge suppression circuit 100 may be a magnetic bead or a first inductor. There is no limit to the number of magnetic beads or first inductors in the circuit, and they are arranged according to specific circumstances.

[0039] Further, Figure 2 Another schematic diagram of a winding surge suppression circuit provided in an embodiment of the present application further includes: a second diode 20 .

[0040] One end of the first capacitor 15 is connected to the input end of the second diode 20 , and the output end of the second diode 20 is used to connect to the working chip 21 of the electronic instrument.

[0041] in, Figure 2 In the figure, one second diode 20 is taken as an example. In the specific implementation process, the number of the second diodes 20 is not limited and they are arranged according to specific circumstances.

[0042] A filtering circuit can also be connected between one end of the first capacitor 15 and the input end of the second diode 20. The filtering circuit includes: a fourth capacitor 24 and a first inductor 25. One end of the first capacitor 15 is connected to the input end of the first inductor 25, the output end of the first inductor 25 and one end of the fourth capacitor 24 are both connected to the input end of the second diode 20, and the other end of the fourth capacitor 24 is connected to the ground terminal 11. The filtering circuit is used to filter out high-frequency signals in the circuit. The filtering circuit is arranged according to specific circumstances and is not limited here.

[0043] Further, Figure 3 Another winding surge suppression circuit schematic provided for an embodiment of the present application also includes: a reverse freewheeling circuit, the reverse freewheeling circuit includes: a third diode 31, the input end of the third diode 31 is used to connect the source of the working chip of the electronic instrument, and the output end of the third diode 31 is used to connect the drain of the working chip of the electronic instrument.

[0044] In this embodiment, the HF900 series integrated switching power supply chip is used as an example of a working chip, which is suitable for high voltage input off-line power supply applications. Among them, the drain of the working chip is the D pin 32, which is used to input the startup high voltage current source, and the source of the working chip is the S pin 33, which is used to input the primary current detection signal.

[0045] Specifically, when the reverse surge coupling current flows through the S pin 33 to the D pin 32 of the working chip, a negative voltage will be generated on the D pin 32 to the S pin 33 of the working chip 21, causing damage to the working chip 21. When the third diode 31 is arranged at the S pin 33 to the D pin 32, when the reverse surge coupling current flows through the S pin 33 to the D pin 32 of the working chip, the third diode 31 will continue the reverse surge coupling current, and then, the reverse surge coupling current flows from the S pin 33 of the working chip 21 through the third diode 31 to the D pin 32 of the working chip 21, and no negative voltage will be generated on the pin of the working chip 21, thereby protecting the working chip 21 and continuing the reverse surge coupling current.

[0046] To summarize, the embodiment of the present application provides another winding surge suppression circuit, in which a reverse third diode is provided in the reverse freewheeling loop. When the reverse surge coupling current flows through the S pin to the D pin of the working chip, the third diode will freewheel the reverse surge coupling current. Then, the reverse surge coupling current will flow from the S pin of the working chip to the D pin of the working chip through the freewheeling third diode, thereby avoiding the generation of negative voltage on the pin of the working chip, thereby achieving the purpose of freewheeling the reverse surge coupling current.

[0047] It should be noted that only the above-mentioned current suppression loop can be set during the test. If the suppression effect of the above-mentioned current suppression loop is good during the test and the effect of protecting the working chip can be achieved, the reverse freewheeling loop can be omitted. The reverse freewheeling loop can further better protect the working chip.

[0048] Further, Figure 4 For another schematic diagram of a winding surge suppression circuit provided in an embodiment of the present application, please refer to Figure 4 The reverse freewheeling circuit also includes: a second resistor 41 and a third resistor 42.

[0049] One end of the second resistor 41 and the third resistor 42 is used to connect to the ground terminal 23 of the working chip of the electronic instrument, and the other end of the second resistor 41 and the third resistor 42 is used to connect to the S pin 33 of the working chip of the electronic instrument. The second resistor 41 and the third resistor 42 are used to provide overvoltage protection for the working chip 21.

[0050] Specifically, when the reverse surge coupling current flows through the S pin 33 to the D pin 32 of the working chip, the third diode 31 will continue the reverse surge coupling current, and then, the reverse surge coupling current will flow from the S pin 33 of the working chip 21 through the second resistor 41, the third resistor 42 and the third diode 31 to the D pin 32, avoiding the generation of negative voltage on the pin of the working chip 21, thereby achieving the continued flow of the reverse surge coupling current, and the reverse surge coupling current will not flow directly from the D pin 32 of the working chip 21 to the S pin 33.

[0051] Further, Figure 5 A schematic diagram of another winding surge suppression circuit provided in an embodiment of the present application is shown in FIG. Figure 5 As shown, the reverse freewheeling circuit also includes: a second capacitor 51 , which is connected in parallel with the second resistor 41 and the third resistor 42 , and is used to filter out low-frequency signals in the surge coupling current in the working chip 21 .

[0052] Further, Figure 6 Another schematic diagram of a winding surge suppression circuit provided in an embodiment of the present application is as follows: Figure 6As shown, the reverse freewheeling circuit also includes: a third capacitor 61 and a fourth resistor 62 connected in parallel with the third diode 31, one end of the third capacitor 61 is connected to the output end of the third diode 31, the other end of the third capacitor 61 is connected to one end of the fourth resistor 62, and the other end of the fourth resistor 62 is connected to the input end of the third diode 31.

[0053] Optionally, the peripheral circuit of the working chip 21 also includes: a fifth capacitor 63, a fifth resistor 64, and a sixth capacitor 65, wherein one end of the fifth capacitor 63 is connected to the FB pin of the working chip of the electronic instrument, the other end of the fifth capacitor 63 is connected to the ground terminal 23 of the working chip of the electronic instrument, the fifth resistor 64 and the sixth capacitor 65 are connected in parallel, one end of the parallel connection of the fifth resistor 64 and the sixth capacitor 65 is connected to the FSET pin of the working chip 21, and the other end is connected to the ground terminal 23 of the working chip.

[0054] Among them, the FB pin is used for output voltage feedback. The current detection signal of this pin and the S pin determines the PWM duty cycle to form an open-loop feedback protection. The FSET pin is used to continuously adjust the switching frequency of the working chip 21 to avoid the communication frequency of any carrier module, thereby ensuring the authenticity and reliability of the communication information and improving the electromagnetic compatibility performance of the working chip 21.

[0055] To summarize, the embodiment of the present application provides another winding surge suppression circuit, in which a third diode is provided in the reverse freewheeling loop. When the reverse surge coupling current flows through the S pin to the D pin of the working chip, the third diode will freewheel the reverse surge coupling current. Then, the reverse surge coupling current will flow from the S pin of the working chip to the D pin of the working chip through the freewheeling third diode, thereby avoiding the generation of negative voltage on the pin of the working chip, thereby achieving the purpose of freewheeling the reverse surge coupling current.

[0056] Optionally, the present invention further provides an instrument, comprising: the winding surge suppression circuit 100 provided in the above embodiment, and a working chip 21.

[0057] One end of the first capacitor 15 in the current suppression loop of the winding surge suppression circuit 100 is used to connect to the working chip 21 .

[0058] Optionally, the current sudden change suppression element 16 of the current suppression loop includes: a magnetic bead or a first inductor.

[0059] Optionally, the winding surge suppression circuit 100 further includes: a reverse freewheeling circuit.

[0060] The above-mentioned instrument is used to execute the winding surge suppression circuit 100 and the working chip 21 provided in the above-mentioned embodiment. Its implementation principle and technical effect are similar and will not be repeated here.

[0061] In summary, the embodiments of the present application provide a winding surge suppression circuit and an instrument, wherein, according to the circuit requirements, a current mutation suppression element is set in the winding surge suppression circuit, and the current mutation suppression element is used to absorb high-frequency signals, thereby achieving suppression of surge coupling current. When the surge suppression coupling current suppression effect is not optimal, a reverse third diode is set in the reverse freewheeling circuit to continue the reverse surge coupling current, so that the reverse surge coupling current does not flow from the source pin of the working chip to the drain pin, thereby avoiding the generation of negative voltage on the pin of the working chip, thereby achieving the purpose of continuing the reverse surge coupling current.

[0062] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0063] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0064] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0065] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to perform some steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (English: Read-Only Memory, abbreviated: ROM), random access memory (English: Random Access Memory, abbreviated: RAM), disk or optical disk and other media that can store program codes.

Claims

1. A winding surge suppression circuit, characterized in that: Applied to electronic instruments, the circuit comprises: a current suppression loop for connecting two stages of a test input terminal; The current suppression loop includes: a varistor, and a first resistor, a first diode, a first capacitor and a current mutation suppression element connected in series, wherein the current mutation suppression element is used to absorb high electrical frequency signals; The varistor is connected in parallel with the first capacitor, one end of the varistor is connected to one end of the first resistor, and the other end of the varistor is connected to one end of the current mutation suppression element; one end of the first capacitor is connected to the output end of the first diode, the other end of the first capacitor is connected to the other end of the current mutation suppression element, and one end of the first capacitor is also used to connect the working chip of the electronic instrument; Among them, it also includes: a reverse freewheeling circuit; The reverse freewheeling loop includes: a third diode; the input end of the third diode is used to connect to the source pin of the working chip of the electronic instrument, and the output end of the third diode is used to connect to the drain pin of the working chip of the electronic instrument; wherein the drain pin of the working chip is used to input a startup high-voltage current source, and the source pin of the working chip is used to input a primary current detection signal.

2. The circuit according to claim 1, characterized in that The current mutation suppression element includes: a magnetic bead or a first inductor.

3. The circuit according to claim 1 or 2, characterized in that: Also includes: A second diode; One end of the first capacitor is connected to the input end of the second diode, and the output end of the second diode is used to connect to the working chip of the electronic instrument.

4. The circuit according to claim 1, characterized in that The reverse freewheeling loop further includes: a second resistor and a third resistor; One end of the second resistor and the third resistor is connected to the ground terminal of the working chip of the electronic instrument, and the other end of the second resistor and the third resistor is connected to the source pin of the working chip of the electronic instrument.

5. The circuit according to claim 4, characterized in that The reverse freewheeling loop also includes: a second capacitor; the second capacitor is connected in parallel with the second resistor and the third resistor.

6. The circuit according to claim 4 or 5, characterized in that The reverse freewheeling loop also includes: a third capacitor and a fourth resistor connected in parallel with the third diode; one end of the third capacitor is connected to the output end of the third diode, the other end of the third capacitor is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the input end of the third diode.

7. An instrument, characterized in that: include: The winding surge suppression circuit and the working chip as described in any one of claims 1 to 6; One end of the first capacitor in the current suppression loop of the winding surge suppression circuit is used to connect to the working chip; Wherein, the surge suppression circuit further includes: a reverse freewheeling loop; The reverse freewheeling loop includes: a third diode; the input end of the third diode is used to connect to the source pin of the working chip of the electronic instrument, and the output end of the third diode is used to connect to the drain pin of the working chip of the electronic instrument.

8. The meter according to claim 7, characterized in that The current suppression element of the current suppression loop includes: a magnetic bead or a first inductor.

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