Array substrate, display panel and display device

Abstract

The embodiment of the present invention provides an array substrate, a display panel and a display device using the array substrate. The array substrate is defined with a display area and a camera hole area surrounded by the display area. The camera hole area includes a light-transmitting area, a first routing area adjacent to the light-transmitting area, and a second routing area surrounding the first routing area. The array substrate includes a first substrate, a first conductive layer, a second conductive layer, a common electrode layer, a third conductive layer, a planarization layer and an optical spacer. The planarization layer is aligned with the light-transmitting area and is in direct contact with the first substrate. The optical spacer is aligned with the first routing area. The third conductive layer is arranged to bypass the light-transmitting area and the first routing area.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to an array substrate, a display panel using the array substrate, and a display device using the display panel. Background Art

[0002] As users have increasing demands for diversified functions of electronic devices such as mobile phones and tablet computers, they often need to be combined with components having other functions. Among them, electronic devices combined with camera modules have been widely produced and used.

[0003] Taking an array substrate including multiple wires in an electronic device as an example, the array substrate needs to be provided with a camera hole area exposing the camera module. However, the camera hole area will affect the arrangement of the wires on the array substrate and even affect the performance of the electronic device. Summary of the invention

[0004] In one aspect, the present invention provides an array substrate, wherein the array substrate is defined with a display area and a camera hole area surrounded by the display area, wherein the camera hole area includes a light-transmitting area and a wiring area surrounding the light-transmitting area, wherein the wiring area includes a first wiring area adjacent to the light-transmitting area and a second wiring area surrounding the first wiring area, and wherein the array substrate includes a first substrate and a first conductive layer, a second conductive layer, a common electrode layer, and a third conductive layer sequentially stacked on the first substrate and spaced from each other and insulated from each other:

[0005] The first conductive layer includes a plurality of first scanning lines arranged at intervals;

[0006] The second conductive layer includes a plurality of first data lines arranged at intervals;

[0007] The common electrode layer includes a plurality of sub-electrodes arranged at intervals. During the display time of a frame, each of the sub-electrodes is used to receive a common voltage and a touch signal voltage in a time-sharing manner.

[0008] The third conductive layer includes a plurality of first touch control traces arranged at intervals, and each of the first touch control traces is electrically connected to at least one of the sub-electrodes;

[0009] The array substrate further includes:

[0010] a planarization layer, located between the common electrode layer and the third conductive layer, the planarization layer being aligned with the light-transmitting area and directly contacting the first substrate, and the planarization layer being aligned with the wiring area and the display area and covering the common electrode layer; and

[0011] An optical spacer is located on a surface of the planarization layer away from the first substrate, and the optical spacer is aligned with the first wiring area;

[0012] The third conductive layer is located on the surface of the planarization layer away from the first substrate, and the third conductive layer bypasses the light-transmitting area and the first wiring area and is aligned with the second wiring area and the display area.

[0013] Since the optical gap is provided in the first wiring area adjacent to the light-transmitting area in the array substrate, the concave condition of the camera hole area can be improved, so as to reduce the difference between the cell gap at the light-transmitting area and the cell gap at the display area, thereby ensuring the imaging effect of the camera module of the display device using the array substrate, and also avoiding the occurrence of water ripples and the like due to uneven cell thickness, which affects the display effect.

[0014] Another aspect of the present invention provides a display panel, including a color filter substrate, a liquid crystal layer and an array substrate, wherein the liquid crystal layer is sandwiched between the color filter substrate and the array substrate, and the array substrate is the above-mentioned array substrate.

[0015] Since the optical gap is provided in the first wiring area adjacent to the light-transmitting area in the array substrate, the concave condition of the camera hole area can be improved, so as to reduce the difference between the cell gap at the light-transmitting area and the cell gap at the display area, thereby ensuring the imaging effect of the lens of the camera module of the display device using the display panel, and also avoiding the occurrence of water ripples and the like caused by uneven cell thickness, which affects the display effect.

[0016] Another aspect of the present invention provides a display device, comprising:

[0017] The above-mentioned display panel;

[0018] a backlight module, the backlight module being located at a side of the display panel away from the display surface thereof, the backlight module being defined with a mounting hole penetrating the backlight module, the mounting hole being aligned with the light-transmitting area; and

[0019] A camera module is installed in the installation hole and collects image information through the light-transmitting area.

[0020] Since the optical gap is provided in the first wiring area adjacent to the light-transmitting area in the array substrate, the concave condition of the camera hole area can be improved, so as to reduce the difference between the cell gap at the light-transmitting area and the cell gap at the display area, thereby ensuring the imaging effect of the lens of the camera module of the display device, and also avoiding the occurrence of water ripples and other phenomena caused by uneven cell thickness, which affect the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 FIG. 4 is a schematic top view of an array substrate according to an embodiment of the present invention.

[0022] Figure 2 for Figure 1 Schematic diagram of the cross section taken along section line II-II.

[0023] Figure 3 for Figure 1 Schematic diagram of the arrangement of scan lines and data lines of the array substrate.

[0024] Figure 4 for Figure 3 Enlarged schematic diagram of IV in the middle.

[0025] Figure 5 for Figure 1 Schematic diagram of the layout of the touch lines of the array substrate.

[0026] Figure 6 for Figure 5 Enlarged schematic diagram of point VI in the middle.

[0027] Figure 7 FIG. 4 is a cross-sectional schematic diagram of a display panel according to an embodiment of the present invention.

[0028] Figure 8 FIG. 4 is a cross-sectional schematic diagram of a display device according to an embodiment of the present invention.

[0029] Main component symbols

[0030] Array substrate 10

[0031] Display Area A

[0032] The first symmetry axis L1

[0033] The second symmetry axis L2

[0034] Left Area AL

[0035] Right Area AR

[0036] Upper AT

[0037] Lower area AB

[0038] Camera hole area B

[0039] Light transmission area B1

[0040] Routing area B2

[0041] First routing area B21

[0042] The second routing area B22

[0043] First substrate 11

[0044] The first conductive layer 12

[0045] The first scanning line 122

[0046] The second scanning line 124

[0047] First insulating layer 13

[0048] The second conductive layer 14

[0049] The first data line 142

[0050] The second data line 144

[0051] Sub-pixel 141

[0052] Thin Film Transistor 143

[0053] Gate GE

[0054] Source SE

[0055] Drain DE

[0056] Pixel electrode 145

[0057] The second insulating layer 15

[0058] Common electrode layer 16

[0059] Sub-electrode 162

[0060] Planarization layer 17

[0061] Via 172

[0062] The third conductive layer 18

[0063] First touch line 182

[0064] Second touch line 184

[0065] Optical spacer 19

[0066] First direction X

[0067] Second direction Y

[0068] Color filter substrate 20

[0069] Second substrate 21

[0070] Black Matrix 23

[0071] Color filter layer 25

[0072] Covering layer 27

[0073] Liquid crystal layer 30

[0074] Display panel 40

[0075] Display surface 40a

[0076] Backlight module 50

[0077] Mounting holes 52

[0078] Camera module 60

[0079] Display device 100

[0080] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0081] Figure 1 FIG. 1 is a schematic top view of an array substrate 10 according to an embodiment of the present invention. Figure 1 As shown, the array substrate 10 is defined with a display area A and a camera hole area B surrounded by the display area A. The camera hole area B is defined with a light-transmitting area B1 and a wiring area B2 surrounding the light-transmitting area B1. The wiring area B2 includes a first wiring area B21 adjacent to the light-transmitting area B1 and a second wiring area B22 surrounding the first wiring area B21. The camera hole area B is a light-transmitting area. The camera hole area B and the light-transmitting area B1 are roughly circular. The wiring area B2 is a ring. In other embodiments, the camera hole area B can also be other shapes. For example, an ellipse, a polygon, etc.

[0082] Figure 2 for Figure 1 Schematic diagram of the section along section line II-II. Figure 2 As shown, the array substrate 10 includes a first substrate 11 and a first conductive layer 12, a second conductive layer 14, a common electrode layer 16 and a third conductive layer 18 which are sequentially stacked on the first substrate 11 and are spaced apart from each other and insulated. A first insulating layer 13 is disposed between the first conductive layer 12 and the second conductive layer 14. A second insulating layer 15 is disposed between the second conductive layer 14 and the common electrode layer 16. A planarization layer 17 is disposed between the common electrode layer 16 and the third conductive layer 18.

[0083] The first conductive layer 12, the first insulating layer 13, the second conductive layer 14, the second insulating layer 15 and the common electrode layer 16 all bypass the light-transmitting area B1 and are aligned with the display area A, the first wiring area B21 and the second wiring area B22. The planarization layer 17 is aligned with the area of ​​the light-transmitting area B1 and is in direct contact with the first substrate 11. The planarization layer 17 is aligned with the area of ​​the first wiring area B21, the second wiring area B22 and the display area A and covers the common electrode layer 16. The third conductive layer 18 bypasses the light-transmitting area B1 and the first wiring area B21 and is aligned with the display area A and the second wiring area B22.

[0084] like Figure 2As shown, the array substrate 10 also includes a plurality of optical spacers 19 (photo spacers, PS) arranged to align with the first wiring area B21. The optical spacers 19 are located on the surface of the planarization layer 17 away from the first substrate 11. A plurality of optical spacers 19 can be arranged around the light-transmitting area B1. In an embodiment of the present invention, an optical spacer 19 is arranged in the first wiring area B21 adjacent to the light-transmitting area B1, which can improve the depression of the light-transmitting area B1 and achieve the purpose of reducing the difference between the cell thickness (cell gap) at the position of the light-transmitting area B1 and the cell thickness of the display area A. In addition, the imaging effect of the lens of the camera module 60 of the display device 100 using the display panel 40 is guaranteed, and at the same time, the occurrence of water ripples and the like caused by uneven cell thickness that affect the display effect is avoided.

[0085] The first conductive layer 12 includes a plurality of scanning lines (such as Figure 3 The second conductive layer 14 includes a plurality of data lines (such as Figure 3 The third conductive layer 18 includes a plurality of first touch control traces 182 and a plurality of second touch control traces 184 (as shown in FIG. Figure 5 The common electrode layer 16 includes a plurality of sub-electrodes 162 arranged at intervals (as shown in FIG. Figure 6 In the display time of one frame, each of the sub-electrodes 162 is used to receive the common voltage and the touch signal voltage in a time-sharing manner. That is, the array substrate 10 can be applied to the embedded touch display panel 40.

[0086] Figure 3 for Figure 1 FIG. 1 is a schematic diagram showing the arrangement of scan lines and data lines of the array substrate 10. Figure 3 As shown, the routing area B2 has a first symmetry axis L1 and a second symmetry axis L2. Along the first direction X, the routing area B2 is axially symmetrically distributed about the second symmetry axis L2. Along the second direction Y, the routing area B2 is axially symmetrically distributed about the first symmetry axis L1. The second direction Y intersects with the first direction X. Along the first direction X, the display area A is divided by the second symmetry axis L2 into a left area AL and a right area AR, which are respectively located on opposite sides of the second symmetry axis L2. Along the second direction Y, the display area A is divided by the first symmetry axis L1 into an upper area AT and a lower area AB, which are respectively located on opposite sides of the first symmetry axis L1. That is, the left area AL and the right area AR constitute the entire display area A. The upper area AT and the lower area AB also constitute the entire display area A. The left area AL has overlapping areas with the upper area AT and the lower area AB, and the right area AR has overlapping areas with the upper area AT and the lower area AB. In one embodiment, the second direction Y is perpendicular to the first direction X.

[0087] like Figure 3As shown, the scan line includes a plurality of first scan lines 122. The plurality of first scan lines 122 extend across the routing area B2 and are arranged in sequence along the second direction Y. Part of the first scan lines 122 extends in the upper area AT and the routing area B2, and another part of the first scan lines 122 extends in the lower area AB and the routing area B2. The plurality of first scan lines 122 are axially symmetrically distributed about the first symmetry axis L1. The portion of each first scan line 122 in the routing area B2 is axially symmetrically distributed about the second symmetry axis L2. Each first scan line 122 extends along the first direction X to the routing area B2 in the left area AL, and bends and extends around the outer contour of the light-transmitting area B1 in the routing area B2, and also extends along the first direction X in the right area AR. That is, the arrangement of each first scan line 122 bypasses the light-transmitting area B1, crosses the routing area B2, and extends along the first direction X in the display area A. The first scan line 122 in the upper area AT and the wiring area B2 bends and extends along the upper half of the light-transmitting area B1 , and the first scan line 122 in the lower area AB and the wiring area B2 bends and extends along the lower half of the light-transmitting area B1 .

[0088] Each first scan line 122 includes a straight line portion extending along the first direction X in the left area AL, a curved portion extending around the outer contour of the light-transmitting area B1 in the wiring area B2, and a curved portion ( Figure 3 The first scanning line 122 is a first scanning line 122 having a first scanning line 122 extending in the first direction X. The first scanning line 122 having a first scanning line 122 extending in the first direction X is a first scanning line 122 extending in the first direction X. The ... an arc in the right area AR and a straight line segment extending in the first direction X in the right area AR. The length of the curved portion of the first scanning line 122 varies with the distance from the first symmetry axis L1. The closer the first scanning line 122 is to the first symmetry axis L1, the longer the length of the curved portion of the first scanning line 122 is to the first symmetry axis L1, the shorter the length of the curved portion of the first scanning line 122. In one embodiment, the plurality of first scanning lines 122 are arranged at equal intervals.

[0089] like Figure 3 As shown, the scan lines also include a plurality of second scan lines 124 that are only arranged corresponding to the display area A. The second scan lines 124 extend only in the display area A and do not extend to the routing area B2. Part of the second scan lines 124 are located in the upper area AT, and part of the second scan lines 124 are located in the lower area AB. In the upper area AT, the plurality of second scan lines 124 are arranged at intervals in sequence, and each second scan line 124 extends along the first direction X. In the lower area AB, the plurality of second scan lines 124 are arranged at intervals in sequence, and each second scan line 124 extends along the first direction X. Along the second direction Y, the first scan lines 122 and the second scan lines 124 are arranged in sequence as follows: the plurality of second scan lines 124 located in the upper area AT, the plurality of first scan lines 122 located in the upper area AT, the plurality of first scan lines 122 located in the lower area AB, and the plurality of second scan lines 124 located in the lower area AB.

[0090] In one embodiment, in the left area AL (or the right area AR), along the second direction Y, the spacing between any two adjacent second scan lines 124, the spacing between any two adjacent first scan lines 122, and the spacing between adjacent second scan lines 124 and first scan lines 122 are equal.

[0091] like Figure 3 As shown, the data lines include a plurality of first data lines 142 extending across the routing area B2. The plurality of first data lines 142 are sequentially spaced along the first direction X. Some of the first data lines 142 extend in the left area AL and the routing area B2, and another portion of the first data lines 142 extends in the right area AR and the routing area B2. The plurality of first data lines 142 are all axially symmetrically distributed about the second symmetry axis L2.

[0092] The portion of each first data line 142 in the routing area B2 is axially symmetrically distributed about the first symmetry axis L1. Each first data line 142 extends along the second direction Y to the routing area B2 in the upper area AT, and bends and extends around the outer contour of the light-transmitting area B1 in the routing area B2, and then continues to extend along the second direction Y in the lower area AB. That is, the arrangement of each first data line 142 bypasses the light-transmitting area B1, crosses the routing area B2, and extends along the second direction Y in the display area A. Among them, the first data line 142 located in the left area AL and the routing area B2 bends and extends along the left half of the light-transmitting area B1, and the first data line 142 located in the right area AR and the routing area B2 bends and extends along the right half of the light-transmitting area B1.

[0093] Each first data line 142 includes a straight line portion extending along the second direction Y in the upper area AT, and a curved portion extending around the outer contour of the light-transmitting area B1 in the routing area B2. Figure 3 The first data line 142 is a first data line 142 having a first data line 142 extending in the second direction Y. The first data line 142 is a first data line 142 having a first data line 142 extending in the second direction Y. The first data line 142 extending in the second direction Y is ...

[0094] like Figure 3As shown, the data lines also include a plurality of second data lines 144 arranged corresponding to the display area A. The second data lines 144 extend only in the display area A and do not extend to the routing area B2. Part of the second data lines 144 are located in the left area AL, and part of the second data lines 144 are located in the right area AR. In the left area AL, the plurality of second data lines 144 are arranged in sequence and spaced apart, and each second data line 144 extends along the second direction Y. In the right area AR, the plurality of second data lines 144 are arranged in sequence and spaced apart, and each second data line 144 extends along the second direction Y.

[0095] Please continue reading Figure 3 , all scan lines and all data lines are arranged away from the camera hole area B, so that the camera hole area B is transparent. At least a portion of the first scan lines 122, the first data lines 142, and the second data lines 144 form a ring around the light-transmitting area B1. The portions of all scan lines in the display area A extend along the first direction X, and the portions of all data lines in the display area A extend along the second direction Y. The projections of each first data line 142 and each second data line 144 on the substrate overlap with all first scan lines 122 and all second scan lines 124.

[0096] In one embodiment, the camera hole area B is not used to display images. Any two adjacent ones of the plurality of first scan lines 122 and the plurality of second scan lines 124 and any two adjacent ones of the plurality of first data lines 142 and the plurality of second data lines 144 intersect in the display area A to define a sub-pixel 141 .

[0097] like Figure 4 As shown, each sub-pixel 141 includes a thin film transistor 143 and a pixel electrode 145. The thin film transistor 143 includes a gate GE, a source SE, and a drain DE. The gate GE is electrically connected to one of the first scan line 122 and the second scan line 124. The source SE is electrically connected to one of the first data line 142 and the second data line 144, and the drain DE is electrically connected to the pixel electrode 145.

[0098] like Figure 5 As shown, the plurality of first touch lines 182 are arranged in alignment with the second wiring area B22, but not in the first wiring area B21. The plurality of first touch lines 182 are arranged in sequence and spaced apart along the first direction X. Part of the first touch lines 182 extend in the left area AL and the second wiring area B22, and another part of the first touch lines 182 extend in the right area AR and the second wiring area B22. The plurality of first touch lines 182 are all axially symmetrically distributed about the second symmetry axis L2.

[0099] The portion of each first touch line 182 in the second routing area B22 is axially symmetrically distributed about the first symmetry axis L1. Each first touch line 182 extends along the second direction Y in the upper area AT to the second routing area B22, and bends and extends around the outer contour of the light-transmitting area B1 in the second routing area B22, and then continues to extend along the second direction Y in the lower area AB. That is, the arrangement of each first touch line 182 bypasses the light-transmitting area B1 and the first routing area B21, crosses the second routing area B22, and extends along the second direction Y in the display area A. Among them, the first touch line 182 located in the left area AL and the second routing area B22 bends and extends along the left half of the light-transmitting area B1, and the first touch line 182 located in the right area AR and the second routing area B22 bends and extends along the right half of the light-transmitting area B1.

[0100] Each first touch sensing trace 182 includes a straight line portion extending along the second direction Y in the upper area AT, and a curved line portion extending around the outer contour of the light-transmitting area B1 in the second trace area B22. Figure 5 The first touch line 182 is a first touch line 182 having a curved portion and a straight line portion extending in the second direction Y in the lower area AB. The length of the curved portion of the first touch line 182 changes with the distance from the second symmetry axis L2. The closer the first touch line 182 is to the second symmetry axis L2, the longer the length of the curved portion; the farther the first touch line 182 is from the first symmetry axis L1, the shorter the length of the curved portion. In one embodiment, a plurality of first touch lines 182 are arranged at equal intervals.

[0101] like Figure 5 As shown, the third conductive layer 18 also includes a plurality of second touch lines 184 arranged corresponding to the display area A. The second touch lines 184 extend only in the display area A and do not extend to the line area B2. Part of the second touch lines 184 are located in the left area AL, and part of the second touch lines 184 are located in the right area AR. In the left area AL, the plurality of second touch lines 184 are arranged in sequence and spaced apart, and each second touch line 184 extends along the second direction Y. In the right area AR, the plurality of second touch lines 184 are arranged in sequence and spaced apart, and each second touch line 184 extends along the second direction Y.

[0102] Figure 6 for Figure 5 The enlarged schematic diagram of VI in the figure. Figure 6As shown, a plurality of sub-electrodes 162 are arranged in sequence at intervals. The array substrate 10 also includes a driving circuit (not shown) for outputting voltage to the plurality of sub-electrodes 162. The voltage can be a touch voltage signal and a common voltage. The sub-electrode 162 receives the touch signal voltage and the common voltage in a time-sharing manner. When the sub-electrode 162 is used for touch control, the sub-electrode 162 is used to receive the touch signal voltage, and when the sub-electrode 162 is used as a common electrode, the sub-electrode 162 is used to receive the common voltage. Each sub-electrode 162 is electrically connected to the driving circuit through at least one touch wiring (a first touch wiring 182 or a second touch wiring 184). The first touch wiring 182 or the second touch wiring 184 is electrically connected to the corresponding sub-electrode 162 through a via 172 that passes through the planarization layer 17.

[0103] Please refer to Figure 3 and Figure 5 , the first wiring area B21 and the wiring area B2 are both ring-shaped. The first scan line 122 formed by the first conductive layer 12 and the first data line 142 formed by the second conductive layer 14 are all distributed throughout the wiring area B2. The first touch wiring 182 formed by the third conductive layer 18 is distributed throughout the second wiring area B22, but is not arranged in the first wiring area B21 adjacent to the light-transmitting area B1.

[0104] like Figure 2 As shown, the optical spacer 19 is arranged on the planarization layer 17 at a position aligned with the first wiring area B21. That is, the optical spacer 19 is arranged on the surface of the planarization layer 17 where the first touch wiring 182 is not arranged. In this way, the flatness of the optical spacer 19 will not be affected by the arrangement of the first touch wiring 182. Moreover, the optical spacer 19 is arranged around the light-transmitting area B1 in the camera hole area B, which can avoid the problem that the position box thickness of the light-transmitting area B1 and the peripheral box thickness of the light-transmitting area B1 are greatly different due to the removal of part of the film layer (such as the thin film transistor array layer) of the array substrate 10 at the position corresponding to the light-transmitting area B1, thereby affecting the display effect.

[0105] like Figure 5As shown, the ring width of the first wiring area B21 is defined as W1, and the ring width of the wiring area B2 is defined as W2. In one embodiment, the ring width W1 of the first wiring area B21 is at least one-fifth of the ring width W2 of the wiring area B2. That is, the area where the first touch wiring 182 is located is at least one-fifth of the ring width W2 of the wiring area B2 away from the light-transmitting area B1, so that there is enough space to ensure that the optical spacer 19 can be directly formed on the planarization layer 17. In addition, aligned with the display area A, the array substrate 10 can also be provided with a main optical spacer to maintain the gap between the array substrate 10 and the color filter substrate 20. In the embodiment of the present invention, by providing the optical spacer 19 in the first wiring area B21 adjacent to the light-transmitting area B1, the support at the junction of the display area A and the camera hole area B is close or the same.

[0106] In one embodiment, the material of the first substrate 11 is a transparent hard material, such as glass, quartz, or plastic. In other embodiments, the first substrate 11 can be made of a flexible material, such as one or more of polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), and polyethylene terephthalate (PET). The material of the first conductive layer 12, the second conductive layer 14, and the third conductive layer 18 can be selected from at least one of aluminum, silver, gold, chromium, copper, indium, manganese, molybdenum, nickel, neodymium, palladium, platinum, titanium, tungsten, and zinc. The material of the first insulating layer 13, the second insulating layer 15, and the planarization layer 17 can be selected from silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), etc.

[0107] Figure 7 FIG. 4 is a cross-sectional view of a display panel 40 provided in one embodiment of the present invention. Figure 7 As shown, the display panel 40 includes an array substrate 10 and a color filter substrate 20 that are arranged opposite to each other, and a liquid crystal layer 30 sandwiched between the array substrate 10 and the color filter substrate 20 .

[0108] The color filter substrate 20 includes a transparent second substrate 21 and a black matrix 23 and a color filter layer 25 located on a side of the second substrate 21 close to the liquid crystal layer 30. The black matrix 23 and the color filter layer 25 are both arranged to bypass the light-transmitting area B1. That is, the black matrix 23 and the filter layer aligned with the light-transmitting area B1 are removed.

[0109] The color filter substrate 20 further includes an overcoating 27 (OC), which is located on a side of the black matrix 23 and the color filter layer 25 away from the second substrate 21, and the region of the overcoating 27 aligned with the light-transmitting region B1 is in direct contact with the second substrate 21. The portion of the overcoating 27 aligned with the light-transmitting region B1 is recessed toward the second substrate 21 relative to the portion of the overcoating 27 aligned with the display region A.

[0110] like Figure 7 As shown, only the planarization layer 17 is retained on the first substrate 11, and only the covering layer 27 is retained on the second substrate 21. Since part of the structure of the display panel 40 aligned with the light-transmitting area B1 (for example, the black matrix 23, the color filter layer 25) is removed, it will cause the first substrate 11 or the second substrate 21 aligned with the light-transmitting area B1 to be easily dented. In the embodiment of the present invention, an optical spacer 19 is provided in the first wiring area B21 adjacent to the light-transmitting area B1, which can improve the dent of the light-transmitting area B1 and achieve the purpose of reducing the difference between the box thickness at the position of the light-transmitting area B1 and the box thickness of the display area A. In this way, the imaging effect of the lens of the camera module 60 of the display device 100 using the display panel 40 is guaranteed, and at the same time, the water ripples caused by the uneven box thickness are avoided to affect the display effect.

[0111] Figure 8 FIG. 1 is a cross-sectional view of a display device 100 provided in one embodiment of the present invention. Figure 8 As shown, the display device 100 includes a display panel 40, a backlight module 50 and a camera module 60. The display panel 40 defines a display surface 40a. The camera module 60 is located on a side of the display panel 40 away from the display surface 40a. The camera module 60 is arranged corresponding to the camera hole area B to collect image information through the camera hole area B.

[0112] The backlight module 50 is a direct-type backlight source. The backlight module 50 includes a light source (not shown), an optical film group (not shown), and a back plate (not shown). The backlight module 50 is defined with a mounting hole 52 that passes through the backlight module 50 corresponding to the camera hole area B. The size of the mounting hole 52 is greater than or approximately equal to the size of the camera hole area B. The camera module 60 is arranged in the mounting hole 52. Since the camera module 60 is arranged corresponding to the camera hole area B surrounded by the display area A, compared with the method of setting the camera module 60 in the frame area surrounding the display area A, the screen-to-body ratio of the display device 100 is improved. The display device 100 can be a mobile phone, a tablet computer, etc.

[0113] The above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention.

Claims

1. An array substrate, characterized in that: The array substrate is defined with a display area and a camera hole area surrounded by the display area, the camera hole area includes a light-transmitting area and a wiring area surrounding the light-transmitting area, the wiring area includes a first wiring area adjacent to the light-transmitting area and a second wiring area surrounding the first wiring area, the array substrate includes a first substrate and a first conductive layer, a second conductive layer, a common electrode layer and a third conductive layer sequentially stacked on the first substrate and spaced from each other and insulated; the material of the first substrate is a hard material or a flexible material; The first conductive layer includes a plurality of first scanning lines arranged at intervals; The second conductive layer includes a plurality of first data lines arranged at intervals; The common electrode layer includes a plurality of sub-electrodes arranged at intervals. During the display time of a frame, each of the sub-electrodes is used to receive a common voltage and a touch signal voltage in a time-sharing manner. The third conductive layer includes a plurality of first touch control traces arranged at intervals, and each of the first touch control traces is electrically connected to at least one of the sub-electrodes; The array substrate further includes: a planarization layer, located between the common electrode layer and the third conductive layer, the planarization layer being aligned with the light-transmitting area and directly contacting the first substrate, and the planarization layer being aligned with the wiring area and the display area and covering the common electrode layer; and An optical spacer is located on a surface of the planarization layer away from the first substrate, and the optical spacer is aligned with the first wiring area; Among them, the third conductive layer is located on the surface of the planarization layer away from the first substrate, the third conductive layer bypasses the light-transmitting area and the first routing area, and is aligned with the second routing area and the display area. The first routing area and the routing area are both ring-shaped, and the ring width of the first routing area is at least one-fifth of the ring width of the routing area.

2. The array substrate according to claim 1, characterized in that: Each of the first scanning lines bypasses the light-transmitting area, crosses the wiring area, and extends along a first direction in the display area; Each of the first data lines bypasses the light-transmitting area, crosses the routing area, and extends along the second direction in the display area; The second direction intersects the first direction; Each of the first touch-sensing wirings bypasses the light-transmissive area and the first wiring area, crosses the second wiring area, and extends along the second direction in the display area.

3. The array substrate according to claim 2, characterized in that: Each of the first scan lines, each of the first data lines, and each of the first touch-control wirings includes a curved portion extending around the light-transmitting area.

4. The array substrate according to claim 3, characterized in that: The third conductive layer further includes a plurality of second touch control wirings, each of which extends along the second direction in the display area, and each of which is electrically connected to at least one of the sub-electrodes.

5. The array substrate according to claim 4, characterized in that: The first conductive layer further includes a plurality of second scan lines, and the second conductive layer further includes a plurality of second data lines. Each of the second scan lines extends along the first direction in the display area, and each of the second data lines extends along the second direction in the display area.

6. The array substrate according to claim 5, characterized in that: Any two adjacent ones of the plurality of first scan lines and the plurality of second scan lines and any two adjacent ones of the plurality of first data lines and the plurality of second data lines intersect in the display area to define a sub-pixel; Each of the sub-pixels includes a thin film transistor and a pixel electrode; The thin film transistor includes a gate, a source, and a drain; The gate is electrically connected to one of the first scan line and the second scan line, the source is electrically connected to one of the first data line and the second data line, and the drain is electrically connected to the pixel electrode.

7. A display panel, comprising a color filter substrate, a liquid crystal layer and an array substrate, wherein the liquid crystal layer is sandwiched between the color filter substrate and the array substrate, characterized in that: The array substrate is the array substrate according to any one of claims 1 to 6.

8. The display panel according to claim 7, wherein: The color filter substrate comprises a second substrate, and a black matrix and a color filter layer located on a side of the second substrate close to the liquid crystal layer. The black matrix and the color filter layer are both arranged around the light-transmitting area.

9. A display device, characterized in that: include: The display panel as claimed in claim 7 or 8; A backlight module, the backlight module is located on a side of the display panel away from the display surface thereof, the backlight module is defined with a mounting hole penetrating the backlight module, and the mounting hole is aligned with the light-transmitting area; as well as A camera module is installed in the installation hole and collects image information through the light-transmitting area.

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