Low-frequency electromagnetic interference shielding layer

Abstract

This disclosure relates to low-frequency electromagnetic interference shielding. Specifically, it relates to a semiconductor packaging device and a method of forming the same. The semiconductor packaging device includes a substrate, an insulating layer disposed on the substrate, and a shielding layer. The shielding layer comprises an adhesive layer and a base layer. The adhesive layer is disposed between the base layer and the insulating layer. The adhesive layer and the base layer comprise a filler composed of at least a resin. The shielding layer passes a cross-cut peel test with a rating of at least 3B, and the shielding effectiveness of the shielding layer is at least or equal to 30 dB.

Description

Technical Field

[0001] This disclosure relates to shielding semiconductor packages from electromagnetic interference. Specifically, this disclosure relates to a semiconductor package having a shielding layer for blocking low-frequency electromagnetic interference. Background Technology

[0002] Existing semiconductor packages typically include a shielding layer to protect the integrated circuits within the package from electromagnetic interference (EMI). The thickness of the shielding layer depends on whether it is intended to block high-frequency or low-frequency EMI signals. High frequency refers to 0.5 GHz to 6 GHz, and low frequency refers to 10 MHz to 100 MHz. For example, to achieve a shielding effect, due to the tunneling effect of low-frequency signals, the shielding layer used to block EMI with relatively low frequencies is thicker than the shielding layer used to block EMI with relatively high frequencies.

[0003] To block high-frequency electromagnetic interference, shielding layers are typically formed on a molding compound using a sputtering process. However, to block low-frequency electromagnetic interference, a relatively thicker shielding layer is required, which can increase manufacturing costs (due to, for example, relatively longer manufacturing time).

[0004] Currently, the method for forming a shielding layer to block low-frequency electromagnetic interference on molding compounds is spraying, which requires a relatively shorter time compared to sputtering.

[0005] Furthermore, to block low-frequency electromagnetic interference of 10MHz, when the shielding layer thickness reaches approximately 40μm, the material meeting the shielding requirements (shielding effectiveness ≥30dB) does not possess good adhesive strength. This means the shielding layer may fail the 3B peel test rating (American Society for Testing and Materials standard). This is because the materials suitable for shielding layers typically have low volume resistivity (Ω·cm). For example, the material used for sputtering is a pure metal with low volume resistivity. However, because this material contains very little or no resin, the adhesion between the shielding layer and the molding compound is reduced. This material will experience some loss during the continuous baking and sintering process, leading to reduced adhesion between the low-volume-resistivity material and the surface of the object to be sprayed (e.g., the molding compound). Therefore, even after the semiconductor package formed in the manner described above passes reliability tests (e.g., temperature cycling tests), the shielding layer of the semiconductor package will still fail to pass at least the 3B peel test rating. Summary of the Invention

[0006] This disclosure provides a shielding layer with a two-layer structure. The shielding layer includes an adhesive layer and a base layer. The adhesive layer is disposed between the base layer and the molding compound. The adhesive layer has a low-loss conductive material and acts as a buffer layer. The adhesive layer provides better adhesion between the base layer and the molding compound to improve the bond strength between the shielding layer and the molding compound caused by subsequent heating or loss differences.

[0007] Furthermore, according to some embodiments of this disclosure, compared to sputtering processes used to form shielding layers for shielding electromagnetic interference, this disclosure uses spraying to form thicker shielding layers for shielding low-frequency electromagnetic interference, requiring a thicker shielding layer. The adhesion strength between the sprayed shielding layer and the molding compound is significantly better than that obtained by sputtering processes. Attached Figure Description

[0008] Figure 1 A cross-sectional view of a semiconductor packaging apparatus according to some embodiments of the present disclosure is shown.

[0009] Figure 2 A schematic diagram illustrating the structure of the shielding layer of a semiconductor packaging device according to some embodiments of the present disclosure.

[0010] Figure 3A A schematic diagram illustrating the structure of the base layer of a semiconductor packaging device according to some embodiments of the present disclosure.

[0011] Figure 3B A schematic diagram illustrating the structure of an adhesive layer provided to form a semiconductor packaging device according to some embodiments of the present disclosure.

[0012] Figure 4 A cross-sectional view of a semiconductor packaging device according to another aspect of this disclosure is shown.

[0013] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar elements. This disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings.

[0014] Figure 5 Display the levels of the grid method. Detailed Implementation

[0015] Figure 1 A cross-sectional view of a semiconductor packaging apparatus 100 according to some embodiments of the present disclosure is shown. The semiconductor packaging apparatus 100 includes a substrate 110. An insulating layer 120 is disposed on the substrate 110. The insulating layer 120 may comprise a molding compound or an encapsulation material.

[0016] A shielding layer 130 is disposed on an insulating layer 120. The shielding layer 130 shields or protects components or devices (e.g., 111, 112, 113, etc.) disposed on a substrate 110 from electromagnetic interference of relatively low frequencies. The shielding layer 130 may include an adhesive layer 140 and a base layer 150. The adhesive layer 140 is disposed between the insulating layer 120 and the base layer 150.

[0017] Adhesive layer 140 contains fillers or particles ( Figure 1 (Not shown in the image). Adhesive layer 140 may include insulating filler. Adhesive layer 140 may include resin-containing filler.

[0018] Base layer 150 contains filler or particles ( Figure 1 (Not shown in the image). The base layer 150 may contain insulating filler. The base layer 150 may contain resin-containing filler.

[0019] According to some embodiments of this disclosure, the filler comprises at least metal particles. Therefore, the adhesive layer 140 and the base layer 150 are conductive layers.

[0020] According to some embodiments of this disclosure, the shielding layer 130 passes at least a 3B peel test rating using the cross-cut method, and the shielding effectiveness of the shielding layer 130 is at least or equal to 30 dB.

[0021] According to some embodiments of this disclosure, the amount or quantity of resin in the adhesive layer 140 is greater than that in the base layer 150. According to some embodiments of this disclosure, the amount or quantity of resin in the adhesive layer 140 is about 3% by weight to 7% by weight. The amount or quantity of resin in the base layer 150 is about 0.1% by weight to 0.3% by weight. According to some embodiments of this disclosure, the amount or quantity of resin in the adhesive layer 140 is about 3% by volume to 7% by volume. The amount or quantity of resin in the base layer 150 is about 0.1% by volume to 0.3% by volume.

[0022] Figure 2 A schematic diagram illustrating the structure of a shielding layer in a semiconductor packaging device according to some embodiments of the present disclosure. (See also...) Figure 2 The shielding layer 130 of the semiconductor package 100 includes an adhesive layer 140 and a base layer 150. The adhesive layer 140 includes a filler 141, and the base layer 150 includes a filler 151.

[0023] like Figure 2 As shown, fillers 141 and 151 are formed in irregular shapes in the shielding layer 130. According to some embodiments of this disclosure, the size of filler 141 in the adhesive layer 140 is larger than the size of filler 151 in the base layer 150.

[0024] Figure 3AThis diagram illustrates the structure 150a of the base layer 150 provided to form a semiconductor package device 100. (See reference) Figure 3A Structure 150a includes metal particles 150' and filler 151'.

[0025] Sintering technology can be applied to structure 150a to form the base layer 150. Curing technology can be applied to structure 150a to form as shown in the reference. Figure 1 The basic layer 150 that is described and explained.

[0026] Figure 3B A schematic diagram illustrating the structure 140a of the adhesive layer 140 provided to form a semiconductor package device 100. (See reference...) Figure 3B Structure 140a includes metal particles 140' and filler 141'.

[0027] Sintering technology can be applied to structure 140a to form adhesive layer 140. Curing technology can be applied to structure 140a to form as shown in the reference. Figure 1 The adhesive layer 140 described and illustrated.

[0028] According to some embodiments of this disclosure, the size of the metal particles 140' in structure 140a of the adhesive layer 140 is larger than the size of the metal particles 150' in structure 150a of the base layer 150. The size of the filler is ≤6μm or less than the thickness of the adhesive layer 140.

[0029] The space between metal particles depends on the size of the metal particles. If the metal particles, such as Ag, are small, then the space becomes smaller. During the baking process, it is easier to sinter the metal particles to form a monolithic component, thereby increasing the conductivity of the base layer 150 and improving the shielding effectiveness.

[0030] According to some embodiments of this disclosure, the volume resistivity of the adhesive layer 140 is greater than that of the base layer 150. Table 1 shows the relationship between the resin content and the volume resistivity of three different materials. Referring to Table 1, the resin content of material (A) is about 3% to 7% by weight or by volume, and its volume resistivity is about 2 × 10⁻⁶. -5 ~5×10 -5 The resin content of material (C) is approximately 0.1% to 0.3% by weight or volume, and its volume resistivity is approximately 4.8 × 10⁻⁶ Ω·cm. -6 Ω·cm. According to Table 1, the higher resin content of adhesive layer 140 can lead to increased adhesion and reduced loss during the curing process, and also increases the volume resistivity.

[0031] Material (A) (B) (C) Resin content (%) 3～7％ 1％ 0.1～0.3％ Volume resistivity (Ω·cm) <![CDATA[2~5×10 -5 ]]> <![CDATA[8×10 -6 ]]> <![CDATA[4.8×10 -6 ]]>

[0032] Table 1

[0033] Figure 5 Display the levels of the grid method. For example... Figure 5 As shown, Grade 3B is the minimum requirement for a peel test of the shielding layer of a semiconductor package device according to some embodiments of this disclosure, wherein the adhesion strength is tested using the cross-cut test / 3M#600 tape (according to ASTM standards).

[0034] Table 2 shows the shielding requirements for shielding semiconductor packaged devices according to some embodiments of the present disclosure from low-frequency (10MHz) electromagnetic interference. As shown in Table 2, material (1) passes the 5B peel test rating of the cross-cut method, but its shielding effectiveness at 10MHz is only 5.5dB. Meanwhile, material (2) has a shielding effectiveness of 32dB at 10MHz, but fails the 2B peel test rating of the cross-cut method.

[0035] Referring to Table 2, the shielding layers, including 10μm material (1) and 35μm material (2), passed the 5B peel test of the cross-cut method and have a shielding effectiveness of 31dB.

[0036]

[0037] Table 2

[0038] According to some embodiments of this disclosure, the ratio of the thickness of the base layer 150 to the thickness of the adhesive layer 140 is in the range of 1:1 to 5:1. Compared with a shielding layer of the same thickness, if the ratio decreases, the shielding effectiveness is lower; if the ratio increases, the function of the adhesive layer 140 is reduced and the risk of shielding layer peeling increases.

[0039] According to some embodiments of this disclosure, the thickness of the adhesive layer 140 is less than the thickness of the base layer 150. For example... Figure 2 As shown, with the same shielding layer thickness, a shielding layer with lower volume resistivity achieves better shielding effectiveness. On the other hand, with the same volume resistivity, increasing the thickness of the shielding layer will correspondingly improve the shielding effectiveness.

[0040] According to some embodiments of this disclosure, a semiconductor packaging device includes a substrate. A shielding layer is disposed on an insulating layer. The shielding layer shields or protects components or devices disposed on the substrate from electromagnetic interference of a relatively low frequency. The shielding layer may comprise a layer and a base layer. The layer is disposed between the insulating layer and the base layer.

[0041] The layer contains metal. The layer may contain insulating filler. The layer may contain filler containing resin or epoxy resin. The base layer contains metal. The base layer may contain insulating filler. The base layer may contain filler containing resin or epoxy resin.

[0042] According to some embodiments of this disclosure, the amount or quantity of epoxy resin or resin in the layer is greater than that in the base layer. According to some embodiments of this disclosure, the amount or quantity of resin in the layer is about 3% by weight to 7% by weight. The amount or quantity of epoxy resin or resin in the base layer is about 0.1% by weight to 0.3% by weight. According to some embodiments of this disclosure, the amount or quantity of resin in the layer is about 3% by volume to 7% by volume. The amount or quantity of epoxy resin or resin in the base layer is about 0.1% by volume to 0.3% by volume.

[0043] According to some embodiments of this disclosure, the size of the filler in the layer is larger than the size of the filler in the base layer. Simultaneously, the volume resistivity of the layer is greater than the volume resistivity of the base layer. According to some embodiments of this disclosure, the volume resistivity of the layer is approximately 2 × 10⁻⁶. -5 ~5×10 -5 Ω·cm. According to some embodiments of this disclosure, the volume resistivity of the second metal layer is approximately 4.8 × 10⁻⁶ Ω·cm. -6 Ω·cm.

[0044] According to some embodiments of this disclosure, the shielding layer passes at least a 3B peel test rating using the cross-cut method, and the shielding effectiveness of the shielding layer is at least or equal to 30 dB.

[0045] This disclosure also provides a method for manufacturing a semiconductor packaging device. According to some embodiments of this disclosure, an insulating layer is disposed on a substrate. The insulating layer may comprise a molding compound or an encapsulation material.

[0046] Next, an adhesive layer is formed by spraying it onto the insulating layer. The adhesive layer can be a conductive paste, which may contain resin. The adhesive layer may contain particles or fillers.

[0047] Subsequently, a base layer is formed by spraying it onto the adhesive layer. The base layer can be a conductive paste, which may contain resin. The base layer may contain particles or fillers. The filler size in the adhesive layer is larger than the filler size in the base layer.

[0048] Next, the sintering process can be applied to the adhesive layer. The curing process can then be applied to the adhesive layer.

[0049] Furthermore, sintering processes can be applied to the base layer. Curing processes can also be applied to the base layer. Thus, a semiconductor packaging device is formed.

[0050] Figure 4A cross-sectional view of a semiconductor packaging device 400 according to another aspect of this disclosure is shown. The semiconductor packaging device 400 includes a substrate 410. An insulating layer 420 is disposed on the substrate 410. A shielding layer 430 is disposed on the insulating layer 420. The shielding layer 430 shields or protects components or devices disposed on the substrate 410 (e.g., 411, 412, 413, etc.) from electromagnetic interference. The shielding layer 430 is a single layer. As discussed, the thickness of the shielding layer 430 must be approximately 40 μm to shield low-frequency electromagnetic interference. If the thickness of the shielding layer is less than 40 μm, then the shielding layer fails to meet the requirement of 30 dB shielding effectiveness. On the other hand, if the thickness of the shielding layer 430 is approximately 40 μm, then the adhesive force provided by the shielding layer 430 is weak and will cause the shielding layer 430 to peel off from the molding compound. Therefore, the shielding layer will fail to pass the 3B peel test rating using the cross-cut method. As used herein, unless the context clearly indicates otherwise, the singular terms “a / an” and “the” may include multiple indicators. In the description of some embodiments, a component disposed “on” or “above” another component may cover the case where the preceding component is directly on the following component (e.g., in physical contact with the following component), and the case where one or more intermediate components are located between the preceding and following components.

[0051] Figure 5 Display the levels of the grid method. For example... Figure 5 As shown, Level 3B is the minimum requirement for a peel test of the shielding layer of a semiconductor packaging device according to some embodiments of the present disclosure.

[0052] As used herein, the terms “substantially,” “substantially,” “roughly,” and “approximately” are used to describe and explain small variations. When used in conjunction with an event or situation, the terms can refer to a situation in which the event or situation has clearly occurred or is very close to occurring. For example, when used in conjunction with numerical values, the terms can refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, the terms “approximately” or “substantially” equal to two values ​​can refer to a ratio between 0.9 and 1.1, inclusive.

[0053] Additionally, quantities, ratios, and other values ​​are sometimes presented in range format in this document. It should be understood that such range format is used for convenience and brevity, and should be flexibly interpreted to include not only values ​​explicitly specified as range limits, but also all individual values ​​or subranges covered within the range, as if each value and subrange were explicitly specified.

[0054] Although this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting of this disclosure. Those skilled in the art will understand that various changes and substitutions for equivalents may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. Illustrations may not be drawn to scale. Artistic representations in this disclosure may differ from actual devices due to manufacturing processes and tolerances. Other embodiments of this disclosure may exist that are not specifically described. The description and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, compositions, methods, or processes to the objectives, spirit, and scope of the invention. All such modifications are intended to be within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of the invention. Therefore, unless specifically indicated herein, the order and grouping of operations are not a limitation of this disclosure.

Claims

1. A semiconductor packaging apparatus, comprising: Substrate; An insulating layer disposed on the substrate; and A shielding layer disposed on the insulating layer, wherein the shielding layer comprises a first conductive layer disposed on the insulating layer and a second conductive layer disposed on the first conductive layer, the first conductive layer comprising a first filler composed of at least a first resin, and the second conductive layer comprising a second filler composed of at least a second resin. The shielding layer passes at least a 3B peel test using the cross-cut method, and the shielding effectiveness of the shielding layer is at least or equal to 30 dB. The content of the first resin in the first conductive layer is greater than the content of the second resin in the second conductive layer.

2. The semiconductor packaging apparatus of claim 1, wherein the content of the first resin in the first conductive layer is 3% to 7%.

3. The semiconductor packaging apparatus of claim 1, wherein the content of the second resin in the second conductive layer is 0.1% to 0.3%.

4. The semiconductor packaging apparatus according to claim 1, wherein the size of the first filler in the first conductive layer is greater than the size of the second filler in the second conductive layer.

5. The semiconductor packaging apparatus according to claim 1, wherein the volume resistivity of the first conductive layer is greater than the volume resistivity of the second conductive layer.

6. The semiconductor packaging apparatus of claim 5, wherein the volume resistivity of the first conductive layer is 2 × 10⁻⁶. -5 ~5×10 -5 Ω·cm.

7. The semiconductor packaging device of claim 5, wherein the volume resistivity of the second conductive layer is 4.8 × 10⁻⁶. -6 Ω·cm.

8. The semiconductor packaging apparatus of claim 1, wherein the first filler is further composed of first metal particles, and the second filler is further composed of second metal particles, wherein the size of the first metal particles in the first conductive layer is larger than the size of the second metal particles in the second conductive layer.

9. The semiconductor packaging apparatus of claim 1, wherein the thickness of the first conductive layer is less than the thickness of the second conductive layer.

10. The semiconductor packaging apparatus of claim 1, wherein the shielding effectiveness of the shielding layer is at least or equal to 30 dB at a frequency of 10 MHz.

11. The semiconductor packaging apparatus of claim 1, wherein the shielding layer passes the 5B peel test rating of the cross-cut method.

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