High-order all-pass two-port network and its construction method

Abstract

The present invention discloses a high-order all-pass two-port network and a construction method thereof, wherein the high-order all-pass two-port network is of order k, k≥3, and a topological circuit of a half structure in an odd-even mode comprises: when k is an odd number, a topological circuit in an even mode comprises a topological circuit in an even mode of order k-1 and an inductive element jX connected in parallel therewith. k The odd-mode topology circuit includes the k-1-order odd-mode topology circuit and the capacitive element jB connected in series with it. k When k is an even number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the capacitive element jB connected in series with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the inductive element jX connected in parallel with it. k The high-order all-pass two-port network of the present invention can obtain better matching bandwidth, frequency and delay performance; the network construction adopts a recursive method, which is easy to implement and can be applied to the synthesis of all-pass networks with an order greater than 2.

Description

Technical Field

[0001] The present invention belongs to the technical field of network communications, and in particular relates to a high-order all-pass two-port network and a construction method thereof. Background Art

[0002] The all-pass two-port network is mainly used in analog and RF circuit systems, and its main function is to adjust the delay characteristics of the signal. In particular, in the field of broadband phased array antennas, due to the wide signal bandwidth, the traditional phased unit using phase shifters will cause the signals in each channel to produce a delay that varies with the frequency, making it impossible to achieve accurate beamforming. Therefore, the all-pass two-port network is widely used in phased array antenna systems with high bandwidth requirements.

[0003] Traditional all-pass networks can be realized using transmission lines. Ideal transmission lines are all-pass for signals, that is, the amplitude is not attenuated by frequency changes, and only a delay effect is produced on the signal. However, the transmission lines are huge in size and have poor economic efficiency. Another type of traditional delay circuit network generally adopts the form of artificial transmission lines composed of lumped components. Its matching characteristics change with frequency, and the matching frequency range is inversely proportional to the value of the basic network unit components that constitute the artificial transmission line. It cannot be applied to ultra-wideband and high-delay application scenarios.

[0004] The delay circuit network using the all-pass two-port network as the basic unit can ideally obtain an infinite matching frequency range, and its group delay characteristic with a second-order response form can obtain a wider flat delay frequency range. However, the all-pass two-port network has the following disadvantages:

[0005] The transmission line type occupies a large area, has high process requirements and high cost;

[0006] The artificial transmission line form of lumped components is often used, which has limited matching bandwidth and cannot expand the application bandwidth;

[0007] In the form of a second-order all-pass network, the signal delay generated by the unit cell is limited, and the efficiency of signal delay generation is low.

[0008] Therefore, in view of the above technical problems, it is necessary to provide a high-order all-pass two-port network and a construction method thereof. Summary of the invention

[0009] The object of the present invention is to provide a high-order all-pass two-port network and a construction method thereof, so as to solve the problems of signal delay and the like in the prior art.

[0010] In order to achieve the above purpose, the technical solution provided by an embodiment of the present invention is as follows:

[0011] A high-order all-pass two-port network, wherein the high-order all-pass two-port network is of order k, k≥3, and a topological circuit of the half-structure in an odd-even mode includes:

[0012] When k is an odd number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the inductive element jX connected in parallel with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the capacitive element jB connected in series with it. k ;

[0013] When k is an even number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the capacitive element jB connected in series with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the inductive element jX connected in parallel with it. k .

[0014] In one embodiment, in the high-order all-pass two-port network, the inductive element jX k and capacitive element jB k satisfy X k is the reactance value of the inductive element, B k is the susceptance value of the capacitive element, and Z0 is the port matching impedance.

[0015] In one embodiment, a topological circuit of a second-order all-pass two-port network half structure in an odd-even mode includes:

[0016] The even mode includes an inductive element jX1 and a capacitive element jB2 arranged in series;

[0017] The odd mode includes a capacitive element jB1 and an inductive element jX2 connected in parallel.

[0018] In one embodiment, a topological circuit of a third-order all-pass two-port network half structure in an odd-even mode includes:

[0019] The even mode includes a topological circuit in a second-order even mode and an inductive element jX3 arranged in parallel therewith;

[0020] The odd mode includes a topological circuit in a second-order odd mode and a capacitive element jB3 arranged in series therewith.

[0021] In one embodiment, a topological circuit of a fourth-order all-pass two-port network half structure in an odd-even mode includes:

[0022] The even mode includes a topological circuit in a third-order even mode and a capacitive element jB4 arranged in series therewith;

[0023] The odd mode includes a topological circuit in a third-order odd mode and an inductive element jX4 arranged in parallel therewith.

[0024] In one embodiment, the inductive element includes an inductor, and the capacitive element includes a capacitor.

[0025] Another embodiment of the present invention provides a technical solution as follows:

[0026] A method for constructing a high-order all-pass two-port network, characterized in that the method comprises:

[0027] S1. Determine the topological circuit of the second-order full-pass two-port network half structure in odd mode and even mode;

[0028] S2. Constructing a topological circuit of a high-order all-pass two-port network semi-structure in odd and even modes, including:

[0029] When k is an odd number, the topological circuit in the even mode is a topological circuit in the k-1th order even mode with a parallel inductive element jX k The topological circuit in odd mode is a topological circuit in odd mode of order k-1 with a capacitive element jB in series. k ;

[0030] When k is an even number, the topological circuit in the even mode is a topological circuit in the k-1th order even mode with a capacitive element jB in series. k , in the topological circuit of odd mode, the parallel inductive element jX in the topological circuit of k-1 order odd mode k ;

[0031] S3. Based on the network topology synthesis in the odd-even mode, a high-order full-pass two-port network is obtained.

[0032] In one embodiment, before step S3, the step further includes:

[0033] according to Determine the inductive element jX k and capacitive element jB k The value of X k is the reactance value of the inductive element, B k is the susceptance value of the capacitive element, and Z0 is the port matching impedance.

[0034] In one embodiment, the topological circuits of the second-order all-pass two-port network half structure in odd mode and even mode are specifically:

[0035] The even mode includes an inductive element jX1 and a capacitive element jB2 arranged in series;

[0036] The odd mode includes a capacitive element jB1 and an inductive element jX2 connected in parallel.

[0037] In one embodiment, the inductive element includes an inductor, and the capacitive element includes a capacitor.

[0038] Compared with the prior art, the present invention has the following advantages:

[0039] High-order all-pass two-port networks can achieve better matching bandwidth, frequency and delay performance;

[0040] The network construction adopts a recursive method, which is easy to implement and can be applied to the synthesis of full-pass networks with an order greater than 2. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1a , 1b They are schematic diagrams of a two-port network and its semi-structure respectively;

[0043] Figure 2a , 2b They are the circuit structures of a second-order all-pass two-port network and its semi-structure respectively;

[0044] Figure 3a , 3b They are the equivalent circuit diagrams of the second-order all-pass two-port network half structure in odd mode and even mode respectively;

[0045] Figure 4a , 4b They are the topological circuit structures of the second-order full-pass two-port network semi-structure in even mode and odd mode respectively. Figure 4c It is a topological circuit structure of a second-order all-pass two-port network semi-structure;

[0046] Figure 5a , 5b They are respectively the topological circuit structures of the third-order full-pass two-port network semi-structure in even mode and odd mode in Embodiment 1 of the present invention;

[0047] Figure 6a , 6b They are respectively the topological circuit structures of the fourth-order full-pass two-port network semi-structure in even mode and odd mode in Embodiment 2 of the present invention;

[0048] Figure 7a , 7b They are respectively the topological circuit structures in the even mode and odd mode of the semi-structured k-order (k is an odd number) all-pass two-port network in Embodiment 3 of the present invention;

[0049] Figure 8a , 8bThey are respectively the topological circuit structures in the even mode and odd mode of the semi-structured k-order (k is an even number) all-pass two-port network in Embodiment 4 of the present invention;

[0050] Fig. 9 This is a comparison of the time delay-frequency characteristic curves of a fourth-order all-pass two-port network and a second-order all-pass two-port network. DETAILED DESCRIPTION

[0051] The present invention will be described in detail below in conjunction with the various embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by a person skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0052] The present invention discloses a high-order all-pass two-port network, wherein the high-order all-pass two-port network is of order k, k≥3, and a topological circuit of a half structure in an odd-even mode includes:

[0053] When k is an odd number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the inductive element jX connected in parallel with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the capacitive element jB connected in series with it. k ;

[0054] When k is an even number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the capacitive element jB connected in series with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the inductive element jX connected in parallel with it. k .

[0055] The present invention also discloses a method for constructing a high-order all-pass two-port network, comprising:

[0056] S1. Determine the topological circuit of the second-order full-pass two-port network half structure in odd mode and even mode;

[0057] S2. Constructing a topological circuit of a high-order all-pass two-port network semi-structure in odd and even modes, including:

[0058] When k is an odd number, the topological circuit in the even mode is a topological circuit in the k-1th order even mode with a parallel inductive element jX k The topological circuit in odd mode is a topological circuit in odd mode of order k-1 with a capacitive element jB in series. k ;

[0059] When k is an even number, the topological circuit in the even mode is a topological circuit in the k-1th order even mode with a capacitive element jB in series. k, in the topological circuit of odd mode, the parallel inductive element jX in the topological circuit of k-1 order odd mode k ;

[0060] S3. Based on the network topology synthesis in the odd-even mode, a high-order full-pass two-port network is obtained.

[0061] In order to ensure the reciprocity of two ports of the all-pass network, the present invention discusses an all-pass network structure with a symmetrical structure.

[0062] The all-pass two-port network synthesis method of the present invention is based on the odd-even mode theory. Figure 1a The symmetrical two-port network shown in Figure 2 only needs to be analyzed Figure 1b The electrical characteristics of the entire two-port network can be obtained by analyzing the half structure of the two-port network.

[0063] For example Figure 2a A complete second-order all-pass two-port network is shown. Figure 2b The circuit structure of the half structure after the symmetry plane is divided in the odd-even mode is:

[0064] In odd mode, the symmetry plane is grounded, and the circuit is Figure 3a As shown;

[0065] In even mode, the symmetry plane is suspended, and the circuit is: Figure 3b shown.

[0066] The present invention is further described below in conjunction with specific embodiments.

[0067] Example 1: Third-order all-pass two-port network

[0068] The topological circuits of the second-order all-pass two-port network half structure in odd-even mode include:

[0069] Ginseng Figure 4a As shown, the even mode includes an inductive element jX1 and a capacitive element jB2 arranged in series;

[0070] Ginseng Figure 4b As shown, the odd mode includes a capacitive element jB1 and an inductive element jX2 connected in parallel.

[0071] Among them, X is an inductive element, B is a capacitive element, the inductive element includes an inductor, etc., the capacitive element includes a capacitor, etc., and the subscripts of each element indicate the order of increase.

[0072] The third-order all-pass two-port network is evolved from the topological circuit of the second-order all-pass network. The topological circuits of the third-order all-pass two-port network semi-structure in odd-even mode include:

[0073] Ginseng Figure 5aAs shown, the even mode includes a topological circuit in a second-order even mode and an inductive element jX3 connected in parallel therewith, that is, the inductive element jX1 and the capacitive element jB2 are connected in series and then connected in parallel with the inductive element jX3;

[0074] Ginseng Figure 5b As shown, the odd mode includes a topological circuit in a second-order odd mode and a capacitive element jB3 connected in series therewith, that is, the capacitive element jB1 and the inductive element jX2 are connected in parallel and then connected in series with the capacitive element jB3.

[0075] Example 2: Fourth-order all-pass two-port network

[0076] The fourth-order all-pass two-port network is evolved from the topological circuit of the third-order all-pass network. The topological circuit of the third-order all-pass network is shown in Example 1 and will not be described in detail here. The topological circuit of the fourth-order all-pass two-port network half structure in the odd-even mode includes:

[0077] Ginseng Figure 6a As shown, the even mode includes a topological circuit in a third-order even mode and a capacitive element jB4 arranged in series therewith; that is, the inductive element jX1 and the capacitive element jB2 are connected in series, connected in parallel with the inductive element jX3, and then connected in series with the capacitive element jB4;

[0078] Ginseng Figure 6b As shown, the odd mode includes a topological circuit in a third-order odd mode and an inductive element jX4 connected in parallel therewith, that is, the capacitive element jB1 and the inductive element jX2 are connected in parallel, then connected in series with the capacitive element jB3, and then connected in parallel with the inductive element jX4.

[0079] Example 3: k-order all-pass two-port network (k is an odd number)

[0080] The k-order all-pass two-port network is evolved from the topological circuit of the k-1-order all-pass network. When k is an odd number, the topological circuits of the k-order all-pass two-port network half structure in the odd-even mode include:

[0081] Ginseng Figure 7a As shown, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the inductive element jX connected in parallel therewith. k ;

[0082] Ginseng Figure 7b As shown, the topological circuit in the odd mode includes the topological circuit in the k-1th order odd mode and the capacitive element jB connected in series with the topological circuit. k .

[0083] Example 4: k-order all-pass two-port network (k is an even number)

[0084] The k-order all-pass two-port network is evolved from the topological circuit of the k-1-order all-pass network. When k is an even number, the topological circuits of the k-order all-pass two-port network semi-structure in the odd-even mode include:

[0085] Ginseng Figure 8a As shown, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the capacitive element jB connected in series with it. k ;

[0086] Ginseng Figure 8b As shown, the topological circuit in the odd mode includes the topological circuit in the k-1th order odd mode and the inductive element jX connected in parallel therewith. k .

[0087] In Example 3 and Example 4, the topological circuits of the k-1 order fully-passed two-port network in odd mode and even mode are respectively regarded as a whole, and the k-order fully-passed two-port network is realized by adding a series and a parallel element in the two modes respectively. The specific adding method is dual to the generation method of the odd and even mode topology of the k-1 order fully-passed two-port network (relative to the k-2 order).

[0088] Combination Figure 4a , 4b As shown, the input impedance of the second-order all-pass two-port network half structure in odd mode and even mode is Z in，o and Z in，e , then the reflection coefficients in odd and even modes are:

[0089] To make the two-port network satisfy the all-pass characteristic, we have:

[0090] Wherein, Z0 is the port matching impedance of the system.

[0091] In the above embodiments 1-4, the inductive element jX k and capacitive element jB k satisfy X k is the reactance value of the inductive element, B k is the susceptance value of the capacitive element, and Z0 is the port matching impedance.

[0092] The method for constructing a high-order all-pass two-port network in the present invention is specifically as follows:

[0093] 1. Determine the topological circuits of the second-order all-pass two-port network half-structure in odd and even modes, as follows: Figure 4a , 4b As shown;

[0094] 2. Construct high-order all-pass two-port network semi-structure topology circuits in odd and even modes, including:

[0095] When k is an odd number, Figure 7a As shown, the topological circuit in the even mode is a topological circuit in the k-1 order even mode with a parallel inductive element jX k , Figure 7b As shown, the topological circuit in odd mode is a topological circuit in k-1 order odd mode with a capacitive element jB connected in series k ;

[0096] When k is an even number, Figure 8a As shown, the topological circuit in the even mode is a topological circuit in the k-1 order even mode with a capacitive element jB connected in series k , Figure 8b As shown, the parallel inductive element jX in the k-1th order odd-mode topological circuit is k ;

[0097] 3. According to Determine the inductive element jX k and capacitive element jB k The value of

[0098] 4. Based on the network topology in odd-even mode, a high-order full-pass two-port network is obtained.

[0099] The network topology synthesis in the odd-even mode is the inverse method of the odd-even mode analysis. By comparing the grounding and suspension requirements of the symmetry plane, a complete half structure can be constructed. For example, according to Figure 4a The second-order even-mode topology shown and Figure 4b The second-order odd-mode topology shown can be constructed Figure 4c The complete semi-structured topology shown.

[0100] The higher the order of the high-order all-pass two-port network, the higher the order of the delay characteristics obtained. In high-latency scenarios, the maximum flat delay frequency range that can be obtained is also wider.

[0101] The present invention is described by taking the fourth-order all-pass two-port network in Example 2 as an example. Fig. 9 The figure shows the delay-frequency characteristic curve comparison of the fourth-order all-pass two-port network and the second-order all-pass two-port network. It can be seen that under the same delay setting, the flat delay frequency range obtained by the fourth-order network is obviously much greater than that of the second-order network.

[0102] It can be seen from the above technical solutions that the present invention has the following beneficial effects:

[0103] High-order all-pass two-port networks can achieve better matching bandwidth, frequency and delay performance;

[0104] The network construction adopts a recursive method, which is easy to implement and can be applied to the synthesis of full-pass networks with an order greater than 2.

[0105] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0106] In addition, it should be understood that although the present specification is described according to embodiments, not every embodiment contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation methods that those skilled in the art can understand.

Claims

1. A high-order all-pass two-port network, characterized in that: The high-order all-pass two-port network is of order k, k≥3, and the topological circuit of its half structure in the odd-even mode includes: When k is an odd number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the inductive element jX connected in parallel with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the capacitive element jB connected in series with it. k ; When k is an even number, the topological circuit in the even mode includes the topological circuit in the k-1th order even mode and the capacitive element jB connected in series with it. k The odd-mode topological circuit includes the k-1-order odd-mode topological circuit and the inductive element jX connected in parallel with it. k ; In the high-order all-pass two-port network, the inductive element jX k and capacitive element jB k satisfy X k is the reactance value of the inductive element, B k is the susceptance value of the capacitive element, Z0 is the port matching impedance; The topological circuits of the second-order all-pass two-port network half structure in odd-even mode include: The even mode includes an inductive element jX1 and a capacitive element jB2 arranged in series; The odd mode includes a capacitive element jB1 and an inductive element jX2 connected in parallel.

2. The high-order all-pass two-port network according to claim 1, characterized in that: The topological circuits of the third-order all-pass two-port network semi-structure in odd-even mode include: The even mode includes a topological circuit in a second-order even mode and an inductive element jX3 arranged in parallel therewith; The odd mode includes a topological circuit in a second-order odd mode and a capacitive element jB3 arranged in series therewith.

3. The high-order all-pass two-port network according to claim 1, characterized in that: The topological circuits of the fourth-order all-pass two-port network semi-structure in odd-even mode include: The even mode includes a topological circuit in a third-order even mode and a capacitive element jB4 arranged in series therewith; The odd mode includes a topological circuit in a third-order odd mode and an inductive element jX4 arranged in parallel therewith.

4. The high-order all-pass two-port network according to any one of claims 1 to 3, characterized in that: The inductive element includes an inductor, and the capacitive element includes a capacitor.

5. A method for constructing a high-order all-pass two-port network, characterized in that: The method comprises: S1. Determine the topological circuit of the second-order full-pass two-port network half structure in odd mode and even mode; S2. Constructing a topological circuit of a high-order all-pass two-port network semi-structure in odd and even modes, including: When k is an odd number, the topological circuit in the even mode is a topological circuit in the k-1th order even mode with a parallel inductive element jX k The topological circuit in odd mode is a topological circuit in odd mode of order k-1 with a capacitive element jB in series. k ; When k is an even number, the topological circuit in the even mode is a topological circuit in the k-1th order even mode with a capacitive element jB in series. k , in the topological circuit of odd mode, the parallel inductive element jX in the topological circuit of k-1 order odd mode k ; S3, based on the network topology synthesis in odd-even mode, a high-order all-pass two-port network is obtained; The step S3 also includes: according to Determine the inductive element jX k and capacitive element jB k The value of X k is the reactance value of the inductive element, B k is the susceptance value of the capacitive element, Z0 is the port matching impedance; The topological circuit of the second-order all-pass two-port network half structure in odd mode and even mode is specifically: The even mode includes an inductive element jX1 and a capacitive element jB2 arranged in series; The odd mode includes a capacitive element jB1 and an inductive element jX2 connected in parallel.

6. The method for constructing a high-order all-pass two-port network according to claim 5, characterized in that: The inductive element includes an inductor, and the capacitive element includes a capacitor.

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